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Markus Armbruster [Sun, 28 Jun 2015 19:36:26 +0000 (21:36 +0200)]
qapi: Drop unused and useless parameters and variables
gen_sync_call()'s parameter indent is useless: gen_sync_call() uses it
only as optional argument for push_indent() and pop_indent(), their
default is four, and gen_sync_call()'s only caller passes four. Drop
the parameter.
gen_visitor_input_containers_decl()'s parameter obj is always
"QOBJECT(args)". Use that, and drop the parameter.
Drop unused parameters of gen_marshal_output(),
gen_marshal_input_decl(), generate_visit_struct_body(),
generate_visit_list(), generate_visit_enum(), generate_declaration(),
generate_enum_declaration(), generate_decl_enum().
Drop unused variables in generate_event_enum_lookup(),
generate_enum_lookup(), generate_visit_struct_fields(), check_event().
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Markus Armbruster [Wed, 1 Jul 2015 11:13:54 +0000 (13:13 +0200)]
qapi: Reject -p arguments that break qapi-event.py
qapi-event.py breaks when you ask for a funny prefix like '@'.
Protect it.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Markus Armbruster [Wed, 1 Jul 2015 10:59:40 +0000 (12:59 +0200)]
qapi-event: Clean up how name of enum QAPIEvent is made
Use c_name() instead of ad hoc code. Doesn't upcase the -p prefix,
which is an improvement in my book. Unbreaks prefix containing '.',
but other funny characters remain broken. To be fixed next.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Markus Armbruster [Sat, 27 Jun 2015 05:27:21 +0000 (07:27 +0200)]
qapi: Simplify guardname()
The guards around built-in declarations lose their _H. It never made
much sense anyway.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Markus Armbruster [Wed, 24 Jun 2015 17:27:32 +0000 (19:27 +0200)]
qapi: Clean up cgen() and mcgen()
Commit
05dfb26 added eatspace stripping to mcgen(). Move it to
cgen(), just in case somebody gets tempted to use cgen() directly
instead of via mcgen().
cgen() indents blank lines. No such lines get generated right now,
but fix it anyway.
We use triple-quoted strings for program text, like this:
'''
Program text
any number of lines
'''
Keeps the program text relatively readable, but puts an extra newline
at either end. mcgen() "fixes" that by dropping the first and last
line outright. Drop only the newlines.
This unmasks a bug in qapi-commands.py: four quotes instead of three.
Fix it up.
Output doesn't change
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Markus Armbruster [Tue, 9 Jun 2015 13:24:36 +0000 (15:24 +0200)]
qapi: Clarify docs on including the same file multiple times
It's idempotent.
While there, update examples to current code.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Peter Maydell [Thu, 3 Sep 2015 15:17:28 +0000 (16:17 +0100)]
Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging
# gpg: Signature made Thu 03 Sep 2015 15:46:52 BST using RSA key ID
81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
* remotes/stefanha/tags/tracing-pull-request:
trace-events: Add hmp completion
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Dr. David Alan Gilbert [Fri, 14 Aug 2015 10:27:43 +0000 (11:27 +0100)]
trace-events: Add hmp completion
Add completion for the trace event names in the hmp trace-event
command.
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-id:
1439548063-18410-1-git-send-email-dgilbert@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Peter Maydell [Thu, 3 Sep 2015 13:33:03 +0000 (14:33 +0100)]
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-
20150903' into staging
First batch of s390x patches for 2.5:
- introduce 2.5 compat machine
- support for migration of storage keys
# gpg: Signature made Thu 03 Sep 2015 11:28:06 BST using RSA key ID
C6F02FAF
# gpg: Good signature from "Cornelia Huck <huckc@linux.vnet.ibm.com>"
# gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>"
* remotes/cohuck/tags/s390x-
20150903:
s390x: Disable storage key migration on old machine type
s390x: Migrate guest storage keys (initial memory only)
s390x: Info skeys sub-command
s390x: Dump-skeys hmp support
s390x: Dump storage keys qmp command
s390x: Enable new s390-storage-keys device
s390x: Create QOM device for s390 storage keys
s390x: add 2.5 compat s390-ccw-virtio machine
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 3 Sep 2015 12:05:45 +0000 (13:05 +0100)]
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-
20150902' into staging
queued tcg patches
# gpg: Signature made Wed 02 Sep 2015 22:35:37 BST using RSA key ID
4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
* remotes/rth/tags/pull-tcg-
20150902:
tcg/i386: omit a few REXW prefixes in softmmu code
tcg/aarch64: Fix tcg_out_qemu_{ld, st} for guest_base == 0
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 3 Sep 2015 11:09:41 +0000 (12:09 +0100)]
Merge remote-tracking branch 'remotes/rth/tags/pull-axp-
20150902' into staging
cmpbge emulation improvements
# gpg: Signature made Wed 02 Sep 2015 20:25:10 BST using RSA key ID
4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
* remotes/rth/tags/pull-axp-
20150902:
target-alpha: Special case cmpbge with zero
target-alpha: Rewrite helper_cmpbge using bit tests
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Jason J. Herne [Thu, 9 Jul 2015 17:56:44 +0000 (13:56 -0400)]
s390x: Disable storage key migration on old machine type
This code disables storage key migration when an older machine type is
specified.
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Jason J. Herne [Fri, 26 Jun 2015 18:11:23 +0000 (14:11 -0400)]
s390x: Migrate guest storage keys (initial memory only)
Routines to save/load guest storage keys are provided. register_savevm is
called to register them as migration handlers.
We prepare the protocol to support more complex parameters. So we will
later be able to support standby memory (having empty holes), compression
and "state live migration" like done for ram.
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Jason J. Herne [Fri, 26 Jun 2015 18:10:16 +0000 (14:10 -0400)]
s390x: Info skeys sub-command
Provide an info skeys hmp sub-command to allow the end user to dump a storage
key for a given address. This is useful for guest operating system developers.
Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Jason J. Herne [Fri, 26 Jun 2015 18:07:21 +0000 (14:07 -0400)]
s390x: Dump-skeys hmp support
Add dump-skeys command to the human monitor.
Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Jason J. Herne [Fri, 26 Jun 2015 18:03:16 +0000 (14:03 -0400)]
s390x: Dump storage keys qmp command
Provide a dump-skeys qmp command to allow the end user to dump storage
keys. This is useful for debugging problems with guest storage key support
within Qemu and for guest operating system developers.
Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Jason J. Herne [Fri, 26 Jun 2015 18:01:00 +0000 (14:01 -0400)]
s390x: Enable new s390-storage-keys device
s390 guest initialization is modified to make use of new s390-storage-keys
device. Old code that globally allocated storage key array is removed.
The new device enables storage key access for kvm guests.
Cache storage key QOM objects in frequently used helper functions to avoid a
performance hit every time we use one of these functions.
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Jason J. Herne [Fri, 26 Jun 2015 15:54:51 +0000 (11:54 -0400)]
s390x: Create QOM device for s390 storage keys
A new QOM style device is provided to back guest storage keys. A special
version for KVM is created, which handles the storage key access via
KVM_S390_GET_SKEYS and KVM_S390_SET_SKEYS ioctl.
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Cornelia Huck [Fri, 17 Jul 2015 11:16:52 +0000 (13:16 +0200)]
s390x: add 2.5 compat s390-ccw-virtio machine
Reviewed-by: Jason J. Herne <jjherne@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Peter Maydell [Thu, 3 Sep 2015 10:15:01 +0000 (11:15 +0100)]
Merge remote-tracking branch 'remotes/stefanha/tags/net-pull-request' into staging
# gpg: Signature made Wed 02 Sep 2015 17:14:40 BST using RSA key ID
81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
* remotes/stefanha/tags/net-pull-request:
ne2000: Drop ne2000_can_receive
vmxnet3: Drop net_vmxnet3_info.can_receive
rtl8139: Do not consume the packet during overflow in standard mode.
rtl8139: Fix receive buffer overflow check
rtl8139: use ldl/stl wrapper for unaligned 32-bit access
rtl8139: use net/eth.h macros instead of custom macros
rtl8139: remove duplicate net/eth.h definitions
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 3 Sep 2015 08:50:37 +0000 (09:50 +0100)]
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging
# gpg: Signature made Wed 02 Sep 2015 17:01:33 BST using RSA key ID
81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
* remotes/stefanha/tags/block-pull-request:
block: more check for replaced node
MAINTAINERS: add responsible person for Parallels format driver
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Aurelien Jarno [Sun, 19 Jul 2015 11:50:32 +0000 (13:50 +0200)]
tcg/i386: omit a few REXW prefixes in softmmu code
When computing the TLB address we are likely to mask out the high
32-bits by using shr + and. We can use 32-bit instructions in that
case. This saves 2 bytes per TLB access.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <
1437306632-20655-1-git-send-email-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Tue, 1 Sep 2015 19:58:02 +0000 (15:58 -0400)]
tcg/aarch64: Fix tcg_out_qemu_{ld, st} for guest_base == 0
In
ffc6372851d8631a9f9fa56ec613b3244dc635b9, we swapped the guest
base to the address base register from the address index register.
Except that 31 in the base slot is SP not XZR, so we need to be
more intelligent about which reg gets placed in which slot.
Cc: qemu-stable@nongnu.org (v2.4.0)
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reported-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Wen Congyang [Fri, 17 Jul 2015 02:12:22 +0000 (10:12 +0800)]
block: more check for replaced node
We use mirror+replace to fix quorum's broken child. bs/s->common.bs
is quorum, and to_replace is the broken child. The new child is target_bs.
Without this patch, the replace node can be any node, and it can be
top BDS with BB, or another quorum's child. We just check if the broken
child is part of the quorum BDS in this patch.
Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Message-id:
55A86486.
1000404@cn.fujitsu.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Denis V. Lunev [Fri, 21 Aug 2015 17:44:16 +0000 (20:44 +0300)]
MAINTAINERS: add responsible person for Parallels format driver
Denis has spent 6 years working with this format in Parallels and QEMU
code was rewritten almost completely by his. Thus it would be quite
natural to add him as a maintainer and point of contact.
Patches are going to flow though Stefan's tree.
Signed-off-by: Denis V. Lunev <den@openvz.org>
Message-id:
1440179056-12934-1-git-send-email-den@openvz.org
CC: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Fam Zheng [Wed, 1 Jul 2015 05:25:05 +0000 (13:25 +0800)]
ne2000: Drop ne2000_can_receive
ne2000_receive already checks the same conditions and drops the packet
if it's not ready, removing the .can_receive callback avoids the
necessity to add explicit flushes when the conditions turn true (which
is required by the new semantics of .can_receive since
6e99c63
"net/socket: Drop net_socket_can_send").
Plus the "return 1" if E8390_STOP is also suspicious.
Signed-off-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Fam Zheng [Wed, 1 Jul 2015 02:26:27 +0000 (10:26 +0800)]
vmxnet3: Drop net_vmxnet3_info.can_receive
Commit
6e99c63 ("net/socket: Drop net_socket_can_send") changed the
semantics around .can_receive for sockets to now require the device to
flush queued pkts when transitioning to a .can_receive=true state. But
it's OK to drop incoming packets when the link is not active.
Signed-off-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Vladislav Yasevich [Tue, 1 Sep 2015 15:26:46 +0000 (11:26 -0400)]
rtl8139: Do not consume the packet during overflow in standard mode.
When operation in standard mode, we currently return the size
of packet during buffer overflow. This consumes the overflow
packet. Return 0 instead so we can re-process the overflow packet
when we have room.
This fixes issues with lost/dropped fragments of large messages.
Signed-off-by: Vladislav Yasevich <vyasevic@redhat.com>
Reviewed-by: Jason Wang <jasowang@redhat.com>
Message-id:
1441121206-6997-3-git-send-email-vyasevic@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Vladislav Yasevich [Tue, 1 Sep 2015 15:26:45 +0000 (11:26 -0400)]
rtl8139: Fix receive buffer overflow check
rtl8139_do_receive() tries to check for the overflow condition
by making sure that packet_size + 8 does not exceed the
available buffer space. The issue here is that RxBuffAddr,
used to calculate available buffer space, is aligned to a
a 4 byte boundry after every update. So it is possible that
every packet ends up being slightly padded when written
to the receive buffer. This padding is not taken into
account when checking for overflow and we may end up missing
the overflow condition can causing buffer overwrite.
This patch takes alignment into consideration when
checking for overflow condition.
Signed-off-by: Vladislav Yasevich <vyasevic@redhat.com>
Reviewed-by: Jason Wang <jasowang@redhat.com>
Message-id:
1441121206-6997-2-git-send-email-vyasevic@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Mon, 3 Aug 2015 12:15:57 +0000 (13:15 +0100)]
rtl8139: use ldl/stl wrapper for unaligned 32-bit access
The tx offload feature accesses a 16-bit aligned TCP header struct. The
32-bit fields must be accessed using ldl/stl wrappers since some host
architectures fault on unaligned access.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Jason Wang <jasowang@redhat.com>
Message-id:
1438604157-29664-4-git-send-email-stefanha@redhat.com
Stefan Hajnoczi [Mon, 3 Aug 2015 12:15:56 +0000 (13:15 +0100)]
rtl8139: use net/eth.h macros instead of custom macros
Eliminate the following "custom" macros since they are just duplicates
of net/eth.h macros under a different name:
ETHER_ADDR_LEN -> ETH_ALEN
ETH_P_8021Q -> ETH_P_VLAN
IP_HEADER_LENGTH -> IP_HDR_GET_LEN
TCP_FLAG_FIN -> TH_FIN
TCP_FLAG_PUSH -> TH_PUSH
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Jason Wang <jasowang@redhat.com>
Message-id:
1438604157-29664-3-git-send-email-stefanha@redhat.com
Stefan Hajnoczi [Mon, 3 Aug 2015 12:15:55 +0000 (13:15 +0100)]
rtl8139: remove duplicate net/eth.h definitions
The transmit offload features inspect Ethernet, IP, TCP, and UDP
headers. Avoid redefining these net/eth.h structs.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Jason Wang <jasowang@redhat.com>
Message-id:
1438604157-29664-2-git-send-email-stefanha@redhat.com
Peter Maydell [Tue, 1 Sep 2015 18:42:43 +0000 (19:42 +0100)]
Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2015-09-01-v2-tag' into staging
qemu-ga patch queue
* add config file dump/load support for qemu-ga
* various w32 build fixes, particularly WRT to msi package creation
* fixes for msi installer
* w32 support for guest-set-user-password
v2:
* replaced g_list_free_full with g_list_foreach to maintain glib 2.22
compatibility
# gpg: Signature made Tue 01 Sep 2015 19:34:15 BST using RSA key ID
F108B584
# gpg: Good signature from "Michael Roth <flukshun@gmail.com>"
# gpg: aka "Michael Roth <mdroth@utexas.edu>"
# gpg: aka "Michael Roth <mdroth@linux.vnet.ibm.com>"
* remotes/mdroth/tags/qga-pull-2015-09-01-v2-tag: (26 commits)
Makefile: qemu-ga: fix msi target error message
build: qemu-ga: fix VSS dependencies
configure: qemu-ga: explicitly enable qemu-ga MSI support when probed
configure: qemu-ga: move MSI installer probe after qga probe
qemu-ga: implement win32 guest-set-user-password
qga: start a man page
qga: add --dump-conf option
qga: add an optional qemu-ga.conf system configuration
qga: free a bit more
qga: move agent run in a separate function
qga: fill default options in main()
qga: move option parsing to separate function
qga: copy argument strings
qga: rename 'path' to 'channel_path'
qga: make split_list() return allocated strings
qga: move string split in separate function
qga: use exit() when parsing options
qga: misc spelling
configure: qemu-ga: report MSI install support in summary
qemu-ga: Fixed paths issue with MSI build
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Michael Roth [Wed, 26 Aug 2015 22:05:01 +0000 (17:05 -0500)]
Makefile: qemu-ga: fix msi target error message
'msi' target reports error if we attempt to use it when QEMU hasn't
been ./configure'd to enable it. The parenthesis cause an interpreter
error if we don't enclose the error in quotes.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Michael Roth [Wed, 26 Aug 2015 21:19:41 +0000 (16:19 -0500)]
build: qemu-ga: fix VSS dependencies
Currently VSS dll/tlb files for use in w32 builds are only built as a
result of having been added to the general 'tools' target alongside
qemu-ga. This is fine for default make target, but if we build
qemu-ga directly via `make qemu-ga.exe`, the VSS files are not
created.
Fix this by moving the VSS dependencies to qemu-ga.exe directly.
With this move we can move the VSS files back out of 'tools',
and drop the extra handling from MSI target in Makefile.
Now we can build qemu-ga MSI package with:
./configure ...
make qemu-ga.exe
make msi
or simply:
./configure ...
make msi
and no longer need to do a full build beforehand.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Michael Roth [Wed, 26 Aug 2015 16:14:31 +0000 (11:14 -0500)]
configure: qemu-ga: explicitly enable qemu-ga MSI support when probed
Currently, if we don't explicitly disable support for MSI installer
via --disable-guest-agent-msi, the configure variable that tracks
the flag, 'guest_agent_msi', never gets set unless one of the probes
fails. Subsequent code then treats this unset value the same as if it
were a "yes" value (via != "no" style checks).
Instead, set the default "yes" value explicitly after the probes, then
make subsequent code expect the values to be set.
This makes it easier to report on whether or not MSI support was
enabled via probe by looking at the ./configure summary.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Michael Roth [Wed, 26 Aug 2015 15:49:13 +0000 (10:49 -0500)]
configure: qemu-ga: move MSI installer probe after qga probe
MSI probe assumes that qemu-ga support has been probed already, but in
cases where --enable-guest-agent/--disable-guest-agent have not been
passed to configure, qemu-ga support may end up getting enabled later,
as is the case with w32 builds. This leads to MSI probe prematurely
reporting error due to lack of qemu-ga support.
Fix this by moving MSI installer probe after the final qga probes.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Tue, 30 Jun 2015 14:37:13 +0000 (16:37 +0200)]
qemu-ga: implement win32 guest-set-user-password
Use NetUserSetInfo() to set the user password.
This function is notoriously known to be problematic for users with EFS
encrypted files. But the alternative, NetUserChangePassword() requires
the old password. Nevertheless, The EFS file should be recovered by
changing back to the old password.
Signed-off-by: Marc-André Lureau <marcandre.lureau@gmail.com>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:59 +0000 (01:34 +0200)]
qga: start a man page
Add a simple man page for the qemu agent.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
*squashed in review comments from Eric Blake <eblake@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:58 +0000 (01:34 +0200)]
qga: add --dump-conf option
This new option allows to review the agent configuration,
and ease the task of writing a configuration file.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
* removed unecessary keyfile != NULL prior to free
* documented --dump-conf is qemu-ga --help output
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:57 +0000 (01:34 +0200)]
qga: add an optional qemu-ga.conf system configuration
Learn to configure the agent with a system configuration.
This may simplify command-line handling, especially when the blacklist
is long.
Among the other benefits, this may standardize the configuration of an
init service (instead of distro-specific init keys/files)
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
* removed unecessary keyfile != NULL prior to free
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:56 +0000 (01:34 +0200)]
qga: free a bit more
Now that main() has a single exit point, we can free a few
more allocations.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:55 +0000 (01:34 +0200)]
qga: move agent run in a separate function
Once the options are populated, move the running state to
a run_agent() function.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
* fixed up an s/ga_state/s/ artifact causing segfault
* replaced g_list_free_full with g_list_foreach to maintain glib
2.22 compatibility
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:54 +0000 (01:34 +0200)]
qga: fill default options in main()
Fill all default options during main(). This is a preparation patch
to allow to dump the configuration.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:53 +0000 (01:34 +0200)]
qga: move option parsing to separate function
Move option parsing out of giant main().
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:52 +0000 (01:34 +0200)]
qga: copy argument strings
Following patch will return allocated strings, so we must correctly
initialize alloc & free them. The nice side effect is that we no longer
have to check for "fixed_state_dir" to call ga_install_service() with a
NULL state dir. The default values are set after parsing the command
line options.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:51 +0000 (01:34 +0200)]
qga: rename 'path' to 'channel_path'
'path' is already a global function, rename the variable since it's
going to be in global scope in a later patch.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:50 +0000 (01:34 +0200)]
qga: make split_list() return allocated strings
In order to avoid any confusion, let's allocate new strings when
splitting.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:49 +0000 (01:34 +0200)]
qga: move string split in separate function
The function is going to be reused in a later patch.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:48 +0000 (01:34 +0200)]
qga: use exit() when parsing options
The option parsing is going to be moved to a separate function,
use exit() consistently.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:47 +0000 (01:34 +0200)]
qga: misc spelling
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Michael Roth [Tue, 25 Aug 2015 20:46:18 +0000 (15:46 -0500)]
configure: qemu-ga: report MSI install support in summary
Currently we need to examine config-host.mak to determine whether
options/probes for MSI package generation had desired result. Report
this more prominently in ./configure summary as we do with other
guest agent configure options.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Wed, 26 Aug 2015 12:07:16 +0000 (15:07 +0300)]
qemu-ga: Fixed paths issue with MSI build
Previously, if building out-of-tree, the MSI build would fail since
it wasn't able to find the needed files.
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
* fixed up commit msg formating
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Mon, 3 Aug 2015 17:54:24 +0000 (20:54 +0300)]
qemu-ga: Prevent QEMU-GA VSS provider from being unregistered on MSI reinstall
Previously, running the .msi would unregister the QEMU GA VSS service if QEMU GA was already installed on the machine, and then register it only if QEMU GA was NOT previously installed. This behavior caused the service to be registered only after the INITIAL installation, and any subsequent run of the .msi (to redo, repair, or upgrade the installation) ended in the service being unregistered.
Now, the VSS service is still unregistered if QEMU GA is already installed (so that a fix or an update could be performed) but then it is registered again (if the GA is not being uninstalled) thus finishing the repair/upgrade correctly. Additionally, downgrading is now prevented. If a user would like to downgrade a version, he/she must uninstall the newer version first.
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Mon, 3 Aug 2015 17:54:23 +0000 (20:54 +0300)]
qemu-ga: Created a separate component for each installed file in the MSI
This is done to follow the recommendations given here: https://msdn.microsoft.com/en-us/library/
aa368269%28VS.85%29.aspx
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Mon, 3 Aug 2015 17:54:22 +0000 (20:54 +0300)]
qemu-ga: Minor cosmetic changes to the WXS file
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Mon, 3 Aug 2015 17:54:21 +0000 (20:54 +0300)]
qemu-ga: Fixed GUID capitalization
For compatibility, all the letters in GUID should be capital.
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Wed, 29 Jul 2015 17:10:51 +0000 (20:10 +0300)]
qemu-ga: Two MSI related cosmetic changes
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Wed, 29 Jul 2015 17:10:50 +0000 (20:10 +0300)]
qemu-ga: Add .msi files to .gitignore
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Laurent Vivier [Fri, 28 Aug 2015 10:23:41 +0000 (12:23 +0200)]
s390: fix softmmu compilation
guest_base must be used only in linux-user mode.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-id:
1440757421-9674-1-git-send-email-laurent@vivier.eu
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 28 Aug 2015 10:42:53 +0000 (11:42 +0100)]
qemu-doc.texi: Fix capitalization error in OS X build instructions
Fix a capitalization error in the OS X build instructions;
this was picked up in review of commit
b352153f5f and intended to be
corrected before I applied it, but I accidentally didn't include it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
G 3 [Fri, 14 Aug 2015 17:54:25 +0000 (13:54 -0400)]
From: John Arbuckle <programmingkidx@gmail.com>
qemu-doc.texi: Add information on compiling source code on Mac OS X
Add information to the documentation on how to build QEMU
on Mac OS X.
Signed-off-by: John Arbuckle <programmingkidx@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: fixed a minor capitalization error]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 27 Aug 2015 12:31:55 +0000 (13:31 +0100)]
Merge remote-tracking branch 'remotes/weil/tags/pull-tci-
20150826' into staging
tci patch queue
# gpg: Signature made Wed 26 Aug 2015 19:51:07 BST using RSA key ID
677450AD
# gpg: Good signature from "Stefan Weil <sw@weilnetz.de>"
# gpg: aka "Stefan Weil <stefan.weil@weilnetz.de>"
# gpg: aka "Stefan Weil <stefan.weil@bib.uni-mannheim.de>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 4923 6FEA 75C9 5D69 8EC2 B78A E08C 21D5 6774 50AD
* remotes/weil/tags/pull-tci-
20150826:
exec-all: Translate TCI return addresses backwards too
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Crosthwaite [Tue, 18 Aug 2015 03:28:18 +0000 (20:28 -0700)]
exec-all: Translate TCI return addresses backwards too
This subtraction of return addresses applies directly to TCI as well as
host-TCG. This fixes Linux boots for at least Microblaze, CRIS, ARM and
SH4 when using TCI.
[sw: Removed indentation for preprocessor statement]
[sw: The patch also fixes Linux boot for x86_64]
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Peter Maydell [Wed, 26 Aug 2015 16:45:09 +0000 (17:45 +0100)]
Merge remote-tracking branch 'remotes/kraxel/tags/pull-cve-2015-5225-
20150826-1' into staging
vnc: fix memory corruption (CVE-2015-5225)
# gpg: Signature made Wed 26 Aug 2015 17:37:21 BST using RSA key ID
D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
* remotes/kraxel/tags/pull-cve-2015-5225-
20150826-1:
vnc: fix memory corruption (CVE-2015-5225)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Gerd Hoffmann [Mon, 17 Aug 2015 17:56:53 +0000 (19:56 +0200)]
vnc: fix memory corruption (CVE-2015-5225)
The _cmp_bytes variable added by commit "
bea60dd ui/vnc: fix potential
memory corruption issues" can become negative. Result is (possibly
exploitable) memory corruption. Reason for that is it uses the stride
instead of bytes per scanline to apply limits.
For the server surface is is actually fine. vnc creates that itself,
there is never any padding and thus scanline length always equals stride.
For the guest surface scanline length and stride are typically identical
too, but it doesn't has to be that way. So add and use a new variable
(guest_ll) for the guest scanline length. Also rename min_stride to
line_bytes to make more clear what it actually is. Finally sprinkle
in an assert() to make sure we never use a negative _cmp_bytes again.
Reported-by: 范祚至(库特) <zuozhi.fzz@alibaba-inc.com>
Reviewed-by: P J P <ppandit@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Peter Maydell [Tue, 25 Aug 2015 15:24:06 +0000 (16:24 +0100)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-
20150825-1' into staging
target-arm queue:
* add missing EL2/EL3 TLBI operations
* add missing EL2/EL3 ATS operations
* add missing EL2/EL3 registers
* update Xilinx MAINTAINERS info
* Xilinx: connect the four OCM banks
# gpg: Signature made Tue 25 Aug 2015 16:22:43 BST using RSA key ID
14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
* remotes/pmaydell/tags/pull-target-arm-
20150825-1:
target-arm: Implement AArch64 TLBI operations on IPAs
target-arm: Implement missing EL3 TLB invalidate operations
target-arm: Implement missing EL2 TLBI operations
target-arm: Restrict AArch64 TLB flushes to the MMU indexes they must touch
target-arm: Move TLBI ALLE1/ALLE1IS definitions into numeric order
cputlb: Add functions for flushing TLB for a single MMU index
target-arm: Implement AArch32 ATS1H* operations
target-arm: Enable the AArch32 ATS12NSO ops
target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3
target-arm: Wire up AArch64 EL2 and EL3 address translation ops
target-arm: there is no TTBR1 for 32-bit EL2 stage 1 translations
target-arm: Implement missing ACTLR registers
target-arm: Implement missing AFSR registers
target-arm: Implement missing AMAIR registers
target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registers
MAINTAINERS: Add ZynqMP to MAINTAINERS file
MAINTAINERS: Update Xilinx Maintainership
xlnx-zynqmp: Connect the four OCM banks
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 25 Aug 2015 14:45:10 +0000 (15:45 +0100)]
target-arm: Implement AArch64 TLBI operations on IPAs
Implement the AArch64 TLBI operations which take an intermediate
physical address and invalidate stage 2 translations.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-7-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:10 +0000 (15:45 +0100)]
target-arm: Implement missing EL3 TLB invalidate operations
Implement the remaining stage 1 TLB invalidate operations
visible from EL3.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-6-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:09 +0000 (15:45 +0100)]
target-arm: Implement missing EL2 TLBI operations
Implement the missing TLBI operations that exist only
if EL2 is implemented.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-5-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:09 +0000 (15:45 +0100)]
target-arm: Restrict AArch64 TLB flushes to the MMU indexes they must touch
Now we have the ability to flush the TLB only for specific MMU indexes,
update the AArch64 TLB maintenance instruction implementations to only
flush the parts of the TLB they need to, rather than doing full flushes.
We take the opportunity to remove some duplicate functions (the per-asid
tlb ops work like the non-per-asid ones because we don't support
flushing a TLB only by ASID) and to bring the function names in line
with the architectural TLBI operation names.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-4-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:09 +0000 (15:45 +0100)]
target-arm: Move TLBI ALLE1/ALLE1IS definitions into numeric order
Move the two regdefs for TLBI ALLE1 and TLBI ALLE1IS down so that the
whole set of AArch64 TLBI regdefs is arranged in numeric order.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:09 +0000 (15:45 +0100)]
cputlb: Add functions for flushing TLB for a single MMU index
Guest CPU TLB maintenance operations may be sufficiently
specialized to only need to flush TLB entries corresponding
to a particular MMU index. Implement cputlb functions for
this, to avoid the inefficiency of flushing TLB entries
which we don't need to.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-2-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:08 +0000 (15:45 +0100)]
target-arm: Implement AArch32 ATS1H* operations
Implement the AArch32 ATS1H* operations which perform
Hyp mode stage 1 translations.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1437751263-21913-6-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:08 +0000 (15:45 +0100)]
target-arm: Enable the AArch32 ATS12NSO ops
Apply the correct conditions in the ats_access() function for
the ATS12NSO* address translation operations:
* succeed at EL2 or EL3
* normal UNDEF trap from NS EL1
* trap to EL3 from S EL1 (only possible if EL3 is AArch64)
(This change means they're now available in our EL3-supporting
CPUs when they would previously always UNDEF.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1437751263-21913-5-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:08 +0000 (15:45 +0100)]
target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3
Some coprocessor register access functions need to be able
to report "trap to EL3 with an 'uncategorized' syndrome";
add the necessary CPAccessResult enum and handling for it.
I don't currently know of any registers that need to trap
to EL2 with the 'uncategorized' syndrome, but adding the
_EL2 enum as well is trivial and fills in what would
otherwise be an odd gap in the handling.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1437751263-21913-4-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:08 +0000 (15:45 +0100)]
target-arm: Wire up AArch64 EL2 and EL3 address translation ops
Wire up the AArch64 EL2 and EL3 address translation operations
(AT S12E1*, AT S12E0*, AT S1E2*, AT S1E3*), and correct some
errors in the ats_write64() function in previously unused code
that would have done the wrong kind of lookup for accesses from
EL3 when SCR.NS==0.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1437751263-21913-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:08 +0000 (15:45 +0100)]
target-arm: there is no TTBR1 for 32-bit EL2 stage 1 translations
For EL2 stage 1 translations, there is no TTBR1. We were already
handling this for 64-bit EL2; add the code to take the 'no TTBR1'
code path for 64-bit EL2 as well.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1437751263-21913-2-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)]
target-arm: Implement missing ACTLR registers
We already implemented ACTLR_EL1; add the missing ACTLR_EL2 and
ACTLR_EL3, for consistency.
Since we don't currently have any CPUs that need the EL2/EL3
versions to reset to non-zero values, implement as RAZ/WI.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1438281398-18746-5-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)]
target-arm: Implement missing AFSR registers
The AFSR registers are implementation dependent auxiliary fault
status registers. We already implemented a RAZ/WI AFSR0_EL1 and
AFSR_EL1; add the missing AFSR{0,1}_EL{2,3} for consistency.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1438281398-18746-4-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)]
target-arm: Implement missing AMAIR registers
The AMAIR registers are for providing auxiliary implementation
defined memory attributes. We already implemented a RAZ/WI
AMAIR_EL1; add the EL2 and EL3 versions for consistency.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1438281398-18746-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)]
target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registers
Add the AArch64 registers MAIR_EL3 and TPIDR_EL3, which are the only
two which we had implemented the 32-bit Secure equivalents of but
not the 64-bit Secure versions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1438281398-18746-2-git-send-email-peter.maydell@linaro.org
Alistair Francis [Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)]
MAINTAINERS: Add ZynqMP to MAINTAINERS file
Add the Xilinx ZynqMP SoC and EP108 machine to the maintainers
file.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id:
fed078103a0b02cfb3adadbe8e80e4420d554505.
1436486024.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alistair Francis [Tue, 25 Aug 2015 14:45:06 +0000 (15:45 +0100)]
MAINTAINERS: Update Xilinx Maintainership
Peter C is leaving Xilinx, so update the maintainer list
to point to Alistair and Edgar from Xilinx and Peter's
personal email address.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id:
54b4c070452bac05aa3a9c1d75899bc097fef831.
1436486024.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alistair Francis [Tue, 25 Aug 2015 14:45:06 +0000 (15:45 +0100)]
xlnx-zynqmp: Connect the four OCM banks
The Xilinx EP108 has four separate OCM banks which are located
adjacent to each other. This patch adds the four banks to
the ZynqMP SoC.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id:
afa6ba31163a5d541a0bef4b0dc11f2597e0c495.
1436813543.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 25 Aug 2015 12:34:57 +0000 (13:34 +0100)]
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-
20150824' into staging
queued tcg patches
# gpg: Signature made Mon 24 Aug 2015 19:37:15 BST using RSA key ID
4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
* remotes/rth/tags/pull-tcg-
20150824:
linux-user: remove useless macros GUEST_BASE and RESERVED_VA
linux-user: remove --enable-guest-base/--disable-guest-base
tcg/aarch64: Use softmmu fast path for unaligned accesses
tcg/s390: Use softmmu fast path for unaligned accesses
tcg/ppc: Improve unaligned load/store handling on 64-bit backend
tcg/i386: use softmmu fast path for unaligned accesses
tcg: Remove tcg_gen_trunc_i64_i32
tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32
tcg: update README about size changing ops
tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops
tcg: implement real ext_i32_i64 and extu_i32_i64 ops
tcg: don't abuse TCG type in tcg_gen_trunc_shr_i64_i32
tcg: rename trunc_shr_i32 into trunc_shr_i64_i32
tcg/optimize: allow constant to have copies
tcg/optimize: track const/copy status separately
tcg/optimize: add temp_is_const and temp_is_copy functions
tcg/optimize: optimize temps tracking
tcg/optimize: fix constant signedness
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Laurent Vivier [Mon, 24 Aug 2015 12:53:54 +0000 (14:53 +0200)]
linux-user: remove useless macros GUEST_BASE and RESERVED_VA
As we have removed CONFIG_USE_GUEST_BASE, we always use a guest base
and the macros GUEST_BASE and RESERVED_VA become useless: replace
them by their values.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
1440420834-8388-1-git-send-email-laurent@vivier.eu>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Laurent Vivier [Sun, 23 Aug 2015 23:42:07 +0000 (01:42 +0200)]
linux-user: remove --enable-guest-base/--disable-guest-base
All tcg host architectures now support the guest base and as
there is no real performance lost, it can be always enabled.
Anyway, guest base use can be disabled lively by setting guest
base to 0.
CONFIG_USE_GUEST_BASE is defined as (USE_GUEST_BASE && USER_ONLY),
it should have to be replaced by CONFIG_USER_ONLY in non CONFIG_USER_ONLY
parts, but as some other parts are using !CONFIG_SOFTMMU I have chosen to
use !CONFIG_SOFTMMU instead.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
1440373328-9788-2-git-send-email-laurent@vivier.eu>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Mon, 17 Aug 2015 19:18:05 +0000 (12:18 -0700)]
tcg/aarch64: Use softmmu fast path for unaligned accesses
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Thu, 23 Jul 2015 20:32:35 +0000 (13:32 -0700)]
tcg/s390: Use softmmu fast path for unaligned accesses
Signed-off-by: Richard Henderson <rth@twiddle.net>
Benjamin Herrenschmidt [Tue, 21 Jul 2015 05:19:38 +0000 (15:19 +1000)]
tcg/ppc: Improve unaligned load/store handling on 64-bit backend
Currently, we get to the slow path for any unaligned access in the
backend, because we effectively preserve the bottom address bits
below the alignment requirement when comparing with the TLB entry,
so any non-0 bit there will cause the compare to fail.
For the same number of instructions, we can instead add the access
size - 1 to the address and stick to clearing all the bottom bits.
That means that normal unaligned accesses will not fallback (the HW
will handle them fine). Only when crossing a page boundary well we
end up having a mismatch because we'll end up pointing to the next
page which cannot possibly be in that same TLB entry.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Message-Id: <
1437455978.5809.2.camel@kernel.crashing.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Thu, 9 Jul 2015 18:39:57 +0000 (20:39 +0200)]
tcg/i386: use softmmu fast path for unaligned accesses
Softmmu unaligned load/stores currently goes through through the slow
path for two reasons:
- to support unaligned access on host with strict alignement
- to correctly handle accesses crossing pages
x86 is only concerned by the second reason. Unaligned accesses are
avoided by compilers, but are not uncommon. We therefore would like
to see them going through the fast path, if they don't cross pages.
For that we can use the fact that two adjacent TLB entries can't contain
the same page. Therefore accessing the TLB entry corresponding to the
first byte, but comparing its content to page address of the last byte
ensures that we don't cross pages. We can do this check without adding
more instructions in the TLB code (but increasing its length by one
byte) by using the LEA instruction to combine the existing move with the
size addition.
On an x86-64 host, this gives a 3% boot time improvement for a powerpc
guest and 4% for an x86-64 guest.
[rth: Tidied calculation of the offset mask]
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <
1436467197-2183-1-git-send-email-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Fri, 24 Jul 2015 18:49:53 +0000 (11:49 -0700)]
tcg: Remove tcg_gen_trunc_i64_i32
Replacing it with tcg_gen_extrl_i64_i32.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Fri, 24 Jul 2015 14:16:00 +0000 (07:16 -0700)]
tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32
Rather than allow arbitrary shift+trunc, only concern ourselves
with low and high parts. This is all that was being used anyway.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:45 +0000 (12:41 +0200)]
tcg: update README about size changing ops
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:45 +0000 (12:41 +0200)]
tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops
They behave the same as ext32s_i64 and ext32u_i64 from the constant
folding and zero propagation point of view, except that they can't
be replaced by a mov, so we don't compute the affected value.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:45 +0000 (12:41 +0200)]
tcg: implement real ext_i32_i64 and extu_i32_i64 ops
Implement real ext_i32_i64 and extu_i32_i64 ops. They ensure that a
32-bit value is always converted to a 64-bit value and not propagated
through the register allocator or the optimizer.
Cc: Andrzej Zaborowski <balrogg@gmail.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Stefan Weil <sw@weilnetz.de>
Acked-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:45 +0000 (12:41 +0200)]
tcg: don't abuse TCG type in tcg_gen_trunc_shr_i64_i32
The tcg_gen_trunc_shr_i64_i32 function takes a 64-bit argument and
returns a 32-bit value. Directly call tcg_gen_op3 with the correct
types instead of calling tcg_gen_op3i_i32 and abusing the TCG types.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:45 +0000 (12:41 +0200)]
tcg: rename trunc_shr_i32 into trunc_shr_i64_i32
The op is sometimes named trunc_shr_i32 and sometimes trunc_shr_i64_i32,
and the name in the README doesn't match the name offered to the
frontends.
Always use the long name to make it clear it is a size changing op.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:44 +0000 (12:41 +0200)]
tcg/optimize: allow constant to have copies
Now that copies and constants are tracked separately, we can allow
constant to have copies, deferring the choice to use a register or a
constant to the register allocation pass. This prevent this kind of
regular constant reloading:
-OUT: [size=338]
+OUT: [size=298]
mov -0x4(%r14),%ebp
test %ebp,%ebp
jne 0x7ffbe9cb0ed6
mov $0x40002219f8,%rbp
mov %rbp,(%r14)
- mov $0x40002219f8,%rbp
mov $0x4000221a20,%rbx
mov %rbp,(%rbx)
mov $0x4000000000,%rbp
mov %rbp,(%r14)
- mov $0x4000000000,%rbp
mov $0x4000221d38,%rbx
mov %rbp,(%rbx)
mov $0x40002221a8,%rbp
mov %rbp,(%r14)
- mov $0x40002221a8,%rbp
mov $0x4000221d40,%rbx
mov %rbp,(%rbx)
mov $0x4000019170,%rbp
mov %rbp,(%r14)
- mov $0x4000019170,%rbp
mov $0x4000221d48,%rbx
mov %rbp,(%rbx)
mov $0x40000049ee,%rbp
mov %rbp,0x80(%r14)
mov %r14,%rdi
callq 0x7ffbe99924d0
mov $0x4000001680,%rbp
mov %rbp,0x30(%r14)
mov 0x10(%r14),%rbp
mov $0x4000001680,%rbp
mov %rbp,0x30(%r14)
mov 0x10(%r14),%rbp
shl $0x20,%rbp
mov (%r14),%rbx
mov %ebx,%ebx
mov %rbx,(%r14)
or %rbx,%rbp
mov %rbp,0x10(%r14)
mov %rbp,0x90(%r14)
mov 0x60(%r14),%rbx
mov %rbx,0x38(%r14)
mov 0x28(%r14),%rbx
mov $0x4000220e60,%r12
mov %rbx,(%r12)
mov $0x40002219c8,%rbx
mov %rbp,(%rbx)
mov 0x20(%r14),%rbp
sub $0x8,%rbp
mov $0x4000004a16,%rbx
mov %rbx,0x0(%rbp)
mov %rbp,0x20(%r14)
mov $0x19,%ebp
mov %ebp,0xa8(%r14)
mov $0x4000015110,%rbp
mov %rbp,0x80(%r14)
xor %eax,%eax
jmpq 0x7ffbebcae426
lea -0x5f6d72a(%rip),%rax # 0x7ffbe3d437b3
jmpq 0x7ffbebcae426
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>