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Mathieu Chartier [Fri, 20 Jun 2014 20:01:28 +0000 (20:01 +0000)]
Merge "Shared single GC iteration accounting for all GCs."
Mathieu Chartier [Sun, 15 Jun 2014 22:15:43 +0000 (15:15 -0700)]
Shared single GC iteration accounting for all GCs.
Previously, each garbage collector had data that was only used
during collection. Since only one collector can be running at any
given time, we can make this data be shared between all collectors.
This reduces memory usage since we don't need to have redundant
information for each GC types. Also reduced how much code is required
to sweep spaces.
Bug:
9969166
Change-Id: I31caf0ee4d572f75e0c66863fe7db12c08ae08e7
Andreas Gampe [Fri, 20 Jun 2014 19:53:56 +0000 (19:53 +0000)]
Merge "ART: ReadFully needs to fail when EOF"
Andreas Gampe [Fri, 20 Jun 2014 17:45:30 +0000 (10:45 -0700)]
ART: ReadFully needs to fail when EOF
Besides an explicit error, we should stop trying when we unexpectedly
reach the end of the file.
Change-Id: I16d601e1b5bcbc39cb8c4dd7fd3dbb7d69016579
Andreas Gampe [Fri, 20 Jun 2014 19:53:22 +0000 (19:53 +0000)]
Merge "ART: Fix StoreValue to use RefDisp when necessary."
Andreas Gampe [Fri, 20 Jun 2014 19:48:12 +0000 (12:48 -0700)]
ART: Fix StoreValue to use RefDisp when necessary.
Split from https://android-review.googlesource.com/#/c/98605
Change-Id: Ib3a03428ddbec659591b838404bbfa1553fe18e9
buzbee [Fri, 20 Jun 2014 19:45:44 +0000 (19:45 +0000)]
Merge "Quick compiler: enable Arm64 compilation"
buzbee [Thu, 19 Jun 2014 23:08:48 +0000 (16:08 -0700)]
Quick compiler: enable Arm64 compilation
Change-Id: I19058defaff1c60b4b6b4d1ad82e0a42d50506a6
Andreas Gampe [Fri, 20 Jun 2014 05:58:42 +0000 (05:58 +0000)]
Merge "ART: Do not try to pretty-print method in dex file"
Andreas Gampe [Fri, 20 Jun 2014 03:24:22 +0000 (20:24 -0700)]
ART: Do not try to pretty-print method in dex file
The code is called in verification when it is not clear yet whether
structures are valid. Simplify warning message.
Bug:
15754233
Change-Id: I85858a71143f41444ce9f00536d901c268afe547
Andreas Gampe [Fri, 20 Jun 2014 03:39:07 +0000 (03:39 +0000)]
Merge "ART: Method verifier needs to check 2-reg values"
Bill Buzbee [Fri, 20 Jun 2014 19:42:30 +0000 (19:42 +0000)]
Merge "ART: Fix register overlap checks in CopyArgumentRegs"
Andreas Gampe [Fri, 20 Jun 2014 18:34:17 +0000 (11:34 -0700)]
ART: Fix register overlap checks in CopyArgumentRegs
This is a make-shift CL. Expect this to be replaced by a reworked
implementation.
Change-Id: Ia74697d1436efd2971bc4c791fabed66d2e9d72d
Hiroshi Yamauchi [Fri, 20 Jun 2014 19:30:53 +0000 (19:30 +0000)]
Merge "Add more read barriers for JNI roots."
Hiroshi Yamauchi [Wed, 18 Jun 2014 20:47:35 +0000 (13:47 -0700)]
Add more read barriers for JNI roots.
To make it possible to concurrently scan the JNI global roots (that
is, the roots visited by JavaVMExt::VisitRoots()), add read barriers
to the indirect reference table and the reference table.
Also, add read barriers to the jmethodID/jfieldID decode routines
(ScopedObjectAccessAlreadyRunnable::DecodeField/DecodeMethod) so that
we can concurrently handle (encoded) fields and methods.
Bug:
12687968
Change-Id: I3df4e4e622a572ff0ea8d44b2dc70a4d6b3ba058
Andreas Gampe [Fri, 20 Jun 2014 00:29:48 +0000 (17:29 -0700)]
ART: Method verifier needs to check 2-reg values
The method verifier did not check against the second register
for a J or D parameter from a method signature.
The register line had a wrong DCHECK that did not catch this even
in debug mode.
Bug:
15751498
Change-Id: Ic6af08bf4704b3ab0f308dd9f0da28691a4cb024
buzbee [Thu, 19 Jun 2014 23:05:02 +0000 (23:05 +0000)]
Merge "Quick compiler: remove Arm64 "EXPERIMENTAL" filter"
buzbee [Thu, 19 Jun 2014 22:04:12 +0000 (15:04 -0700)]
Quick compiler: remove Arm64 "EXPERIMENTAL" filter
Support for the compilation of all dex opcodes should now exist.
We'll go ahead and leave the filter code in for a new weeks, as it
may be handy if we need a quick workaround.
Change-Id: I8f1857136d78347b7d2337db2c793ad41ad45cb9
Bill Buzbee [Thu, 19 Jun 2014 21:44:43 +0000 (21:44 +0000)]
Merge "x86_64: Several fixes required for enabling promotion"
Bill Buzbee [Thu, 19 Jun 2014 21:17:44 +0000 (21:17 +0000)]
Merge "x86_64: Fix neg_double"
Andreas Gampe [Thu, 19 Jun 2014 20:43:58 +0000 (20:43 +0000)]
Merge "ART: Log information when skipping method during compilation"
Andreas Gampe [Thu, 19 Jun 2014 18:34:06 +0000 (11:34 -0700)]
ART: Log information when skipping method during compilation
Add a reason for skipping a method to the log.
Change-Id: I3b31ee64cce6b531b25397f646cdfee650704ad6
Bill Buzbee [Thu, 19 Jun 2014 20:18:35 +0000 (20:18 +0000)]
Merge "x86_64: Enable core.oat/boot.oat compilation"
Alexei Zavjalov [Wed, 18 Jun 2014 10:18:36 +0000 (17:18 +0700)]
x86_64: Fix neg_double
In a case, when src and dest regs are the same, previous
implementation of the neg_double bytecode returns an
incorrect result.
This implementation uses shifts and xor and works for both
cases.
Change-Id: I137d9a90298ec225d80435d35558da8abb69cd01
Signed-off-by: Alexei Zavjalov <alexei.zavjalov@intel.com>
Andreas Gampe [Thu, 19 Jun 2014 06:56:51 +0000 (06:56 +0000)]
Merge "ART: Implicit checks in the compiler are independent from Runtime"
Andreas Gampe [Tue, 17 Jun 2014 23:36:07 +0000 (16:36 -0700)]
ART: Implicit checks in the compiler are independent from Runtime
When cross-compiling, those flags are independent. This is an
initial CL that helps bypass fatal failures when cross-compiling,
as not all architectures support (and have turned on) implicit
checks.
The actual transport for the target architecture when it is
different from the runtime needs to be implemented in a follow-up
CL.
Bug:
15703710
Change-Id: Idc881a9a4abfd38643b862a491a5af9b8841f693
Andreas Gampe [Thu, 19 Jun 2014 06:42:33 +0000 (06:42 +0000)]
Merge "ART: Reserve 8B for float literals on ARM64"
Andreas Gampe [Thu, 19 Jun 2014 06:19:07 +0000 (23:19 -0700)]
ART: Reserve 8B for float literals on ARM64
This is a cludge to make sure literal pools will be 8B aligned.
A better approach would be post-processing - that way we could
pack the floats.
Change-Id: Ia9c6f53e0f6e37b4be79e1efe7f14feb49f2052b
Andreas Gampe [Thu, 19 Jun 2014 02:39:37 +0000 (02:39 +0000)]
Merge "ART: Change rrr add and sub for ARM64"
Andreas Gampe [Thu, 19 Jun 2014 00:45:32 +0000 (17:45 -0700)]
ART: Change rrr add and sub for ARM64
OpRegRegImm will fall back to loading a constant into a register
and then doing the operation with three registers. That is, for
example, the case when we allocate large stack frames. However,
the currently chosen operations are add/sub shifted, which does
*not* allow to specify SP (x31 will be interpreted as xzr). Switch
to add/sub extended. There won't be a practical difference, as we
do not call with anything other than 0 shift.
Change-Id: I2b78df9f044d2963e3e890777c855b339952f9f4
Ian Rogers [Wed, 18 Jun 2014 23:24:40 +0000 (23:24 +0000)]
Merge "Assign a lower Locklevel for Mutexes used in QuasiAtomic operations. This fixes the CompilerDriverTest on MIPS. The test was failing when Transaction::Abort() acquired intern_table_lock_ and log_lock_ and subsequently performed QuasiAtomic operations."
Andreas Gampe [Thu, 19 Jun 2014 02:39:21 +0000 (02:39 +0000)]
Merge "ART: Target-dependent stack overflow, less check elision"
Andreas Gampe [Thu, 19 Jun 2014 00:01:15 +0000 (17:01 -0700)]
ART: Target-dependent stack overflow, less check elision
Refactor the separate stack overflow reserved sizes from thread.h
into instruction_set.h and make sure they're used in the compiler.
Refactor the decision on when to elide stack overflow checks:
especially with large interpreter stack frames, it is not a good
idea to elide checks when the frame size is even close to the
reserved size. Currently enforce checks when the frame size is
>= 2KB, but make sure that frame sizes 1KB and below will elide
the checks (number from experience).
Bug:
15728765
Change-Id: I016bfd3d8218170cbccbd123ed5e2203db167c06
Ian Rogers [Wed, 18 Jun 2014 23:56:39 +0000 (23:56 +0000)]
Merge "Ensure classes are initialized rather than initializing."
Ian Rogers [Wed, 18 Jun 2014 23:07:20 +0000 (16:07 -0700)]
Ensure classes are initialized rather than initializing.
A class can be being initialized on a different thread, in that case other
threads should block trying to access the class. The initializing state shows
the class is being initialized but not that its safe for other threads to
access. Change occurances of IsInitializing to IsInitialized primarily in
slow-path code.
Bug:
15347354
Change-Id: Ib586d0a385be6086a890dfbf8868d76f16767fac
Dmitry Petrochenko [Fri, 13 Jun 2014 08:15:32 +0000 (15:15 +0700)]
x86_64: Enable core.oat/boot.oat compilation
This patch enabled compilation of image.
Change-Id: Idacce4a3898964d3a05762925dba236d7254a254
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Dmitry Petrochenko [Wed, 18 Jun 2014 12:11:41 +0000 (19:11 +0700)]
x86_64: Several fixes required for enabling promotion
This patch includes x86_64 fixes which solve the issues
reproducible with promotion optimization enabled.
Change-Id: I3a3b0d290380d639705cd58f38b8d62b1eb930d3
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Mathieu Chartier [Tue, 17 Jun 2014 23:00:01 +0000 (23:00 +0000)]
Merge "Fix systrace logging, total paused time, and bytes saved message."
Mathieu Chartier [Tue, 17 Jun 2014 22:04:40 +0000 (15:04 -0700)]
Fix systrace logging, total paused time, and bytes saved message.
Moved the GC top level systrace logging to be inside of Collector::Run.
This prevents cases where we forgot to call it such as background
compaction. Fixed a unit error regarding total pause time. Fixed
negative bytes saved to use the word "expanded".
Bug:
15702709
Change-Id: Ic2991ecad2daa000d0aee9d559b8bc77d8c160aa
Vladimir Marko [Wed, 18 Jun 2014 11:14:22 +0000 (11:14 +0000)]
Merge "Add x86 inlined abs method for float/double"
Yixin Shou [Wed, 5 Mar 2014 11:07:48 +0000 (06:07 -0500)]
Add x86 inlined abs method for float/double
Add the optimized implementation of inlined abs method for
float/double for X86 side.
Change-Id: I2f367542f321d88a976129f9f7156fd3c2965c8a
Signed-off-by: Yixin Shou <yixin.shou@intel.com>
Mathieu Chartier [Thu, 19 Jun 2014 20:10:51 +0000 (20:10 +0000)]
Merge "Add mark compact collector."
Mathieu Chartier [Tue, 10 Jun 2014 18:22:31 +0000 (11:22 -0700)]
Add mark compact collector.
The mark compact collector is a 4 phase collection, doing a normal
full mark_sweep, calculating forwarding addresses of objects in the
from space, updating references of objects in the from space, and
moving the objects in the from space.
Support is diabled by default since it needs to have non movable
classes and field arrays. Performance numbers is around 50% as fast.
The main advantage that this has over semispace is that the worst
case memory usage is 50% since we only need one space isntead of two.
TODO: Make field arrays and classes movable. This causes complication
since Object::VisitReferences relies on these, so if we update the
fields of an object but another future object uses this object to
figure out what fields are reference fields it doesn't work.
Bug:
14059466
Change-Id: I661ed3b71ad4dde124ef80312c95696b4a5665a1
Andreas Gampe [Thu, 19 Jun 2014 17:23:37 +0000 (17:23 +0000)]
Merge "ART: Start implementation of OpRegRegRegExtend for ARM64"
Andreas Gampe [Thu, 19 Jun 2014 08:10:07 +0000 (01:10 -0700)]
ART: Start implementation of OpRegRegRegExtend for ARM64
We need a sign-extending add for packed-switch and sparse-switch,
as the 32b values are signed offsets. This starts an implementation
that is sufficient for the use cases.
Change-Id: Ib5bae24b902077346a97d5e9e061533f9cdfcdb0
Sebastien Hertz [Thu, 19 Jun 2014 14:55:02 +0000 (14:55 +0000)]
Merge "Fix art_quick_instrumentation_exit for ARM64"
Sebastien Hertz [Thu, 19 Jun 2014 09:51:41 +0000 (11:51 +0200)]
Fix art_quick_instrumentation_exit for ARM64
Stores the integer result in x0 into the stack. Also avoids clobbering integer
result in x0 by setting it to xSELF after copying it to x2 when calling the
artInstrumentationMethodExitFromCode function.
Bug:
15690361
Change-Id: I9fb873cf32f194779f299607dda8a7316a99c528
Calin Juravle [Thu, 19 Jun 2014 12:09:33 +0000 (12:09 +0000)]
Merge "Add an option to enable collecting dex pc in ART profiler"
Wei Jin [Mon, 9 Jun 2014 23:19:15 +0000 (16:19 -0700)]
Add an option to enable collecting dex pc in ART profiler
This CL allows the ART profiler to collect both method signature and
dex pc. The type of the profile data is controlled by the option
"-Xprofile-type:{method,dexpc}". To avoid conflicting with the
original profile data based on method signatures, the new profile
data are stored in files with extension ".pc".
Change-Id: I8afb2541d386bff77c5b07fc9367d817a79f58e1
Brian Carlstrom [Wed, 18 Jun 2014 16:44:50 +0000 (16:44 +0000)]
Merge "Fix GetMethodID to find an interface method from a super-interface"
Brian Carlstrom [Wed, 18 Jun 2014 15:34:01 +0000 (08:34 -0700)]
Fix GetMethodID to find an interface method from a super-interface
Bug:
15651032
Change-Id: I5df113e9489a1615e901f03bed92ed2a1a42bd67
Nicolas Geoffray [Wed, 18 Jun 2014 15:08:40 +0000 (15:08 +0000)]
Merge "Add missing parens to Makefile rule."
Nicolas Geoffray [Wed, 18 Jun 2014 15:07:49 +0000 (16:07 +0100)]
Add missing parens to Makefile rule.
Change-Id: I5bff24a696a07c734d05d0ee42f3cf6cd57c0904
Nicolas Geoffray [Wed, 18 Jun 2014 14:37:12 +0000 (14:37 +0000)]
Merge "Build rules for running run-test with optimizing compiler."
Mathieu Chartier [Tue, 17 Jun 2014 22:28:15 +0000 (22:28 +0000)]
Merge "Enable background compaction by default"
Ian Rogers [Wed, 18 Jun 2014 09:46:57 +0000 (09:46 +0000)]
Merge "x86_64: Clobber r8 to r11 and xmm0 to xmm15"
Bill Buzbee [Wed, 18 Jun 2014 13:17:33 +0000 (13:17 +0000)]
Merge "AArch64: Fix OpCmpMemImmBranch."
Zheng Xu [Tue, 17 Jun 2014 10:17:31 +0000 (18:17 +0800)]
AArch64: Fix OpCmpMemImmBranch.
The temp register can be 64-bit in some cases(ArgReg or RefReg).
Always compare 32-bit value no matter what the temp register is.
Change-Id: Ib237dd081da0b5900b8c2418df1621d3245cb03d
Mathieu Chartier [Tue, 17 Jun 2014 19:01:06 +0000 (12:01 -0700)]
Enable background compaction by default
Bug:
8981901
Change-Id: I2b1fe8169779268c130b8804961f968e1ba43cda
Mathieu Chartier [Tue, 17 Jun 2014 18:45:34 +0000 (18:45 +0000)]
Merge "Fix error with remembered sets creation."
Mathieu Chartier [Tue, 17 Jun 2014 16:50:02 +0000 (09:50 -0700)]
Fix error with remembered sets creation.
There was an error where we were not re-creating the remembered sets
in PreZygoteFork. This caused a rare check failure due to the
stale remembered set occasionally having the same space as the newly
created one.
Bug:
15680452
Change-Id: Ibfa569e67ad0ff032f3e9696a99b992a18583243
Mathieu Chartier [Tue, 17 Jun 2014 18:43:23 +0000 (18:43 +0000)]
Merge "Change reference processing to use heap references."
Ian Rogers [Tue, 17 Jun 2014 05:24:03 +0000 (05:24 +0000)]
Merge "Fix run-test for OSX."
Ian Rogers [Tue, 17 Jun 2014 05:16:21 +0000 (22:16 -0700)]
Fix run-test for OSX.
Change-Id: I6b5dfeba5a3d04fa2bea3fde4604fa84ed362615
Vladimir Marko [Tue, 17 Jun 2014 18:11:18 +0000 (18:11 +0000)]
Merge "Revert "Add x86 inlined abs method for float/double""
Vladimir Marko [Tue, 17 Jun 2014 17:56:50 +0000 (17:56 +0000)]
Revert "Add x86 inlined abs method for float/double"
This reverts commit
e88b89ad1d1a583daf205c7a387ba13f549f95f1.
Change-Id: I2ba21b7442ba3696482d45001e6bd32e8baf9d1f
Bill Buzbee [Tue, 17 Jun 2014 17:53:43 +0000 (17:53 +0000)]
Merge "AArch64: Add transition assembly to wrapper native functions."
Zheng Xu [Tue, 17 Jun 2014 04:25:48 +0000 (12:25 +0800)]
AArch64: Add transition assembly to wrapper native functions.
There is slight difference between managed code ABI and AAPCS. We
can make managed code ABI to be the same with AAPCS. But considering
that, we might introduce more differences later for performance. It
is better to have a wrapper to deal with the differences.
Change-Id: I46ced072e9e3a83f713d2bf86fa478fc6144ee81
Bill Buzbee [Tue, 17 Jun 2014 13:07:38 +0000 (13:07 +0000)]
Merge "ART: Implement rem_double/rem_float for x86/x86-64"
Alexei Zavjalov [Wed, 11 Jun 2014 20:08:01 +0000 (03:08 +0700)]
ART: Implement rem_double/rem_float for x86/x86-64
This adds inlined version of the rem_double/rem_float bytecodes
for x86/x86-64 platforms. This patch also removes unnecessary
fmod and fmodf stubs from runtime.
Change-Id: I2311aa2adf08d6614527e0da070e3b6ce2343a20
Signed-off-by: Alexei Zavjalov <alexei.zavjalov@intel.com>
Andreas Gampe [Tue, 17 Jun 2014 15:58:28 +0000 (15:58 +0000)]
Merge "ART: Make verifier check invocation args of unresolved methods"
Vladimir Marko [Tue, 17 Jun 2014 10:18:36 +0000 (10:18 +0000)]
Merge "Fix build: style issue."
Vladimir Marko [Tue, 17 Jun 2014 10:13:30 +0000 (11:13 +0100)]
Fix build: style issue.
Change-Id: I2a1e81dc7c95b7e21f4fde47e2f88dae653b25f0
Sebastien Hertz [Tue, 17 Jun 2014 15:51:07 +0000 (15:51 +0000)]
Merge "Revert "Revert "Fix access to FP registers when visiting stack"""
Sebastien Hertz [Tue, 17 Jun 2014 13:52:45 +0000 (15:52 +0200)]
Revert "Revert "Fix access to FP registers when visiting stack""
This reverts commit
8ebd94ab2e0d9867a7d384f00fa4cab24235216f.
Fixes StackVisitor::GetVReg to read register value in a uintptr_t local and
cast it into uint32_t pointer argument.
Bug:
15433097
Change-Id: I4e13ed5446e823e9ec50fbc378b16be5b17b2294
Sebastien Hertz [Tue, 17 Jun 2014 09:50:39 +0000 (09:50 +0000)]
Merge "Revert "Fix access to FP registers when visiting stack""
Sebastien Hertz [Tue, 17 Jun 2014 09:49:21 +0000 (09:49 +0000)]
Revert "Fix access to FP registers when visiting stack"
This reverts commit
aa9b3aee1e06f922e4518713f9b3dff00a0b2597.
Change-Id: Ied27deb89cca5ec9094d391374e03f83fcb76c33
Sebastien Hertz [Fri, 13 Jun 2014 12:49:27 +0000 (14:49 +0200)]
Fix access to FP registers when visiting stack
Adds GetFPR and SetFPR to Context class so we can read from and write to
floating-point registers during stack visit. They return a boolean flag
indicating whether the read/write is successful. This allows the debugger to
return the JDWP error ABSENT_INFORMATION when we can't read/write a register.
We also update GetGPR and SetGPR for consistency. We keep a default GetGPR
implementation asserting the read was successful using a CHECK so we don't
silently fail.
Adds missing JDWP object tags for StackFrame.SetValues to avoid crash when
setting corresponding objects (thread, thread group, class object or class
loader). Also returns JDWP error INVALID_OBJECT (when the given object id is
invalid) instead of crashing with an unimplemented message.
Bug:
15433097
Change-Id: I70843c9280e694aec1eae5cf6f2dc155cb9ea10e
Vladimir Marko [Tue, 17 Jun 2014 09:46:31 +0000 (09:46 +0000)]
Merge "Add x86 inlined abs method for float/double"
Sebastien Hertz [Tue, 17 Jun 2014 09:22:17 +0000 (09:22 +0000)]
Merge "Fix access to FP registers when visiting stack"
Andreas Gampe [Mon, 16 Jun 2014 21:06:52 +0000 (14:06 -0700)]
ART: Make verifier check invocation args of unresolved methods
In the case of unresolvable methods it is not enough to bail out
with a soft verifier failure, as the compiler relies on the
invocation being well-formed. Check all arguments against the
proto id in such a case.
Also make sure to complete parsing arguments in the case the
method was resolved.
Refactored code to unite these two cases.
Bug:
15616104
Change-Id: I5ec58cbfbf6b09eaaf07ddf15edae7c6a8b62b17
Chao-ying Fu [Mon, 16 Jun 2014 23:40:31 +0000 (16:40 -0700)]
x86_64: Clobber r8 to r11 and xmm0 to xmm15
This clobbers r8 to r11 and xmm0 to xmm15, so that
they can be reloaded after an external C call.
Change-Id: If5cac97e475083912026309891dc332f14f8683a
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Mathieu Chartier [Sun, 15 Jun 2014 19:39:02 +0000 (12:39 -0700)]
Change reference processing to use heap references.
Removes several SetReferents for updating moved referents. Cleaned
up other aspects of the code.
Change-Id: Ibcb4d713fadea617efee7e936352ddf77ff4c370
Hiroshi Yamauchi [Mon, 16 Jun 2014 21:21:21 +0000 (21:21 +0000)]
Merge "Disable StubTest.IndexOf if heap poisoning is enabled for now."
Hiroshi Yamauchi [Mon, 16 Jun 2014 19:59:49 +0000 (12:59 -0700)]
Disable StubTest.IndexOf if heap poisoning is enabled for now.
art_quick_indexof does not support heap poisoning yet.
Bug:
12687968
Change-Id: Ibc497cc782399f0d8e0d3dca59e1ebb358fe83a5
Bill Buzbee [Mon, 16 Jun 2014 20:54:38 +0000 (20:54 +0000)]
Merge "AArch64: improve 64-bit immediates loads."
Matteo Franchin [Fri, 13 Jun 2014 18:16:28 +0000 (19:16 +0100)]
AArch64: improve 64-bit immediates loads.
Improve the quick backend to load immediates by choosing the best
of the following strategies:
- use wzr, xzr to load 0 (via mov) or -1 (via mvn),
- use logical immediates (orr),
- use one movz/movn optionally followed by one or more movk,
- use the literal pool.
Change-Id: I8e46e6d9eaf46b717761dd9d60e63ee3f2a5422b
Bill Buzbee [Mon, 16 Jun 2014 20:16:00 +0000 (20:16 +0000)]
Merge "ART: Instanceof returns true if ref == 0 on x86-64"
Hiroshi Yamauchi [Mon, 16 Jun 2014 19:56:59 +0000 (19:56 +0000)]
Merge "Add read barriers for the class and the intern tables."
Bill Buzbee [Mon, 16 Jun 2014 19:52:09 +0000 (19:52 +0000)]
Merge "Use GetLow() to access low register of a pair"
Mark Mendell [Mon, 16 Jun 2014 17:03:42 +0000 (13:03 -0400)]
Use GetLow() to access low register of a pair
A couple of spots were missed.
Change-Id: I14bd1d1bec4b497b742ef9edaf762e0c8e4ebf79
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
buzbee [Mon, 16 Jun 2014 17:47:23 +0000 (17:47 +0000)]
Merge "Arm64 hard-float"
buzbee [Thu, 12 Jun 2014 21:56:32 +0000 (14:56 -0700)]
Arm64 hard-float
Basic enabling of hard-float for Arm64. In future CLs we'll
consolidate the various targets - there is a lot of overlap.
Compilation remains turned off in this CL, but I expect
to enable a subset shortly. With compilation fully enabled
(including the EXPERIMENTAL opcodes with the exception of
REM and THROW), we get the following run-test results:
003-omnibus-opcode failures:
Classes.checkCast
Classes.arrayInstance
UnresTest2
Haven't gone deep, but these appear to be related to throw/catch and/or
stacktrace.
For REM, the generated code looks reasonable to me - my guess is that
we've got something wrong on the transition to the runtime. Haven't
looked deeper yet, though.
The bulk of the other failure also appear to be related to transitioning
to the runtime system, or handling try/catch.
run-test status:
Status with optimizations disabled, REM_FLOAT/DOUBLE and THROW disabled:
succeeded tests: 94
failed tests: 22
failed: 003-omnibus-opcodes
failed: 004-annotations
failed: 009-instanceof2
failed: 024-illegal-access
failed: 025-access-controller
failed: 031-class-attributes
failed: 044-proxy
failed: 045-reflect-array
failed: 046-reflect
failed: 058-enum-order
failed: 062-character-encodings
failed: 063-process-manager
failed: 064-field-access
failed: 068-classloader
failed: 071-dexfile
failed: 083-compiler-regressions
failed: 084-class-init
failed: 086-null-super
failed: 087-gc-after-link
failed: 100-reflect2
failed: 107-int-math2
failed: 201-built-in-exception-detail-messages
Change-Id: Ib66209285cad8998d77a14781de300af02a96b15
Yixin Shou [Wed, 5 Mar 2014 11:07:48 +0000 (06:07 -0500)]
Add x86 inlined abs method for float/double
Add the optimized implementation of inlined abs method for
float/double for X86 side.
Change-Id: I4e095644a90524354040174954c1e127c7bb4ee2
Signed-off-by: Yixin Shou <yixin.shou@intel.com>
Nicolas Geoffray [Mon, 26 May 2014 15:40:55 +0000 (16:40 +0100)]
Build rules for running run-test with optimizing compiler.
Change-Id: I9d55c456007403a6a4ffd9da2c70d500b410e51b
Alexei Zavjalov [Mon, 9 Jun 2014 16:27:46 +0000 (23:27 +0700)]
ART: Instanceof returns true if ref == 0 on x86-64
On x86-64 platform rl_result and kArg0 is not the same, so we have to
handle this in the proper way.
Change-Id: Ia651f5dd8dd2cf584f510739ed58b46197dfee94
Signed-off-by: Alexei Zavjalov <alexei.zavjalov@intel.com>
Hiroshi Yamauchi [Fri, 13 Jun 2014 23:44:55 +0000 (16:44 -0700)]
Add read barriers for the class and the intern tables.
Add read barriers for the strong roots in the intern table and the
(strong) roots in the class table to make possible concurrent scanning
of them.
Bug:
12687968
Change-Id: If6edc33a37e65a8494e66dc3b144138b1530367f
Raghu Gandham [Fri, 13 Jun 2014 22:16:31 +0000 (15:16 -0700)]
Assign a lower Locklevel for Mutexes used in QuasiAtomic operations.
This fixes the CompilerDriverTest on MIPS. The test was failing when
Transaction::Abort() acquired intern_table_lock_ and log_lock_
and subsequently performed QuasiAtomic operations.
Change-Id: I9fcda51221f1f298bcb5dd0e10019bd2034ab8ae
buzbee [Sat, 14 Jun 2014 20:10:01 +0000 (20:10 +0000)]
Merge "Quick compiler:interpret on type mismatch"
buzbee [Sat, 14 Jun 2014 19:33:09 +0000 (12:33 -0700)]
Quick compiler:interpret on type mismatch
The Dex specification is a bit loose - particularly in regards
to types. The Quick compiler, though, makes some assumptions
about types. In particular, it doesn't expect to encounter the
use of a long or double virtual register pair that was defined
by two independent 32-bit operations.
dx does not create such patterns (at least in recent memory).
However, at least one such case exists in the wild. The next
version of the Dex specification will add more type constraints
and formally disallow such cases. Meanwhile, existing code will
be handled by identifying these cases an reverting to interpretation
for the offending method.
Fix for internal b/
15616104
Change-Id: Ibe9c423be9a952ff58cf8d985aa164885b8dd2ae