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Tomasz Figa [Mon, 26 Aug 2013 17:09:07 +0000 (19:09 +0200)]
clk: samsung: pll: Add support for rate configuration of PLL46xx
This patch implements round_rate and set_rate callbacks of PLL46xx
driver to allow reconfiguration of PLL at runtime.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 26 Aug 2013 17:09:06 +0000 (19:09 +0200)]
clk: samsung: pll: Use new registration method for PLL46xx
This patch modifies PLL46xx support code and its users to use the
recently introduced common PLL registration helper.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 26 Aug 2013 17:09:05 +0000 (19:09 +0200)]
clk: samsung: pll: Add support for rate configuration of PLL45xx
This patch implements round_rate and set_rate callbacks of PLL45xx
driver to allow reconfiguration of PLL at runtime.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 26 Aug 2013 17:09:04 +0000 (19:09 +0200)]
clk: samsung: pll: Use new registration method for PLL45xx
This patch modifies PLL45xx support code and its users to use the
recently introduced common PLL registration helper.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 26 Aug 2013 17:09:03 +0000 (19:09 +0200)]
clk: samsung: exynos4: Rename exynos4_plls to exynos4x12_plls
This array defines PLLs specific to Exynos 4x12 SoCs and not for all
Exynos 4 SoCs, so the name should represent that.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 26 Aug 2013 17:09:02 +0000 (19:09 +0200)]
clk: samsung: exynos4: Remove checks for DT node
Exynos 4 supports only DT based bootup, so non-DT cases does not need to
be handled anymore.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 26 Aug 2013 17:09:01 +0000 (19:09 +0200)]
clk: samsung: exynos4: Remove unused static clkdev aliases
Since Exynos does not support legacy non-DT boot anymore, most of clock
lookups happen using device tree, so most of static clkdev aliases are no
longer necessary. This patch removes them.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 26 Aug 2013 17:09:00 +0000 (19:09 +0200)]
clk: samsung: Modify _get_rate() helper to use __clk_lookup()
There is no need to use clkdev inside the clock driver to retrieve the
clocks for internal use. Instead __clk_lookup() helper can be used to
look up clocks by their platform name.
This patch modifies the behavior of _get_rate() helper to look up clocks
by platform name and adjusts all users of it to pass platform names
instead of clkdev aliases.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 26 Aug 2013 17:08:59 +0000 (19:08 +0200)]
clk: samsung: exynos4: Use separate aliases for cpufreq related clocks
Exynos cpufreq driver is the only remaining piece of code that needs
static clkdev aliases for operation, because it can not do device tree
based clock lookups yet.
This patch moves clock alias definitions for those clocks to separate
arrays that can be used with samsung_clk_register_alias() helper.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 26 Aug 2013 17:08:58 +0000 (19:08 +0200)]
clocksource: samsung_pwm_timer: Get clock from device tree
When booting with device tree static clkdev aliases should not be used.
This patch modifies the samsung_pwm_timer driver to use DT-based clock
lookup when booting with device tree.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 26 Aug 2013 17:08:57 +0000 (19:08 +0200)]
ARM: dts: exynos4: Specify PWM clocks in PWM node
Since pwm-samsung bindings require at least one clock to be specified,
this patch adds the missing clocks and clock-names properties to specify
clocks used by PWM block on Exynos4 SoCs.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 26 Aug 2013 17:08:56 +0000 (19:08 +0200)]
pwm: samsung: Update DT bindings documentation to cover clocks
PWM driver consumes at least one and up to three clocks, which need to be
specified in device tree when used. This patch updates bindings
documentation to add information about clocks.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Thierry Reding [Tue, 3 Sep 2013 07:43:51 +0000 (09:43 +0200)]
clk: Move symbol export to proper location
The __clk_get_flags() symbol is exported immediately following the
clk_unprepare_unused_subtree() function. This is unusual, since a symbol
export typically follows body of the function that it exports.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
James Hogan [Thu, 29 Aug 2013 11:10:51 +0000 (12:10 +0100)]
clk: fix new_parent dereference before null check
Commit
71472c0 (clk: add support for clock reparent on set_rate) added a
dereference of the new_parent pointer in clk_reparent(), but as detected
by smatch clk_reparent() later checks whether new_parent is NULL.
The dereference was in order to clear the new parent's new_child pointer
to avoid duplicate POST_RATE_CHANGE notifications, so clearly isn't
necessary if the new parent is NULL, so move it inside the "if
(new_parent)" block.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Mark Brown [Thu, 29 Aug 2013 11:21:01 +0000 (12:21 +0100)]
clk: wm831x: Initialise wm831x pointer on init
Otherwise any attempt to interact with the hardware will crash. This is
what happens when drivers get written blind.
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Rahul Sharma [Thu, 29 Aug 2013 05:37:09 +0000 (11:07 +0530)]
clk/exynos5420: assign dout_pixel id to pixel clock divider
dout_pixel is a new ID allocated for pixel clock divider. It is
queried in the driver to pass as the parent to hdmi clock while
switching between parents.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Rahul Sharma [Thu, 29 Aug 2013 05:37:08 +0000 (11:07 +0530)]
clk/exynos5420: add hdmi mux to change parents in hdmi driver
hdmi driver needs to change the parent of hdmi clock
to pixel clock or hdmiphy clock, based on the stability
of hdmiphy. This patch is exposing the mux for changing
the parent.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Rahul Sharma [Thu, 29 Aug 2013 05:37:07 +0000 (11:07 +0530)]
clk/exynos5420: fix the order of parents of hdmi mux
Listing sclk_hdmiphy at 0th position in the list of parents is
causing wrong configuration in reg SRC_DISP10.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Rahul Sharma [Thu, 29 Aug 2013 05:37:06 +0000 (11:07 +0530)]
clk/exynos5420: add gate clock for mixer sysmmu
Adding sysmmu clock for mixer for exynos5420.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Rahul Sharma [Thu, 29 Aug 2013 05:37:05 +0000 (11:07 +0530)]
clk/exynos5420: add sclk_hdmiphy to the list of special clocks
Add sclk_hdmiphy to the list of exposed clocks. This is required
by hdmi driver to change the parent of hdmi clock.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Mark Brown [Thu, 29 Aug 2013 14:13:28 +0000 (15:13 +0100)]
clk: wm831x: Provide is_prepared() rather than is_enabled()
Since the driver was written an is_prepared() operation has been made
possible. Since the driver uses I2C I/O only prepare operations are
provided so move the is_enabled() operation over to is_prepared().
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Rahul Sharma [Fri, 23 Aug 2013 07:16:59 +0000 (12:46 +0530)]
clk/exynos5250: change parent to aclk200_disp1 for hdmi subsystem
parent of hdmi and mixer block is mentioned as aclk200 which is
not correct. It is clocked by the ouput of aclk200_disp1. Hence
parent for mixer and hdmi clocks is changed to aclk200_disp1.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tuomas Tynkkynen [Wed, 28 Aug 2013 15:18:47 +0000 (18:18 +0300)]
clk: tegra30: Don't wait for PLL_U lock bit
The lock bit on PLL_U does not seem to be working correctly and
sometimes never gets set when waiting for the PLL to come up.
Remove the TEGRA_PLL_USE_LOCK flag to use a constant delay.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Mon, 12 Aug 2013 09:14:07 +0000 (14:44 +0530)]
clk: s3c64xx: Fix incorrect placement of __initdata
__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Mon, 12 Aug 2013 09:14:06 +0000 (14:44 +0530)]
clk: sunxi: Fix incorrect placement of __initconst
__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: refreshed patch based on sunxi changes]
Sachin Kamat [Mon, 12 Aug 2013 09:14:05 +0000 (14:44 +0530)]
clk: kirkwood: Fix incorrect placement of __initconst
__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Mon, 12 Aug 2013 09:14:04 +0000 (14:44 +0530)]
clk: dove: Fix incorrect placement of __initconst
__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Mon, 12 Aug 2013 09:14:03 +0000 (14:44 +0530)]
clk: armada-xp: Fix incorrect placement of __initconst
__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Mon, 12 Aug 2013 09:14:02 +0000 (14:44 +0530)]
clk: armada-370: Fix incorrect placement of __initconst
__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Mon, 12 Aug 2013 09:14:01 +0000 (14:44 +0530)]
clk: u300: Fix incorrect placement of __initconst
__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
While at it also make 'u300_clk_lookup' static as it is used only
in this file.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Mon, 12 Aug 2013 09:14:00 +0000 (14:44 +0530)]
clk: nomadik: Fix incorrect placement of __initconst
__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Mon, 12 Aug 2013 09:13:59 +0000 (14:43 +0530)]
clk: bcm2835: Fix incorrect placement of __initconst
__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Mike Turquette [Wed, 28 Aug 2013 01:07:46 +0000 (18:07 -0700)]
Merge tag 'sunxi-clk-for-3.12' of https://github.com/mripard/linux into clk-next-sunxi
Allwinner clock changes for 3.12
These patches mostly do some cleanup to introduce the basic gated clocks for
the Allwinner A10s, A20 and A31 SoCs.
Conflicts:
drivers/clk/sunxi/clk-sunxi.c
Gerhard Sittig [Mon, 22 Jul 2013 12:14:40 +0000 (14:14 +0200)]
clk: wrap I/O access for improved portability
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms
Signed-off-by: Gerhard Sittig <gsi@denx.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Mike Turquette [Tue, 27 Aug 2013 23:20:35 +0000 (16:20 -0700)]
Merge branch 'clk-next-s3c64xx-delta' into clk-next
Alex Elder [Thu, 22 Aug 2013 16:31:31 +0000 (11:31 -0500)]
clk: get matching entry under lock in of_clk_init()
Currently of_clk_init() finds a matching device node while holding
the device tree spinlock. When a matching device node is found, the
lock is dropped and then re-acquired in order to get a reference
to the matching device id structure.
Acquiring the spinlock twice is unnecessary (and it opens a
vulnerable window that could conceivably lead to errors).
There already exists an interface for both finding and taking a
reference to a device id under lock, so use it.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Emilio López [Sun, 4 Aug 2013 09:47:29 +0000 (11:47 +0200)]
clk: sunxi: fix initialization of basic clocks
With the recent move towards CLK_OF_DECLARE(...), the driver stopped
initializing osc32k, which is compatible "fixed-clock". This is because
we never called of_clk_init(NULL). Fix this by moving the only other
simple clock (osc24M) to use CLK_OF_DECLARE(...) and call of_clk_init(NULL)
to initialize both of them.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Wed, 21 Aug 2013 00:33:21 +0000 (02:33 +0200)]
clk: samsung: pll: Use new registration method for PLL6552 and PLL6553
This patch modifies PLL6552 and PLL6553 clock drivers to use recently
added common Samsung PLL registration method.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Maxime Ripard [Thu, 25 Jul 2013 19:06:56 +0000 (21:06 +0200)]
clk: sunxi: Add Allwinner A20 gates
The Allwinner A20 is almost identical to the earlier A10 SoC from
Allwinner on many aspects, including the clocks tree. However, since the
A20 has some additionnal IPs compared to the A10, the clock tree isn't
exactly the same, especially when it comes to the gated clocks
available. We thus need to register different clock gates for the A20.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Emilio López <emilio@elopez.com.ar>
Maxime Ripard [Tue, 23 Jul 2013 21:34:10 +0000 (23:34 +0200)]
clk: sunxi: Add A31 clocks support
The A31 has a mostly different clock set compared to the other older
SoCs currently supported in the Allwinner clock driver.
Add support for the basic useful clocks. The other ones will come in
eventually.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Emilio López <emilio@elopez.com.ar>
Maxime Ripard [Tue, 23 Jul 2013 07:25:56 +0000 (09:25 +0200)]
clk: sunxi: Allow to specify the divider width from the dividers data
The divider width used to be hardcoded. Some A31 dividers are no longer
with the hardcoded width, so we need to make it specific to each divider
and set it in the dividers data.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Emilio López <emilio@elopez.com.ar>
Maxime Ripard [Mon, 22 Jul 2013 16:21:32 +0000 (18:21 +0200)]
clk: sunxi: Rename the structure to prepare the addition of sun6i
Rename all the generic-named structure to sun4i to avoid confusion when
we will introduce the sun6i (A31) clocks.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Emilio López <emilio@elopez.com.ar>
Emilio López [Tue, 23 Jul 2013 01:01:05 +0000 (22:01 -0300)]
clk: sunxi: fix initialization of basic clocks
With the recent move towards CLK_OF_DECLARE(...), the driver stopped
initializing osc32k, which is compatible "fixed-clock". This is because
we never called of_clk_init(NULL). Fix this by moving the only other
simple clock (osc24M) to use CLK_OF_DECLARE(...) and call of_clk_init(NULL)
to initialize both of them.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mike Turquette <mturquette@linaro.org>
Maxime Ripard [Tue, 16 Jul 2013 09:21:59 +0000 (11:21 +0200)]
clk: sunxi: Add A10s gates
The Allwinner A10s has a slightly different gates set than the A10 and
A13, so add these gates to the clk driver.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Emilio López <emilio@elopez.com.ar>
Jisheng Zhang [Fri, 23 Aug 2013 02:34:01 +0000 (10:34 +0800)]
clk: mvebu: add missing iounmap
Add missing iounmap to setup error path.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Mike Turquette [Thu, 22 Aug 2013 06:58:09 +0000 (23:58 -0700)]
clk: handle NULL struct clk gracefully
At some point changes to clk_set_rate and clk_set_parent introduced a
bug whereby NULL struct clk pointers were treated as an error. This is
in violation of the API in include/linux/clk.h. Reintroduce graceful
handling of NULL clk's by bailing from clk_set_rate and clk_set_parent
with return codes of zero.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Mike Turquette [Tue, 20 Aug 2013 21:58:48 +0000 (14:58 -0700)]
Merge tag 'zynq-clk-for-3.12' of git://git.xilinx.com/linux-xlnx into clk-next
arm: Xilinx Zynq clock changes for v3.12
Just small two changes where the first fixes
documentation and the second improves
code readability.
Soren Brinkmann [Fri, 19 Jul 2013 17:16:45 +0000 (10:16 -0700)]
clk/zynq/pll: Use #defines for fbdiv min/max values
Use more descriptive #defines for the minimum and maximum PLL
feedback divider.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann [Fri, 19 Jul 2013 17:16:44 +0000 (10:16 -0700)]
clk/zynq/pll: Fix documentation for PLL register function
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
James Hogan [Mon, 29 Jul 2013 11:25:02 +0000 (12:25 +0100)]
clk: clk-mux: implement remuxing on set_rate
Implement clk-mux remuxing if the CLK_SET_RATE_NO_REPARENT flag isn't
set. This implements determine_rate for clk-mux to propagate to each
parent and to choose the best one (like clk-divider this chooses the
parent which provides the fastest rate <= the requested rate).
The determine_rate op is implemented as a core helper function so that
it can be easily used by more complex clocks which incorporate muxes.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette <mturquette@linaro.org>
James Hogan [Mon, 29 Jul 2013 11:25:01 +0000 (12:25 +0100)]
clk: add CLK_SET_RATE_NO_REPARENT flag
Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes
being reparented during clk_set_rate.
To avoid breaking existing platforms, all callers of clk_register_mux()
are adjusted to pass the new flag. Platform maintainers are encouraged
to remove the flag if they wish to allow mux reparenting on set_rate.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Chao Xie <xiechao.mail@gmail.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: "Emilio López" <emilio@elopez.com.ar>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Andrew Chew <achew@nvidia.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: spear-devel@list.st.com
Cc: linux-tegra@vger.kernel.org
Tested-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com> [tegra]
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [sunxi]
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> [Zynq]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
James Hogan [Mon, 29 Jul 2013 11:25:00 +0000 (12:25 +0100)]
clk: add support for clock reparent on set_rate
Add core support to allow clock implementations to select the best
parent clock when rounding a rate, e.g. the one which can provide the
closest clock rate to that requested. This is by way of adding a new
clock op, determine_rate(), which is like round_rate() but has an extra
parameter to allow the clock implementation to optionally select a
different parent clock. The core then takes care of reparenting the
clock when setting the rate.
The parent change takes place with the help of some new private data
members. struct clk::new_parent specifies a clock's new parent (NULL
indicates no change), and struct clk::new_child specifies a clock's new
child (whose new_parent member points back to it). The purpose of these
are to allow correct walking of the future tree for notifications prior
to actually reparenting any clocks, specifically to skip child clocks
who are being reparented to another clock (they will be notified via the
new parent), and to include any new child clock. These pointers are set
by clk_calc_subtree(), and the new_child pointer gets cleared when a
child is actually reparented to avoid duplicate POST_RATE_CHANGE
notifications.
Each place where round_rate() is called, determine_rate() is checked
first and called in preference. This restructures a few of the call
sites to simplify the logic into if/else blocks.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette <mturquette@linaro.org>
James Hogan [Mon, 29 Jul 2013 11:24:59 +0000 (12:24 +0100)]
clk: move some parent related functions upwards
Move some parent related functions up in clk.c so they can be used by
the modifications in the following patch which enables clock reparenting
during set_rate. No other changes are made so this patch makes no
functional difference in isolation. This is separate from the following
patch primarily to ease readability of that patch.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette <mturquette@linaro.org>
James Hogan [Mon, 29 Jul 2013 11:24:58 +0000 (12:24 +0100)]
clk: abstract parent cache
Abstract access to the clock parent cache by defining
clk_get_parent_by_index(clk, index). This allows access to parent
clocks from clock drivers.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Mike Turquette [Fri, 16 Aug 2013 02:06:29 +0000 (19:06 -0700)]
clk: export fixed-factor, gate & mux registration
These registration calls may be used by loadable modules. Export them.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Fabio Estevam [Fri, 2 Aug 2013 16:14:07 +0000 (13:14 -0300)]
clk: clk-divider: Export clk_register_divider()
clk_register_divider() needs to be exported so that it could be used
in a module driver, otherwise we get the following error:
ERROR: "clk_register_divider" [sound/soc/mxs/snd-soc-mxs.ko] undefined!
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: also export clk_register_divider_table]
Stephen Boyd [Thu, 25 Jul 2013 00:43:29 +0000 (17:43 -0700)]
clk: fixed-rate: Export clk_fixed_rate_register()
Export this symbol so that modules can register fixed rate
clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Thu, 8 Aug 2013 04:31:26 +0000 (10:01 +0530)]
clk: prima2: Fix incorrect placement of __initdata
__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Thu, 8 Aug 2013 04:25:49 +0000 (09:55 +0530)]
clk: tegra30: Fix incorrect placement of __initdata
__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Thu, 8 Aug 2013 04:25:48 +0000 (09:55 +0530)]
clk: tegra20: Fix incorrect placement of __initdata
__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Thu, 8 Aug 2013 04:25:47 +0000 (09:55 +0530)]
clk: tegra114: Fix incorrect placement of __initdata
__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Wed, 7 Aug 2013 04:48:40 +0000 (10:18 +0530)]
clk: exynos5440: Fix incorrect placement of __initdata
__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Wed, 7 Aug 2013 04:48:39 +0000 (10:18 +0530)]
clk: exynos5420: Fix incorrect placement of __initdata
__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Wed, 7 Aug 2013 04:48:38 +0000 (10:18 +0530)]
clk: exynos5250: Fix incorrect placement of __initdata
__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Wed, 7 Aug 2013 04:48:37 +0000 (10:18 +0530)]
clk: exynos4: Fix incorrect placement of __initdata
__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Yadwinder Singh Brar [Sun, 7 Jul 2013 11:44:20 +0000 (17:14 +0530)]
clk: s2mps11: Add support for s2mps11
This patch adds support to register three(AP/CP/BT) buffered 32.768 KHz
outputs of mfd-s2mps11 with common clock framework.
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Tue, 6 Aug 2013 11:31:15 +0000 (17:01 +0530)]
clk: exynos5420: Make exynos5420_plls static
'exynos5420_plls' is used only in this file. Make is static.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Tue, 6 Aug 2013 11:31:14 +0000 (17:01 +0530)]
clk: exynos5250: Make exynos5250_plls static
exynos5250_plls is used only in this file. Make it static.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Tue, 6 Aug 2013 11:31:13 +0000 (17:01 +0530)]
clk: exynos4: Make exynos4_plls static
'exynos4_plls' is used only in this file. Make it static.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Fabio Estevam [Tue, 16 Jul 2013 13:33:43 +0000 (10:33 -0300)]
clk: mxs: clk-imx23: Include <linux/clk/mxs.h>
Fix the following sparse warning:
drivers/clk/mxs/clk-imx23.c:102:12: warning: symbol 'mx23_clocks_init' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Axel Lin [Fri, 12 Jul 2013 08:15:15 +0000 (16:15 +0800)]
clk: sunxi: Fix checking return value of clk_register_[composite|factors]
clk_register_composite() and clk_register_factors() return ERR_PTR on error.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Mike Turquette [Mon, 5 Aug 2013 18:59:06 +0000 (11:59 -0700)]
Merge branch 'clk-next-s3c64xx' into clk-next
Sachin Kamat [Fri, 12 Jul 2013 03:23:43 +0000 (08:53 +0530)]
Documentation: clk: Fix a trivial typo in audss
Fixes a trivial typo.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Tue, 23 Jul 2013 23:55:15 +0000 (01:55 +0200)]
clk: samsung: Add clock driver for S3C64xx SoCs
This patch adds new, Common Clock Framework-based clock driver for Samsung
S3C64xx SoCs. The driver is just added, without actually letting the
platforms use it yet, since this requires more intermediate steps.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 22 Jul 2013 23:49:19 +0000 (01:49 +0200)]
clk: samsung: pll: Add support for PLL6552 and PLL6553
This patch adds support for PLL6552 and PLL6553 PLLs present on Samsung
S3C64xx SoCs.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tomasz Figa [Mon, 22 Jul 2013 23:49:18 +0000 (01:49 +0200)]
clk: mux: Add support for read-only muxes.
Some platforms have read-only clock muxes that are preconfigured at
reset and cannot be changed at runtime. This patch extends mux clock
driver to allow handling such read-only muxes by adding new
CLK_MUX_READ_ONLY mux flag.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Vikas Sajjan [Tue, 11 Jun 2013 09:31:16 +0000 (15:01 +0530)]
clk: samsung: Add EPLL and VPLL freq table for exynos5250 SoC
Adds the EPLL and VPLL freq table for exynos5250 SoC.
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Vikas Sajjan [Tue, 11 Jun 2013 09:31:15 +0000 (15:01 +0530)]
clk: samsung: Reorder MUX registration for mout_vpllsrc
While trying to get rate of "mout_vpllsrc" MUX (parent) for registering the
"fout_vpll" (child), we found get rate was failing.
So this patch moves the mout_vpllsrc MUX out of the existing common list
and registers the mout_vpllsrc MUX before the PLL registrations.
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Vikas Sajjan [Tue, 11 Jun 2013 09:31:14 +0000 (15:01 +0530)]
clk: samsung: Add set_rate() clk_ops for PLL36xx
This patch adds set_rate and round_rate clk_ops for PLL36xx
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:13 +0000 (15:01 +0530)]
clk: samsung: Add set_rate() clk_ops for PLL35xx
This patch add set_rate() and round_rate() for PLL35xx
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:12 +0000 (15:01 +0530)]
clk: samsung: Add support to register rate_table for samsung plls
This patch defines a common rate_table which will contain recommended p, m, s,
k values for supported rates that needs to be changed for changing
corresponding PLL's rate.
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:11 +0000 (15:01 +0530)]
clk: samsung: Remove unused pll registeration code for pll35xx and pll36xx
This patch removes samsung_clk_register_pll35xx() and
samsung_clk_register_pll36xx() registaration functions as users migrated to
new samsung_clk_register_pll().
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:10 +0000 (15:01 +0530)]
clk: samsung: Migrate exynos5420 to use common samsung_clk_register_pll()
This patch migrates exynos5420 pll registeration to use common
samsung_clk_register_pll() by intialising table of PLLs and adding PLLs to
unique id list of clocks.
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:09 +0000 (15:01 +0530)]
clk: samsung: Migrate exynos4 to use common samsung_clk_register_pll()
This patch migrates exynos4 pll registeration to use common
samsung_clk_register_pll() by intialising table of PLLs.
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:08 +0000 (15:01 +0530)]
clk: samsung: Migrate exynos5250 to use common samsung_clk_register_pll()
This patch migrates exynos5250 pll registeration to use common
samsung_clk_register_pll() by intialising table of PLLs and adding PLLs to
unique id list of clocks.
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:07 +0000 (15:01 +0530)]
clk: samsung: Define a common samsung_clk_register_pll()
This patch defines a common samsung_clk_register_pll()
Since pll2550 & pll35xx and pll2650 & pll36xx have exactly same clk ops
implementation, added pll2550 and pll2650 also.
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Yadwinder Singh Brar [Tue, 11 Jun 2013 09:31:06 +0000 (15:01 +0530)]
clk: samsung: Introduce a common samsung_clk_pll struct
This patch unifies clk strutures used for PLL35xx & PLL36xx and
adding an extra member lock_reg, so that common code can be factored out.
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Tue, 9 Jul 2013 06:29:15 +0000 (11:59 +0530)]
of/documentation: Update G2D documentation
Exynos5250 G2D IP requires only the gate clock. Update the
binding documentation accordingly.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Wed, 24 Jul 2013 10:09:15 +0000 (15:39 +0530)]
clk: exynos4: Add clock entries for TMU
Added clock entries for thermal management unit (TMU) for
Exynos4 SoCs.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Rahul Sharma [Thu, 25 Jul 2013 05:07:35 +0000 (10:37 +0530)]
clk/exynos5250: add sclk_hdmiphy in the list of special clocks
hdmi driver needs hdmiphy clock which is one of the parent
for hdmi mux clock. This is required while changing the parent
of mux clock.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Rahul Sharma [Thu, 25 Jul 2013 05:07:34 +0000 (10:37 +0530)]
clk/exynos5250: add mout_hdmi mux clock for hdmi
hdmi driver needs to change the parent of hdmi clock
frequently between pixel clock and hdmiphy clock. hdmiphy is
not stable after power on and for a short interval while changing
the phy configuration. For this duration pixel clock is used to
clock hdmi.
This patch is exposing the mux for changing parent.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Tushar Behera [Thu, 25 Jul 2013 05:07:33 +0000 (10:37 +0530)]
Documentation: exynos5250-clock: Add div_i2s1 and div_i2s2
commit
79d743c177f9 ("clk: exynos5250: Add enum entries for divider
clock of i2s1 and i2s2") added two new clock entries. Add the clock
entry enum numbers to documentation.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Fri, 5 Jul 2013 08:42:27 +0000 (14:12 +0530)]
clk: exynos5250: Add G2D gate clock
Adds gate clock for G2D IP for Exynos5250 SoC.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Thu, 18 Jul 2013 10:01:22 +0000 (15:31 +0530)]
clk: exynos-audss: Staticize exynos_audss_clk_init
exynos_audss_clk_init() is used only in this file. Make it
static.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Thu, 18 Jul 2013 10:01:21 +0000 (15:31 +0530)]
clk: exynos5440: Staticize local symbols
Symbols referenced only in this file are made static.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Thu, 18 Jul 2013 10:01:20 +0000 (15:31 +0530)]
clk: exynos5420: Staticize local symbols
Symbols referenced only in this file are made static.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Thu, 18 Jul 2013 10:01:19 +0000 (15:31 +0530)]
clk: exynos5250: Staticize local symbols
Symbols referenced only in this file are made static.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Thu, 18 Jul 2013 10:01:18 +0000 (15:31 +0530)]
clk: exynos4: Remove unused function
Subsequent to the cleanup in commit
3c70348c7c ("ARM: EXYNOS:
Remove legacy timer initialization code"), this function has no more
users. Hence remove it.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Sachin Kamat [Thu, 18 Jul 2013 10:01:17 +0000 (15:31 +0530)]
clk: exynos4: Staticize local symbols
Symbols referenced only in this file are made static.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Peter Meerwald [Sat, 29 Jun 2013 13:14:19 +0000 (15:14 +0200)]
clk: fix typos
Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Turquette <mturquette@linaro.org>