OSDN Git Service
Richard Henderson [Wed, 28 Apr 2021 19:33:54 +0000 (12:33 -0700)]
linux-user/s390x: Fix sigframe types
Noticed via gitlab clang-user job:
TEST signals on s390x
../linux-user/s390x/signal.c:258:9: runtime error: \
1.84467e+19 is outside the range of representable values of \
type 'unsigned long'
Which points to the fact that we were performing a double-to-uint64_t
conversion while storing the fp registers, instead of just copying
the data across.
Turns out there are several errors:
target_ulong is the size of the target register, whereas abi_ulong
is the target 'unsigned long' type. Not a big deal here, since we
only support 64-bit s390x, but not correct either.
In target_sigcontext and target ucontext, we used a host pointer
instead of a target pointer, aka abi_ulong.
Fixing this allows the removal of a cast to __put_user.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210428193408.233706-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:34 +0000 (19:53 -0700)]
tests/tcg/sparc64: Re-enable linux-test
It passes now that we support signals properly.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-26-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:33 +0000 (19:53 -0700)]
linux-user/sparc: Implement sparc64 rt signals
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-25-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:32 +0000 (19:53 -0700)]
linux-user/sparc: Implement sparc32 rt signals
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-24-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:31 +0000 (19:53 -0700)]
linux-user/sparc: Add 64-bit support to fpu save/restore
The shape of the kernel's __siginfo_fpu_t is dependent on
the cpu type, not the abi. Which is weird, but there ya go.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-23-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:30 +0000 (19:53 -0700)]
linux-user/sparc: Minor corrections to do_sigreturn
Check that the input sp is 16 byte aligned, not 4.
Do that before the lock_user_struct check.
Validate the saved sp is 8 byte aligned.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-22-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:29 +0000 (19:53 -0700)]
linux-user/sparc: Clean up setup_frame
Clean up a goto label with a single use. Remove #if 0.
Remove useless parentheses. Fold constants into __put_user.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-21-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:28 +0000 (19:53 -0700)]
linux-user/sparc: Add rwin_save to signal frame
Stub it out to zero, but at least include it.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-20-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:27 +0000 (19:53 -0700)]
linux-user/sparc: Save and restore fpu in signal frame
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-19-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:26 +0000 (19:53 -0700)]
linux-user/sparc: Clean up get_sigframe
Remove inline; fix spacing and comment format.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-18-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:25 +0000 (19:53 -0700)]
linux-user/sparc: Split out save_reg_win
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-17-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:24 +0000 (19:53 -0700)]
linux-user/sparc: Use target_pt_regs
Replace __siginfo_t with target_pt_regs, and move si_mask
into target_signal_frame directly.
Extract save/restore functions for target_pt_regs. Adjust
for sparc64 tstate. Use proper get/put functions for psr.
Turns out we were already writing to si_mask twice, so no
need to handle that in the new functions.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-16-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:23 +0000 (19:53 -0700)]
linux-user/sparc: Fix the stackframe structure
Move target_reg_window up and use it. Fold structptr and xxargs
into xargs -- the use of a host pointer was incorrect anyway.
Rename the structure to target_stackf for consistency.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-15-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:22 +0000 (19:53 -0700)]
linux-user/sparc: Remove target_rt_signal_frame as unused
It's wrong anyway. Remove it for now.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-14-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:21 +0000 (19:53 -0700)]
linux-user/sparc: Remove target_sigcontext as unused
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-13-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:20 +0000 (19:53 -0700)]
linux-user/sparc: Merge sparc64/ into sparc/
All of the source and header files already defer to sparc
via #include. The syscall.tbl and syscallhdr.sh files
could not do the same, but are identical.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-12-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:19 +0000 (19:53 -0700)]
linux-user/sparc: Merge sparc64 termbits.h
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-11-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:18 +0000 (19:53 -0700)]
linux-user/sparc: Merge sparc64 target_structs.h
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-10-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:17 +0000 (19:53 -0700)]
linux-user/sparc: Merge sparc64 target_elf.h
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-9-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:16 +0000 (19:53 -0700)]
linux-user/sparc: Merge sparc64 target_syscall.h
There are only a few differences in sparc32 vs sparc64.
This fixes target_shmlba for sparc32plus, which is v9.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-8-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:15 +0000 (19:53 -0700)]
linux-user/sparc: Clean up init_thread
Share code between sparc32 and sparc64, removing a bit of pointless
difference wrt psr/tstate. Use sizeof(abi_ulong) for allocating
initial register window. Use TARGET_STACK_BIAS.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-7-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:14 +0000 (19:53 -0700)]
linux-user/sparc: Include TARGET_STACK_BIAS in get_sp_from_cpustate
Move TARGET_STACK_BIAS from signal.c. Generic code cares about the
logical stack pointer, not the physical one that has a bias applied
for sparc64.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-6-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:13 +0000 (19:53 -0700)]
linux-user: Pass CPUArchState to target_restore_altstack
In most cases we were already passing get_sp_from_cpustate
directly to the function. In other cases, we were passing
a local variable which already contained the same value.
In the rest of the cases, we were passing the stack pointer
out of env directly.
Reviewed by: Warner Losh <imp@bsdimp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-5-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:12 +0000 (19:53 -0700)]
linux-user: Pass CPUArchState to do_sigaltstack
Now that we have exactly one call, it's easy to pass
in env instead of passing in the sp value.
Use target_save_altstack, which required env.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-4-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:11 +0000 (19:53 -0700)]
linux-user: Use target_restore_altstack in all sigreturn
Note that target_restore_altstack uses the host memory
pointer that we have already verified, so TARGET_EFAULT
is not a possible return value.
Note that using -EFAULT was a bug.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-3-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Mon, 26 Apr 2021 02:53:10 +0000 (19:53 -0700)]
linux-user: Split out target_restore_altstack
Create a function to match target_save_altstack.
Fix some style and unlock issues in do_sigaltstack.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210426025334.
1168495-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Kito Cheng [Wed, 12 May 2021 10:13:58 +0000 (18:13 +0800)]
linux-user: Add strace support for printing arguments of llseek
Some target are using llseek instead of _llseek like riscv,
nios2, hexagon, and openrisc.
Signed-off-by: Kito Cheng <kito.cheng@sifive.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
20210512101358.122781-1-kito.cheng@sifive.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Fri, 23 Apr 2021 16:54:13 +0000 (09:54 -0700)]
linux-user/arm: Simplify accumulating and raising fpa11 exceptions
Use bit masking instead of an if tree.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20210423165413.338259-5-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Fri, 23 Apr 2021 16:54:12 +0000 (09:54 -0700)]
linux-user/arm: Do not fill in si_code for fpa11 exceptions
There is no such decoding in linux/arch/arm/nwfpe/fpmodule.c.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20210423165413.338259-4-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Fri, 23 Apr 2021 16:54:11 +0000 (09:54 -0700)]
linux-user/arm: Do not emulate fpa11 in thumb mode
These antiquated instructions are arm-mode only.
Buglink: https://bugs.launchpad.net/bugs/1925512
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20210423165413.338259-3-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Fri, 23 Apr 2021 16:54:10 +0000 (09:54 -0700)]
linux-user/arm: Split out emulate_arm_fpa11
Pull out the fpa11 emulation to a helper function.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20210423165413.338259-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Matus Kysel [Tue, 6 Apr 2021 14:42:03 +0000 (14:42 +0000)]
linux-user: strace now handles unshare syscall args correctly
Syscall unshare did not have custom print function for strace, but it's argument is same as flags in clone syscall, so it can be easily implemented.
Also updated missing flags from clone_flags.
Signed-off-by: Matus Kysel <mkysel@tachyum.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
20210406144203.
1020598-1-mkysel@tachyum.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Philippe Mathieu-Daudé [Wed, 3 Mar 2021 21:46:57 +0000 (22:46 +0100)]
linux-user: Remove dead code
We can not use watchpoints in user-mode emulation because we
need the softmmu slow path to detect accesses to watchpointed
memory. This code is expanded as empty stub in "hw/core/cpu.h"
anyway, so we can drop it.
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20210303214708.
1727801-18-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Peter Maydell [Fri, 14 May 2021 16:20:07 +0000 (17:20 +0100)]
Merge remote-tracking branch 'remotes/marcandre/tags/rtd-pull-request' into staging
Pull request
# gpg: Signature made Fri 14 May 2021 12:12:24 BST
# gpg: using RSA key
87A9BD933F87C606D276F62DDAE8E10975969CE5
# gpg: issuer "marcandre.lureau@redhat.com"
# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full]
# gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full]
# Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5
* remotes/marcandre/tags/rtd-pull-request:
sphinx: adopt kernel readthedoc theme
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 14 May 2021 13:26:23 +0000 (14:26 +0100)]
Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-v1' into staging
Add a bus multiplexer device
This patch set adds a bus multiplexer and the necessary infrastructure
in the I2C code to allow it to work.
These are common on systems with lots of I2C devices, like an IPMI BMC.
# gpg: Signature made Thu 13 May 2021 22:48:07 BST
# gpg: using RSA key
FD0D5CE67CE0F59A6688268661F38C90919BFF81
# gpg: Good signature from "Corey Minyard <cminyard@mvista.com>" [unknown]
# gpg: aka "Corey Minyard <minyard@acm.org>" [unknown]
# gpg: aka "Corey Minyard <corey@minyard.net>" [unknown]
# gpg: aka "Corey Minyard <minyard@mvista.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FD0D 5CE6 7CE0 F59A 6688 2686 61F3 8C90 919B FF81
* remotes/cminyard/tags/for-qemu-6.1-v1:
hw/i2c: add pca954x i2c-mux switch
hw/i2c: move search to i2c_scan_bus method
hw/i2c: add match method for device search
hw/i2c: name I2CNode list in I2CBus
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Marc-André Lureau [Tue, 23 Mar 2021 11:53:28 +0000 (15:53 +0400)]
sphinx: adopt kernel readthedoc theme
The default "alabaster" sphinx theme has a couple shortcomings:
- the navbar moves along the page
- the search bar is not always at the same place
- it lacks some contrast and colours
The "rtd" theme from readthedocs.org is a popular third party theme used
notably by the kernel, with a custom style sheet. I like it better,
perhaps others do too. It also simplifies the "Edit on Gitlab" links.
Tweak a bit the custom theme to match qemu.org style, use the
QEMU logo, and favicon etc.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <
20210323115328.
4146052-1-marcandre.lureau@redhat.com>
Reviewed-by: John Snow <jsnow@redhat.com>
Peter Maydell [Fri, 14 May 2021 11:03:46 +0000 (12:03 +0100)]
Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-
20210513a' into staging
Migration pull 2021-05-13
Fix of the 2021-05-11 version, with a fix to build on the armhf
cross.
The largest change in this set is David's changes for ram block size
changing; then there's a pile of other cleanups and fixes.
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
# gpg: Signature made Thu 13 May 2021 18:36:06 BST
# gpg: using RSA key
45F5C71B4A0CB7FB977A9FA90516331EBC5BFDE7
# gpg: Good signature from "Dr. David Alan Gilbert (RH2) <dgilbert@redhat.com>" [full]
# Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7
* remotes/dgilbert/tags/pull-migration-
20210513a:
tests/migration: introduce multifd into guestperf
tests/qtest/migration-test: Use g_autofree to avoid leaks on error paths
tests/migration-test: Fix "true" vs true
migration/ram: Use offset_in_ramblock() in range checks
migration/multifd: Print used_length of memory block
migration/ram: Handle RAM block resizes during postcopy
migration/ram: Simplify host page handling in ram_load_postcopy()
migration/ram: Discard RAM when growing RAM blocks after ram_postcopy_incoming_init()
exec: Relax range check in ram_block_discard_range()
migration/ram: Handle RAM block resizes during precopy
numa: Make all callbacks of ram block notifiers optional
numa: Teach ram block notifiers about resizeable ram blocks
util: vfio-helpers: Factor out and fix processing of existing ram blocks
migration: Drop redundant query-migrate result @blocked
migration/ram: Optimize ram_save_host_page()
migration/ram: Reduce unnecessary rate limiting
migrate/ram: remove "ram_bulk_stage" and "fpo_enabled"
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 13 May 2021 19:13:24 +0000 (20:13 +0100)]
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' into staging
Miscellaneous patches for 2021-05-12
# gpg: Signature made Wed 12 May 2021 17:22:15 BST
# gpg: using RSA key
354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg: issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-misc-2021-05-12:
Drop the deprecated unicore32 target
Drop the deprecated lm32 target
block: Drop the sheepdog block driver
Remove the deprecated moxie target
monitor/qmp: fix race on CHR_EVENT_CLOSED without OOB
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Hyman [Fri, 19 Mar 2021 17:04:56 +0000 (01:04 +0800)]
tests/migration: introduce multifd into guestperf
Guestperf tool does not cover the multifd-enabled migration
currently, it is worth supporting so that developers can
analysis the migration performance with all kinds of
migration.
To request that multifd is enabled, with 4 channels:
$ ./tests/migration/guestperf.py \
--multifd --multifd-channels 4 --output output.json
To run the entire standardized set of multifd-enabled
comparisons, with unix migration:
$ ./tests/migration/guestperf-batch.py \
--dst-host localhost --transport unix \
--filter compr-multifd* --output outputdir
Signed-off-by: Hyman Huang(黄勇) <huangy81@chinatelecom.cn>
Message-Id: <
cfeeb04d17ad932c42a9871294058b77429ad1b7.
1616171924.git.huangy81@chinatelecom.cn>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Peter Maydell [Thu, 6 May 2021 18:58:19 +0000 (19:58 +0100)]
tests/qtest/migration-test: Use g_autofree to avoid leaks on error paths
Coverity notices that several places in the migration-test code fail
to free memory in error-exit paths. This is pretty unimportant in
test case code, but we can avoid having to manually free the memory
entirely by using g_autofree.
The places where Coverity spotted a leak were relating to early exits
not freeing 'uri' in test_precopy_unix(), do_test_validate_uuid(),
migrate_postcopy_prepare() and test_migrate_auto_converge(). This
patch converts all the string-allocation in the test code to
g_autofree for consistency.
Fixes: Coverity CID
1432313,
1432315,
1432352,
1432364
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20210506185819.9010-1-peter.maydell@linaro.org>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Dr. David Alan Gilbert [Tue, 4 May 2021 10:05:45 +0000 (11:05 +0100)]
tests/migration-test: Fix "true" vs true
Accidental use of "true" as a boolean; spotted by coverity
and Peter.
Fixes:
b99784ef6c3
Fixes:
d795f47466e
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Reported-by: Coverity (CID 1432373, 1432292, 1432288)
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <
20210504100545.112213-1-dgilbert@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
David Hildenbrand [Thu, 29 Apr 2021 11:27:08 +0000 (13:27 +0200)]
migration/ram: Use offset_in_ramblock() in range checks
We never read or write beyond the used_length of memory blocks when
migrating. Make this clearer by using offset_in_ramblock() consistently.
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210429112708.12291-11-david@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
David Hildenbrand [Thu, 29 Apr 2021 11:27:07 +0000 (13:27 +0200)]
migration/multifd: Print used_length of memory block
We actually want to print the used_length, against which we check.
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210429112708.12291-10-david@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
David Hildenbrand [Thu, 29 Apr 2021 11:27:06 +0000 (13:27 +0200)]
migration/ram: Handle RAM block resizes during postcopy
Resizing while migrating is dangerous and does not work as expected.
The whole migration code works with the usable_length of a ram block and
does not expect this value to change at random points in time.
In the case of postcopy, relying on used_length is racy as soon as the
guest is running. Also, when used_length changes we might leave the
uffd handler registered for some memory regions, reject valid pages
when migrating and fail when sending the recv bitmap to the source.
Resizing can be trigger *after* (but not during) a reset in
ACPI code by the guest
- hw/arm/virt-acpi-build.c:acpi_ram_update()
- hw/i386/acpi-build.c:acpi_ram_update()
Let's remember the original used_length in a separate variable and
use it in relevant postcopy code. Make sure to update it when we resize
during precopy, when synchronizing the RAM block sizes with the source.
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210429112708.12291-9-david@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
David Hildenbrand [Thu, 29 Apr 2021 11:27:05 +0000 (13:27 +0200)]
migration/ram: Simplify host page handling in ram_load_postcopy()
Add two new helper functions. This will come in come handy once we want to
handle ram block resizes while postcopy is active.
Note that ram_block_from_stream() will already print proper errors.
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210429112708.12291-8-david@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
dgilbert: Added brackets in host_page_from_ram_block_offset
to cause uintptr_t to cast the sum, to fix armhf-cross build
David Hildenbrand [Thu, 29 Apr 2021 11:27:04 +0000 (13:27 +0200)]
migration/ram: Discard RAM when growing RAM blocks after ram_postcopy_incoming_init()
In case we grow our RAM after ram_postcopy_incoming_init() (e.g., when
synchronizing the RAM block state with the migration source), the resized
part would not get discarded. Let's perform that when being notified
about a resize while postcopy has been advised, but is not listening
yet. With precopy, the process is as following:
1. VM created
- RAM blocks are created
2. Incomming migration started
- Postcopy is advised
- All pages in RAM blocks are discarded
3. Precopy starts
- RAM blocks are resized to match the size on the migration source.
- RAM pages from precopy stream are loaded
- Uffd handler is registered, postcopy starts listening
4. Guest started, postcopy running
- Pagefaults get resolved, pages get placed
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210429112708.12291-7-david@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
David Hildenbrand [Thu, 29 Apr 2021 11:27:03 +0000 (13:27 +0200)]
exec: Relax range check in ram_block_discard_range()
We want to make use of ram_block_discard_range() in the RAM block resize
callback when growing a RAM block, *before* used_length is changed.
Let's relax the check. As RAM blocks always mmap the whole max_length area,
we cannot corrupt unrelated data.
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210429112708.12291-6-david@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
David Hildenbrand [Thu, 29 Apr 2021 11:27:02 +0000 (13:27 +0200)]
migration/ram: Handle RAM block resizes during precopy
Resizing while migrating is dangerous and does not work as expected.
The whole migration code works on the usable_length of ram blocks and does
not expect this to change at random points in time.
In the case of precopy, the ram block size must not change on the source,
after syncing the RAM block list in ram_save_setup(), so as long as the
guest is still running on the source.
Resizing can be trigger *after* (but not during) a reset in
ACPI code by the guest
- hw/arm/virt-acpi-build.c:acpi_ram_update()
- hw/i386/acpi-build.c:acpi_ram_update()
Use the ram block notifier to get notified about resizes. Let's simply
cancel migration and indicate the reason. We'll continue running on the
source. No harm done.
Update the documentation. Postcopy will be handled separately.
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210429112708.12291-5-david@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Manual merge
David Hildenbrand [Thu, 29 Apr 2021 11:27:01 +0000 (13:27 +0200)]
numa: Make all callbacks of ram block notifiers optional
Let's make add/remove optional. We want to introduce a RAM block
notifier for RAM migration that is only interested in resize events.
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210429112708.12291-4-david@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
David Hildenbrand [Thu, 29 Apr 2021 11:27:00 +0000 (13:27 +0200)]
numa: Teach ram block notifiers about resizeable ram blocks
Ram block notifiers are currently not aware of resizes. To properly
handle resizes during migration, we want to teach ram block notifiers about
resizeable ram.
Introduce the basic infrastructure but keep using max_size in the
existing notifiers. Supply the max_size when adding and removing ram
blocks. Also, notify on resizes.
Acked-by: Paul Durrant <paul@xen.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Cc: xen-devel@lists.xenproject.org
Cc: haxm-team@intel.com
Cc: Paul Durrant <paul@xen.org>
Cc: Stefano Stabellini <sstabellini@kernel.org>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Wenchao Wang <wenchao.wang@intel.com>
Cc: Colin Xu <colin.xu@intel.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210429112708.12291-3-david@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
David Hildenbrand [Thu, 29 Apr 2021 11:26:59 +0000 (13:26 +0200)]
util: vfio-helpers: Factor out and fix processing of existing ram blocks
Factor it out into common code when a new notifier is registered, just
as done with the memory region notifier. This keeps logic about how to
process existing ram blocks at a central place.
Just like when adding a new ram block, we have to register the max_length.
Ram blocks are only "fake resized". All memory (max_length) is mapped.
Print the warning from inside qemu_vfio_ram_block_added().
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210429112708.12291-2-david@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Markus Armbruster [Thu, 29 Apr 2021 14:04:24 +0000 (16:04 +0200)]
migration: Drop redundant query-migrate result @blocked
Result @blocked is redundant. Unfortunately, we realized this too
close to the release to risk dropping it, so we deprecated it
instead, in commit
e11ce6c06.
Since it was deprecated from the start, we can delete it without
the customary grace period. Do so.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <
20210429140424.
2802929-1-armbru@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Kunkun Jiang [Tue, 16 Mar 2021 12:57:16 +0000 (20:57 +0800)]
migration/ram: Optimize ram_save_host_page()
Starting from pss->page, ram_save_host_page() will check every page
and send the dirty pages up to the end of the current host page or
the boundary of used_length of the block. If the host page size is
a huge page, the step "check" will take a lot of time.
It will improve performance to use migration_bitmap_find_dirty().
Tested on Kunpeng 920; VM parameters: 1U 4G (page size 1G)
The time of ram_save_host_page() in the last round of ram saving:
before optimize: 9250us after optimize: 34us
Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com>
Signed-off-by: Kunkun Jiang <jiangkunkun@huawei.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Message-Id: <
20210316125716.1243-3-jiangkunkun@huawei.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Kunkun Jiang [Tue, 16 Mar 2021 12:57:15 +0000 (20:57 +0800)]
migration/ram: Reduce unnecessary rate limiting
When the host page is a huge page and something is sent in the
current iteration, migration_rate_limit() should be executed.
If not, it can be omitted.
Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com>
Signed-off-by: Kunkun Jiang <jiangkunkun@huawei.com>
Reviewed-by: David Edmondson <david.edmondson@oracle.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <
20210316125716.1243-2-jiangkunkun@huawei.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
David Hildenbrand [Tue, 16 Feb 2021 10:50:39 +0000 (11:50 +0100)]
migrate/ram: remove "ram_bulk_stage" and "fpo_enabled"
The bulk stage is kind of weird: migration_bitmap_find_dirty() will
indicate a dirty page, however, ram_save_host_page() will never save it, as
migration_bitmap_clear_dirty() detects that it is not dirty.
We already fill the bitmap in ram_list_init_bitmaps() with ones, marking
everything dirty - it didn't used to be that way, which is why we needed
an explicit first bulk stage.
Let's simplify: make the bitmap the single source of thuth. Explicitly
handle the "xbzrle_enabled after first round" case.
Regarding XBZRLE (implicitly handled via "ram_bulk_stage = false" right
now), there is now a slight change in behavior:
- Colo: When starting, it will be disabled (was implicitly enabled)
until the first round actually finishes.
- Free page hinting: When starting, XBZRLE will be disabled (was implicitly
enabled) until the first round actually finished.
- Snapshots: When starting, XBZRLE will be disabled. We essentially only
do a single run, so I guess it will never actually get disabled.
Postcopy seems to indirectly disable it in ram_save_page(), so there
shouldn't be really any change.
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Juan Quintela <quintela@redhat.com>
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Cc: Andrey Gruzdev <andrey.gruzdev@virtuozzo.com>
Cc: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <
20210216105039.40680-1-david@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Peter Maydell [Thu, 13 May 2021 13:45:38 +0000 (14:45 +0100)]
Merge remote-tracking branch 'remotes/philmd/tags/pflash-
20210511' into staging
Parallel NOR Flash patches queue
- Simplify memory layout when no pflash_cfi02 mapping requested
# gpg: Signature made Tue 11 May 2021 17:12:58 BST
# gpg: using RSA key
FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd/tags/pflash-
20210511:
hw/block/pflash_cfi02: Do not create aliases when not necessary
hw/block/pflash_cfi02: Set romd mode in pflash_cfi02_realize()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 12 May 2021 16:31:52 +0000 (17:31 +0100)]
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-
20210511' into staging
A large collection of RISC-V fixes, improvements and features
- Clenaup some left over v1.9 code
- Documentation improvements
- Support for the shakti_c machine
- Internal cleanup of the CSR accesses
- Updates to the OpenTitan platform
- Support for the virtio-vga
- Fix for the saturate subtract in vector extensions
- Experimental support for the ePMP spec
- A range of other internal code cleanups and bug fixes
# gpg: Signature made Tue 11 May 2021 11:17:10 BST
# gpg: using RSA key
F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full]
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054
* remotes/alistair/tags/pull-riscv-to-apply-
20210511: (42 commits)
target/riscv: Fix the RV64H decode comment
target/riscv: Consolidate RV32/64 16-bit instructions
target/riscv: Consolidate RV32/64 32-bit instructions
target/riscv: Remove an unused CASE_OP_32_64 macro
target/riscv: Remove the unused HSTATUS_WPRI macro
target/riscv: Remove the hardcoded SATP_MODE macro
target/riscv: Remove the hardcoded MSTATUS_SD macro
target/riscv: Remove the hardcoded HGATP_MODE macro
target/riscv: Remove the hardcoded SSTATUS_SD macro
target/riscv: Remove the hardcoded RVXLEN macro
target/riscv: fix a typo with interrupt names
fpu/softfloat: set invalid excp flag for RISC-V muladd instructions
hw/riscv: Fix OT IBEX reset vector
target/riscv: fix exception index on instruction access fault
target/riscv: fix vrgather macro index variable type bug
target/riscv: Add ePMP support for the Ibex CPU
target/riscv/pmp: Remove outdated comment
target/riscv: Add a config option for ePMP
target/riscv: Implementation of enhanced PMP (ePMP)
target/riscv: Add ePMP CSR access functions
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Markus Armbruster [Mon, 3 May 2021 08:40:34 +0000 (10:40 +0200)]
Drop the deprecated unicore32 target
Target unicore32 was deprecated in commit
8e4ff4a8d2b, v5.2.0. See
there for rationale.
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20210503084034.
3804963-3-armbru@redhat.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Markus Armbruster [Mon, 3 May 2021 08:40:33 +0000 (10:40 +0200)]
Drop the deprecated lm32 target
Target lm32 was deprecated in commit
d8498005122, v5.2.0. See there
for rationale.
Some of its code lives on in device models derived from milkymist
ones: hw/char/digic-uart.c and hw/display/bcm2835_fb.c.
Cc: Michael Walle <michael@walle.cc>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20210503084034.
3804963-2-armbru@redhat.com>
Acked-by: Michael Walle <michael@walle.cc>
[Trivial conflicts resolved, reST markup fixed]
Markus Armbruster [Sat, 1 May 2021 07:57:47 +0000 (09:57 +0200)]
block: Drop the sheepdog block driver
It was deprecated in commit
e1c4269763, v5.2.0. See that commit
message for rationale.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20210501075747.
3293186-1-armbru@redhat.com>
ACKed-by: Peter Krempa <pkrempa@redhat.com>
Thomas Huth [Fri, 30 Apr 2021 16:03:55 +0000 (18:03 +0200)]
Remove the deprecated moxie target
There are no known users of this CPU anymore, and there are no
binaries available online which could be used for regression tests,
so the code has likely completely bit-rotten already. It's been
marked as deprecated since two releases now and nobody spoke up
that there is still a need to keep it, thus let's remove it now.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20210430160355.698194-1-thuth@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[Commit message typos fixed, trivial conflicts resolved]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Stefan Reiter [Mon, 22 Mar 2021 15:40:24 +0000 (16:40 +0100)]
monitor/qmp: fix race on CHR_EVENT_CLOSED without OOB
The QMP dispatcher coroutine holds the qmp_queue_lock over a yield
point, where it expects to be rescheduled from the main context. If a
CHR_EVENT_CLOSED event is received just then, it can race and block the
main thread on the mutex in monitor_qmp_cleanup_queue_and_resume.
monitor_resume does not need to be called from main context, so we can
call it immediately after popping a request from the queue, which allows
us to drop the qmp_queue_lock mutex before yielding.
Suggested-by: Wolfgang Bumiller <w.bumiller@proxmox.com>
Signed-off-by: Stefan Reiter <s.reiter@proxmox.com>
Message-Id: <
20210322154024.15011-1-s.reiter@proxmox.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Cc: qemu-stable@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Peter Maydell [Wed, 12 May 2021 15:07:50 +0000 (16:07 +0100)]
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
* AccelCPUClass and sysemu/user split for i386 (Claudio)
* i386 page walk unification
* Fix detection of gdbus-codegen
* Misc refactoring
# gpg: Signature made Wed 12 May 2021 09:39:29 BST
# gpg: using RSA key
F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini-gitlab/tags/for-upstream: (32 commits)
coverity-scan: list components, move model to scripts/coverity-scan
configure: fix detection of gdbus-codegen
qemu-option: support accept-any QemuOptsList in qemu_opts_absorb_qdict
main-loop: remove dead code
target/i386: use mmu_translate for NPT walk
target/i386: allow customizing the next phase of the translation
target/i386: extend pg_mode to more CR0 and CR4 bits
target/i386: pass cr3 to mmu_translate
target/i386: extract mmu_translate
target/i386: move paging mode constants from SVM to cpu.h
target/i386: merge SVM_NPTEXIT_* with PF_ERROR_* constants
accel: add init_accel_cpu for adapting accel behavior to CPU type
accel: move call to accel_init_interfaces
i386: make cpu_load_efer sysemu-only
target/i386: gdbstub: only write CR0/CR2/CR3/EFER for sysemu
target/i386: gdbstub: introduce aux functions to read/write CS64 regs
i386: split off sysemu part of cpu.c
i386: split seg_helper into user-only and sysemu parts
i386: split svm_helper into sysemu and stub-only user
i386: separate fpu_helper sysemu-only parts
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 12 May 2021 13:45:21 +0000 (14:45 +0100)]
Merge remote-tracking branch 'remotes/kraxel/tags/vga-
20210510-pull-request' into staging
edid: display id support (for 5k+), bugfixes.
virtio-gpu: iommu fix, device split.
# gpg: Signature made Mon 10 May 2021 14:20:36 BST
# gpg: using RSA key
A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/vga-
20210510-pull-request: (25 commits)
virtio-gpu: add virtio-vga-gl
modules: add have_vga
virtio-gpu: add virtio-gpu-gl-pci
virtio-gpu: move fields to struct VirtIOGPUGL
virtio-gpu: drop use_virgl_renderer
virtio-gpu: move virtio-gpu-gl-device to separate module
virtio-gpu: drop VIRGL() macro
virtio-gpu: move update_cursor_data
virtio-gpu: move virgl process_cmd
virtio-gpu: move virgl gl_flushed
virtio-gpu: move virgl handle_ctrl
virtio-gpu: use class function for ctrl queue handlers
virtio-gpu: move virgl reset
virtio-gpu: move virgl realize + properties
virtio-gpu: add virtio-gpu-gl-device
virtio-gpu: rename virgl source file.
virtio-gpu: handle partial maps properly
edid: add support for DisplayID extension (5k resolution)
edid: allow arbitrary-length checksums
edid: move timing generation into a separate function
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Paolo Bonzini [Fri, 30 Apr 2021 14:45:51 +0000 (10:45 -0400)]
coverity-scan: list components, move model to scripts/coverity-scan
Place all files that can be useful to rebuild the Coverity
configuration in scripts/coverity-scan: the existing model
file, and the components setup.
The Markdown syntax was tested with Pandoc (but in any case
is meant more as a human-readable reference than as a part
of documentation).
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 5 May 2021 14:15:34 +0000 (10:15 -0400)]
configure: fix detection of gdbus-codegen
"pkg-config --variable=gdbus_codegen gio-2.0" returns "gdbus-codegen",
and it does not pass test -x (which does not walk the path).
Meson 0.58.0 notices that something is iffy, as the dbus_vmstate1
assignment in tests/qtest/meson.build uses an empty string as the
command, and fails very eloquently:
../tests/qtest/meson.build:92:2: ERROR: No program name specified.
Use the "has" function instead of test -x, and fix the generation
of config-host.mak since meson.build expects that GDBUS_CODEGEN
is absent, rather than empty, if the tool is unavailable.
Reported-by: Sebastian Mitterle <smitterl@redhat.com>
Fixes: #178
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 11 Nov 2020 13:42:27 +0000 (08:42 -0500)]
qemu-option: support accept-any QemuOptsList in qemu_opts_absorb_qdict
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Peter Maydell [Wed, 12 May 2021 07:54:49 +0000 (08:54 +0100)]
Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-
20210510' into staging
Xen patches
- Avoid mmap race involving Xen's mapcache
- Fix xenforeignmemory_resource leak at exit
- Fix xen-block to choose a driver for the disk image when created via
xenstore.
# gpg: Signature made Mon 10 May 2021 13:49:40 BST
# gpg: using RSA key
F80C006308E22CFD8A92E7980CF5572FD7FB55AF
# gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>" [unknown]
# gpg: aka "Anthony PERARD <anthony.perard@citrix.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8
# Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF
* remotes/aperard/tags/pull-xen-
20210510:
xen-block: Use specific blockdev driver
xen: Free xenforeignmemory_resource at exit
xen-mapcache: avoid a race on memory map while using MAP_FIXED
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 11 May 2021 20:21:33 +0000 (21:21 +0100)]
Merge remote-tracking branch 'remotes/thuth-gitlab/tags/s390-ccw-bios-2021-05-10' into staging
* Make the s390-ccw bios compilable with Clang
* Fix ECKD booting with null block numbers in the chain
# gpg: Signature made Mon 10 May 2021 08:27:34 BST
# gpg: using RSA key
27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* remotes/thuth-gitlab/tags/s390-ccw-bios-2021-05-10:
pc-bios/s390: Update the s390-ccw bios binaries with the Clang and other fixes
pc-bios/s390-ccw: Allow building with Clang, too
pc-bios/s390-ccw: Silence GCC 11 stringop-overflow warning
pc-bios/s390-ccw: Fix the cc-option macro in the Makefile
pc-bios/s390-ccw: Silence warning from Clang by marking panic() as noreturn
pc-bios/s390-ccw/netboot: Use "-Wl," prefix to pass parameter to the linker
pc-bios/s390-ccw: Use reset_psw pointer instead of hard-coded null pointer
pc-bios/s390-ccw/bootmap: Silence compiler warning from Clang
pc-bios/s390-ccw: don't try to read the next block if end of chunk is reached
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Thu, 25 Mar 2021 11:57:28 +0000 (12:57 +0100)]
hw/block/pflash_cfi02: Do not create aliases when not necessary
When no mapping is requested, it is pointless to create
alias regions.
Only create them when multiple mappings are requested to
simplify the memory layout. The flatview is not changed.
For example using 'qemu-system-sh4 -M r2d -S -monitor stdio',
* before:
(qemu) info mtree
address-space: memory
0000000000000000-
ffffffffffffffff (prio 0, i/o): system
0000000000000000-
0000000000ffffff (prio 0, i/o): pflash
0000000000000000-
0000000000ffffff (prio 0, romd): alias pflash-alias @r2d.flash
0000000000000000-
0000000000ffffff
0000000004000000-
000000000400003f (prio 0, i/o): r2d-fpga
000000000c000000-
000000000fffffff (prio 0, ram): r2d.sdram
(qemu) info mtree -f
FlatView #0
AS "memory", root: system
AS "cpu-memory-0", root: system
Root memory region: system
0000000000000000-
0000000000ffffff (prio 0, romd): r2d.flash
0000000004000000-
000000000400003f (prio 0, i/o): r2d-fpga
000000000c000000-
000000000fffffff (prio 0, ram): r2d.sdram
* after:
(qemu) info mtree
address-space: memory
0000000000000000-
ffffffffffffffff (prio 0, i/o): system
0000000000000000-
0000000000ffffff (prio 0, romd): r2d.flash
0000000004000000-
000000000400003f (prio 0, i/o): r2d-fpga
000000000c000000-
000000000fffffff (prio 0, ram): r2d.sdram
(qemu) info mtree -f
FlatView #0
AS "memory", root: system
AS "cpu-memory-0", root: system
Root memory region: system
0000000000000000-
0000000000ffffff (prio 0, romd): r2d.flash
0000000004000000-
000000000400003f (prio 0, i/o): r2d-fpga
000000000c000000-
000000000fffffff (prio 0, ram): r2d.sdram
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210325120921.858993-3-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Philippe Mathieu-Daudé [Thu, 25 Mar 2021 11:53:37 +0000 (12:53 +0100)]
hw/block/pflash_cfi02: Set romd mode in pflash_cfi02_realize()
The ROMD mode isn't related to mapping setup.
Ideally we'd set this mode when the state machine resets,
but for now simply move it to pflash_cfi02_realize() to
not introduce logical change.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210325120921.858993-2-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Peter Maydell [Tue, 11 May 2021 12:03:44 +0000 (13:03 +0100)]
Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-
20210506' into staging
virtiofsd pull 2021-05-06
A pile of cleanups:
Use of glib allocators from Mahmoud
Virtio spec compliance and printf cleanup from me.
Sugar to turn on xattr when defining xattr mapping from Carlos
an assert cleanup from Greg
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
# gpg: Signature made Thu 06 May 2021 19:54:18 BST
# gpg: using RSA key
45F5C71B4A0CB7FB977A9FA90516331EBC5BFDE7
# gpg: Good signature from "Dr. David Alan Gilbert (RH2) <dgilbert@redhat.com>" [full]
# Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7
* remotes/dgilbert-gitlab/tags/pull-virtiofs-
20210506:
virtiofsd/fuse_virtio.c: Changed allocations of locals to GLib
virtiofsd/passthrough_ll.c: Changed local allocations to GLib functions
virtiofsd: Changed allocations of fv_VuDev & its internals to GLib functions
virtiofsd: Changed allocation of lo_map_elems to GLib's functions
virtiofsd: Changed allocations of fuse_session to GLib's functions
virtiofsd: Changed allocations of iovec to GLib's functions
virtiofsd: Changed allocations of fuse_req to GLib functions
virtiofsd: Don't assume header layout
virtiofs: Fixup printf args
virtiofsd: Add help for -o xattr-mapping
virtiofsd: Allow use "-o xattrmap" without "-o xattr"
virtiofsd: Fix side-effect in assert()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alistair Francis [Sat, 24 Apr 2021 03:34:37 +0000 (13:34 +1000)]
target/riscv: Fix the RV64H decode comment
BugLink: https://gitlab.com/qemu-project/qemu/-/issues/47
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
024ce841221c1d15c74b253512428c4baca7e4ba.
1619234854.git.alistair.francis@wdc.com
Alistair Francis [Sat, 24 Apr 2021 03:34:25 +0000 (13:34 +1000)]
target/riscv: Consolidate RV32/64 16-bit instructions
This patch removes the insn16-32.decode and insn16-64.decode decode
files and consolidates the instructions into the general RISC-V
insn16.decode decode tree.
This means that all of the instructions are avaliable in both the 32-bit
and 64-bit builds. This also means that we run a check to ensure we are
running a 64-bit softmmu before we execute the 64-bit only instructions.
This allows us to include the 32-bit instructions in the 64-bit build,
while also ensuring that 32-bit only software can not execute the
instructions.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
01e2b0efeae311adc7ebf133c2cde6a7a37224d7.
1619234854.git.alistair.francis@wdc.com
Alistair Francis [Sat, 24 Apr 2021 03:34:12 +0000 (13:34 +1000)]
target/riscv: Consolidate RV32/64 32-bit instructions
This patch removes the insn32-64.decode decode file and consolidates the
instructions into the general RISC-V insn32.decode decode tree.
This means that all of the instructions are avaliable in both the 32-bit
and 64-bit builds. This also means that we run a check to ensure we are
running a 64-bit softmmu before we execute the 64-bit only instructions.
This allows us to include the 32-bit instructions in the 64-bit build,
while also ensuring that 32-bit only software can not execute the
instructions.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
db709360e2be47d2f9c6483ab973fe4791aefa77.
1619234854.git.alistair.francis@wdc.com
Alistair Francis [Sat, 24 Apr 2021 03:34:00 +0000 (13:34 +1000)]
target/riscv: Remove an unused CASE_OP_32_64 macro
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
4853459564af35a6690120c74ad892f60cec35ff.
1619234854.git.alistair.francis@wdc.com
Alistair Francis [Sat, 24 Apr 2021 03:33:48 +0000 (13:33 +1000)]
target/riscv: Remove the unused HSTATUS_WPRI macro
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
e095b57af0d419c8ed822958f04dfc732d7beb7e.
1619234854.git.alistair.francis@wdc.com
Alistair Francis [Sat, 24 Apr 2021 03:33:31 +0000 (13:33 +1000)]
target/riscv: Remove the hardcoded SATP_MODE macro
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
6b701769d6621f45ba1739334198e36a64fe04df.
1619234854.git.alistair.francis@wdc.com
Alistair Francis [Sat, 24 Apr 2021 03:33:18 +0000 (13:33 +1000)]
target/riscv: Remove the hardcoded MSTATUS_SD macro
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
fcc125d96da941b56c817c9dd6068dc36478fc53.
1619234854.git.alistair.francis@wdc.com
Alistair Francis [Sat, 24 Apr 2021 03:31:55 +0000 (13:31 +1000)]
target/riscv: Remove the hardcoded HGATP_MODE macro
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
665f624bfdc2e3ca64265004b07de7489c77a766.
1619234854.git.alistair.francis@wdc.com
Alistair Francis [Sat, 24 Apr 2021 03:29:50 +0000 (13:29 +1000)]
target/riscv: Remove the hardcoded SSTATUS_SD macro
This also ensures that the SD bit is not writable.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
9ea842309f0fd7adff172790f5b5fc058b40f2f1.
1619234854.git.alistair.francis@wdc.com
Alistair Francis [Sat, 24 Apr 2021 03:28:33 +0000 (13:28 +1000)]
target/riscv: Remove the hardcoded RVXLEN macro
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
a07bc0c6dc4958681b4f93cbc5d0acc31ed3344a.
1619234854.git.alistair.francis@wdc.com
Emmanuel Blot [Wed, 21 Apr 2021 13:32:36 +0000 (15:32 +0200)]
target/riscv: fix a typo with interrupt names
Interrupt names have been swapped in
205377f8 and do not follow
IRQ_*_EXT definition order.
Signed-off-by: Emmanuel Blot <emmanuel.blot@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20210421133236.11323-1-emmanuel.blot@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Frank Chang [Tue, 20 Apr 2021 01:31:48 +0000 (09:31 +0800)]
fpu/softfloat: set invalid excp flag for RISC-V muladd instructions
In IEEE 754-2008 spec:
Invalid operation exception is signaled when doing:
fusedMultiplyAdd(0, Inf, c) or fusedMultiplyAdd(Inf, 0, c)
unless c is a quiet NaN; if c is a quiet NaN then it is
implementation defined whether the invalid operation exception
is signaled.
In RISC-V Unprivileged ISA spec:
The fused multiply-add instructions must set the invalid
operation exception flag when the multiplicands are Inf and
zero, even when the addend is a quiet NaN.
This commit set invalid operation execption flag for RISC-V when
multiplicands of muladd instructions are Inf and zero.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210420013150.21992-1-frank.chang@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Alexander Wagner [Tue, 20 Apr 2021 08:00:08 +0000 (10:00 +0200)]
hw/riscv: Fix OT IBEX reset vector
The IBEX documentation [1] specifies the reset vector to be "the most
significant 3 bytes of the boot address and the reset value (0x80) as
the least significant byte".
[1] https://github.com/lowRISC/ibex/blob/master/doc/03_reference/exception_interrupts.rst
Signed-off-by: Alexander Wagner <alexander.wagner@ulal.de>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20210420080008.119798-1-alexander.wagner@ulal.de
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Emmanuel Blot [Fri, 16 Apr 2021 14:17:11 +0000 (16:17 +0200)]
target/riscv: fix exception index on instruction access fault
When no MMU is used and the guest code attempts to fetch an instruction
from an invalid memory location, the exception index defaults to a data
load access fault, rather an instruction access fault.
Signed-off-by: Emmanuel Blot <emmanuel.blot@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
FB9EA197-B018-4879-AB0F-
922C2047A08B@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Frank Chang [Mon, 19 Apr 2021 06:03:01 +0000 (14:03 +0800)]
target/riscv: fix vrgather macro index variable type bug
ETYPE may be type of uint64_t, thus index variable has to be declared as
type of uint64_t, too. Otherwise the value read from vs1 register may be
truncated to type of uint32_t.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210419060302.14075-1-frank.chang@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Alistair Francis [Mon, 19 Apr 2021 06:18:06 +0000 (16:18 +1000)]
target/riscv: Add ePMP support for the Ibex CPU
The physical Ibex CPU has ePMP support and it's enabled for the
OpenTitan machine so let's enable ePMP support for the Ibex CPU in QEMU.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
d426baabab0c9361ed2e989dbe416e417a551fd1.
1618812899.git.alistair.francis@wdc.com
Alistair Francis [Mon, 19 Apr 2021 06:17:35 +0000 (16:17 +1000)]
target/riscv/pmp: Remove outdated comment
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
10387eec21d2f17c499a78fdba85280cab4dd27f.
1618812899.git.alistair.francis@wdc.com
Hou Weiying [Mon, 19 Apr 2021 06:17:25 +0000 (16:17 +1000)]
target/riscv: Add a config option for ePMP
Add a config option to enable experimental support for ePMP. This
is disabled by default and can be enabled with 'x-epmp=true'.
Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com>
Signed-off-by: Hou Weiying <weiying_hou@outlook.com>
Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
a22ccdaf9314078bc735d3b323f966623f8af020.
1618812899.git.alistair.francis@wdc.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Hou Weiying [Mon, 19 Apr 2021 06:17:11 +0000 (16:17 +1000)]
target/riscv: Implementation of enhanced PMP (ePMP)
This commit adds support for ePMP v0.9.1.
The ePMP spec can be found in:
https://docs.google.com/document/d/1Mh_aiHYxemL0umN3GTTw8vsbmzHZ_nxZXgjgOUzbvc8
Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com>
Signed-off-by: Hou Weiying <weiying_hou@outlook.com>
Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
fef23b885f9649a4d54e7c98b168bdec5d297bb1.
1618812899.git.alistair.francis@wdc.com
[ Changes by AF:
- Rebase on master
- Update to latest spec
- Use a switch case to handle ePMP MML permissions
- Fix a few bugs
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Hou Weiying [Mon, 19 Apr 2021 06:16:53 +0000 (16:16 +1000)]
target/riscv: Add ePMP CSR access functions
Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com>
Signed-off-by: Hou Weiying <weiying_hou@outlook.com>
Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
270762cb2507fba6a9eeb99a774cf49f7da9cc32.
1618812899.git.alistair.francis@wdc.com
[ Changes by AF:
- Rebase on master
- Fix build errors
- Fix some style issues
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Alistair Francis [Mon, 19 Apr 2021 06:16:44 +0000 (16:16 +1000)]
target/riscv: Add the ePMP feature
The spec is avaliable at:
https://docs.google.com/document/d/1Mh_aiHYxemL0umN3GTTw8vsbmzHZ_nxZXgjgOUzbvc8
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
28c8855c80b0388a08c3ae009f5467e2b3960ce0.
1618812899.git.alistair.francis@wdc.com
Hou Weiying [Mon, 19 Apr 2021 06:16:38 +0000 (16:16 +1000)]
target/riscv: Define ePMP mseccfg
Use address 0x390 and 0x391 for the ePMP CSRs.
Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com>
Signed-off-by: Hou Weiying <weiying_hou@outlook.com>
Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
63245b559f477a9ce6d4f930136d2d7fd7f99c78.
1618812899.git.alistair.francis@wdc.com
[ Changes by AF:
- Tidy up commit message
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Alistair Francis [Mon, 19 Apr 2021 06:16:25 +0000 (16:16 +1000)]
target/riscv: Fix the PMP is locked check when using TOR
The RISC-V spec says:
if PMP entry i is locked and pmpicfg.A is set to TOR, writes to
pmpaddri-1 are ignored.
The current QEMU code ignores accesses to pmpaddri-1 and pmpcfgi-1 which
is incorrect.
Update the pmp_is_locked() function to not check the supporting fields
and instead enforce the lock functionality in the pmpaddr write operation.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
2831241458163f445a89bd59c59990247265b0c6.
1618812899.git.alistair.francis@wdc.com
Vijai Kumar K [Mon, 12 Apr 2021 17:42:48 +0000 (23:12 +0530)]
docs: Add documentation for shakti_c machine
Add documentation for Shakti C reference platform.
Signed-off-by: Vijai Kumar K <vijai@behindbytes.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20210412174248.8668-1-vijai@behindbytes.com
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
[ Changes from Bin Meng:
- Add missing TOC
Message-id:
20210430070534.
1487242-1-bmeng.cn@gmail.com
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
LIU Zhiwei [Fri, 12 Feb 2021 15:02:21 +0000 (23:02 +0800)]
target/riscv: Fixup saturate subtract function
The overflow predication ((a - b) ^ a) & (a ^ b) & INT64_MIN is right.
However, when the predication is ture and a is 0, it should return maximum.
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20210212150256.885-4-zhiwei_liu@c-sky.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Jade Fink [Tue, 6 Apr 2021 11:31:09 +0000 (04:31 -0700)]
riscv: don't look at SUM when accessing memory from a debugger context
Previously the qemu monitor and gdbstub looked at SUM and refused to
perform accesses to user memory if it is off, which was an impediment to
debugging.
Signed-off-by: Jade Fink <qemu@jade.fyi>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20210406113109.
1031033-1-qemu@jade.fyi
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Alistair Francis [Fri, 2 Apr 2021 12:42:12 +0000 (08:42 -0400)]
hw/riscv: Enable VIRTIO_VGA for RISC-V virt machine
imply VIRTIO_VGA for the virt machine, this fixes the following error
when specifying `-vga virtio` as a command line argument:
qemu-system-riscv64: Virtio VGA not available
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
7ac26fafee8bd59d2a0640f3233f8ad1ab270e1e.
1617367317.git.alistair.francis@wdc.com
Alistair Francis [Wed, 31 Mar 2021 15:00:11 +0000 (11:00 -0400)]
hw/opentitan: Update the interrupt layout
Update the OpenTitan interrupt layout to match the latest OpenTitan
bitstreams. This involves changing the Ibex PLIC memory layout and the
UART interrupts.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id:
e92b696f1809c9fa4410da2e9f23c414db5a6960.
1617202791.git.alistair.francis@wdc.com