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Sjoerd Meijer [Thu, 29 Mar 2018 12:31:06 +0000 (12:31 +0000)]
[Kaleidoscope] Tiny typo fixes
Fixes for "lets" references which should be "let's" in the Kaleidoscope
tutorial.
Patch by: Robin Dupret
Differential Revision: https://reviews.llvm.org/D44990
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328772
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Simon Pilgrim [Thu, 29 Mar 2018 11:18:41 +0000 (11:18 +0000)]
[X86][SSE] Don't bother re-adding combined target shuffles to the work list
We are re-adding all the bitcasts, constant masks and target shuffles to the work list for no apparent gain.
Found while investigating adding SimplifyDemandedVectorElts to target shuffles.
Differential Revision: https://reviews.llvm.org/D44942
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328771
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Sylvestre Ledru [Thu, 29 Mar 2018 09:44:09 +0000 (09:44 +0000)]
Rename llvm library from libLLVM-X.Y to libLLVM-X
Summary:
As we are only doing X.0.Z releases (not using the minor version), there is no need to keep -X.Y in the version.
Like patch https://reviews.llvm.org/D41808, I propose that we rename libLLVM-7.0svn.so to libLLVM-7svn.so
This patch will also rename downstream libraries like liblldb-7.0 to liblldb-7
Reviewers: axw, beanz, dim, hans
Reviewed By: dim, hans
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D41869
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328768
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Simon Dardis [Thu, 29 Mar 2018 09:21:20 +0000 (09:21 +0000)]
[Mips] Remove dead code
I believe the role of ehDataReg has been replaced by MipsABIInfo::GetEhDataReg, thus removing the dead code.
Patch By: Wei-Ren Chen.
Reviewers: ehostunreach, sdardis
Differential Revision: https://reviews.llvm.org/D44867
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328767
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David Green [Thu, 29 Mar 2018 08:48:15 +0000 (08:48 +0000)]
[LoopRotate] Restructuring LoopRotation.cpp to create Loop Rotation Pass with Loop Rotation Utility Interface
The existing LoopRotation.cpp is implemented as one of loop passes instead of
being a utility. The user cannot easily perform the loop rotation selectively
(or on demand) under different optimization level. For example, the loop
rotation is needed as part of the logic to convert a loop into a loop with
bottom test for a transformation. If the loop rotation is simply added as a
loop pass before the transformation, the pass is skipped if it is compiled at
–O0 or if it is explicitly disabled by the user, causing the compiler to
generate incorrect code. Furthermore, as a loop pass it will rotate all loops
instead of just the relevant loops.
We provide a utility interface for the loop rotation so that the loop rotation
can be called on demand. The changeset is as follows:
- Create a new file lib/Transforms/Utils/LoopRotationUtils.cpp and move the main
implementation of class LoopRotate into this file.
- Create a new file llvm/include/Transform/Utils/LoopRotationUtils.h with the
interface LoopRotation(...).
- Original LoopRotation.cpp is changed to use the utility function LoopRotation
in LoopRotationUtils.cpp. This is done in the same way community did for
mem-to-reg implementation.
Patch by Jin Lin!
Differential Revision: https://reviews.llvm.org/D44595
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328766
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Benjamin Kramer [Thu, 29 Mar 2018 07:56:53 +0000 (07:56 +0000)]
[Transforms] Make sure to include the c binding header when defining c binding functions
Otherwise the definitions can't see the extern C declarations and get
name mangled, making it impossible for users to call them. This breaks
the Go bindings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328765
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Max Kazantsev [Thu, 29 Mar 2018 07:54:59 +0000 (07:54 +0000)]
[NFC] Fix meaningless assert in SCEV
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328764
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Craig Topper [Thu, 29 Mar 2018 04:14:04 +0000 (04:14 +0000)]
[X86] Don't pass getRegisterName from the InstPrinters into EmitAnyX86InstComments. Just always use the function from the ATTPrinter. NFC
The IntelPrinter and the ATTPrinter produce the same strings for the same input. We already use the ATTPrinter explicitly in several other places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328762
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Robert Widmann [Thu, 29 Mar 2018 03:43:15 +0000 (03:43 +0000)]
[LLVM-C] Finish exception instruction bindings
Summary:
Add support for cleanupret, catchret, catchpad, cleanuppad and catchswitch and their associated accessors.
Test is modified from SimplifyCFG because it contains many diverse usages of these instructions.
Reviewers: whitequark, deadalnix, echristo
Reviewed By: echristo
Subscribers: llvm-commits, harlanhaskins
Differential Revision: https://reviews.llvm.org/D44496
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328759
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Craig Topper [Thu, 29 Mar 2018 03:14:57 +0000 (03:14 +0000)]
[X86] Rename RIi64_NOREX tblgen class to just Ii64. Make RIi64 inherit from it. NFC
This feels more consistent with the other classes. We don't need to say _NOREX if we didn't start it with an R in the first place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328757
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Craig Topper [Thu, 29 Mar 2018 03:14:56 +0000 (03:14 +0000)]
[X86] Cleanup inheritance of the X86InstrFormats.td classes. NFC
EVEX shouldn't inherit from VEX and EVEX_4V shouldn't inherit from VEX_4V.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328756
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George Burgess IV [Thu, 29 Mar 2018 03:12:03 +0000 (03:12 +0000)]
[MemorySSA] Turn an assert into a condition
Eli pointed out that variadic functions are totally a thing, so this
assert is incorrect.
No test-case is provided, since the only way this assert fires is if a
specific DenseMap falls back to doing `isEqual` checks, and that seems
fairly brittle (and requires a pyramid of growing
`call void (i8, ...) @varargs(i8 0)`).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328755
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George Burgess IV [Thu, 29 Mar 2018 00:54:39 +0000 (00:54 +0000)]
[MemorySSA] Consider callsite args for hashing and equality.
We use a `DenseMap<MemoryLocOrCall, MemlocStackInfo>` to keep track of
prior work when optimizing uses in MemorySSA. Because we weren't
accounting for callsite arguments in either the hash code or equality
tests for `MemoryLocOrCall`s, we optimized uses too aggressively in
some rare cases.
Fix by Daniel Berlin.
Should fix PR36883.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328748
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David Blaikie [Thu, 29 Mar 2018 00:29:45 +0000 (00:29 +0000)]
Remove some unused includes to fix layering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328745
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David Blaikie [Thu, 29 Mar 2018 00:29:44 +0000 (00:29 +0000)]
Split Disassembler.h in two to fix dependencies
Support includes this header for the typedefs - but logically it's part
of the MC/Disassembler library that implements the functions. Split the
header so as not to create a circular dependency.
This is another case where probably inverting the llvm-c implementation
might be best (rather than core llvm libraries implementing the parts of
llvm-c - instead llvm-c could be its own library, depending on all the
parts of LLVM's core libraries to then implement llvm-c on top of
them... if that makes sense)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328744
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David Blaikie [Thu, 29 Mar 2018 00:29:43 +0000 (00:29 +0000)]
Add missing dependency (headers are included from MC, so a link dependency could exist easily enough)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328743
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David Blaikie [Wed, 28 Mar 2018 22:28:50 +0000 (22:28 +0000)]
Plumb useAA through TargetTransformInfo to remove Transforms->CodeGen header dependency
Thanks to echristo for the pointers on direction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328737
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Craig Topper [Wed, 28 Mar 2018 20:40:24 +0000 (20:40 +0000)]
[X86][SkylakeServer] Remove checks for 'k', 'z', '_Int' and 'b' from scheduler regexs.
Most of these were optional matches at the end of the strings, but since the strings themselves are prefix matches by default you don't need to check for something optional at the end.
I've left the 'b' on memory instructions where it means 'broadcast' because I'm not sure those really have the same load latency and we may need to split them explicitly in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328730
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Jun Bum Lim [Wed, 28 Mar 2018 19:56:26 +0000 (19:56 +0000)]
[PostRAMachineSink] preserve CFG
Summary: Mark CFG is preserved since this pass do not make any change in CFG.
Reviewers: sebpop, mzolotukhin, mcrosier
Reviewed By: mzolotukhin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44845
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328727
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Krzysztof Parzyszek [Wed, 28 Mar 2018 19:38:29 +0000 (19:38 +0000)]
[Hexagon] Add support for "new" circular buffer intrinsics
These instructions have been around for a long time, but we
haven't supported intrinsics for them. The "new" versions use
the CSx register for the start of the buffer instead of the K
field in the Mx register.
We need to use pseudo instructions for these instructions until
after register allocation. The problem is that these instructions
allocate a M0/CS0 or M1/CS1 pair. But, we can't generate code for
the CSx set-up until after register allocation when the Mx
register has been fixed for the instruction.
There is a related clang patch.
Patch by Brendon Cahoon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328724
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David Blaikie [Wed, 28 Mar 2018 18:03:25 +0000 (18:03 +0000)]
Oops - moved slightly too many things from Scalar to Utils. Move LoopSimplifyCFG things back
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328720
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Jessica Paquette [Wed, 28 Mar 2018 17:52:31 +0000 (17:52 +0000)]
[MachineOutliner] Simplify call outlining + require valid callee save info for call outlining
This commit simplifies the call outlining logic by removing references to the
Function associated with the callee. To do this, it requires that valid
callee save info is available to the outliner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328719
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David Blaikie [Wed, 28 Mar 2018 17:44:36 +0000 (17:44 +0000)]
Transforms: Introduce Transforms/Utils.h rather than spreading the declarations amongst Scalar.h and IPO.h
Fixes layering - Transforms/Utils shouldn't depend on including a Scalar
or IPO header, because Scalar and IPO depend on Utils.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328717
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Peter Collingbourne [Wed, 28 Mar 2018 17:21:14 +0000 (17:21 +0000)]
[llvm-ar] Support multiple dashed options
This allows syntax like:
$ llvm-ar -c -r -u file.a file.o
This is in addition to the other formats that are already supported:
$ llvm-ar cru file.a file.o
$ llvm-ar -cru file.a file.o
Patch by Tom Anderson!
Differential Revision: https://reviews.llvm.org/D44452
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328716
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Simon Pilgrim [Wed, 28 Mar 2018 16:48:48 +0000 (16:48 +0000)]
[X86][AVX2] Add shuffle test case from PR36933
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328714
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Dmitry Preobrazhensky [Wed, 28 Mar 2018 16:21:56 +0000 (16:21 +0000)]
[AMDGPU][MC] Added ds_add_src2_f32
See bug 36833: https://bugs.llvm.org/show_bug.cgi?id=36833
Differential Revision: https://reviews.llvm.org/D44779
Reviewers: arsenm, artem.tamazov, timcorringham
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328713
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Lang Hames [Wed, 28 Mar 2018 15:58:14 +0000 (15:58 +0000)]
[ORC] Restore the narrower check from before r328687.
This should get the builders green again while I investigate why r328706 was
insufficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328711
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Dmitry Preobrazhensky [Wed, 28 Mar 2018 15:44:16 +0000 (15:44 +0000)]
[AMDGPU][MC] Added PCK variants of image load/store instructions
See bug 36834: https://bugs.llvm.org/show_bug.cgi?id=36834
Differential Revision: https://reviews.llvm.org/D44795
Reviewers: artem.tamazov, arsenm, timcorringham, nhaehnle
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328710
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Daniel Neilson [Wed, 28 Mar 2018 15:39:00 +0000 (15:39 +0000)]
[PatternMatch] Add matchers for vector operations
Summary:
There aren't any matchers for the three vector operations: insertelement, extractelement, and
shufflevector. This patch adds them as well as corresponding unit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328709
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Dmitry Preobrazhensky [Wed, 28 Mar 2018 14:53:13 +0000 (14:53 +0000)]
[AMDGPU][MC][GFX9] Added buffer_*_format_d16_hi_x
See bug 36835: https://bugs.llvm.org/show_bug.cgi?id=36835
Differential Revision: https://reviews.llvm.org/D44825
Reviewers: artem.tamazov, arsenm, timcorringham
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328707
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Lang Hames [Wed, 28 Mar 2018 14:47:11 +0000 (14:47 +0000)]
[ORC] Re-add the Windows check that was dropped in r328687.
This check prevents the ORC execution tests from running on Windows (which is
not supported yet).
This should fix the windows bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328706
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Dmitry Preobrazhensky [Wed, 28 Mar 2018 14:08:03 +0000 (14:08 +0000)]
[AMDGPU][MC][GFX9] Added s_scratch* instructions
See bug 36836: https://bugs.llvm.org/show_bug.cgi?id=36836
Differential Revision: https://reviews.llvm.org/D44832
Reviewers: artem.tamazov, arsenm, timcorringham
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328704
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Dan Liew [Wed, 28 Mar 2018 13:55:13 +0000 (13:55 +0000)]
Revert "[lit] Temporarily disable shtest-timeout.py on darwin"
This reverts commit
771829b640a5494ab65c810dd6b4330522bf3a33 (rr328598)
Hopefully the test will now pass on the bots.
rdar://problem/
38774530
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328703
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Dan Liew [Wed, 28 Mar 2018 13:55:08 +0000 (13:55 +0000)]
[lit] Remove a timing senstive part of `shtest-timeout.py`
The `shtest-timeout.py` test was failing intermittently. It looks like
the issue is that on a resource constrained system lit is unable to run
`quick_then_slow.py` twice and print out the messages the tests expects
within the one second timeout.
The underlying issue is that the test is dependent on the performance of
the host machine is a rather fragile way. This is due to hardcoding
timeout values and having assumptions that the host machine is able to
perform a certain amount of work within the hardcoded timeout values.
We could increase the timeout values but that doesn't really fix the
underlying issue. Instead this patch removes one of fragile assumptions
in the hope that this will be enough to fix the bots.
There are other fragile assumptions in this test (e.g. `quick.py` can be
executed in less than 1 second). If the bots continue to fail we'll have
to revisit this.
rdar://problem/
38774530
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328702
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Simon Pilgrim [Wed, 28 Mar 2018 13:53:21 +0000 (13:53 +0000)]
[X86][Btver2] Moved JWriteFCmp/JWriteFCmpY classes next to each other. NFCI
Renamed JWriteFPAY22 to JWriteFCmpY - we've tended to avoid latency based names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328701
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Alexander Potapenko [Wed, 28 Mar 2018 12:36:46 +0000 (12:36 +0000)]
Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""
This reverts commit r328676.
Commit r328676 broke the -no-integrated-as flag necessary to build Linux kernel with Clang:
$ cat t.c
void foo() {}
$ clang -no-integrated-as -c t.c -g
/tmp/t-dcdec5.s: Assembler messages:
/tmp/t-dcdec5.s:8: Error: file number less than one
clang-7.0: error: assembler command failed with exit code 1 (use -v to see invocation)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328699
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Andrea Di Biagio [Wed, 28 Mar 2018 12:12:04 +0000 (12:12 +0000)]
[X86][BtVer2] Fix the number of micro opcodes for AES[ENC|DEC] and other YMM instructions.
Similar to r328694. The number of micro opcodes should be 2 for those
instructions.
This was found when testing AVX code for BtVer2 using llvm-mca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328698
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Alexander Potapenko [Wed, 28 Mar 2018 11:35:09 +0000 (11:35 +0000)]
[MSan] Introduce ActualFnStart. NFC
This is a step towards the upcoming KMSAN implementation patch.
KMSAN is going to prepend a special basic block containing
tool-specific calls to each function. Because we still want to
instrument the original entry block, we'll need to store it in
ActualFnStart.
For MSan this will still be F.getEntryBlock(), whereas for KMSAN
it'll contain the second BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328697
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Tim Renouf [Wed, 28 Mar 2018 11:21:07 +0000 (11:21 +0000)]
Revert "[AMDGPU] For OS type AMDPAL, fixed scratch on compute shader"
This reverts commit
0daf86291d3aa04d3cc280cd0ef24abdb0174981.
It was causing an assert in test/CodeGen/AMDGPU/amdpal.ll only on a
release-with-asserts build. I will resubmit the change when I have fixed
that.
Change-Id: If270594eba27a7dc4076bdeab3fa8e6bfda3288a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328695
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Andrea Di Biagio [Wed, 28 Mar 2018 10:49:33 +0000 (10:49 +0000)]
[X86][BtVer2] Fix the number of micro opcodes for a bunch of YMM instructions.
The Jaguar backend natively supports 128-bit data types. Operations on YMM
registers are split into two COPs (complex operations). Each COP consumes a slot
in the dispatch group, and in the reorder buffer.
The scheduling model for Jaguar should mark those instructions as `let
NumMicroOps = 2`.
This was found when testing AVX code for BtVer2 using llvm-mca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328694
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Alexander Potapenko [Wed, 28 Mar 2018 10:17:17 +0000 (10:17 +0000)]
[MSan] Add an isStore argument to getShadowOriginPtr(). NFC
This is a step towards the upcoming KMSAN implementation patch.
The isStore argument is to be used by getShadowOriginPtrKernel(),
it is ignored by getShadowOriginPtrUserspace().
Depending on whether a memory access is a load or a store, KMSAN
instruments it with different functions, __msan_metadata_ptr_for_load_X()
and __msan_metadata_ptr_for_store_X().
Those functions may return different values for a single address,
which is necessary in the case the runtime library decides to ignore
particular accesses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328692
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Christof Douma [Wed, 28 Mar 2018 10:02:26 +0000 (10:02 +0000)]
[ARM] Support float literals under XO
Follow up patch of r328313 to support the UseVMOVSR constraint. Removed
some unneeded instructions from the test and removed some stray
comments.
Differential Revision: https://reviews.llvm.org/D44941
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328691
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Mikael Holmen [Wed, 28 Mar 2018 06:01:30 +0000 (06:01 +0000)]
[RegisterCoalescing] Don't move COPY if it would interfere with another value
Summary:
RegisterCoalescer::removePartialRedundancy tries to hoist B = A from
BB0/BB2 to BB1:
BB1:
...
BB0/BB2: ----
B = A; |
... |
A = B; |
|-------
|
It does so if a number of conditions are fulfilled. However, it failed
to check if B was used by any of the terminators in BB1. Since we must
insert B = A before the terminators (since it's not a terminator itself),
this means that we could erroneously insert a new definition of B before a
use of it.
Reviewers: wmi, qcolombet
Reviewed By: wmi
Subscribers: MatzeB, llvm-commits, sdardis
Differential Revision: https://reviews.llvm.org/D44918
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328689
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Lang Hames [Wed, 28 Mar 2018 03:41:45 +0000 (03:41 +0000)]
[ORC] Fix ORC on platforms without indirection support.
Previously this crashed because a nullptr (returned by
createLocalIndirectStubsManagerBuilder() on platforms without
indirection support) functor was unconditionally invoked.
Patch by Andres Freund. Thanks Andres!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328687
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Sanjay Patel [Wed, 28 Mar 2018 00:56:00 +0000 (00:56 +0000)]
[AArch64] add ftrunc tests; NFC
As suggested in D44909.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328683
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Sanjay Patel [Wed, 28 Mar 2018 00:49:12 +0000 (00:49 +0000)]
[PowerPC] add ftrunc vector tests; NFC
Baseline tests for vectors as suggested in D44909.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328682
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Heejin Ahn [Tue, 27 Mar 2018 23:37:07 +0000 (23:37 +0000)]
[WebAssembly] Add exception and selector intrinsics
Summary:
Since wasm EH does not use landingpad instructions, these instructions
provide exception pointer and selector values until we lower them in
WasmEHPrepare.
Reviewers: jgravelle-google
Subscribers: jfb, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D44930
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328678
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Matt Arsenault [Tue, 27 Mar 2018 23:26:59 +0000 (23:26 +0000)]
AMDGPU: Really implement getFrameRegister
Currently this seems to only really be used for debug
info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328677
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Paul Robinson [Tue, 27 Mar 2018 22:40:34 +0000 (22:40 +0000)]
Reapply "[DWARFv5] Emit file 0 to the line table."
DWARF v5 specifies that the root file (also given in the DW_AT_name
attribute of the compilation unit DIE) should be emitted explicitly to
the line table's list of files. This makes the line table more
independent of the .debug_info section.
Fixes the bug found by asan. Also XFAIL the new test for Darwin, which
is stuck on DWARF v2, and fix up other tests so they stop failing on
Windows. Last but not least, don't break "clang -g" of an assembler
file that has .file directives in it.
Differential Revision: https://reviews.llvm.org/D44054
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328676
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Jessica Paquette [Tue, 27 Mar 2018 22:23:48 +0000 (22:23 +0000)]
[MachineOutliner] AArch64: Don't outline ADRPs with un-outlinable operands
If an ADRP appears with, say, a CPI operand, we shouldn't outline it.
This moves the check for unsafe operands so that it occurs before the special-case
for ADRPs. Also add a test for outlining ADRPs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328674
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Tim Renouf [Tue, 27 Mar 2018 21:35:00 +0000 (21:35 +0000)]
[AMDGPU] For OS type AMDPAL, fixed scratch on compute shader
Summary:
For OS type AMDPAL, the scratch descriptor is loaded from offset 0 of
the GIT, whose 32 bit pointer is in s0 (s8 for gfx9 merged shaders).
This commit fixes that to use offset 0x10 instead of offset 0 for a
compute shader, per the PAL ABI spec.
Reviewers: kzhuravl, nhaehnle, timcorringham
Subscribers: kzhuravl, wdng, yaxunl, t-tye, llvm-commits, dstuttard, nhaehnle, arsenm
Differential Revision: https://reviews.llvm.org/D44468
Change-Id: I93dffa647758e37f613bb5e0dfca840d82e6d26f
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328673
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Paul Robinson [Tue, 27 Mar 2018 21:28:59 +0000 (21:28 +0000)]
[DWARF] Suppress split line tables more carefully.
If a given split type unit does not have source locations, don't have
it refer to the split line table.
If no split type unit refers to the split line table, don't emit the
line table at all.
This will save a little space on rare occasions, but also refactors
things a bit to improve which class is responsible for what.
Responding to review comments on r326395.
Differential Revision: https://reviews.llvm.org/D44220
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328670
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Tony Tye [Tue, 27 Mar 2018 21:20:46 +0000 (21:20 +0000)]
[AMDGPU] Define code object identification string used in AMDHSA runtimes.
Differential Revision: https://reviews.llvm.org/D44718
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328669
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Tim Renouf [Tue, 27 Mar 2018 21:14:04 +0000 (21:14 +0000)]
[CodeGen] Fixed unreachable with -print-machineinstrs and custom pseudo source value
Summary:
Rev 327580 "[CodeGen] Use MIR syntax for MachineMemOperand printing"
broke -print-machineinstrs for us on AMDGPU, because we have custom
pseudo source values, and MIR serialization does not implement that.
This commit at least restores the functionality of -print-machineinstrs,
even if it does not properly implement the missing MIR serialization
functionality.
Differential Revision: https://reviews.llvm.org/D44871
Change-Id: I44961c0b90bf6d48c01484ed7a4e466fd300db66
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328668
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Sterling Augustine [Tue, 27 Mar 2018 21:11:57 +0000 (21:11 +0000)]
Initialize variable added in r328617.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328667
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Graydon Hoare [Tue, 27 Mar 2018 20:46:26 +0000 (20:46 +0000)]
[YAML] Remove unit test of multibyte non-printable escaping that uses C++11 escapes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328665
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Simon Pilgrim [Tue, 27 Mar 2018 20:38:54 +0000 (20:38 +0000)]
[X86] Add WriteFMOVMSK/WriteVecMOVMSK/WriteMMXMOVMSK scheduler classes
Currently MOVMSK instructions use the WriteVecLogic class, which is a very poor choice given that MOVMSK involves a SSE->GPR transfer.
Differential Revision: https://reviews.llvm.org/D44924
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328664
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Wolfgang Pieb [Tue, 27 Mar 2018 20:27:36 +0000 (20:27 +0000)]
[DWARF][DWARF v5]: Adding support for dumping DW_RLE_offset_pair and DW_RLE_base_address
Reviewers: dblakie, aprantl
Differential Revision: https://reviews.llvm.org/D44811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328662
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Graydon Hoare [Tue, 27 Mar 2018 19:52:45 +0000 (19:52 +0000)]
[YAML] Escape non-printable multibyte UTF8 in Output::scalarString.
The existing YAML Output::scalarString code path includes a partial and
incorrect implementation of YAML escaping logic. In particular, the logic put
in place in rL321283 escapes non-printable bytes only if they are not part of a
multibyte UTF8 sequence; implicitly this means that all multibyte UTF8
sequences -- printable and non -- are passed through verbatim.
The simplest solution to this is to direct the Output::scalarString method to
use the standalone yaml::escape function, and this _almost_ works, except that
the existing code in that function _over_ escapes: any multibyte UTF8 sequence
is escaped, even printable ones. While this is permitted for YAML, it is also
more aggressive (and hard to read for non-English locales) than necessary,
and the entire point of rL321283 was to back off such aggressive over-escaping.
So in this change, I have both redirected Output::scalarString to use
yaml::escape _and_ modified yaml::escape to optionally restrict its escaping to
non-printables. This preserves behaviour of any existing clients while giving
them a path to more moderate escaping should they desire.
Reviewers: JDevlieghere, thegameg, MatzeB, vladimir.plyashkun
Reviewed By: thegameg
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44863
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328661
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Xin Tong [Tue, 27 Mar 2018 19:43:02 +0000 (19:43 +0000)]
80-line wrap. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328660
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Matt Arsenault [Tue, 27 Mar 2018 19:42:55 +0000 (19:42 +0000)]
AMDGPU: Fix not preserving CSR VGPR if used for SGPR spills
Before this was not done if the function had no calls in it. This
is still a possible issue with any callable function, regardless
of calls present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328659
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Matt Arsenault [Tue, 27 Mar 2018 19:26:40 +0000 (19:26 +0000)]
AMDGPU: Set natural stack alignment in DataLayout
Only 4 byte alignment is ever useful, so increasing anything
beyond this may require realigning the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328656
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Fangrui Song [Tue, 27 Mar 2018 19:05:02 +0000 (19:05 +0000)]
[DWARF] Simplify DWARFAddressRange::contains
This transform is valid because the ranges have been validated (LowPC <= HighPC).
Differential Revision: https://reviews.llvm.org/D44772
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328655
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Rong Xu [Tue, 27 Mar 2018 18:55:56 +0000 (18:55 +0000)]
[PGO] Fix branch probability remarks assert
Fixed counter/weight overflow that leads to an assertion. Also fixed the help
string for pgo-emit-branch-prob option.
Differential Revision: https://reviews.llvm.org/D44809
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328653
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Matt Arsenault [Tue, 27 Mar 2018 18:39:45 +0000 (18:39 +0000)]
AMDGPU: Fix crash when MachinePointerInfo invalid
The combine on a select of a load only triggers for
addrspace 0, and discards the MachinePointerInfo. The
conservative default needs to be used for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328652
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Matt Arsenault [Tue, 27 Mar 2018 18:39:42 +0000 (18:39 +0000)]
AMDGPU: Fix register name format in tests
These were changed to match the asm output name a long time ago,
although I think the old tablegenerated names still work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328651
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Matt Arsenault [Tue, 27 Mar 2018 18:38:51 +0000 (18:38 +0000)]
AMDGPU: Fix FP restore from being reordered with stack ops
In a function, s5 is used as the frame base SGPR. If a function
is calling another function, during the call sequence
it is copied to a preserved SGPR and restored.
Before it was possible for the scheduler to move stack operations
before the restore of s5, since there's nothing to associate
a frame index access with the restore.
Add an implicit use of s5 to the adjcallstack pseudo which ends
the call sequence to preven this from happening. I'm not 100%
satisfied with this solution, but I'm not sure what else would be
better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328650
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Krzysztof Parzyszek [Tue, 27 Mar 2018 18:10:47 +0000 (18:10 +0000)]
[Hexagon] Implement TTI::shouldMaximizeVectorBandwidth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328648
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Stefan Pintilie [Tue, 27 Mar 2018 17:51:53 +0000 (17:51 +0000)]
[Power9] Fix the resource list for the COPY instruction.
The COPY instruction was listed as a 4 cycle instruction.
It is now listed correctly as a 2 cycle ALU instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328647
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Pirama Arumuga Nainar [Tue, 27 Mar 2018 17:42:36 +0000 (17:42 +0000)]
Remap values in PromotedFloats
Summary: When a node is about to be erased from ReplacedValues, we should also remap its corresponding values in PromotedFloats.
Patch by Yan Luo (Yan.Luo2@synopsys.com)
Reviewers: pirama
Reviewed By: pirama
Subscribers: lebedev.ri, llvm-commits
Differential Revision: https://reviews.llvm.org/D44872
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328644
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Artur Pilipenko [Tue, 27 Mar 2018 17:33:50 +0000 (17:33 +0000)]
Fix a reoccuring typo in load-combine tests
%tmp = bitcast i32* %arg to i8*
%tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0
- %tmp2 = load i8, i8* %tmp, align 1
+ %tmp2 = load i8, i8* %tmp1, align 1
This doesn't change the semantics of the tests but makes use of %tmp1 which was originally intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328642
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Krzysztof Parzyszek [Tue, 27 Mar 2018 17:07:52 +0000 (17:07 +0000)]
[Hexagon] Rudimentary support for auto-vectorization for HVX
This implements a set of TTI functions that the loop vectorizer uses.
The only purpose of this is to enable testing. Auto-vectorization is
disabled by default, enabled by -hexagon-autohvx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328639
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Rafael Auler [Tue, 27 Mar 2018 16:58:01 +0000 (16:58 +0000)]
[AArch64] Decorate AArch64 instrs with OPERAND_PCREL
Summary:
This is a canonical way to teach objdump to print the target
symbols for branches when disassembling AArch64 code.
Reviewers: evandro, t.p.northover, espindola
Reviewed By: t.p.northover
Differential Revision: https://reviews.llvm.org/D44851
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328638
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Fedor Sergeev [Tue, 27 Mar 2018 16:57:20 +0000 (16:57 +0000)]
[NFC] OptPassGate extracted from OptBisect
Summary:
This is an NFC refactoring of the OptBisect class to split it into an optional pass gate interface used by LLVMContext and the Optional Pass Bisector (OptBisect) used for debugging of optional passes.
This refactoring is needed for D44464, which introduces setOptPassGate() method to allow implementations other than OptBisect.
Patch by Yevgeny Rouban.
Reviewers: andrew.w.kaylor, fedor.sergeev, vsk, dberlin, Eugene.Zelenko, reames, skatkov
Reviewed By: fedor.sergeev
Differential Revision: https://reviews.llvm.org/D44821
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328637
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Krzysztof Parzyszek [Tue, 27 Mar 2018 16:44:41 +0000 (16:44 +0000)]
Use .set instead of = when printing assignment in assembly output
On Hexagon "x = y" is a syntax used in most instructions, and is not
treated as a directive.
Differential Revision: https://reviews.llvm.org/D44256
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328635
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Krzysztof Parzyszek [Tue, 27 Mar 2018 16:14:11 +0000 (16:14 +0000)]
[LV] Add TTI::shouldMaximizeVectorBandwidth to allow enabling it per target
The default implementation returns false and keeps the current behavior.
Differential Revision: https://reviews.llvm.org/D44735
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328632
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Andrea Di Biagio [Tue, 27 Mar 2018 15:23:41 +0000 (15:23 +0000)]
[llvm-mca] pass the correct set of used registers in checkRAT.
We were incorrectly initializing the array of used registers in method checkRAT.
As a consequence, the number of register file stalls was misreported.
Added a test to cover this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328629
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Simon Pilgrim [Tue, 27 Mar 2018 12:26:12 +0000 (12:26 +0000)]
[X86][Btver2] Add MMX_PMOVMSKBrr to MOVMSK scheduler class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328620
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Strahinja Petrovic [Tue, 27 Mar 2018 11:23:53 +0000 (11:23 +0000)]
[PowerPC] Secure PLT support
This patch supports secure PLT mode for PowerPC 32 architecture.
Differential Revision: https://reviews.llvm.org/D42112
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328617
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Alexander Richardson [Tue, 27 Mar 2018 10:08:12 +0000 (10:08 +0000)]
[MIPS] Add static_assert that all Fixups are handled in getFixupKind
Summary:
I recently added a new Fixup kind to our fork of LLVM but forgot to add
it to the table in MipsAsmBackend.cpp. With this static_assert the error
would have been caught instead of zero-initializing the array entries for
the new fixups.
Reviewers: sdardis, atanasyan
Reviewed By: atanasyan
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44895
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328616
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Max Kazantsev [Tue, 27 Mar 2018 09:40:51 +0000 (09:40 +0000)]
[LoopUnroll][NFC] Remove redundant canPeel check
We check `canPeel` twice: when evaluating the number of iterations to be peeled
and within the method `peelLoop` that performs peeling. This method is only
executed if the calculated peel count is positive. Thus, the check in `peelLoop` can
never fail. This patch replaces this check with an assert.
Differential Revision: https://reviews.llvm.org/D44919
Reviewed By: fhahn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328615
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Sam Parker [Tue, 27 Mar 2018 08:24:53 +0000 (08:24 +0000)]
[IRCE] Enable decreasing loops of non-const bound
As a follow-up to r328480, this updates the logic for the decreasing
safety checks in a similar manner:
- CanBeMax is replaced by CannotBeMaxInLoop which queries
isLoopEntryGuardedByCond on the maximum value.
- SumCanReachMin is replaced by isSafeDecreasingBound which includes
some logic from parseLoopStructure and, again, has been updated to
use isLoopEntryGuardedByCond on the given bounds.
Differential Revision: https://reviews.llvm.org/D44776
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328613
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Max Kazantsev [Tue, 27 Mar 2018 08:13:55 +0000 (08:13 +0000)]
[NFC] Fix comments in getExact()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328612
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Max Kazantsev [Tue, 27 Mar 2018 07:30:38 +0000 (07:30 +0000)]
[SCEV] Make exact taken count calculation more optimistic
Currently, `getExact` fails if it sees two exit counts in different blocks. There is
no solid reason to do so, given that we only calculate exact non-taken count
for exiting blocks that dominate latch. Using this fact, we can simply take min
out of all exits of all blocks to get the exact taken count.
This patch makes the calculation more optimistic with enforcing our assumption
with asserts. It allows us to calculate exact backedge taken count in trivial loops
like
for (int i = 0; i < 100; i++) {
if (i > 50) break;
. . .
}
Differential Revision: https://reviews.llvm.org/D44676
Reviewed By: fhahn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328611
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Max Kazantsev [Tue, 27 Mar 2018 04:54:00 +0000 (04:54 +0000)]
[SCEV] Add one more case in computeConstantDifference
This patch teaches `computeConstantDifference` handle calculation of constant
difference between `(X + C1)` and `(X + C2)` which is `(C2 - C1)`.
Differential Revision: https://reviews.llvm.org/D43759
Reviewed By: anna
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328609
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Craig Topper [Tue, 27 Mar 2018 04:26:39 +0000 (04:26 +0000)]
[MachineScheduler] Add itinerary to schedcover.py. Make default work in the command line filter
Summary:
This patch adds itinerary support to the schedcover.py script. I've been trying to use this script to figure out why SSE and AVX instructions are ending up in separate tablegen scheduler classes and sometimes its because we are using different itineraries.
Rather than using None to indicate the default scheduler model, I now use the string "default". I had to hack around the sorting a little to keep "default" at the beginning. But this also makes it so you can specify "default" on the command line to just get the defaults
I also fixed the regular expression code so that the no_default wasn't evaluated twice.
Reviewers: RKSimon, atrick, jmolloy, javed.absar
Reviewed By: javed.absar
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44834
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328608
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Mircea Trofin [Tue, 27 Mar 2018 01:39:17 +0000 (01:39 +0000)]
Revert "Revert "[lit] Generalized /dev/null support on Windows.""
Summary:
This reverts commit r328596.
Checking if the arguments are strings before testing if they contain "/dev/null".
Reviewers: rnk
Reviewed By: rnk
Subscribers: delcypher, llvm-commits
Differential Revision: https://reviews.llvm.org/D44914
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328603
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Sanjay Patel [Tue, 27 Mar 2018 00:32:19 +0000 (00:32 +0000)]
[x86] add RUN for target before roundss; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328601
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Jan Korous [Tue, 27 Mar 2018 00:16:28 +0000 (00:16 +0000)]
[lit] Temporarily disable shtest-timeout.py on darwin
Disabled until fixed in order to avoid random failures on green dragon.
rdar://problem/
38774530
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328598
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Mircea Trofin [Mon, 26 Mar 2018 23:59:39 +0000 (23:59 +0000)]
Revert "[lit] Generalized /dev/null support on Windows."
This reverts commit
ca7fdbb974384ce5a05528b22a41d46b1cc13e92.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328596
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David Blaikie [Mon, 26 Mar 2018 23:48:52 +0000 (23:48 +0000)]
Add a build dependency from libMC to libDebugInfoCodeView to match the reality of header dependencies here
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328595
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David Blaikie [Mon, 26 Mar 2018 23:37:02 +0000 (23:37 +0000)]
Move CVDebugRecord from CodeView to Object to fix layering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328593
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Sanjay Patel [Mon, 26 Mar 2018 23:18:32 +0000 (23:18 +0000)]
[x86] add tests for ftrunc; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328592
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Aaron Smith [Mon, 26 Mar 2018 22:53:38 +0000 (22:53 +0000)]
[DebugInfoPDB] Print the method name along with the variant value
Before this change, using dumpProperties() with PDBSymbolData
would look like this:
get_locationType: 3
1
After this change:
get_locationType: 3
get_value: 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328590
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Mircea Trofin [Mon, 26 Mar 2018 22:41:06 +0000 (22:41 +0000)]
[lit] Generalized /dev/null support on Windows.
Generalized /dev/null remapping on Windows, and added test.
Reviewers: rnk
Reviewed By: rnk
Subscribers: amccarth, zturner, delcypher, llvm-commits
Differential Revision: https://reviews.llvm.org/D44771
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328589
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Aaron Smith [Mon, 26 Mar 2018 22:17:12 +0000 (22:17 +0000)]
[DebugInfoPDB] Add methods to get the compiland and line numbers with PDBSymbolData
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328587
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Aaron Smith [Mon, 26 Mar 2018 22:13:22 +0000 (22:13 +0000)]
[DebugInfoPDB] Add DIA implementation of findLineNumbersByRVA
This method is used to find line numbers for PDBSymbolData
that have an invalid virtual address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328586
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Aaron Smith [Mon, 26 Mar 2018 22:10:02 +0000 (22:10 +0000)]
[DebugInfoPDB] Add DIA implementation of addressForVA and addressForRVA
These are used in finding line numbers for PDBSymbolData
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328585
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Simon Pilgrim [Mon, 26 Mar 2018 21:07:59 +0000 (21:07 +0000)]
Fix newlines. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328583
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Simon Pilgrim [Mon, 26 Mar 2018 21:06:14 +0000 (21:06 +0000)]
[X86] Add WriteCRC32 scheduler class
Currently CRC32 instructions use the WriteFAdd class, this patch splits them off into their own, at the moment it is still mostly just a duplicate of WriteFAdd but it can now be tweaked on a target by target basis.
Differential Revision: https://reviews.llvm.org/D44647
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328582
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