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Clement Courbet [Wed, 4 Apr 2018 12:58:41 +0000 (12:58 +0000)]
[llvm-exegesis] Add missing link libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329185
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Nico Weber [Wed, 4 Apr 2018 12:54:34 +0000 (12:54 +0000)]
Attempt to fix bots after r329179.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329184
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Nico Weber [Wed, 4 Apr 2018 12:37:44 +0000 (12:37 +0000)]
Sort targetgen calls in lib/Target/*/CMakeLists.
Makes it easier to see mistakes such as the one fixed in r329178 and makes
the different target CMakeLists more consistent.
Also remove some stale-looking comments from the Nios2 target cmakefile.
No intended behavior change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329181
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Pavel Labath [Wed, 4 Apr 2018 12:28:20 +0000 (12:28 +0000)]
[CodeGen] Generate DWARF v5 Accelerator Tables
Summary:
This patch adds a DwarfAccelTableEmitter class, which generates an
accelerator table, as specified in DWARF v5 standard. At the moment it
only generates a DIE offset column and (if we are indexing more than one
compile unit) a CU column.
Indexing type units is not currently supported, as we don't even have
the ability to generate DWARF v5-compatible compile units.
The implementation is not data-source agnostic like the one generating
apple tables. This was not necessary as we currently only have one user
of this code, and without a second user it was not obvious to me how to
best abstract this. (The difference between these tables and the apple
ones is that they need a lot more metadata about the debug info they are
indexing).
The generation is triggered by the --accel-tables argument, which
supersedes the --dwarf-accel-tables arg -- the latter was a simple
on-off switch, but not we can choose between two kinds of accelerator
tables we can generate.
This is tested by parsing the generated tables with llvm-dwarfdump and
the DWARFVerifier, and I've also checked that GNU readelf is able to
make sense of the tables.
Differential Revision: https://reviews.llvm.org/D43286
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329179
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Nico Weber [Wed, 4 Apr 2018 12:27:43 +0000 (12:27 +0000)]
Remove duplicate tablegen lines from AVR target.
They were added in r285274, in what looks like a merge mishap.
AVRGenMCCodeEmitter.inc is the only non-dupe tablegen invocation added in that
revision.
Also sort the tablegen lines to make this easier to spot in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329178
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Clement Courbet [Wed, 4 Apr 2018 12:12:38 +0000 (12:12 +0000)]
[llvm-exegesis] Do not initialize FileDescriptor when libpfm is not
available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329177
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Clement Courbet [Wed, 4 Apr 2018 12:01:46 +0000 (12:01 +0000)]
[llvm-exegesis] Fix compilation on lld-x86_64-darwin13
YAMLTraits does not know how to serialize `size_t` portably. Use `int`
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329176
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Clement Courbet [Wed, 4 Apr 2018 12:01:43 +0000 (12:01 +0000)]
[llvm-exegesis][NFC] Fix compilation warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329175
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Clement Courbet [Wed, 4 Apr 2018 12:01:38 +0000 (12:01 +0000)]
[llvm-exegesis][NFC] Fix a few warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329174
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Andrea Di Biagio [Wed, 4 Apr 2018 11:53:13 +0000 (11:53 +0000)]
[Tablegen] Slightly refactor method SubtargetEmitter::EmitExtraProcessorInfo.
This patch moves most of the logic from EmitExtraProcessorInfo to a couple of
helper functions. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329173
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Clement Courbet [Wed, 4 Apr 2018 11:48:15 +0000 (11:48 +0000)]
[llvm-exegesis] Fix build when libpfm is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329172
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Clement Courbet [Wed, 4 Apr 2018 11:45:53 +0000 (11:45 +0000)]
[llvm-exegesis] Fix compilation on some clang versions.
default initialization of an object of const type 'const llvm::DebugLoc' requires a user-provided default constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329171
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Benjamin Kramer [Wed, 4 Apr 2018 11:45:11 +0000 (11:45 +0000)]
Make helpers static. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329170
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Clement Courbet [Wed, 4 Apr 2018 11:37:06 +0000 (11:37 +0000)]
Re-land r329156 "Add llvm-exegesis tool."
Fixed to depend on and initialize the native target instead of X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329169
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Simon Pilgrim [Wed, 4 Apr 2018 11:14:12 +0000 (11:14 +0000)]
[X86][CostModel] Use generic SSE levels instead of particular CPUs for shuffle costs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329168
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Nicolai Haehnle [Wed, 4 Apr 2018 10:58:54 +0000 (10:58 +0000)]
AMDGPU: Dimension-aware image intrinsics
Summary:
These new image intrinsics contain the texture type as part of
their name and have each component of the address/coordinate as
individual parameters.
This is a preparatory step for implementing the A16 feature, where
coordinates are passed as half-floats or -ints, but the Z compare
value and texel offsets are still full dwords, making it difficult
or impossible to distinguish between A16 on or off in the old-style
intrinsics.
Additionally, these intrinsics pass the 'texfailpolicy' and
'cachectrl' as i32 bit fields to reduce operand clutter and allow
for future extensibility.
v2:
- gather4 supports 2darray images
- fix a bug with 1D images on SI
Change-Id: I099f309e0a394082a5901ea196c3967afb867f04
Reviewers: arsenm, rampitec, b-sumner
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D44939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329166
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Nicolai Haehnle [Wed, 4 Apr 2018 10:58:15 +0000 (10:58 +0000)]
StructurizeCFG: Test for branch divergence correctly
Fixes cases like the new test @nonuniform. In that test, %cc itself
is a uniform value; however, when reading it after the end of the loop in
basic block %if, its value is effectively non-uniform, so the branch is
non-uniform.
This problem was encountered in
https://bugs.freedesktop.org/show_bug.cgi?id=103743; however, this change
in itself is not sufficient to fix that bug, as there is another issue
in the AMDGPU backend.
As discovered after committing an earlier version of this change, this
exposes a subtle interaction between this pass and DivergenceAnalysis:
since we remove and re-create branch instructions, we can no longer rely
on DivergenceAnalysis for branches in subregions that were already
processed by the pass.
Explicitly remove branch instructions from DivergenceAnalysis to
avoid dangling pointers as a matter of defensive programming, and
change how we detect non-uniform subregions.
Change-Id: I32bbffece4a32f686fab54964dae1a5dd72949d4
Differential Revision: https://reviews.llvm.org/D43743
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329165
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Nicolai Haehnle [Wed, 4 Apr 2018 10:57:58 +0000 (10:57 +0000)]
AMDGPU: Fix copying i1 value out of loop with non-uniform exit
Summary:
When an i1-value is defined inside of a loop and used outside of it, we
cannot simply use the SGPR bitmask from the loop's last iteration.
There are also useful and correct cases of an i1-value being copied between
basic blocks, e.g. when a condition is computed outside of a loop and used
inside it. The concept of dominators is not sufficient to capture what is
going on, so I propose the notion of "lane-dominators".
Fixes a bug encountered in Nier: Automata.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103743
Change-Id: If37b969ddc71d823ab3004aeafb9ea050e45bd9a
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, wdng, mgorny, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D40547
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329164
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John Brawn [Wed, 4 Apr 2018 10:12:53 +0000 (10:12 +0000)]
[AArch64] Add patterns matching (fabs (fsub x y)) to (fabd x y)
Differential Revision: https://reviews.llvm.org/D44573
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329163
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Sam Parker [Wed, 4 Apr 2018 09:26:56 +0000 (09:26 +0000)]
[DAGCombine] Improve ReduceLoadWidth for SRL
Recommitting rL321259. Previosuly this caused an issue with PPCBE but
I didn't receieve a reproducer and didn't have the time to follow up.
If the issue appears again, please provide a reproducer so I can fix
it.
Original commit message:
If the SRL node is only used by an AND, we may be able to set the
ExtVT to the width of the mask, making the AND redundant. To support
this, another check has been added in isLegalNarrowLoad which queries
whether the load is valid.
Differential Revision: https://reviews.llvm.org/D41350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329160
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Mikhail Maltsev [Wed, 4 Apr 2018 08:54:19 +0000 (08:54 +0000)]
[ARM] Do not convert some vmov instructions
Summary:
Patch https://reviews.llvm.org/D44467 implements conversion of invalid
vmov instructions into valid ones. It turned out that some valid
instructions also get converted, for example
vmov.i64 d2, #0xff00ff00ff00ff00 ->
vmov.i16 d2, #0xff00
Such behavior is incorrect because according to the ARM ARM section
F2.7.7 Modified immediate constants in T32 and A32 Advanced SIMD
instructions, "On assembly, the data type must be matched in the table
if possible."
This patch fixes the isNEONmovReplicate check so that the above
instruction is not modified any more.
Reviewers: rengolin, olista01
Reviewed By: rengolin
Subscribers: javed.absar, kristof.beyls, rogfer01, llvm-commits
Differential Revision: https://reviews.llvm.org/D44678
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329158
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Clement Courbet [Wed, 4 Apr 2018 08:22:54 +0000 (08:22 +0000)]
Revert r329156 "Add llvm-exegesis tool."
Breaks a bunch of bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329157
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Clement Courbet [Wed, 4 Apr 2018 08:13:32 +0000 (08:13 +0000)]
Add llvm-exegesis tool.
Summary:
[llvm-exegesis][RFC] Automatic Measurement of Instruction Latency/Uops
This is the code corresponding to the RFC "llvm-exegesis Automatic Measurement of Instruction Latency/Uops".
The RFC is available on the LLVM mailing lists as well as the following document
for easier reading:
https://docs.google.com/document/d/1QidaJMJUyQdRrFKD66vE1_N55whe0coQ3h1GpFzz27M/edit?usp=sharing
Subscribers: mgorny, gchatelet, orwant, llvm-commits
Differential Revision: https://reviews.llvm.org/D44519
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329156
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Craig Topper [Wed, 4 Apr 2018 07:00:24 +0000 (07:00 +0000)]
[X86] Use the same predicate for the load for PMOVSXBQ and PMOVZXBQ.
These both use a 16-bit load, but one used loadi16_anyext and the other used extloadi32i16. The only difference between them is that loadi16_anyext checked that the load was at least 2 byte aligned and non-volatile. But the alignment doesn't matter here. Just use extloadi32i16 for both.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329154
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Craig Topper [Wed, 4 Apr 2018 07:00:19 +0000 (07:00 +0000)]
[X86] Use loadi16/loadi32 predicates in multiply patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329153
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Craig Topper [Wed, 4 Apr 2018 07:00:16 +0000 (07:00 +0000)]
[X86] Remove more dead code left over from the handling of i8/i16 UMUL_LOHI/SMUL_LOHI that is no longer needed. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329152
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Max Kazantsev [Wed, 4 Apr 2018 05:46:47 +0000 (05:46 +0000)]
[SCEV] Prove implications for SCEVUnknown Phis
This patch teaches SCEV how to prove implications for SCEVUnknown nodes that are Phis.
If we need to prove `Pred` for `LHS, RHS`, and `LHS` is a Phi with possible incoming values
`L1, L2, ..., LN`, then if we prove `Pred` for `(L1, RHS), (L2, RHS), ..., (LN, RHS)` then we can also
prove it for `(LHS, RHS)`. If both `LHS` and `RHS` are Phis from the same block, it is sufficient
to prove the predicate for values that come from the same predecessor block.
The typical case that it handles is that we sometimes need to prove that `Phi(Len, Len - 1) >= 0`
given that `Len > 0`. The new logic was added to `isImpliedViaOperations` and only uses it and
non-recursive reasoning to prove the facts we need, so it should not hurt compile time a lot.
Differential Revision: https://reviews.llvm.org/D44001
Reviewed By: anna
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329150
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Craig Topper [Wed, 4 Apr 2018 04:38:55 +0000 (04:38 +0000)]
[X86] Remove dead code for handling i8/i16 UMUL_LOHI/SMUL_LOHI from X86ISelDAGToDAG.cpp. NFC
These are promoted to i16/i32 multiplies by a DAG combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329147
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Craig Topper [Wed, 4 Apr 2018 04:38:54 +0000 (04:38 +0000)]
[X86] Remove some code that was only needed when i1 was a legal type. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329146
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Craig Topper [Wed, 4 Apr 2018 03:47:17 +0000 (03:47 +0000)]
[SimplifyCFG] Teach merge conditional stores to handle cases where the PostBB has more than 2 predecessors by inserting a new block for the store.
Summary:
Currently merge conditional stores can't handle cases where PostBB (the block we need to move the store to) has more than 2 predecessors.
This patch removes that restriction by creating a new block with only the 2 predecessors we care about and an unconditional branch to the original block. This provides a place to put the store.
Reviewers: efriedma, jmolloy, ABataev
Reviewed By: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39760
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329142
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Vlad Tsyrklevich [Wed, 4 Apr 2018 01:34:42 +0000 (01:34 +0000)]
Fix bad #include path in r329139
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329140
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Vlad Tsyrklevich [Wed, 4 Apr 2018 01:21:16 +0000 (01:21 +0000)]
Add the ShadowCallStack pass
Summary:
The ShadowCallStack pass instruments functions marked with the
shadowcallstack attribute. The instrumented prolog saves the return
address to [gs:offset] where offset is stored and updated in [gs:0].
The instrumented epilog loads/updates the return address from [gs:0]
and checks that it matches the return address on the stack before
returning.
Reviewers: pcc, vitalybuka
Reviewed By: pcc
Subscribers: cryptoad, eugenis, craig.topper, mgorny, llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D44802
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329139
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Nico Weber [Wed, 4 Apr 2018 00:50:22 +0000 (00:50 +0000)]
Minor no-op cmake file style fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329137
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Lang Hames [Wed, 4 Apr 2018 00:34:54 +0000 (00:34 +0000)]
Reapply r329133 with fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329136
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Lang Hames [Wed, 4 Apr 2018 00:12:12 +0000 (00:12 +0000)]
Revert r329133 "[RuntimeDyld][AArch64] Add some error pluming / generation..."
This broke a number of buildbots. Looking in to it now...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329135
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Jessica Paquette [Tue, 3 Apr 2018 23:32:41 +0000 (23:32 +0000)]
[MachineOutliner] Test for X86FI->getUsesRedZone() as well as Attribute::NoRedZone
This commit is similar to r329120, but uses the existing getUsesRedZone() function
in X86MachineFunctionInfo. This teaches the outliner to look at whether or not a
function *truly* uses a redzone instead of just the noredzone attribute on a
function.
Thus, after this commit, it's possible to outline from x86 without using
-mno-red-zone and still get outlining results.
This also adds a new test for the new redzone behaviour.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329134
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Lang Hames [Tue, 3 Apr 2018 23:19:20 +0000 (23:19 +0000)]
[RuntimeDyld][AArch64] Add some error pluming / generation to catch unhandled
relocation types on AArch64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329133
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Farhana Aleen [Tue, 3 Apr 2018 23:00:30 +0000 (23:00 +0000)]
[AMDGPU] performMinMaxCombine should not optimize patterns of vectors to min3/max3.
Summary: There are no packed instructions for min3 or max3. So, performMinMaxCombine should not optimize vectors of f16 to min3/max3.
Author: FarhanaAleen
Reviewed By: arsenm
Subscribers: llvm-commits, AMDGPU
Differential Revision: https://reviews.llvm.org/D45219
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329131
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Evandro Menezes [Tue, 3 Apr 2018 22:57:17 +0000 (22:57 +0000)]
[AArch64] Adjust the cost model for Exynos M3
Fix typo and simplify matching expression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329130
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Ikhlas Ajbar [Tue, 3 Apr 2018 22:55:09 +0000 (22:55 +0000)]
[Hexagon] peel loops with runtime small trip counts
Move the check canPeel() to Hexagon Target before setting PeelCount.
Differential Revision: https://reviews.llvm.org/D44880
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329129
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Reid Kleckner [Tue, 3 Apr 2018 22:38:25 +0000 (22:38 +0000)]
'cat' command for internal shell - Support Python 3
LLVM Bug Id : 36449
Revision 328563 caused tests to fail under python 3.
This patch modified cat.py file to support both python 2 and 3.
This patch also fixes CRLF issues on Windows.
Patch by Chamal de Silva
Differential Revision: https://reviews.llvm.org/D45077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329123
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Sanjay Patel [Tue, 3 Apr 2018 22:19:19 +0000 (22:19 +0000)]
[InstCombine] allow more fmul folds with 'reassoc'
The tests marked with 'FIXME' require loosening the check
in SimplifyAssociativeOrCommutative() to optimize completely;
that's still checking isFast() in Instruction::isAssociative().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329121
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Jessica Paquette [Tue, 3 Apr 2018 21:56:10 +0000 (21:56 +0000)]
[MachineOutliner] Keep track of fns that use a redzone in AArch64FunctionInfo
This patch adds a hasRedZone() function to AArch64MachineFunctionInfo. It
returns true if the function is known to use a redzone, false if it is known
to not use a redzone, and no value otherwise.
This removes the requirement to pass -mno-red-zone when outlining for AArch64.
https://reviews.llvm.org/D45189
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329120
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Farhana Aleen [Tue, 3 Apr 2018 21:51:45 +0000 (21:51 +0000)]
Revert "MSG"
This reverts commit
9a0ce889d1c39c74d69ecad5ce9c875155ae55de.
This was committed by mistake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329119
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Vlad Tsyrklevich [Tue, 3 Apr 2018 21:40:27 +0000 (21:40 +0000)]
Fix bad copy-and-paste in r329108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329118
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Jessica Paquette [Tue, 3 Apr 2018 21:36:00 +0000 (21:36 +0000)]
[MachineOutliner][NFC] Make outlined functions have internal linkage
The linkage type on outlined functions was private before. This meant that if
you set a breakpoint in an outlined function, the debugger wouldn't be able to
give a sane name to the outlined function.
This commit changes the linkage type to internal and updates any tests that
relied on the prefixes on the names of outlined functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329116
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Farhana Aleen [Tue, 3 Apr 2018 21:20:39 +0000 (21:20 +0000)]
MSG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329114
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Gor Nishanov [Tue, 3 Apr 2018 20:54:20 +0000 (20:54 +0000)]
[coroutines] Respect alloca alignment requirements when building coroutine frame
Summary:
If an alloca need to be stored in the coroutine frame and it has an alignment specified and the alignment does not match the natural alignment of the alloca type. Insert appropriate padding into the coroutine frame to make sure that it gets requested alignment.
For example for a packet type (which natural alignment is 1), but alloca alignment is 8, we may need to insert a padding field with required number of bytes to make sure it is properly aligned.
```
%PackedStruct = type <{ i64 }>
...
%data = alloca %PackedStruct, align 8
```
If the previous field in the coroutine frame had alignment 2, we would have [6 x i8] inserted before %PackedStruct in the coroutine frame:
```
%f.Frame = type { ..., i16, [6 x i8], %PackedStruct }
```
Reviewers: rnk, lewissbaker, modocache
Reviewed By: modocache
Subscribers: EricWF, llvm-commits
Differential Revision: https://reviews.llvm.org/D45221
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329112
91177308-0d34-0410-b5e6-
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Florian Hahn [Tue, 3 Apr 2018 20:54:04 +0000 (20:54 +0000)]
[LoopInterchange] Add remark for calls preventing interchanging.
It also updates test/Transforms/LoopInterchange/call-instructions.ll
to use accesses where we can prove dependence after D35430.
Reviewers: sebpop, karthikthecool, blitz.opensource
Reviewed By: sebpop
Differential Revision: https://reviews.llvm.org/D45206
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329111
91177308-0d34-0410-b5e6-
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Vlad Tsyrklevich [Tue, 3 Apr 2018 20:10:40 +0000 (20:10 +0000)]
Add the ShadowCallStack attribute
Summary:
Introduce the ShadowCallStack function attribute. It's added to
functions compiled with -fsanitize=shadow-call-stack in order to mark
functions to be instrumented by a ShadowCallStack pass to be submitted
in a separate change.
Reviewers: pcc, kcc, kubamracek
Reviewed By: pcc, kcc
Subscribers: cryptoad, mehdi_amini, javed.absar, llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D44800
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329108
91177308-0d34-0410-b5e6-
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Aaron Smith [Tue, 3 Apr 2018 19:43:40 +0000 (19:43 +0000)]
[DebugInfoPDB] Add methods used to read function flags
The specific function flags are listed in CodeView::FunctionOption.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329105
91177308-0d34-0410-b5e6-
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Aaron Smith [Tue, 3 Apr 2018 19:41:27 +0000 (19:41 +0000)]
[DebugInfoPDB] Add a few missing definitions to PDBTypes.h
The missing definitions are from cvconst.h shipped with DIA SDK.
Correct the url to MSDN for MemoryTypeEnum and set the underlying
type of PDB_StackFrameType and PDB_MemoryType to uint16_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329104
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Sanjay Patel [Tue, 3 Apr 2018 18:34:56 +0000 (18:34 +0000)]
[x86] add tests for convert-FP-to-integer with constants; NFC
We don't constant fold any of these, but we could...but if we
do, we must produce the right answer.
Unlike the IR fptosi instruction or its DAG node counterpart
ISD::FP_TO_SINT, these are not undef for an out-of-range input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329100
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David Blaikie [Tue, 3 Apr 2018 18:19:52 +0000 (18:19 +0000)]
Disable a test using environment variables that requires a real shell
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329096
91177308-0d34-0410-b5e6-
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Jun Bum Lim [Tue, 3 Apr 2018 18:17:34 +0000 (18:17 +0000)]
[CodeGen]Add NoVRegs property on PostRASink and ShrinkWrap
Summary:
This change declare that PostRAMachineSinking and ShrinkWrap require NoVRegs
property, so now the MachineFunctionPass can enforce this check.
These passes are disabled in NVPTX & WebAssembly.
Reviewers: dschuff, jlebar, tra, jgravelle-google, MatzeB, sebpop, thegameg, mcrosier
Reviewed By: dschuff, thegameg
Subscribers: jholewinski, jfb, sbc100, aheejin, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D45183
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329095
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Jonas Devlieghere [Tue, 3 Apr 2018 18:01:18 +0000 (18:01 +0000)]
[dsymutil] Apply recursion workaround for threading
The DwarfLinker can have some very deep recursion that can max out the
(significantly smaller) stack when using threads. We don't want this
limitation when we only have a single thread. We already have this
workaround for the architecture-related threading. This patch applies
the same workaround to the parallel analysis and cloning.
Differential revision: https://reviews.llvm.org/D45172
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329093
91177308-0d34-0410-b5e6-
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Alexey Bataev [Tue, 3 Apr 2018 17:48:14 +0000 (17:48 +0000)]
[SLP] Fixed formatting, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329091
91177308-0d34-0410-b5e6-
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Alexey Bataev [Tue, 3 Apr 2018 17:28:55 +0000 (17:28 +0000)]
[DEBUGINFO] Add option that allows to disable emission of flags in .loc directives.
Summary:
Some targets do not support extended format of .loc directive and
support only simple format: .loc <FileID> <Line> <Column>. Patch adds
MCAsmInfo flag and option that allows emit .loc directive without
additional flags.
Reviewers: echristo
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45184
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329089
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Daniel Neilson [Tue, 3 Apr 2018 17:26:20 +0000 (17:26 +0000)]
[InstCombine] Fold compare of int constant against a splatted vector of ints
Summary:
Folding patterns like:
%vec = shufflevector <4 x i8> %insvec, <4 x i8> undef, <4 x i32> zeroinitializer
%cast = bitcast <4 x i8> %vec to i32
%cond = icmp eq i32 %cast, 0
into:
%ext = extractelement <4 x i8> %insvec, i32 0
%cond = icmp eq i32 %ext, 0
Combined with existing rules, this allows us to fold patterns like:
%insvec = insertelement <4 x i8> undef, i8 %val, i32 0
%vec = shufflevector <4 x i8> %insvec, <4 x i8> undef, <4 x i32> zeroinitializer
%cast = bitcast <4 x i8> %vec to i32
%cond = icmp eq i32 %cast, 0
into:
%cond = icmp eq i8 %val, 0
When we construct a splat vector via a shuffle, and bitcast the vector into an integer type for comparison against an integer constant. Then we can simplify the the comparison to compare the splatted value against the integer constant.
Reviewers: spatel, anna, mkazantsev
Reviewed By: spatel
Subscribers: efriedma, rengolin, llvm-commits
Differential Revision: https://reviews.llvm.org/D44997
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329087
91177308-0d34-0410-b5e6-
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Alexey Bataev [Tue, 3 Apr 2018 17:14:47 +0000 (17:14 +0000)]
[SLP] Fix PR36481: vectorize reassociated instructions.
Summary:
If the load/extractelement/extractvalue instructions are not originally
consecutive, the SLP vectorizer is unable to vectorize them. Patch
allows reordering of such instructions.
Patch does not support reordering of the repeated instruction, this must
be handled in the separate patch.
Reviewers: RKSimon, spatel, hfinkel, mkuper, Ayal, ashahid
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D43776
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329085
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Eric Christopher [Tue, 3 Apr 2018 17:07:05 +0000 (17:07 +0000)]
Remove a stale comment cut and pasted from another file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329084
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Andrea Di Biagio [Tue, 3 Apr 2018 16:46:23 +0000 (16:46 +0000)]
[llvm-mca] Move the logic that prints register file statistics to its own view. NFCI
Before this patch, the "BackendStatistics" view was responsible for printing the
register file usage (as well as many other statistics).
Now users can enable register file usage statistics using the command line flag
`-register-file-stats`. By default, the tool doesn't print register file
statistics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329083
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Alexey Bataev [Tue, 3 Apr 2018 16:40:33 +0000 (16:40 +0000)]
Recommit "[SLP] Fix issues with debug output in the SLP vectorizer."
The primary issue here is that using NDEBUG alone isn't enough to guard
debug printing -- instead the DEBUG() macro needs to be used so that the
specific pass debug logging check is employed. Without this, every
asserts-enabled build was printing out information when it hit this.
I also fixed another place where we had multiple statements in a DEBUG
macro to use {}s to be a bit cleaner. And I fixed a place that used
errs() rather than dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329082
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Florian Hahn [Tue, 3 Apr 2018 16:37:58 +0000 (16:37 +0000)]
[LoopInterchange] Update tests so DA can handle access after D35430.
I have taken the opportunity to simplify some tests slightly and move
parts around.
It also brings back a few IR checks for interchangable loops.
Reviewers: karthikthecool, sebpop, grosser
Reviewed By: sebpop
Differential Revision: https://reviews.llvm.org/D45207
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329081
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Alexey Bataev [Tue, 3 Apr 2018 16:31:26 +0000 (16:31 +0000)]
[SLP] Added tests for checks of reordering of the repeated instructions,
NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329080
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Krzysztof Parzyszek [Tue, 3 Apr 2018 16:06:36 +0000 (16:06 +0000)]
[Hexagon] Remove -mhvx-double and the corresponding subtarget feature
Specifying the HVX vector length should be done via the -mhvx-length
option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329079
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Krzysztof Parzyszek [Tue, 3 Apr 2018 16:05:20 +0000 (16:05 +0000)]
[Hexagon] Remove unneeded attributes from lit test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329078
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Puyan Lotfi [Tue, 3 Apr 2018 15:53:49 +0000 (15:53 +0000)]
Adding optional Name parameter to createVirtualRegister and createGenericVirtualRegister.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329076
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Andrea Di Biagio [Tue, 3 Apr 2018 15:36:15 +0000 (15:36 +0000)]
[llvm-mca] Remove redundant include from BackendStatistics.h. NFC
Also use llvm::DenseMap for Histograms (instead of std::map).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329074
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Benjamin Kramer [Tue, 3 Apr 2018 14:40:33 +0000 (14:40 +0000)]
Revert "[SLP] Fix PR36481: vectorize reassociated instructions."
This reverts commit r328980 and r329046. Makes the vectorizer crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329071
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Andrea Di Biagio [Tue, 3 Apr 2018 13:52:26 +0000 (13:52 +0000)]
[MC] Fix -Wmissing-field-initializer warning after r329067.
This should fix the problem reported by the lld buildbots:
- Builder lld-x86_64-darwin13, Build #19782
- Builder lld-perf-testsuite, Build #1419
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329068
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Andrea Di Biagio [Tue, 3 Apr 2018 13:36:24 +0000 (13:36 +0000)]
[MC][Tablegen] Allow the definition of processor register files in the scheduling model for llvm-mca
This patch allows the description of register files in processor scheduling
models. This addresses PR36662.
A new tablegen class named 'RegisterFile' has been added to TargetSchedule.td.
Targets can optionally describe register files for their processors using that
class. In particular, class RegisterFile allows to specify:
- The total number of physical registers.
- Which target registers are accessible through the register file.
- The cost of allocating a register at register renaming stage.
Example (from this patch - see file X86/X86ScheduleBtVer2.td)
def FpuPRF : RegisterFile<72, [VR64, VR128, VR256], [1, 1, 2]>
Here, FpuPRF describes a register file for MMX/XMM/YMM registers. On Jaguar
(btver2), a YMM register definition consumes 2 physical registers, while MMX/XMM
register definitions only cost 1 physical register.
The syntax allows to specify an empty set of register classes. An empty set of
register classes means: this register file models all the registers specified by
the Target. For each register class, users can specify an optional register
cost. By default, register costs default to 1. A value of 0 for the number of
physical registers means: "this register file has an unbounded number of
physical registers".
This patch is structured in two parts.
* Part 1 - MC/Tablegen *
A first part adds the tablegen definition of RegisterFile, and teaches the
SubtargetEmitter how to emit information related to register files.
Information about register files is accessible through an instance of
MCExtraProcessorInfo.
The idea behind this design is to logically partition the processor description
which is only used by external tools (like llvm-mca) from the processor
information used by the llvm machine schedulers.
I think that this design would make easier for targets to get rid of the extra
processor information if they don't want it.
* Part 2 - llvm-mca related *
The second part of this patch is related to changes to llvm-mca.
The main differences are:
1) class RegisterFile now needs to take into account the "cost of a register"
when allocating physical registers at register renaming stage.
2) Point 1. triggered a minor refactoring which lef to the removal of the
"maximum 32 register files" restriction.
3) The BackendStatistics view has been updated so that we can print out extra
details related to each register file implemented by the processor.
The effect of point 3. is also visible in tests register-files-[1..5].s.
Differential Revision: https://reviews.llvm.org/D44980
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329067
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Sanjay Patel [Tue, 3 Apr 2018 13:05:20 +0000 (13:05 +0000)]
[LangRef] fix description and examples of fptrunc
As noted in PR36966:
https://bugs.llvm.org/show_bug.cgi?id=36966
The old description doesn't match what we do in code,
so this just fixes the documentation to avoid confusion.
Differential Revision: https://reviews.llvm.org/D45190
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329065
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Hiroshi Inoue [Tue, 3 Apr 2018 12:49:42 +0000 (12:49 +0000)]
[PowerPC] reorder entries in P9InstrResources.td in alphabetical order; NFC
Reorder entries added in my previous commit (rL328969) to keep alphabetical order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329064
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Chandler Carruth [Tue, 3 Apr 2018 10:28:56 +0000 (10:28 +0000)]
[x86] Fix a pretty obvious think-o with my asm scrubbing. You have to in
fact use regular expression syntax to use regular expressions.
Should restore the bots. Sorry for the noise on this test.
Thanks to Philip for spotting the bug!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329057
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Chandler Carruth [Tue, 3 Apr 2018 10:04:37 +0000 (10:04 +0000)]
[x86] Clean up and enhance a test around eflags copying.
This adds the basic test cases from all the EFLAGS bugs in more direct
forms. It also switches to generated check lines, and includes both
32-bit and 64-bit variations.
No functionality changing here, just setting things up to have a nice
clean asm diff in my EFLAGS patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329056
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Chandler Carruth [Tue, 3 Apr 2018 09:57:05 +0000 (09:57 +0000)]
[x86] Extend my goofy SP offset scrubbing for llc test cases to actually
do explicit scrubbing of the offsets of stack spills and reloads.
You can always turn this off in order to test specific stack slot usage.
We were already hiding most of this, but the new logic hides it more
generically. Notably, we should effectively hide stack slot churn in
functions that have a frame pointer now, and should also hide it when
changing a function from stack pointer to frame pointer. That transition
already changes enough to be clearly noticed in the test case diff,
showing *every* spill and reload is really noisy without benefit. See
the test case I ran this on as a classic example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329055
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Alexander Potapenko [Tue, 3 Apr 2018 09:50:06 +0000 (09:50 +0000)]
MSan: introduce the conservative assembly handling mode.
The default assembly handling mode may introduce false positives in the
cases when MSan doesn't understand that the assembly call initializes
the memory pointed to by one of its arguments.
We introduce the conservative mode, which initializes the first
|sizeof(type)| bytes for every |type*| pointer passed into the
assembly statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329054
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Serguei Katkov [Tue, 3 Apr 2018 07:29:00 +0000 (07:29 +0000)]
[SCEV] Fix PR36974.
The patch changes the usage of dominate to properlyDominate
to satisfy the condition !(a < a) while using std::max.
It is actually NFC due to set data structure is used to keep
the Loops and no two identical loops can be in collection.
So in reality there is no difference between usage of
dominate and properlyDominate in this particular case.
However it might be changed so it is better to fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329051
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Eric Christopher [Tue, 3 Apr 2018 07:01:33 +0000 (07:01 +0000)]
Add a wrapper around llvm-objdump to look for indirect calls/jmps in x86 assembly.
Useful when looking for indirect calls/jmps the need mitigation
via retpoline or other mitigations for Spectre v2.
Feedback, extension, additional patches welcome.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329050
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Craig Topper [Tue, 3 Apr 2018 06:37:04 +0000 (06:37 +0000)]
[X86] Reduce number of OpPrefix bits in TSFlags to 2. NFCI
TSFlag doesn't need to disambiguate NoPrfx from PS. So shift the encodings so PS is NoPrfx|0x4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329049
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Craig Topper [Tue, 3 Apr 2018 06:37:01 +0000 (06:37 +0000)]
[X86][TableGen] Add a missing error check to make sure EVEX instructions use one PS/PD/XS/XD prefixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329048
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Max Kazantsev [Tue, 3 Apr 2018 05:57:19 +0000 (05:57 +0000)]
[SCEV] Make computeExitLimit more simple and more powerful
Current implementation of `computeExitLimit` has a big piece of code
the only purpose of which is to prove that after the execution of this
block the latch will be executed. What it currently checks is actually a
subset of situations where the exiting block dominates latch.
This patch replaces all these checks for simple particular cases with
domination check over loop's latch which is the only necessary condition
of taking the exiting block into consideration. This change allows to
calculate exact loop taken count for simple loops like
for (int i = 0; i < 100; i++) {
if (cond) {...} else {...}
if (i > 50) break;
. . .
}
Differential Revision: https://reviews.llvm.org/D44677
Reviewed By: efriedma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329047
91177308-0d34-0410-b5e6-
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Chandler Carruth [Tue, 3 Apr 2018 05:27:28 +0000 (05:27 +0000)]
[SLP] Fix issues with debug output in the SLP vectorizer.
The primary issue here is that using NDEBUG alone isn't enough to guard
debug printing -- instead the DEBUG() macro needs to be used so that the
specific pass debug logging check is employed. Without this, every
asserts-enabled build was printing out information when it hit this.
I also fixed another place where we had multiple statements in a DEBUG
macro to use {}s to be a bit cleaner. And I fixed a place that used
`errs()` rather than `dbgs()`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329046
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 3 Apr 2018 05:10:12 +0000 (05:10 +0000)]
[TableGen] Use llvm::cast instead of static_cast so that the cast will be checked. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329045
91177308-0d34-0410-b5e6-
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Yonghong Song [Tue, 3 Apr 2018 03:56:37 +0000 (03:56 +0000)]
bpf: fix incorrect SELECT_CC lowering
Commit
37962a331c77 ("bpf: Improve expanding logic in LowerSELECT_CC")
intended to improve code quality for certain jmp conditions. The
commit, however, has a couple of issues:
(1). In code, just swap is not enough, ConditionalCode CC
should also be swapped, otherwise incorrect code will
be generated.
(2). The ConditionalCode swap should be subject to
getHasJmpExt(). If getHasJmpExt() is False, certain
conditional codes will not be supported and swap
may generate incorrect code.
The original goal for this patch is to optimize jmp operations
which does not have JmpExt turned on. If JmpExt is on,
better code could be generated. For example, the test
select_ri.ll is introduced to demonstrate the optimization.
The same result can be achieved with -mcpu=v2 flag.
Signed-off-by: Yonghong Song <yhs@fb.com>
Acked-by: Alexei Starovoitov <ast@kernel.org>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329043
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Ikhlas Ajbar [Tue, 3 Apr 2018 03:39:43 +0000 (03:39 +0000)]
peel loops with runtime small trip counts
For Hexagon, peeling loops with small runtime trip count is beneficial for our
benchmarks. We set PeelCount in HexagonTargetInfo.cpp and we use PeelCount set
by the target for computing the desired peel count.
Differential Revision: https://reviews.llvm.org/D44880
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329042
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Nico Weber [Tue, 3 Apr 2018 02:37:49 +0000 (02:37 +0000)]
Remove utils/makellvm; it doesn't look like it works with cmake builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329041
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Chandler Carruth [Tue, 3 Apr 2018 02:19:05 +0000 (02:19 +0000)]
[x86] Tidy up test case, generate check lines with script. NFC.
Just adds basic block labels and tidies up where comments go in the test
case and then generates fresh CHECK lines with the script. This way, the
check lines are much easier to maintain. They were already close to this
but not quite there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329040
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Aaron Smith [Tue, 3 Apr 2018 00:22:12 +0000 (00:22 +0000)]
[lit] Prefer opening files with open (Python 2) rather than io.open which requires io.
Only rely on Python 3 (io.open) when necessary. This puts TestRunnyer.py closer to how it behaved
before the changes introduced in D43165 and silences a few Windows build bot failures.
Thanks to Stella Stamenova for the patch!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329037
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Haicheng Wu [Tue, 3 Apr 2018 00:05:10 +0000 (00:05 +0000)]
[SLP] Distinguish "demanded and shrinkable" from "demanded and not shrinkable" values when determining the minimum bitwidth
We use two approaches for determining the minimum bitwidth.
* Demanded bits
* Value tracking
If demanded bits doesn't result in a narrower type, we then try value tracking.
We need this if we want to root SLP trees with the indices of getelementptr
instructions since all the bits of the indices are demanded.
But there is a missing piece though. We need to be able to distinguish "demanded
and shrinkable" from "demanded and not shrinkable". For example, the bits of %i
in
%i = sext i32 %e1 to i64
%gep = getelementptr inbounds i64, i64* %p, i64 %i
are demanded, but we can shrink %i's type to i32 because it won't change the
result of the getelementptr. On the other hand, in
%tmp15 = sext i32 %tmp14 to i64
%tmp16 = insertvalue { i64, i64 } undef, i64 %tmp15, 0
it doesn't make sense to shrink %tmp15 and we can skip the value tracking.
Ideas are from Matthew Simpson!
Differential Revision: https://reviews.llvm.org/D44868
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329035
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Brian Gesiak [Mon, 2 Apr 2018 23:39:40 +0000 (23:39 +0000)]
[Coroutines] Avoid assert splitting hidden coros
Summary:
When attempting to split a coroutine with 'hidden' visibility (for
example, a C++ coroutine that is inlined when compiled with the option
'-fvisibility-inlines-hidden'), LLVM would hit an assertion in
include/llvm/IR/GlobalValue.h:240: "local linkage requires default
visibility". The issue is that the visibility is copied from the source
of the function split in the `CloneFunctionInto` function, but the linkage
is not. To fix, create the new function first with external linkage,
then copy the linkage from the original function *after* `CloneFunctionInto`
is called.
Since `GlobalValue::setLinkage` in turn calls `maybeSetDsoLocal`, the
explicit call to `setDSOLocal` can be removed in CoroSplit.cpp.
Test Plan: check-llvm
Reviewers: GorNishanov, lewissbaker, EricWF, majnemer, rnk
Reviewed By: rnk
Subscribers: llvm-commits, eric_niebler
Differential Revision: https://reviews.llvm.org/D44185
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329033
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Rafael Espindola [Mon, 2 Apr 2018 23:20:30 +0000 (23:20 +0000)]
Align stubs for external and common global variables to pointer size.
This patch fixes PR36885: clang++ generates unaligned stub symbol
holding a pointer.
Patch by Rahul Chaudhry!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329030
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Eric Christopher [Mon, 2 Apr 2018 23:17:55 +0000 (23:17 +0000)]
Remove llvm-mcmarkup.
It was never used and I've checked with the original authors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329029
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Reid Kleckner [Mon, 2 Apr 2018 22:49:44 +0000 (22:49 +0000)]
[InstCombine] Don't strip function type casts from musttail calls
Summary:
The cast simplifications that instcombine does here do not make any
attempt to obey the verifier rules for musttail calls. Therefore we have
to disable them.
Reviewers: efriedma, majnemer, pcc
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D45186
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329027
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Aaron Smith [Mon, 2 Apr 2018 22:34:35 +0000 (22:34 +0000)]
[lit] One more try at fixing TestRunner.py for D43165
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329026
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Reid Kleckner [Mon, 2 Apr 2018 22:19:42 +0000 (22:19 +0000)]
[lit] Attempt to fix builtin diff code for Python 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329024
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Aaron Smith [Mon, 2 Apr 2018 22:08:56 +0000 (22:08 +0000)]
[lit] Fix problem in how Python versions open files with different encodings
Reapply D43165 which was reverted because of different versions of python failing.
The one line fix for the different python versions was commited at the same time
that D43165 was reverted. If this change is giving you issues then get in touch
with your python version and we will fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329022
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Harlan Haskins [Mon, 2 Apr 2018 21:45:35 +0000 (21:45 +0000)]
Fix Go IR test for changes in DIBuilder API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329021
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Aaron Smith [Mon, 2 Apr 2018 21:44:51 +0000 (21:44 +0000)]
[lit] Use io.open to compare two files since it supports different encodings while older versions of open do not
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329020
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