OSDN Git Service
Bill Wendling [Sun, 8 Dec 2013 00:06:30 +0000 (00:06 +0000)]
Merging r196211:
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Bill Wendling [Sun, 8 Dec 2013 00:06:17 +0000 (00:06 +0000)]
Merging r196209:
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Bill Wendling [Sun, 8 Dec 2013 00:06:05 +0000 (00:06 +0000)]
Merging r196208:
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r196208 | haoliu | 2013-12-02 21:58:30 -0800 (Mon, 02 Dec 2013) | 3 lines
AArch64: add missing ACLE intrinsics mapping to general arithmetic operation from VFP instructions.
E.g. float64x1_t vadd_f64(float64x1_t a, float64x1_t b) -> FADD Dd, Dn, Dm.
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Bill Wendling [Sun, 8 Dec 2013 00:05:49 +0000 (00:05 +0000)]
Merging r196199:
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Bill Wendling [Sun, 8 Dec 2013 00:05:35 +0000 (00:05 +0000)]
Merging r196198:
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r196198 | haoliu | 2013-12-02 19:39:47 -0800 (Mon, 02 Dec 2013) | 3 lines
AArch64: Add missing scalar pair intrinsics.
E.g. "float32_t vaddv_f32(float32x2_t a)" to be matched into "faddp s0, v1.2s".
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Bill Wendling [Sun, 8 Dec 2013 00:05:18 +0000 (00:05 +0000)]
Merging r196192:
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r196192 | jiangning | 2013-12-02 17:33:52 -0800 (Mon, 02 Dec 2013) | 2 lines
Add some missing pattern matches for AArch64 Neon intrinsics like vuqadd_s64 and friends.
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Bill Wendling [Sun, 8 Dec 2013 00:05:00 +0000 (00:05 +0000)]
Merging r196191:
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Bill Wendling [Sun, 8 Dec 2013 00:04:47 +0000 (00:04 +0000)]
Merging r196190:
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r196190 | jiangning | 2013-12-02 17:29:32 -0800 (Mon, 02 Dec 2013) | 2 lines
Add some missing pattern matches for AArch64 Neon intrinsics like vmull_high_n_s16 and friends.
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Bill Wendling [Sun, 8 Dec 2013 00:04:29 +0000 (00:04 +0000)]
Merging r196189:
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Bill Wendling [Sat, 7 Dec 2013 21:24:29 +0000 (21:24 +0000)]
Merging r196638:
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r196638 | arsenm | 2013-12-06 18:58:45 -0800 (Fri, 06 Dec 2013) | 1 line
Fix assert with copy from global through addrspacecast
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Bill Wendling [Sat, 7 Dec 2013 21:18:41 +0000 (21:18 +0000)]
Merging r196658:
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Bill Wendling [Sat, 7 Dec 2013 09:39:53 +0000 (09:39 +0000)]
Merging r196391:
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r196391 | hliao | 2013-12-04 09:44:22 -0800 (Wed, 04 Dec 2013) | 5 lines
[X86] Check YMM31/ZMM31 as well
- No test case as there's no calling convention preserve YMM31/ZMM31 only
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Bill Wendling [Sat, 7 Dec 2013 09:39:35 +0000 (09:39 +0000)]
Merging r196261:
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r196261 | hliao | 2013-12-03 01:17:32 -0800 (Tue, 03 Dec 2013) | 13 lines
Enhance the fix of PR17631
- The fix to PR17631 fixes part of the cases where 'vzeroupper' should
not be issued before 'call' insn. There're other cases where helper
calls will be inserted not limited to epilog. These helper calls do
not follow the standard calling convention and won't clobber any YMM
registers. (So far, all call conventions will clobber any or part of
YMM registers.)
This patch enhances the previous fix to cover more cases 'vzerosupper' should
not be inserted by checking if that function call won't clobber any YMM
registers and skipping it if so.
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Bill Wendling [Sat, 7 Dec 2013 09:36:35 +0000 (09:36 +0000)]
Merging r196269:
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r196269 | jamesm | 2013-12-03 03:23:11 -0800 (Tue, 03 Dec 2013) | 5 lines
Addrspacecasts are no-ops on ARM.
Testcase added.
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Bill Wendling [Sat, 7 Dec 2013 09:35:00 +0000 (09:35 +0000)]
Merging r196369:
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r196369 | void | 2013-12-04 01:42:49 -0800 (Wed, 04 Dec 2013) | 1 line
Update email address.
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Bill Wendling [Sat, 7 Dec 2013 09:31:26 +0000 (09:31 +0000)]
Merging r196294:
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r196294 | arnolds | 2013-12-03 08:33:06 -0800 (Tue, 03 Dec 2013) | 7 lines
opt: Mirror vectorization presets of clang
clang enables vectorization at optimization levels > 1 and size level < 2. opt
should behave similarily.
Loop vectorization and SLP vectorization can be disabled with the flags
-disable-(loop/slp)-vectorization.
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Bill Wendling [Fri, 6 Dec 2013 22:12:13 +0000 (22:12 +0000)]
Merging r196611:
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r196611 | dexonsmith | 2013-12-06 13:48:36 -0800 (Fri, 06 Dec 2013) | 5 lines
Don't use isNullValue to evaluate ConstantExpr
ConstantExpr can evaluate to false even when isNullValue gives false.
Fixes PR18143.
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Roman Divacky [Fri, 6 Dec 2013 20:04:30 +0000 (20:04 +0000)]
Mention sparc backend improvements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196603
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Bill Wendling [Fri, 6 Dec 2013 19:12:09 +0000 (19:12 +0000)]
Merging r196538:
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Bill Wendling [Fri, 6 Dec 2013 19:11:51 +0000 (19:11 +0000)]
Merging r196532:
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Bill Wendling [Fri, 6 Dec 2013 09:10:19 +0000 (09:10 +0000)]
Merging r196508:
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r196508 | arnolds | 2013-12-05 07:14:40 -0800 (Thu, 05 Dec 2013) | 12 lines
SLPVectorizer: An in-tree vectorized entry cannot also be a scalar external use
We were creating external uses for scalar values in MustGather entries that also
had a ScalarToTreeEntry (they also are present in a vectorized tuple). This
meant we would keep a value 'alive' as a scalar and vectorized causing havoc.
This is not necessary because when we create a MustGather vector we explicitly
create external uses entries for the insertelement instructions of the
MustGather vector elements.
Fixes PR18129.
radar://
15582184
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Bill Wendling [Thu, 5 Dec 2013 18:29:11 +0000 (18:29 +0000)]
Revert r191049 and r191059. They were causing failures. See PR17975.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196521
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Richard Sandiford [Tue, 3 Dec 2013 11:05:09 +0000 (11:05 +0000)]
Merging r196267:
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r196267 | rsandifo | 2013-12-03 11:01:54 +0000 (Tue, 03 Dec 2013) | 12 lines
[SystemZ] Fix choice of known-zero mask in insertion optimization
The backend converts 64-bit ORs into subreg moves if the upper 32 bits
of one operand and the low 32 bits of the other are known to be zero.
It then tries to peel away redundant ANDs from the upper 32 bits.
Since AND masks are canonicalized to exclude known-zero bits,
the test ORs the mask and the known-zero bits together before
checking for redundancy. The problem was that it was using the
wrong node when checking for known-zero bits, so could drop ANDs
that were still needed.
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Bill Wendling [Tue, 3 Dec 2013 07:38:45 +0000 (07:38 +0000)]
Merging r196153:
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Bill Wendling [Tue, 3 Dec 2013 07:38:30 +0000 (07:38 +0000)]
Merging r196151:
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r196151 | mcrosier | 2013-12-02 13:05:16 -0800 (Mon, 02 Dec 2013) | 2 lines
[AArch64] Implemented vcopy_lane patterns using scalar DUP instruction.
Patch by Ana Pazos!
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Bill Wendling [Mon, 2 Dec 2013 19:24:08 +0000 (19:24 +0000)]
Merging r196104:
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r196104 | rafael | 2013-12-02 06:59:34 -0800 (Mon, 02 Dec 2013) | 1 line
Output .eh_frames on COFF too now that the integrated as is used on mingw.
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Bill Wendling [Mon, 2 Dec 2013 19:21:10 +0000 (19:21 +0000)]
Merging r196069:
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r196069 | alp | 2013-12-01 23:15:33 -0800 (Sun, 01 Dec 2013) | 6 lines
Update the LTO GoldPlugin documentation
* Update build instructions to reflect the current source tree layout.
* Don't inflict CVS on readers; there's a perfectly good git mirror.
* configure with --disable-werror making it possible to build using clang.
* ar and nm-new now support the -plugin option.
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Bill Wendling [Mon, 2 Dec 2013 19:20:45 +0000 (19:20 +0000)]
Merging r196100:
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r196100 | alp | 2013-12-02 06:17:47 -0800 (Mon, 02 Dec 2013) | 4 lines
Cut the gold plugin README down to size
This file hasn't been updated in years. Remove old information and point to
the current documentation at GoldPlugin.rst.
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Bill Wendling [Mon, 2 Dec 2013 19:18:50 +0000 (19:18 +0000)]
Merging r195912:
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r195912 | whitequark | 2013-11-28 01:03:28 -0800 (Thu, 28 Nov 2013) | 1 line
[OCaml] Add a slash accidentally omitted from Makefile
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Bill Wendling [Mon, 2 Dec 2013 19:14:12 +0000 (19:14 +0000)]
Merging r196129:
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r196129 | kkhoo | 2013-12-02 10:43:59 -0800 (Mon, 02 Dec 2013) | 1 line
Conservative fix for PR17827 - don't optimize a shift + and + compare sequence where the shift is logical unless the comparison is unsigned
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Bill Wendling [Mon, 2 Dec 2013 07:38:06 +0000 (07:38 +0000)]
Merging r196046:
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r196046 | tnorthover | 2013-12-01 06:16:24 -0800 (Sun, 01 Dec 2013) | 8 lines
ARM: fix bug in -Oz stack adjustment folding
Previously, we clobbered callee-saved registers when folding an "add
sp, #N" into a "pop {rD, ...}" instruction. This change checks whether
a register we're going to add to the "pop" could actually be live
outside the function before doing so and should fix the issue.
This should fix PR18081.
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Bill Wendling [Mon, 2 Dec 2013 07:37:46 +0000 (07:37 +0000)]
Merging r195401:
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r195401 | lhames | 2013-11-21 16:46:32 -0800 (Thu, 21 Nov 2013) | 8 lines
Fix a typo where we were creating <def,kill> operands instead of
<def,dead> ones.
Add an assertion to make sure we catch this in the future.
Fixes <rdar://problem/
15464559>.
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Bill Wendling [Mon, 2 Dec 2013 07:35:19 +0000 (07:35 +0000)]
Merging r196045:
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Bill Wendling [Mon, 2 Dec 2013 07:35:04 +0000 (07:35 +0000)]
Merging r196044:
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r196044 | d0k | 2013-12-01 03:47:42 -0800 (Sun, 01 Dec 2013) | 6 lines
Revamp error checking in the ms inline asm parser.
- Actually abort when an error occurred.
- Check that the frontend lookup worked when parsing length/size/type operators.
Tested by a clang test. PR18096.
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Daniel Sanders [Sun, 1 Dec 2013 15:54:07 +0000 (15:54 +0000)]
Merged r195973:
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r195973 | dsanders | 2013-11-30 13:47:57 +0000 (Sat, 30 Nov 2013) | 5 lines
[mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex.
This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s
when the stack frame is between 512 and 32,768 bytes in size.
------------------------------------------------------------------------
Review of this commit by Matheus Almeida revealed that it is still possible to
emit invalid code (when the offset is not a multiple of the element size).
However, we agreed that this commit still represents an improvement since it
fixes many cases that previously emitted invalid code, and does not cause any
cases that previously emitted valid code to emit invalid code.
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Daniel Sanders [Sun, 1 Dec 2013 15:09:25 +0000 (15:09 +0000)]
Merged r195972:
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r195972 | dsanders | 2013-11-30 13:15:21 +0000 (Sat, 30 Nov 2013) | 5 lines
[mips][msa] A small refactor to reduce patch noise in my next commit
No functional change. An if-statement has been split into two nested if-statements.
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Daniel Sanders [Sun, 1 Dec 2013 10:45:26 +0000 (10:45 +0000)]
Merged from r195975 and r195976.
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r195975 | zjovanovic | 2013-11-30 19:12:28 +0000 (Sat, 30 Nov 2013) | 1 line
Fixed issue with microMIPS long branch.
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r195976 | zjovanovic | 2013-11-30 19:13:15 +0000 (Sat, 30 Nov 2013) | 1 line
Test case for issue with microMIPS long branch.
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To expand on those commit messages:
The immediate in a MIPS branch is multiplied by the instruction size before use
as an offset. For many MIPS ISA's this is 4 bytes, but for microMIPS it is 2
bytes. This commit corrects the scale factor used for microMIPS so that attempts
to use large offsets result in a valid sequence of instructions.
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Bill Wendling [Sun, 1 Dec 2013 04:40:32 +0000 (04:40 +0000)]
--- Reverse-merging r195823 into '.':
U lib/MC/MCSectionCOFF.cpp
U lib/CodeGen/TargetLoweringObjectFileImpl.cpp
U test/MC/COFF/weak-symbol.ll
U test/MC/COFF/tricky-names.ll
G .
--- Recording mergeinfo for reverse merge of r195823 into '.':
G .
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Bill Wendling [Sun, 1 Dec 2013 04:39:02 +0000 (04:39 +0000)]
Merging r195943:
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Bill Wendling [Sun, 1 Dec 2013 04:38:49 +0000 (04:38 +0000)]
Merging r195942:
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Bill Wendling [Sun, 1 Dec 2013 04:38:36 +0000 (04:38 +0000)]
Merging r195941:
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r195941 | haoliu | 2013-11-28 18:11:22 -0800 (Thu, 28 Nov 2013) | 4 lines
AArch64: The pattern match should check the range of the immediate value.
Or we can generate some illegal instructions.
E.g. shrn2 v0.4s, v1.2d, #35. The legal range should be in [1, 16].
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Bill Wendling [Sun, 1 Dec 2013 04:38:19 +0000 (04:38 +0000)]
Merging r195940:
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Bill Wendling [Sun, 1 Dec 2013 04:38:07 +0000 (04:38 +0000)]
Merging r195939:
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r195939 | jiangning | 2013-11-28 17:38:08 -0800 (Thu, 28 Nov 2013) | 2 lines
Add missing test case for bsl_f64 support of AArch64 NEON.
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Bill Wendling [Sun, 1 Dec 2013 04:37:52 +0000 (04:37 +0000)]
Merging r195938:
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r195938 | jiangning | 2013-11-28 17:37:15 -0800 (Thu, 28 Nov 2013) | 3 lines
Add missing pattern for supporting intrinsic function vbsl_f64 with
argument double floating point.
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Bill Wendling [Sun, 1 Dec 2013 04:37:38 +0000 (04:37 +0000)]
Merging r195937:
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Bill Wendling [Sun, 1 Dec 2013 04:37:25 +0000 (04:37 +0000)]
Merging r195936:
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r195936 | kevinqin | 2013-11-28 17:29:16 -0800 (Thu, 28 Nov 2013) | 1 line
[AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction.
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Bill Wendling [Sun, 1 Dec 2013 04:37:07 +0000 (04:37 +0000)]
Merging r195932:
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r195932 | d0k | 2013-11-28 11:58:56 -0800 (Thu, 28 Nov 2013) | 3 lines
Silence sign-compare warning and reduce nesting.
No functionality change.
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Bill Wendling [Sun, 1 Dec 2013 04:36:53 +0000 (04:36 +0000)]
Merging r195905:
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r195905 | jiangning | 2013-11-27 17:34:55 -0800 (Wed, 27 Nov 2013) | 3 lines
Remove the variable only used by assert to avoid the build failure
caused by build options [-Werror,-Wunused-variable].
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Bill Wendling [Sun, 1 Dec 2013 04:36:39 +0000 (04:36 +0000)]
Merging r195903:
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r195903 | haoliu | 2013-11-27 17:07:45 -0800 (Wed, 27 Nov 2013) | 2 lines
AArch64: Fix a bug about disassembling post-index load single element to 4 vectors
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Bill Wendling [Sun, 1 Dec 2013 04:36:22 +0000 (04:36 +0000)]
Merging r195844:
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Bill Wendling [Sun, 1 Dec 2013 03:36:55 +0000 (03:36 +0000)]
Merging r196004:
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r196004 | void | 2013-11-30 19:36:07 -0800 (Sat, 30 Nov 2013) | 3 lines
Use 'unsigned char' to get this past gcc error message:
error: invalid conversion from 'unsigned char' to '{anonymous}::Sequence'
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Bill Wendling [Sun, 1 Dec 2013 03:30:51 +0000 (03:30 +0000)]
Merging r195590:
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r195590 | chapuni | 2013-11-24 16:52:46 -0800 (Sun, 24 Nov 2013) | 1 line
SparcFrameLowering.cpp: Prune 'DL' [-Wunused-variable]
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Bill Wendling [Sun, 1 Dec 2013 03:20:44 +0000 (03:20 +0000)]
Merging r195915:
------------------------------------------------------------------------
r195915 | dsanders | 2013-11-28 01:36:44 -0800 (Thu, 28 Nov 2013) | 2 lines
As myself as code-owner of the MIPS backend (lib/Target/Mips/*)
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Bill Wendling [Sun, 1 Dec 2013 03:19:10 +0000 (03:19 +0000)]
Merging r195677:
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r195677 | dpeixott | 2013-11-25 11:11:13 -0800 (Mon, 25 Nov 2013) | 41 lines
ARM integrated assembler generates incorrect nop opcode
This patch fixes a bug in the assembler that was causing bad code to
be emitted. When switching modes in an assembly file (e.g. arm to
thumb mode) we would always emit the opcode from the original mode.
Consider this small example:
$ cat align.s
.code 16
foo:
add r0, r0
.align 3
add r0, r0
$ llvm-mc -triple armv7-none-linux align.s -filetype=obj -o t.o
$ llvm-objdump -triple thumbv7 -d t.o
Disassembly of section .text:
foo:
0: 00 44 add r0, r0
2: 00 f0 20 e3 blx #
4195904
6: 00 00 movs r0, r0
8: 00 44 add r0, r0
This shows that we have actually emitted an arm nop (
e320f000)
instead of a thumb nop. Unfortunately, this encodes to a thumb
branch which causes bad things to happen when compiling assembly
code with align directives.
The fix is to notify the ARMAsmBackend when we switch mode. The
MCMachOStreamer was already doing this correctly. This patch makes
the same change for the MCElfStreamer.
There is still a bug in the way nops are emitted for alignment
because the MCAlignment fragment does not store the correct mode.
The ARMAsmBackend will emit nops for the last mode it knew about. In
the example above, we still generate an arm nop if we add a `.code
32` to the end of the file.
PR18019
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Bill Wendling [Sun, 1 Dec 2013 03:15:22 +0000 (03:15 +0000)]
Merging r195881:
------------------------------------------------------------------------
r195881 | tstellar | 2013-11-27 13:23:39 -0800 (Wed, 27 Nov 2013) | 3 lines
R600: Expand vector FABS
NOTE: This is a candidate for the 3.4 branch.
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Bill Wendling [Sun, 1 Dec 2013 03:14:50 +0000 (03:14 +0000)]
Merging r195879:
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r195879 | tstellar | 2013-11-27 13:23:29 -0800 (Wed, 27 Nov 2013) | 6 lines
R600/SI: Use SGPR_32 register class for 32-bit SMRD outputs
Writing to the M0 register from an SMRD instruction hangs the GPU, so
we need to use the SGPR_32 register class, which does not include M0.
NOTE: This is a candidate for the 3.4 branch.
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Bill Wendling [Sun, 1 Dec 2013 03:13:21 +0000 (03:13 +0000)]
Merging r195878:
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r195878 | tstellar | 2013-11-27 13:23:20 -0800 (Wed, 27 Nov 2013) | 3 lines
R600: Add support for ISD::FROUND
NOTE: This is a candidate for the 3.4 branch.
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Bill Wendling [Sun, 1 Dec 2013 03:11:03 +0000 (03:11 +0000)]
Merging r195843:
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r195843 | jiangning | 2013-11-27 06:02:25 -0800 (Wed, 27 Nov 2013) | 2 lines
Fix the AArch64 NEON bug exposed by checking constant integer argument range of ACLE intrinsics.
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Bill Wendling [Sun, 1 Dec 2013 03:07:11 +0000 (03:07 +0000)]
Merging r195812:
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r195812 | silvas | 2013-11-26 20:55:23 -0800 (Tue, 26 Nov 2013) | 3 lines
[docs] Mention gotcha regarding implicit BB numbering
Impetus for the clarification by Mikael Lyngvig.
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Bill Wendling [Sun, 1 Dec 2013 03:06:07 +0000 (03:06 +0000)]
Merging r195803:
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r195803 | mcrosier | 2013-11-26 17:45:58 -0800 (Tue, 26 Nov 2013) | 1 line
[AArch64] Add support for NEON scalar floating-point absolute difference.
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Bill Wendling [Sun, 1 Dec 2013 03:05:13 +0000 (03:05 +0000)]
Merging r195788:
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r195788 | mcrosier | 2013-11-26 14:17:37 -0800 (Tue, 26 Nov 2013) | 2 lines
[AArch64] Add support for NEON scalar floating-point to integer convert
instructions.
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Bill Wendling [Sun, 1 Dec 2013 03:03:42 +0000 (03:03 +0000)]
Merging r195787:
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r195787 | arnolds | 2013-11-26 14:11:23 -0800 (Tue, 26 Nov 2013) | 8 lines
LoopVectorizer: Truncate i64 trip counts of i32 phis if necessary
In signed arithmetic we could end up with an i64 trip count for an i32 phi.
Because it is signed arithmetic we know that this is only defined if the i32
does not wrap. It is therefore safe to truncate the i64 trip count to a i32
value.
Fixes PR18049.
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Bill Wendling [Sun, 1 Dec 2013 02:09:07 +0000 (02:09 +0000)]
Merging r195887:
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Bill Wendling [Sun, 1 Dec 2013 02:05:46 +0000 (02:05 +0000)]
Merging r195827:
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Bill Wendling [Wed, 27 Nov 2013 22:07:35 +0000 (22:07 +0000)]
Add blurb about PNaCl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195885
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Bill Wendling [Wed, 27 Nov 2013 19:51:24 +0000 (19:51 +0000)]
Merging r195834:
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r195834 | whitequark | 2013-11-27 03:03:18 -0800 (Wed, 27 Nov 2013) | 11 lines
[OCaml] Embed rpath into stub libraries and native executables
This commit embeds a set of linker flags with hardcoded paths to
the LLVM shared library on --enable-shared builds into .cmxa files
and stub dynamic libraries. This solution closely follows existing
rules for rpath in the LLVM tools, which had to be modified because
of differences in toolchain.
Without this patch, OCaml tests as well as opam bindings broke,
as neither of those updates LD_LIBRARY_PATH to include
the $prefix/lib directory.
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Bill Wendling [Wed, 27 Nov 2013 19:42:48 +0000 (19:42 +0000)]
Merging r195782:
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r195782 | whitequark | 2013-11-26 12:40:34 -0800 (Tue, 26 Nov 2013) | 1 line
[OCaml] Embed the flags necessary for linking with libLLVM.so into .cmxa files
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Bill Wendling [Wed, 27 Nov 2013 19:40:37 +0000 (19:40 +0000)]
Merging r195576:
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r195576 | venkatra | 2013-11-24 12:23:25 -0800 (Sun, 24 Nov 2013) | 2 lines
[Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of sethi+or. This generates correct code for both sparc32 and sparc64.
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Bill Wendling [Wed, 27 Nov 2013 19:40:19 +0000 (19:40 +0000)]
Merging r195575:
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r195575 | venkatra | 2013-11-24 12:07:35 -0800 (Sun, 24 Nov 2013) | 2 lines
[Sparc]: Implement LEA pattern for sparcv9.
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Bill Wendling [Wed, 27 Nov 2013 19:40:05 +0000 (19:40 +0000)]
Merging r195574:
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r195574 | venkatra | 2013-11-24 10:41:49 -0800 (Sun, 24 Nov 2013) | 2 lines
[SparcV9]: Do not emit .register directives for global registers that are clobbered by calls but not used in the function itself.
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Bill Wendling [Wed, 27 Nov 2013 19:39:49 +0000 (19:39 +0000)]
Merging r195573:
------------------------------------------------------------------------
r195573 | venkatra | 2013-11-24 09:41:41 -0800 (Sun, 24 Nov 2013) | 2 lines
[SparcV9] Enable custom lowering of DYNAMIC_STACKALLOC in sparc64.
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Bill Wendling [Wed, 27 Nov 2013 06:44:45 +0000 (06:44 +0000)]
Merging r195798:
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r195798 | rafael | 2013-11-26 17:18:37 -0800 (Tue, 26 Nov 2013) | 9 lines
Use simple section names for COMDAT sections on COFF.
With this patch we use simple names for COMDAT sections (like .text or .bss).
This matches the MSVC behavior.
When merging it is the COMDAT symbol that is used to decide if two sections
should be merged, so there is no point in building a fancy name.
This survived a bootstrap on mingw32.
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Bill Wendling [Wed, 27 Nov 2013 06:44:18 +0000 (06:44 +0000)]
Merging r195148:
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r195148 | rafael | 2013-11-19 11:52:52 -0800 (Tue, 19 Nov 2013) | 15 lines
Support multiple COFF sections with the same name but different COMDAT.
This is the first step to fix pr17918.
It extends the .section directive a bit, inspired by what the ELF one looks
like. The problem with using linkonce is that given
.section foo
.linkonce....
.section foo
.linkonce
we would already have switched sections when getting to .linkonce. The cleanest
solution seems to be to add the comdat information in the .section itself.
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Bill Wendling [Wed, 27 Nov 2013 06:36:20 +0000 (06:36 +0000)]
Merging r195779:
------------------------------------------------------------------------
r195779 | hliao | 2013-11-26 12:31:31 -0800 (Tue, 26 Nov 2013) | 7 lines
Fix PR18054
- Fix bug in (vsext (vzext x)) -> (vsext x) in SIGN_EXTEND_IN_REG
lowering where we need to check whether x is a vector type (in-reg
type) of i8, i16 or i32; otherwise, that optimization is not valid.
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Bill Wendling [Wed, 27 Nov 2013 05:35:16 +0000 (05:35 +0000)]
Merging r195791:
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r195791 | nadav | 2013-11-26 14:24:25 -0800 (Tue, 26 Nov 2013) | 4 lines
PR1860 - We can't save a list of ExtractElement instructions to CSE because some of these instructions
may be removed and optimized in future iterations. Instead we save a list of basic blocks that we need to CSE.
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Bill Wendling [Wed, 27 Nov 2013 05:34:53 +0000 (05:34 +0000)]
Merging r195773:
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r195773 | nadav | 2013-11-26 09:29:19 -0800 (Tue, 26 Nov 2013) | 6 lines
PR18060 - When we RAUW values with ExtractElement instructions in some cases
we generate PHI nodes with multiple entries from the same basic block but
with different values. Enabling CSE on ExtractElement instructions make sure
that all of the RAUWed instructions are the same.
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Bill Wendling [Wed, 27 Nov 2013 04:52:57 +0000 (04:52 +0000)]
Merging r195769:
------------------------------------------------------------------------
r195769 | dyatkovskiy | 2013-11-26 08:11:03 -0800 (Tue, 26 Nov 2013) | 27 lines
PR17925 bugfix.
Short description.
This issue is about case of treating pointers as integers.
We treat pointers as different if they references different address space.
At the same time, we treat pointers equal to integers (with machine address
width). It was a point of false-positive. Consider next case on 32bit machine:
void foo0(i32 addrespace(1)* %p)
void foo1(i32 addrespace(2)* %p)
void foo2(i32 %p)
foo0 != foo1, while
foo1 == foo2 and foo0 == foo2.
As you can see it breaks transitivity. That means that result depends on order
of how functions are presented in module. Next order causes merging of foo0
and foo1: foo2, foo0, foo1
First foo0 will be merged with foo2, foo0 will be erased. Second foo1 will be
merged with foo2.
Depending on order, things could be merged we don't expect to.
The fix:
Forbid to treat any pointer as integer, except for those, who belong to address space 0.
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Peter Zotov [Tue, 26 Nov 2013 21:12:53 +0000 (21:12 +0000)]
Add a release note about OCaml bindings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195786
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Bill Wendling [Tue, 26 Nov 2013 13:35:26 +0000 (13:35 +0000)]
Merging r195424:
------------------------------------------------------------------------
r195424 | haoliu | 2013-11-22 00:47:22 -0800 (Fri, 22 Nov 2013) | 4 lines
Fix the bugs about AArch64 Load/Store vector types and bitcast between i64 and vector types.
e.g. "%tmp = load <2 x i64>* %ptr" can't be selected.
"%tmp = bitcast i64 %in to <2 x i32>" can't be selected.
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Bill Wendling [Tue, 26 Nov 2013 13:34:03 +0000 (13:34 +0000)]
Merging r195408:
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r195408 | jiangning | 2013-11-21 18:45:13 -0800 (Thu, 21 Nov 2013) | 2 lines
For AArch64 back-end instruction selection, lower Neon_Lowxxx with EXTRCT_SUBREG.
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Bill Wendling [Tue, 26 Nov 2013 12:29:45 +0000 (12:29 +0000)]
Merging r195713:
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r195713 | kevinqin | 2013-11-25 18:33:42 -0800 (Mon, 25 Nov 2013) | 1 line
[AArch64]Implement 128 bit register copy with NEON.
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Bill Wendling [Tue, 26 Nov 2013 11:20:48 +0000 (11:20 +0000)]
Merging r195684:
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r195684 | rafael | 2013-11-25 12:50:03 -0800 (Mon, 25 Nov 2013) | 3 lines
Do the string comparison in the constructor instead of once per nop.
Thanks to Roman Divacky for the suggestion.
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Bill Wendling [Tue, 26 Nov 2013 11:20:21 +0000 (11:20 +0000)]
Merging r195682:
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r195682 | rafael | 2013-11-25 12:46:18 -0800 (Mon, 25 Nov 2013) | 1 line
Use -triple to fix the test on non-ELF hosts.
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Bill Wendling [Tue, 26 Nov 2013 11:17:57 +0000 (11:17 +0000)]
Merging r195469:
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r195469 | dsanders | 2013-11-22 07:47:18 -0800 (Fri, 22 Nov 2013) | 4 lines
[mips][msa] Add test case that should have been added in r195456.
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Bill Wendling [Tue, 26 Nov 2013 11:17:43 +0000 (11:17 +0000)]
Merging r195456:
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r195456 | dsanders | 2013-11-22 05:22:52 -0800 (Fri, 22 Nov 2013) | 4 lines
Fix typo in a comment added in r195455.
Credit to Matheus Almeida for spotting it.
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Bill Wendling [Tue, 26 Nov 2013 11:16:52 +0000 (11:16 +0000)]
Merging r195444:
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r195444 | dsanders | 2013-11-22 03:24:50 -0800 (Fri, 22 Nov 2013) | 4 lines
[mips][msa] Float vector constants cannot use ldi.[wd] directly. Bitcast from the appropriate integer vector type.
Fixes an instruction selection failure detected by llvm-stress.
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Bill Wendling [Tue, 26 Nov 2013 11:16:34 +0000 (11:16 +0000)]
Merging r195364:
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r195364 | dsanders | 2013-11-21 08:11:31 -0800 (Thu, 21 Nov 2013) | 12 lines
[mips][msa] Fix a corner case in performORCombine() when combining nodes into VSELECT.
Mask == ~InvMask asserts if the width of Mask and InvMask differ.
The combine isn't valid (with two exceptions, see below) if the widths differ
so test for this before testing Mask == ~InvMask.
In the specific cases of Mask=~0 and InvMask=0, as well as Mask=0 and
InvMask=~0, the combine is still valid. However, there are more appropriate
combines that could be used in these cases such as folding x & 0 to 0, or
x & ~0 to x.
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Bill Wendling [Tue, 26 Nov 2013 11:16:17 +0000 (11:16 +0000)]
Merging r195343:
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r195343 | dsanders | 2013-11-21 03:40:14 -0800 (Thu, 21 Nov 2013) | 5 lines
[mips][msa/dsp] Only do DSP combines if DSP is enabled.
Fixes a crash (null pointer dereferenced) when MSA is enabled.
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Bill Wendling [Tue, 26 Nov 2013 11:09:08 +0000 (11:09 +0000)]
Merging r195632:
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r195632 | tnorthover | 2013-11-25 01:52:59 -0800 (Mon, 25 Nov 2013) | 3 lines
X86: enable AVX2 under Haswell native compilation
Patch by Adam Strzelecki
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Richard Sandiford [Tue, 26 Nov 2013 10:58:52 +0000 (10:58 +0000)]
Merging r195731:
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r195731 | rsandifo | 2013-11-26 10:53:16 +0000 (Tue, 26 Nov 2013) | 7 lines
[SystemZ] Fix incorrect use of RISBG for a zero-extended right shift
We would wrongly transform the testcase into the equivalent of an AND with 1.
The problem was that, when testing whether the shifted-in bits of the right
shift were significant, we used the width of the final zero-extended result
rather than the width of the shifted value.
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Bill Wendling [Tue, 26 Nov 2013 10:57:43 +0000 (10:57 +0000)]
Merging r195716:
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r195716 | kevinqin | 2013-11-25 19:26:47 -0800 (Mon, 25 Nov 2013) | 3 lines
Refactored the implementation of AArch64 NEON instruction ZIP, UZP
and TRN.
Fix a bug when mixed use of vget_high_u8() and vuzp_u8().
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Bill Wendling [Tue, 26 Nov 2013 10:46:15 +0000 (10:46 +0000)]
Merging r195679:
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r195679 | rafael | 2013-11-25 12:15:14 -0800 (Mon, 25 Nov 2013) | 12 lines
Don't use nopl in cpus that don't support it.
Patch by Mikulas Patocka. I added the test. I checked that for cpu names that
gas knows about, it also doesn't generate nopl.
The modified cpus:
i686 - there are i686-class CPUs that don't have nopl: Via c3, Transmeta
Crusoe, Microsoft VirtualBox - see
https://bbs.archlinux.org/viewtopic.php?pid=775414
k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs
via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that
Via c3 and c3-Nehemiah don't have nopl
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Bill Wendling [Mon, 25 Nov 2013 18:34:26 +0000 (18:34 +0000)]
Merging r195379:
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r195379 | hans | 2013-11-21 14:47:21 -0800 (Thu, 21 Nov 2013) | 7 lines
CMake: Some changes to package version names:
- Allow overriding PACKAGE_VERSION from the command-line
- Use PACKAGE_VERSION to set CPACK_PACKAGE_VERSION (used by the Win installer)
- Don't include the version number in the CPack install dir or registry key.
Differential revision: http://llvm-reviews.chandlerc.com/D2245
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Bill Wendling [Mon, 25 Nov 2013 18:08:07 +0000 (18:08 +0000)]
Merging r195670:
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r195670 | void | 2013-11-25 10:05:22 -0800 (Mon, 25 Nov 2013) | 5 lines
Unrevert r195599 with testcase fix.
I'm not sure how it was checking for the wrong values...
PR18023.
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Bill Wendling [Mon, 25 Nov 2013 18:07:39 +0000 (18:07 +0000)]
Merging r195636:
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r195636 | aemerson | 2013-11-25 03:24:18 -0800 (Mon, 25 Nov 2013) | 2 lines
Revert r195599 as it broke the builds.
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Daniel Sanders [Mon, 25 Nov 2013 15:53:39 +0000 (15:53 +0000)]
Merging r195635:
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r195635 | dsanders | 2013-11-25 11:14:43 +0000 (Mon, 25 Nov 2013) | 19 lines
Fixed tryFoldToZero() for vector types that need expansion.
Summary:
Moved the requirement for SelectionDAG::getConstant() to return legally
typed nodes slightly earlier. There were two optional DAGCombine passes
that were missed out and were required to produce type-legal DAGs.
Simplified a code-path in tryFoldToZero() to use SelectionDAG::getConstant().
This provides support for both promoted and expanded vector types whereas the
previous code only supported promoted vector types.
Fixes a "Type for zero vector elements is not legal" assertion detected by
an llvm-stress generated test.
Reviewers: resistor
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D2251
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Pekka Jaaskelainen [Mon, 25 Nov 2013 12:06:04 +0000 (12:06 +0000)]
Added our Clang/LLVM using projects (pocl and TCE) to the
external projects using LLVM. Ordered the list alphabetically.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195639
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Bill Wendling [Mon, 25 Nov 2013 07:41:12 +0000 (07:41 +0000)]
Merging r195136:
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Bill Wendling [Mon, 25 Nov 2013 06:23:37 +0000 (06:23 +0000)]
Merging r195591:
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r195591 | haoliu | 2013-11-24 17:53:26 -0800 (Sun, 24 Nov 2013) | 5 lines
Fixed a bug about disassembling AArch64 post-index load/store single element instructions.
ie. echo "0x00 0x04 0x80 0x0d" | ../bin/llvm-mc -triple=aarch64 -mattr=+neon -disassemble
echo "0x00 0x00 0x80 0x0d" | ../bin/llvm-mc -triple=aarch64 -mattr=+neon -disassemble
will be disassembled into the same instruction st1 {v0b}[0], [x0], x0.
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Bill Wendling [Mon, 25 Nov 2013 05:43:13 +0000 (05:43 +0000)]
Merging r195547:
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195616
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