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8 years agoRevert "Add LLVMGetAttrKindIDInContext in the C API in order to facilitate migration...
Amaury Sechet [Wed, 13 Apr 2016 23:01:39 +0000 (23:01 +0000)]
Revert "Add LLVMGetAttrKindIDInContext in the C API in order to facilitate migration away from LLVMAttribute"

This reverts commit 0bcfd95c268bcb180a525e1837e84475df8acdc7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266259 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoValueMapper: Resolve cycles on the new nodes
Duncan P. N. Exon Smith [Wed, 13 Apr 2016 22:54:01 +0000 (22:54 +0000)]
ValueMapper: Resolve cycles on the new nodes

Fix a major bug from r265456.  Although it's now much rarer, ValueMapper
sometimes has to duplicate cycles.  The
might-transitively-reference-a-temporary counts don't decrement on their
own when there are cycles, and you need to call MDNode::resolveCycles to
fix it.

r265456 was checking the input nodes to see if they were unresolved.
This is useless; they should never be unresolved.  Instead we should
check the output nodes and resolve cycles on them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266258 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd LLVMGetAttrKindIDInContext in the C API in order to facilitate migration away...
Amaury Sechet [Wed, 13 Apr 2016 22:51:40 +0000 (22:51 +0000)]
Add LLVMGetAttrKindIDInContext in the C API in order to facilitate migration away from LLVMAttribute

Summary: LLVMAttribute has outlived its utility and is becoming a problem for C API users that what to use all the LLVM attributes. In order to help moving away from LLVMAttribute in a smooth manner, this diff introduce LLVMGetAttrKindIDInContext, which can be used instead of the enum values.

Reviewers: Wallbraker, whitequark, joker.eph, echristo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18749

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266257 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IR] Optimize memory usage of Metadata on MSVC
Reid Kleckner [Wed, 13 Apr 2016 22:46:06 +0000 (22:46 +0000)]
[IR] Optimize memory usage of Metadata on MSVC

An unsigned 2 bit bitfield takes 4 bytes in MSVC. Instead of a bitfield,
just use an unsigned char. We can go back to a bitfield when someone
implements the TODO of exposing and reusing the remaining 6 bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266256 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-lto] Uniform error handling. NFC.
Davide Italiano [Wed, 13 Apr 2016 22:08:26 +0000 (22:08 +0000)]
[llvm-lto] Uniform error handling. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266255 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoARM: Use a callee save register for the swiftself parameter.
Matthias Braun [Wed, 13 Apr 2016 21:43:25 +0000 (21:43 +0000)]
ARM: Use a callee save register for the swiftself parameter.

It is very likely that the swiftself parameter is alive throughout most
functions function so putting it into a callee save register should
avoid spills for the callers with only a minimum amount of extra spills
in the callees.

Currently the generated code is correct but unnecessarily spills and
reloads arguments passed in callee save registers, I will address this
in upcoming patches.

This also adds a missing check that for tail calls the preserved value
of the caller must be the same as the callees parameter.

Differential Revision: http://reviews.llvm.org/D18901

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266253 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoX86: Use a callee save register for the swiftself parameter.
Matthias Braun [Wed, 13 Apr 2016 21:43:21 +0000 (21:43 +0000)]
X86: Use a callee save register for the swiftself parameter.

It is very likely that the swiftself parameter is alive throughout most
functions function so putting it into a callee save register should
avoid spills for the callers with only a minimum amount of extra spills
in the callees.

Currently the generated code is correct but unnecessarily spills and
reloads arguments passed in callee save registers, I will address this
in upcoming patches.

This also adds a missing check that for tail calls the preserved value
of the caller must be the same as the callees parameter.

Differential Revision: http://reviews.llvm.org/D18902

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266252 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAArch64: Use a callee save registers for swiftself parameters
Matthias Braun [Wed, 13 Apr 2016 21:43:16 +0000 (21:43 +0000)]
AArch64: Use a callee save registers for swiftself parameters

It is very likely that the swiftself parameter is alive throughout most
functions function so putting it into a callee save register should
avoid spills for the callers with only a minimum amount of extra spills
in the callees.

Currently the generated code is correct but unnecessarily spills and
reloads arguments passed in callee save registers, I will address this
in upcoming patches.

This also adds a missing check that for tail calls the preserved value
of the caller must be the same as the callees parameter.

Differential Revision: http://reviews.llvm.org/D19007

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266251 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-lto] clang-format before working on this file.
Davide Italiano [Wed, 13 Apr 2016 21:41:35 +0000 (21:41 +0000)]
[llvm-lto] clang-format before working on this file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266250 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoReturn immediately from analyzeCall if analyzeBlock returns false.
Easwaran Raman [Wed, 13 Apr 2016 21:20:22 +0000 (21:20 +0000)]
Return immediately from analyzeCall if analyzeBlock returns false.

This is part of the patch reviewed at http://reviews.llvm.org/D17584

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266249 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoStart to add real error messages for malformed Mach-O files.
Kevin Enderby [Wed, 13 Apr 2016 21:17:58 +0000 (21:17 +0000)]
Start to add real error messages for malformed Mach-O files.
And update the existing test cases in test/Object/macho-invalid.test
to use llvm-objdump with the -macho option to produce these
error messages and stop producing the generic "Invalid data
was encountered while parsing the file" message.

Working from the beginning of the file, if the mach header is too large for
the size of the file and then if the load commands that follow extend past
the end of the file these two errors now generate correct error messages.

Both of these have existing test cases in test/Object/macho-invalid.test .

But the first with macho-invalid-header it will never trigger the error message
"mach header extends past the end of the file" using any of the llvm tools as
they all use identify_magic() which rejects files with the correct magic number
that are too small in size.  So I tested this by hacking that code and seeing the
error message down in parseHeader() really does happen.  So in case there
is ever code in llvm that directly calls createMachOObjectFile() this error
message will be correctly produced.

The second error message of "load commands extends past the end of the file"
is triggered by a number of existing tests cases in test/Object/macho-invalid.test .
Also other tests trigger different error messages now like "ilocalsym plus
nlocalsym in LC_DYSYMTAB load command extends past the end of the
symbol table".

There are two existing test cases that still get the "Invalid data was encountered ..."
error messages that I will tackle next.  But they will involve a bit of pluming an
Expect<...> up through the call stack and I want to do those as separate changes.

FYI, for those test cases that were trying to test specific errors that now get
different errors I’ll fix those in follow on changes and create new test cases
for those so they test the error they were meant to test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266248 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoNFC mergefunc: const correctness
JF Bastien [Wed, 13 Apr 2016 21:12:21 +0000 (21:12 +0000)]
NFC mergefunc: const correctness

Some of the comparators were const others weren't making it annoying to add new comparators which call existing ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266247 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/SI: Add support for spilling VGPRs without having to scavenge registers
Tom Stellard [Wed, 13 Apr 2016 20:44:16 +0000 (20:44 +0000)]
AMDGPU/SI: Add support for spilling VGPRs without having to scavenge registers

Summary:
When we are spilling SGPRs to scratch memory, we usually don't have
free SGPRs to do the address calculation, so we need to re-use the
ScratchOffset register for the calculation.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18917

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266244 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] add tests to show potential BMI optimization
Sanjay Patel [Wed, 13 Apr 2016 20:40:43 +0000 (20:40 +0000)]
[x86] add tests to show potential BMI optimization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266243 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DebugInfo] Optimize memory layout of DISubprogram.
Davide Italiano [Wed, 13 Apr 2016 20:17:42 +0000 (20:17 +0000)]
[DebugInfo] Optimize memory layout of DISubprogram.

A DISubprogram on x86_64 was 48 bytes. During an LTO build we
end up allocating *a lot* of these (see Duncan's numbers on
llvm-dev and/or my numbers in the review link).
This change reduces the size to 40 bytes, with a nice effect
on peak memory usage when LTO'ing clang.
There are more classes in the hierarchy which can be compacted
so more patches will come. DISubprogram was the biggest offender
in my profiling, anyway.

Differential Revision:  http://reviews.llvm.org/D18918

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266241 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAsmParser: record "# line file" context to calculate location for diag
Tim Northover [Wed, 13 Apr 2016 19:46:54 +0000 (19:46 +0000)]
AsmParser: record "# line file" context to calculate location for diag

Since we can't emit diagnostics for missing "jmp 1f" labels until the end of
the file, we need to be able to restore the context used to calculate
file/line. This is basically the "# line file" directive that's being used at
the time the expression is seen.

rdar://25706972

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266238 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTest case for r265852.
Easwaran Raman [Wed, 13 Apr 2016 19:43:31 +0000 (19:43 +0000)]
Test case for r265852.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266237 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLibDriver: Silently do nothing when provided no inputs.
Peter Collingbourne [Wed, 13 Apr 2016 19:36:04 +0000 (19:36 +0000)]
LibDriver: Silently do nothing when provided no inputs.

This behavior is strange, but it matches lib.exe. Based on a patch by
Nico Weber.

Fixes PR27335.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266236 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PGO] Remove redundant VP instrumentation
Betul Buyukkurt [Wed, 13 Apr 2016 18:52:19 +0000 (18:52 +0000)]
[PGO] Remove redundant VP instrumentation

LLVM optimization passes may reduce a profiled target expression
to a constant. Removing runtime calls at such instrumentation points
would help speedup the runtime of the instrumented program.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266229 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PowerPC] Basic support for P9 byte comparison and count trailing zero insns
Nemanja Ivanovic [Wed, 13 Apr 2016 18:51:18 +0000 (18:51 +0000)]
[PowerPC] Basic support for P9 byte comparison and count trailing zero insns

This patch corresponds to review:
http://reviews.llvm.org/D17850

This patch implements the following instructions:
cmprb, cmpeqb, cnttzw, cnttzw., cnttzd, cnttzd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266228 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm-dwp: Add assert text
David Blaikie [Wed, 13 Apr 2016 18:38:33 +0000 (18:38 +0000)]
llvm-dwp: Add assert text

Post-commit feedback from Eric Christopher on r265452.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266225 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Disable LDP/STP for quads
Evandro Menezes [Wed, 13 Apr 2016 18:31:45 +0000 (18:31 +0000)]
[AArch64] Disable LDP/STP for quads

Disable LDP/STP for quads on Exynos M1 as they are not as efficient as pairs
of regular LDR/STR.

Patch by Abderrazek Zaafrani <a.zaafrani@samsung.com>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266223 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "[IR/Verifier] Each DISubprogram with isDefinition: true must belong to a...
Davide Italiano [Wed, 13 Apr 2016 18:08:07 +0000 (18:08 +0000)]
Revert "[IR/Verifier] Each DISubprogram with isDefinition: true must belong to a CU."

This reverts commit r266102. The O(N^2) verifier check causes timeouts
in LTO test suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266221 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IR/DebugInfoMetadata] Simplify array length calculation by using array_lengthof...
David Blaikie [Wed, 13 Apr 2016 17:42:56 +0000 (17:42 +0000)]
[IR/DebugInfoMetadata] Simplify array length calculation by using array_lengthof instead of ArrayRef::size

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266218 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCleanup Store Merging in UseAA case
Nirav Dave [Wed, 13 Apr 2016 17:27:26 +0000 (17:27 +0000)]
Cleanup Store Merging in UseAA case

This patch fixes a bug (PR26827) when using anti-aliasing in store
merging. This sets the chain users of the component stores to point to
the new store instead of the component stores chain parent.

Reviewers: jyknight

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18909

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266217 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSanity check `opt` options compatibility: can't have module-summary or module-hash...
Mehdi Amini [Wed, 13 Apr 2016 17:20:10 +0000 (17:20 +0000)]
Sanity check `opt` options compatibility: can't have module-summary or module-hash when emitting textual IR

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266216 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "Make aliases explicit in the summary"
Mehdi Amini [Wed, 13 Apr 2016 17:20:07 +0000 (17:20 +0000)]
Revert "Make aliases explicit in the summary"

Inadvertently commited...

This reverts commit e618ec93786d99df2ddf280ad2d5e02f5516cecf.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266215 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMake aliases explicit in the summary
Mehdi Amini [Wed, 13 Apr 2016 17:18:42 +0000 (17:18 +0000)]
Make aliases explicit in the summary

Summary:
To be able to work accurately on the reference graph when taking decision
about internalizing, promoting, renaming, etc. We need to have the alias
information explicit.

Reviewers: tejohnson

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18836

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266214 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert inadvertently modified comment in r266131
Mehdi Amini [Wed, 13 Apr 2016 17:06:49 +0000 (17:06 +0000)]
Revert inadvertently modified comment in r266131

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266210 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAArch64: don't create instructions that write to xzr/wzr twice.
Tim Northover [Wed, 13 Apr 2016 16:25:39 +0000 (16:25 +0000)]
AArch64: don't create instructions that write to xzr/wzr twice.

These are unpredictable even on AArch64.

Patch by Yichao Yu.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266206 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AMDGPU][llvm-mc] Support of Trap Handler registers (TTMP0..11 and TBA/TMA)git status
Artem Tamazov [Wed, 13 Apr 2016 16:18:41 +0000 (16:18 +0000)]
[AMDGPU][llvm-mc] Support of Trap Handler registers (TTMP0..11 and TBA/TMA)git status

Tests added along with implemented feature.
Note that there is a small leftover of unecessary MI sheduling issue
(more info in the review). CodeGen/AMDGPU/salu-to-valu.ll updated to fix
the false regression.

TODO: Support for TTMP quads, comma-separated syntax in "[]" and more.

Differential Revision: http://reviews.llvm.org/D17825

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266205 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips] Fix emitAtomicCmpSwapPartword to handle 64 bit pointers correctly
Zoran Jovanovic [Wed, 13 Apr 2016 16:02:25 +0000 (16:02 +0000)]
[mips] Fix emitAtomicCmpSwapPartword to handle 64 bit pointers correctly

Differential Revision: http://reviews.llvm.org/D18995

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266204 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips] Sign-extend i32 values truncated from previously zero-extended i32 values.
Vasileios Kalintiris [Wed, 13 Apr 2016 15:07:45 +0000 (15:07 +0000)]
[mips] Sign-extend i32 values truncated from previously zero-extended i32 values.

Summary:
This is a special case for MIPS64 because the architecture requires
properly 32-bit sign-extended values in the register containers.

Additionaly, we merge consecutive trunc + AssertZExt nodes in order
to avoid unnecessary sign-extensions when the extension comes from a
type smaller than i32.

Reviewers: dsanders

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D18893

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266203 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSimplify strlen to a subtraction for certain cases.
David L Kreitzer [Wed, 13 Apr 2016 14:31:06 +0000 (14:31 +0000)]
Simplify strlen to a subtraction for certain cases.

Patch by Li Huang (li1.huang@intel.com)

Differential Revision: http://reviews.llvm.org/D18230

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266200 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][SSE] Regenerated vector integer absolute tests
Simon Pilgrim [Wed, 13 Apr 2016 12:40:22 +0000 (12:40 +0000)]
[X86][SSE] Regenerated vector integer absolute tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266194 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCalculate __builtin_object_size when pointer depends on a condition
Petar Jovanovic [Wed, 13 Apr 2016 12:25:25 +0000 (12:25 +0000)]
Calculate __builtin_object_size when pointer depends on a condition

This patch fixes calculating of builtin_object_size if it depends on a
condition. Before this patch compiler did not know how to calculate the
object size when it finds a condition that cannot be eliminated.
This patch enables calculating of builtin_object_size even in case when
condition cannot be eliminated by choosing minimum or maximum value as a
result from condition. Choosing minimum or maximum value from condition
is based on the second argument of __builtin_object_size function.

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D18438

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266193 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdded missing autogeneration note
Simon Pilgrim [Wed, 13 Apr 2016 09:28:44 +0000 (09:28 +0000)]
Added missing autogeneration note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266185 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDon't use misc-unused-parameters check on LLVM.
Alexander Kornienko [Wed, 13 Apr 2016 08:58:52 +0000 (08:58 +0000)]
Don't use misc-unused-parameters check on LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266183 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU...
Zlatko Buljan [Wed, 13 Apr 2016 08:02:26 +0000 (08:02 +0000)]
[mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions
Differential Revision: http://reviews.llvm.org/D17137

This patch was reverted after the revertion of dependant patch http://reviews.llvm.org/D17068.
There was the problem with test-suite failure.
The problem is hopefully solved with dependant patch so this patch is commited again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266179 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[InstCombine] We folded an fcmp to an i1 instead of a vector of i1
David Majnemer [Wed, 13 Apr 2016 06:55:52 +0000 (06:55 +0000)]
[InstCombine] We folded an fcmp to an i1 instead of a vector of i1

Remove an ad-hoc transform in InstCombine and replace it with more
general machinery (ValueTracking, InstructionSimplify and VectorUtils).

This fixes PR27332.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266175 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSimplify LTOInternalize into UpdateLLVMCompilerUsed
Mehdi Amini [Wed, 13 Apr 2016 06:32:46 +0000 (06:32 +0000)]
Simplify LTOInternalize into UpdateLLVMCompilerUsed

It is now only doing the update to the llvm.compiler_used global.
The client has to call separately the internalization stage.
Hopefully the code is simpler to understand this way.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266174 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMinor cleanup in Internalize, hide helper class using anonymous namespace (NFC)
Mehdi Amini [Wed, 13 Apr 2016 06:32:29 +0000 (06:32 +0000)]
Minor cleanup in Internalize, hide helper class using anonymous namespace (NFC)

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266173 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLTOInternalize: Use a StringSet instead of a sorted vector and a binary search query...
Mehdi Amini [Wed, 13 Apr 2016 06:32:04 +0000 (06:32 +0000)]
LTOInternalize: Use a StringSet instead of a sorted vector and a binary search query for each function

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266172 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips][microMIPS] Fix for "Cannot copy registers" assertion
Hrvoje Varga [Wed, 13 Apr 2016 06:17:21 +0000 (06:17 +0000)]
[mips][microMIPS] Fix for "Cannot copy registers" assertion
Differential Revision: http://reviews.llvm.org/D17068

This changes contains fix for failing test-suite. So, this patch should hopefully work now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266171 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMove "ExternalSymbols" out of LTOInternalize (NFC)
Mehdi Amini [Wed, 13 Apr 2016 05:36:06 +0000 (05:36 +0000)]
Move "ExternalSymbols" out of LTOInternalize (NFC)

This is not really related to internalization per se.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266170 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoReally return whether Internalize did change the Module or not.
Mehdi Amini [Wed, 13 Apr 2016 05:25:16 +0000 (05:25 +0000)]
Really return whether Internalize did change the Module or not.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266169 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoModernize Internalizer with for-range loop (NFC)
Mehdi Amini [Wed, 13 Apr 2016 05:25:12 +0000 (05:25 +0000)]
Modernize Internalizer with for-range loop (NFC)

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266168 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRefactor the InternalizePass into a helper class, and expose it through a public...
Mehdi Amini [Wed, 13 Apr 2016 05:25:08 +0000 (05:25 +0000)]
Refactor the InternalizePass into a helper class, and expose it through a public free function (NFC)

There is really no reason to require to instanciate a pass manager to
internalize.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266167 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRefactor Internalization pass to use as a callback instead of a StringSet (NFC)
Mehdi Amini [Wed, 13 Apr 2016 04:20:32 +0000 (04:20 +0000)]
Refactor Internalization pass to use as a callback instead of a StringSet (NFC)

This will save a bunch of copies / initialization of intermediate
datastructure, and (hopefully) simplify the code.

This also abstract the symbol preservation mechanism outside of the
Internalization pass into the client code, which is not forced
to keep a map of strings for instance (ThinLTO will prefere hashes).

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266163 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRecommit r265547, and r265610,r265639,r265657 on top of it, plus
Wei Mi [Wed, 13 Apr 2016 03:08:27 +0000 (03:08 +0000)]
Recommit r265547, and r265610,r265639,r265657 on top of it, plus
two fixes with one about error verify-regalloc reported, and
another about live range update of phi after rematerialization.

r265547:
Replace analyzeSiblingValues with new algorithm to fix its compile
time issue. The patch is to solve PR17409 and its duplicates.

analyzeSiblingValues is a N x N complexity algorithm where N is
the number of siblings generated by reg splitting. Although it
causes siginificant compile time issue when N is large, it is also
important for performance since it removes redundent spills and
enables rematerialization.

To solve the compile time issue, the patch removes analyzeSiblingValues
and replaces it with lower cost alternatives containing two parts. The
first part creates a new spill hoisting method in postOptimization of
register allocation. It does spill hoisting at once after all the spills
are generated instead of inside every instance of selectOrSplit. The
second part queries the define expr of the original register for
rematerializaiton and keep it always available during register allocation
even if it is already dead. It deletes those dead instructions only in
postOptimization. With the two parts in the patch, it can remove
analyzeSiblingValues without sacrificing performance.

Patches on top of r265547:
r265610 "Fix the compare-clang diff error introduced by r265547."
r265639 "Fix the sanitizer bootstrap error in r265547."
r265657 "InlineSpiller.cpp: Escap \@ in r265547. [-Wdocumentation]"

Differential Revision: http://reviews.llvm.org/D15302
Differential Revision: http://reviews.llvm.org/D18934
Differential Revision: http://reviews.llvm.org/D18935
Differential Revision: http://reviews.llvm.org/D18936

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266162 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix FunctionImport export list computation: need to take a reference to a map entry...
Mehdi Amini [Wed, 13 Apr 2016 01:52:32 +0000 (01:52 +0000)]
Fix FunctionImport export list computation: need to take a reference to a map entry to actually modify it

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266159 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Add test for m0 initialization in basic loop
Matt Arsenault [Wed, 13 Apr 2016 00:39:52 +0000 (00:39 +0000)]
AMDGPU: Add test for m0 initialization in basic loop

Initialization of m0 is emitted for each LDS operation, so
every block with LDS usage ends up with one. MachineLICM
used to fail to hoist this out of the loop, so every loop
iteration with LDS usage in it would re-initialize it.

This seems to be fixed now, so add a test to make sure that
it stays this way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266156 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Remove leftover ShaderType attributes in tests
Matt Arsenault [Wed, 13 Apr 2016 00:39:48 +0000 (00:39 +0000)]
AMDGPU: Remove leftover ShaderType attributes in tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266155 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLTOInternalize: Fix member type, should be a reference and not a copy
Mehdi Amini [Tue, 12 Apr 2016 23:58:30 +0000 (23:58 +0000)]
LTOInternalize: Fix member type, should be a reference and not a copy

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266153 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/SI: Fix spilling of 96-bit registers
Tom Stellard [Tue, 12 Apr 2016 23:57:30 +0000 (23:57 +0000)]
AMDGPU/SI: Fix spilling of 96-bit registers

Summary:
It seems like this was broken in r252327.  I thought we had test cases
for this, but it's really hard to tirgger spills of this exact register
size since they aren't used very much.

Reviewers: arsenm, nhaehnle

Subscribers: nhaehnle, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19021

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266152 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix mismatch on returned type between header and implementation for createNameAnonFun...
Mehdi Amini [Tue, 12 Apr 2016 23:25:11 +0000 (23:25 +0000)]
Fix mismatch on returned type between header and implementation for createNameAnonFunctionPass()

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266151 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Clear the MFI's save and restore point after PrologEpilogInserter
Justin Bogner [Tue, 12 Apr 2016 23:21:53 +0000 (23:21 +0000)]
CodeGen: Clear the MFI's save and restore point after PrologEpilogInserter

This state is no longer useful and not guaranteed to be valid in later
codegen passes. For example, see the added test, which would print a
savepoint of %bb.-1 without this change, and crashes with a
use-after-free error under ASan if you apply the recycling allocator
patch from llvm.org/PR26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266150 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd space between words in verify-scev-maps option help message
Jeroen Ketema [Tue, 12 Apr 2016 23:21:46 +0000 (23:21 +0000)]
Add space between words in verify-scev-maps option help message

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266149 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86, InstCombine] fix masked load pass-through operand to be a zero vector
Sanjay Patel [Tue, 12 Apr 2016 23:16:23 +0000 (23:16 +0000)]
[x86, InstCombine] fix masked load pass-through operand to be a zero vector

This bug was introduced with:
http://reviews.llvm.org/rL262269

AVX masked loads are specified to set vector lanes to zero when the high bit of the mask
element for that lane is zero:
"If the mask is 0, the corresponding data element is set to zero in the load form of these
instructions, and unmodified in the store form." --Intel manual

Differential Revision: http://reviews.llvm.org/D19017

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266148 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Fuse AES{D,E}/AESMC for Exynos M1. (NFC)
Evandro Menezes [Tue, 12 Apr 2016 22:42:36 +0000 (22:42 +0000)]
[AArch64] Fuse AES{D,E}/AESMC for Exynos M1. (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266144 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoPre-fill LibcallRoutineNames with nullptr.
James Y Knight [Tue, 12 Apr 2016 22:32:47 +0000 (22:32 +0000)]
Pre-fill LibcallRoutineNames with nullptr.

And rearrange InitLibcallNames slightly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266142 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUpdate psabi link for x86-64. Add link to linux gabi supplement.
James Y Knight [Tue, 12 Apr 2016 21:54:57 +0000 (21:54 +0000)]
Update psabi link for x86-64. Add link to linux gabi supplement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266137 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[MC/ELFObjectWriter] Fix indentation of class body.
David Blaikie [Tue, 12 Apr 2016 21:45:53 +0000 (21:45 +0000)]
[MC/ELFObjectWriter] Fix indentation of class body.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266136 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFixed a few typos and formatting problems. NFCI.
David L Kreitzer [Tue, 12 Apr 2016 21:45:09 +0000 (21:45 +0000)]
Fixed a few typos and formatting problems. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266135 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DebugInfo] Add error message to test.
Davide Italiano [Tue, 12 Apr 2016 21:44:16 +0000 (21:44 +0000)]
[DebugInfo] Add error message to test.

Suggested by Rafael as post-commit review (r266102).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266134 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd a pass to name anonymous/nameless function
Mehdi Amini [Tue, 12 Apr 2016 21:35:28 +0000 (21:35 +0000)]
Add a pass to name anonymous/nameless function

Summary:
For correct handling of alias to nameless
function, we need to be able to refer them through a GUID in the summary.
Here we name them using a hash of the non-private global names in the module.

Reviewers: tejohnson

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D18883

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266132 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMove summary creation out of llvm-as into opt
Mehdi Amini [Tue, 12 Apr 2016 21:35:18 +0000 (21:35 +0000)]
Move summary creation out of llvm-as into opt

Summary:
Let keep llvm-as "dumb": it converts textual IR to bitcode. This
commit removes the dependency from llvm-as to libLLVMAnalysis.
We'll add back summary in llvm-as if we get to a textual
representation for it at some point. In the meantime, opt seems
like a better place for that.

Reviewers: tejohnson

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D19032

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266131 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoX86: Avoid accessing SDValues after they've been RAUW'd
Justin Bogner [Tue, 12 Apr 2016 21:34:24 +0000 (21:34 +0000)]
X86: Avoid accessing SDValues after they've been RAUW'd

This fixes two use-after-frees in selectLEA64_32Addr. If matchAddress
matches an ADD with an AND as an operand, and that AND hits one of the
"heroic transforms" that folds masks and shifts, we end up with N
pointing to an SDNode that was deleted. Make sure we're done accessing
it before that.

Found by ASan with the recycling allocator changes in llvm.org/PR26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266130 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoNFC: MergeFunctions return early
JF Bastien [Tue, 12 Apr 2016 21:23:05 +0000 (21:23 +0000)]
NFC: MergeFunctions return early

Same effect, easier to read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266128 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: add llvm.amdgcn.buffer.load/store intrinsics
Nicolai Haehnle [Tue, 12 Apr 2016 21:18:10 +0000 (21:18 +0000)]
AMDGPU: add llvm.amdgcn.buffer.load/store intrinsics

Summary:
They correspond to BUFFER_LOAD/STORE_DWORD[_X2,X3,X4] and mostly behave like
llvm.amdgcn.buffer.load/store.format. They will be used by Mesa for SSBO and
atomic counters at least when robust buffer access behavior is desired.
(These instructions perform no format conversion and do buffer range checking
per component.)

As a side effect of sharing patterns with llvm.amdgcn.buffer.store.format,
it has become trivial to add support for the f32 and v2f32 variants of that
intrinsic, so the patch does so.

Also DAG-ify (and fix) some tests that I noticed intermittent failures in
while developing this patch.

Some tests were (temporarily) adjusted for the required mayLoad/hasSideEffects
changes to the BUFFER_STORE_DWORD* instructions. See also
http://reviews.llvm.org/D18291.

Reviewers: arsenm, tstellarAMD, mareko

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18292

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266126 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ThinLTO] Only compute imports for current module in FunctionImport pass
Teresa Johnson [Tue, 12 Apr 2016 21:13:11 +0000 (21:13 +0000)]
[ThinLTO] Only compute imports for current module in FunctionImport pass

Summary:
The function import pass was computing all the imports for all the
modules in the index, and only using the imports for the current module.
Change this to instead compute only for the given module. This means
that the exports list can't be populated, but they weren't being used
anyway.

Longer term, the linker can collect all the imports and export lists
and serialize them out for consumption by the distributed backend
processes which use this pass.

Reviewers: joker.eph

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D18945

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266125 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoNFC: MergeFunctions update more comments
JF Bastien [Tue, 12 Apr 2016 21:13:01 +0000 (21:13 +0000)]
NFC: MergeFunctions update more comments

They are wordy. Some words were wrong.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266124 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd __atomic_* lowering to AtomicExpandPass.
James Y Knight [Tue, 12 Apr 2016 20:18:48 +0000 (20:18 +0000)]
Add __atomic_* lowering to AtomicExpandPass.

(Recommit of r266002, with r266011, r266016, and not accidentally
including an extra unused/uninitialized element in LibcallRoutineNames)

AtomicExpandPass can now lower atomic load, atomic store, atomicrmw, and
cmpxchg instructions to __atomic_* library calls, when the target
doesn't support atomics of a given size.

This is the first step towards moving all atomic lowering from clang
into llvm. When all is done, the behavior of __sync_* builtins,
__atomic_* builtins, and C11 atomics will be unified.

Previously LLVM would pass everything through to the ISelLowering
code. There, unsupported atomic instructions would turn into __sync_*
library calls. Because of that behavior, Clang currently avoids emitting
llvm IR atomic instructions when this would happen, and emits __atomic_*
library functions itself, in the frontend.

This change makes LLVM able to emit __atomic_* libcalls, and thus will
eventually allow clang to depend on LLVM to do the right thing.

It is advantageous to do the new lowering to atomic libcalls in
AtomicExpandPass, before ISel time, because it's important that all
atomic operations for a given size either lower to __atomic_*
libcalls (which may use locks), or native instructions which won't. No
mixing and matching.

At the moment, this code is enabled only for SPARC, as a
demonstration. The next commit will expand support to all of the other
targets.

Differential Revision: http://reviews.llvm.org/D18200

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266115 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Fix debug info in reg-stackify.ll test
Derek Schuff [Tue, 12 Apr 2016 20:12:05 +0000 (20:12 +0000)]
[WebAssembly] Fix debug info in reg-stackify.ll test

It lacked a CU and thus became invalid with r266102

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266114 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDelete mergefunctions.clang.svn.patch
JF Bastien [Tue, 12 Apr 2016 19:44:40 +0000 (19:44 +0000)]
Delete mergefunctions.clang.svn.patch

The patch doesn't apply, and was removed from zorg by rL266094.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266112 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/SI: Insert wait states required after v_readfirstlane on SI
Tom Stellard [Tue, 12 Apr 2016 18:40:43 +0000 (18:40 +0000)]
AMDGPU/SI: Insert wait states required after v_readfirstlane on SI

Summary:
We will be able to handle this case much better once the hazard recognizer
is finished, but this conservative implementation  fixes a hang with the piglit
test:

spec/arb_arrays_of_arrays/execution/sampler/fs-nested-struct-arrays-nonconst-nested-arra

Reviewers: arsenm, nhaehnle

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18988

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266105 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Eliminate half of i64 or if one operand is zero_extend from i32
Matt Arsenault [Tue, 12 Apr 2016 18:24:38 +0000 (18:24 +0000)]
AMDGPU: Eliminate half of i64 or if one operand is zero_extend from i32

This helps clean up some of the mess when expanding unaligned 64-bit
loads when changed to be promote to v2i32, and fixes situations
where or x, 0 was emitted after splitting 64-bit ors during moveToVALU.

I think this could be a generic combine but I'm not sure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266104 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IR/Verifier] Each DISubprogram with isDefinition: true must belong to a CU.
Davide Italiano [Tue, 12 Apr 2016 18:22:33 +0000 (18:22 +0000)]
[IR/Verifier] Each DISubprogram with isDefinition: true must belong to a CU.

Add a check to catch violations. ~60 tests were broken and prevented
this change to be committed. Adrian and I (thanks Adrian!) went
through them in the last week or so updating. The check can be
done more efficiently but I'd still like to get this in ASAP to
avoid more broken tests to be checked in (if any).

PR:  27101

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266102 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAPInt: Add overload of isMask
Matt Arsenault [Tue, 12 Apr 2016 18:17:23 +0000 (18:17 +0000)]
APInt: Add overload of isMask

This mimics the version in MathExtras.h which isn't testing for a
specific mask size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266101 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CodeGen] Remove constant-folding dead code. NFC.
Ahmed Bougacha [Tue, 12 Apr 2016 18:15:39 +0000 (18:15 +0000)]
[CodeGen] Remove constant-folding dead code. NFC.

This code was specific to vector operations with scalar operands:
all the opcodes in FoldValue (via FoldConstantArithmetic) can't
match those criteria.

Replace it with an assert if that ever changes: at that point,
we might need to add back a splat BUILD_VECTOR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266100 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCheck alloca's special state
JF Bastien [Tue, 12 Apr 2016 18:06:55 +0000 (18:06 +0000)]
Check alloca's special state

Following up to a similar fix in MergeFunctions: r266022. This patch keeps both in sync, it would be nice to not have to do this. It doesn't look like there's an easy way to test this code directly at the moment: AFAICT all currect uses of isSameOperationAs are looking at instructions deep inside a function. IndVarSimplify/pr24952.ll and InstMerge/st_sink_* look at alloca inadvertently but are brittle tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266099 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoIntroduce an GCRelocateInst class [NFC]
Philip Reames [Tue, 12 Apr 2016 18:05:10 +0000 (18:05 +0000)]
Introduce an GCRelocateInst class [NFC]

Previously, we were using isGCRelocate predicates.  Using a subclass of IntrinsicInst is far more idiomatic.  The refactoring also enables a couple of minor simplifications and code sharing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266098 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agofix indentation; NFC
Sanjay Patel [Tue, 12 Apr 2016 18:01:48 +0000 (18:01 +0000)]
fix indentation; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266097 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/SI: Fix a mis-compilation of multi-level breaks
Nicolai Haehnle [Tue, 12 Apr 2016 16:10:38 +0000 (16:10 +0000)]
AMDGPU/SI: Fix a mis-compilation of multi-level breaks

Summary:
Under certain circumstances, multi-level breaks (or what is understood by
the control flow passes as such) could be miscompiled in a way that causes
infinite loops, by emitting incorrect control flow intrinsics.

This fixes a hang in
dEQP-GLES3.functional.shaders.loops.while_dynamic_iterations.conditional_continue_vertex

Reviewers: arsenm, tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18967

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266088 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSupport arbitrary addrspace pointers in masked load/store intrinsics
Artur Pilipenko [Tue, 12 Apr 2016 15:58:04 +0000 (15:58 +0000)]
Support arbitrary addrspace pointers in masked load/store intrinsics

This is a resubmittion of 263158 change.

This patch fixes the problem which occurs when loop-vectorize tries to use @llvm.masked.load/store intrinsic for a non-default addrspace pointer. It fails with "Calling a function with a bad signature!" assertion in CallInst constructor because it tries to pass a non-default addrspace pointer to the pointer argument which has default addrspace.

The fix is to add pointer type as another overloaded type to @llvm.masked.load/store intrinsics.

Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D17270

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266086 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Bitcode] Fix + regenerate old test so that it includes a DICompileUnit.
Davide Italiano [Tue, 12 Apr 2016 15:51:23 +0000 (15:51 +0000)]
[Bitcode] Fix + regenerate old test so that it includes a DICompileUnit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266085 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ScheduleDAGInstrs] Handle instructions with multiple MMOs
Geoff Berry [Tue, 12 Apr 2016 15:50:19 +0000 (15:50 +0000)]
[ScheduleDAGInstrs] Handle instructions with multiple MMOs

Summary:
In getUnderlyingObjectsForInstr(): Don't give up on instructions with
multiple MMOs, instead look through all the MMOs and if they all meet
the conservative criteria previously used for single MMO instructions,
then return all of the underlying objects derived from the MMOs.

The change to ScheduleDAGInstrs::buildSchedGraph() is needed to avoid
the case where multiple underlying objects are present and are related
in such a way that successive iterations of the loop end up adding a
dependency from an instruction to itself.

Reviewers: atrick, hfinkel

Subscribers: MatzeB, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266084 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTest commit, NFC.
Than McIntosh [Tue, 12 Apr 2016 15:35:05 +0000 (15:35 +0000)]
Test commit, NFC.

Adds a blank line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266082 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips] add assembler support for .set arch=octeon
Petar Jovanovic [Tue, 12 Apr 2016 15:28:16 +0000 (15:28 +0000)]
[mips] add assembler support for .set arch=octeon

This patch enables assembler support for .set arch=octeon.
It will fix issues with inline assembler when this directive is used.

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D18548

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266081 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMoving llvm-test-depends and test-depends into the Tests folder; NFC, this simply...
Aaron Ballman [Tue, 12 Apr 2016 15:09:14 +0000 (15:09 +0000)]
Moving llvm-test-depends and test-depends into the Tests folder; NFC, this simply cleans up the generated solution so that these targets don't live in the root folder of the IDE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266078 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLangRef: Update example syntax for atomic load instruction
Matt Arsenault [Tue, 12 Apr 2016 14:41:03 +0000 (14:41 +0000)]
LangRef: Update example syntax for atomic load instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266077 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Implement i64 global atomics
Matt Arsenault [Tue, 12 Apr 2016 14:05:11 +0000 (14:05 +0000)]
AMDGPU: Implement i64 global atomics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266075 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Add atomic_inc + atomic_dec intrinsics
Matt Arsenault [Tue, 12 Apr 2016 14:05:04 +0000 (14:05 +0000)]
AMDGPU: Add atomic_inc + atomic_dec intrinsics

These are different than atomicrmw add 1 because they have
an additional input value to clamp the result.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266074 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Remove trailing whitespace
Matt Arsenault [Tue, 12 Apr 2016 14:04:54 +0000 (14:04 +0000)]
AMDGPU: Remove trailing whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266073 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Add volatile to test loads and stores
Matt Arsenault [Tue, 12 Apr 2016 13:38:18 +0000 (13:38 +0000)]
AMDGPU: Add volatile to test loads and stores

When the memory vectorizer is enabled, these tests break.
These tests don't really care about the memory instructions,
and it's easier to write check lines with the unmerged loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266071 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86] Regenerated avx512 calling convention test checks
Simon Pilgrim [Tue, 12 Apr 2016 13:31:01 +0000 (13:31 +0000)]
[X86] Regenerated avx512 calling convention test checks

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266070 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoThis reverts commit r266002, r266011 and r266016.
Rafael Espindola [Tue, 12 Apr 2016 12:30:25 +0000 (12:30 +0000)]
This reverts commit r266002, r266011 and r266016.

They broke the msan bot.

Original message:

Add __atomic_* lowering to AtomicExpandPass.

AtomicExpandPass can now lower atomic load, atomic store, atomicrmw,and
cmpxchg instructions to __atomic_* library calls, when the target
doesn't support atomics of a given size.

This is the first step towards moving all atomic lowering from clang
into llvm. When all is done, the behavior of __sync_* builtins,
__atomic_* builtins, and C11 atomics will be unified.

Previously LLVM would pass everything through to the ISelLowering
code. There, unsupported atomic instructions would turn into __sync_*
library calls. Because of that behavior, Clang currently avoids emitting
llvm IR atomic instructions when this would happen, and emits __atomic_*
library functions itself, in the frontend.

This change makes LLVM able to emit __atomic_* libcalls, and thus will
eventually allow clang to depend on LLVM to do the right thing.

It is advantageous to do the new lowering to atomic libcalls in
AtomicExpandPass, before ISel time, because it's important that all
atomic operations for a given size either lower to __atomic_*
libcalls (which may use locks), or native instructions which won't. No
mixing and matching.

At the moment, this code is enabled only for SPARC, as a
demonstration. The next commit will expand support to all of the other
targets.

Differential Revision: http://reviews.llvm.org/D18200

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266062 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "[mips] MIPSR6 Compact branch aliases"
Simon Dardis [Tue, 12 Apr 2016 12:22:45 +0000 (12:22 +0000)]
Revert "[mips] MIPSR6 Compact branch aliases"

This reverts commit r266055.

ps4-buildslave2 is highlighting a failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266061 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SystemZ] Use LDE32 instead of LE, when Offset is small.
Jonas Paulsson [Tue, 12 Apr 2016 12:07:23 +0000 (12:07 +0000)]
[SystemZ] Use LDE32 instead of LE, when Offset is small.

On z13, if eliminateFrameIndex() chooses LE (and not LEY), immediately
transform that LE to LDE32 to avoid partial register dependencies.

LEY should be generally preferred for big offsets over an expansion
into LAY + LDE32.

Reviewed by Ulrich Weigand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266060 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips] MIPSR6 Compact branch aliases
Simon Dardis [Tue, 12 Apr 2016 10:41:53 +0000 (10:41 +0000)]
[mips] MIPSR6 Compact branch aliases

Summary:
Alias 'jic $reg, 0' to 'jrc $reg' and 'jialc $reg, 0' to 'jalrc $reg' like
binutils.

Reviewers: dsanders

Differential Revision: http://reviews.llvm.org/D18856

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266055 91177308-0d34-0410-b5e6-96231b3b80d8