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21 months agodrm/i915: Move DRRS debugfs next to the implementation
Ville Syrjälä [Mon, 3 Oct 2022 11:32:44 +0000 (14:32 +0300)]
drm/i915: Move DRRS debugfs next to the implementation

Move the DRRS debugfs stuff next to the actual implementation
so that it's easier to deal with the whole.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221003113249.16213-2-ville.syrjala@linux.intel.com
21 months agodrm/i915: Reject excessive dotclocks early
Ville Syrjälä [Tue, 27 Sep 2022 18:24:55 +0000 (21:24 +0300)]
drm/i915: Reject excessive dotclocks early

Make sure modes with crazy big dotclocks are rejected early,
so as to not cause problems for subsequent code via integer
overflows and whatnot.

These would eventually be rejected in intel_crtc_compute_pipe_mode()
but that is now too late as we do the clock computations a bit
earlier than that. And we don't want to just reorder the two since
we still want to check the final computed dotclock against the
hardware limit to make sure we didn't end up above the limit due
to rounding/etc.

Fixes: 0ff0e219d9b8 ("drm/i915: Compute clocks earlier")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220927182455.3422-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Simplify modifier lookup in watermark code
Ville Syrjälä [Mon, 3 Oct 2022 11:15:44 +0000 (14:15 +0300)]
drm/i915: Simplify modifier lookup in watermark code

Replace the huge modifier lists in the watermark code with
a few calls to intel_fb.c.

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-7-ville.syrjala@linux.intel.com
21 months agodrm/i915: Fix watermark calculations for DG2 CCS+CC modifier
Ville Syrjälä [Mon, 3 Oct 2022 11:15:43 +0000 (14:15 +0300)]
drm/i915: Fix watermark calculations for DG2 CCS+CC modifier

Take the DG2 CCS+CC modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
tile-4 modifier is linear.

The rc_surface part is actually a nop since that is not used
for any glk+ platform.

Cc: stable@vger.kernel.org
Fixes: 680025dcc400 ("drm/i915/dg2: Add support for DG2 clear color compression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-6-ville.syrjala@linux.intel.com
21 months agodrm/i915: Fix watermark calculations for DG2 CCS modifiers
Ville Syrjälä [Mon, 3 Oct 2022 11:15:42 +0000 (14:15 +0300)]
drm/i915: Fix watermark calculations for DG2 CCS modifiers

Take the DG2 CCS modifiers into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking these
tile-4 modifiers are linear.

The rc_surface part is actually a nop since that is not used
for any glk+ platform.

Cc: stable@vger.kernel.org
Fixes: 4c3afa72138c ("drm/i915/dg2: Add support for DG2 render and media compression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-5-ville.syrjala@linux.intel.com
21 months agodrm/i915: Fix watermark calculations for gen12+ CCS+CC modifier
Ville Syrjälä [Mon, 3 Oct 2022 11:15:41 +0000 (14:15 +0300)]
drm/i915: Fix watermark calculations for gen12+ CCS+CC modifier

Take the gen12+ CCS+CC modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.

The rc_surface part is actually a nop since that is not used
for any glk+ platform.

Cc: stable@vger.kernel.org
Fixes: d1e2775e9b96 ("drm/i915/tgl: Add Clear Color support for TGL Render Decompression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-4-ville.syrjala@linux.intel.com
21 months agodrm/i915: Fix watermark calculations for gen12+ MC CCS modifier
Ville Syrjälä [Mon, 3 Oct 2022 11:15:40 +0000 (14:15 +0300)]
drm/i915: Fix watermark calculations for gen12+ MC CCS modifier

Take the gen12+ MC CCS modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.

The rc_surface part is actually a nop since that is not used
for any glk+ platform.

v2: Split RC CCS vs. MC CCS to separate patches

Cc: stable@vger.kernel.org
Fixes: 2dfbf9d2873a ("drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media engine")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-3-ville.syrjala@linux.intel.com
21 months agodrm/i915: Fix watermark calculations for gen12+ RC CCS modifier
Ville Syrjälä [Mon, 3 Oct 2022 11:15:39 +0000 (14:15 +0300)]
drm/i915: Fix watermark calculations for gen12+ RC CCS modifier

Take the gen12+ RC CCS modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.

The rc_surface part is actually a nop since that is not used
for any glk+ platform.

v2: Split RC CCS vs. MC CCS to separate patches

Cc: stable@vger.kernel.org
Fixes: b3e57bccd68a ("drm/i915/tgl: Gen-12 render decompression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221003111544.8007-2-ville.syrjala@linux.intel.com
21 months agodrm/i915/psr: Fix PSR_IMR/IIR field handling
Jouni Högander [Mon, 3 Oct 2022 07:20:11 +0000 (10:20 +0300)]
drm/i915/psr: Fix PSR_IMR/IIR field handling

Current PSR code is supposed to use TRANSCODER_EDP to force 0 shift for
bits in PSR_IMR/IIR registers:

/*
 * gen12+ has registers relative to transcoder and one per transcoder
 * using the same bit definition: handle it as TRANSCODER_EDP to force
 * 0 shift in bit definition
 */

At the time of writing the code assumption "TRANSCODER_EDP == 0" was made.
This is not the case and all fields in PSR_IMR and PSR_IIR are shifted
incorrectly if DISPLAY_VER >= 12.

Fix this by adding separate register field defines for >=12 and add bit
getter functions to keep code readability.

v4:
 - Remove EDP from TGL definitions (José)
 - Use REG_BIT and REG_GENMASK (José)
v3:
 - Add separate register field defines (José)
 - Add bit getter functions (José)
v2:
 - Improve commit message (José)

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Fixes: 8241cfbe67f4 ("drm/i915/tgl: Access the right register when handling PSR interruptions")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221003072011.72408-1-jouni.hogander@intel.com
21 months agodrm/i915: Add some debug prints for intel_modeset_all_pipes()
Ville Syrjälä [Wed, 28 Sep 2022 06:08:13 +0000 (09:08 +0300)]
drm/i915: Add some debug prints for intel_modeset_all_pipes()

Print out on which pipes, and for what reason, we are forcing a
full modeset.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220928060813.23264-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Change glk_load_degamma_lut() calling convention
Ville Syrjälä [Thu, 29 Sep 2022 07:15:16 +0000 (10:15 +0300)]
drm/i915: Change glk_load_degamma_lut() calling convention

Make glk_load_degamma_lut() more like most everyone else and
pass in the LUT explicitly.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220929071521.26612-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Clean up intel_color_init_hooks()
Ville Syrjälä [Thu, 29 Sep 2022 07:15:15 +0000 (10:15 +0300)]
drm/i915: Clean up intel_color_init_hooks()

Remove a bunch of pointless curly brackets and do
the s/dev_priv/i915/ while at it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220929071521.26612-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Simplify the intel_color_init_hooks() if ladder
Ville Syrjälä [Thu, 29 Sep 2022 07:15:14 +0000 (10:15 +0300)]
drm/i915: Simplify the intel_color_init_hooks() if ladder

Get rid of the funny hsw vs. ivb extra indentation level in
intel_color_init_hooks().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220929071521.26612-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Split up intel_color_init()
Ville Syrjälä [Thu, 29 Sep 2022 07:15:13 +0000 (10:15 +0300)]
drm/i915: Split up intel_color_init()

intel_color_init() does both device level and crtc level stuff.
Split it up accordingly.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220929071521.26612-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Remove PLL asserts from .load_luts()
Ville Syrjälä [Thu, 29 Sep 2022 07:15:12 +0000 (10:15 +0300)]
drm/i915: Remove PLL asserts from .load_luts()

.load_luts() potentially runs from the vblank worker, and is
under a deadline to complete within the vblank. Thus we can't
do expesive stuff like talk to the Punit, etc.

To that end get rid of the assert_dsi_pll_enabled() call for
vlv/chv. We'll just have to trust that the PLL is already enabled
here.

And I don't think the normal assert_pll_enabled() really buys us
anything useful on gmch platforms either, so nuke that one too.
We don't have corresponding asserts in the ilk+ codepaths anyway
despite the hardware (IIRC) still requiring the clock to be
enabled when we access the LUT.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220929071521.26612-2-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Allow alternate fixed modes always for LVDS
Ville Syrjälä [Tue, 27 Sep 2022 18:06:15 +0000 (21:06 +0300)]
drm/i915: Allow alternate fixed modes always for LVDS

As with eDP let's stop considering the VBTs DRRS knobs and
just always accept all otherwise suitable EDID modes. This
appears to be how Windows does it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220927180615.25476-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Allow alternate fixed modes always for eDP
Ville Syrjälä [Tue, 27 Sep 2022 18:06:14 +0000 (21:06 +0300)]
drm/i915: Allow alternate fixed modes always for eDP

Stop considering VBT's static DRRS support when deciding whether
to use alternate fixed modes or not. It looks like Windows more
or less just uses that to decide whether to automagically switch
refresh rates on AC<->battery changes, or perhaps whether to
even expose a control for that in some UI thing. Either way it
seems happy to always use all EDID modes, and I guess the
DRRS/VRR stuff more or less adjusts how said modes get
actually used.

Let's do the same and just accept all the suitable looking
modes from EDID, whether we have DRRS or VRR.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6323
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6484
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220927180615.25476-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Simplify intel_panel_add_edid_alt_fixed_modes()
Ville Syrjälä [Tue, 27 Sep 2022 18:06:13 +0000 (21:06 +0300)]
drm/i915: Simplify intel_panel_add_edid_alt_fixed_modes()

Since commit a5810f551d0a ("drm/i915: Allow more varied alternate
fixed modes for panels") intel_panel_add_edid_alt_fixed_modes()
no longer considers vrr vs. drrs separately. So no reason to
pass them as separate parameters either.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220927180615.25476-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915/pxp: Add firmware status when ARB session fails
Alan Previn [Fri, 23 Sep 2022 06:45:42 +0000 (23:45 -0700)]
drm/i915/pxp: Add firmware status when ARB session fails

Add firmware status using a drm_warn when ARB session fails
or else a drm_dbg when the ARB session register slot bit did
get set.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Juston Li <justonli@chromium.org>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220923064542.415252-2-alan.previn.teres.alexis@intel.com
21 months agodrm/i915: Round to closest in g4x+ HDMI clock readout
Ville Syrjälä [Mon, 26 Sep 2022 19:30:21 +0000 (22:30 +0300)]
drm/i915: Round to closest in g4x+ HDMI clock readout

On pre-ddi platforms we have slightly different code being
used for HDMI TMDS clock to dotclock conversion between the
state computation and state readout. Both of these need to
round the same way in order to not get a mismatch between
the computed and read out states. Fix up the rounding
direction in the readout path to match what is used during
state computation.

Another option would to just use intel_crtc_dotclock()
in the readout path as well, but I don't really want to
do that as the current code more accurately represents
how the hardware really works; The HDMI port register
defines whether we're actually outputting 8bpc or 12bpc
over HDMI, and the PIPECONF bpc setting just defines what
goes over FDI between the CPU and PCH. The fact that we
try to cram all that into a single pipe_bpp during state
computation is perhaps not entirely great...

Fixes: f2c9df101095 ("drm/i915: Round TMDS clock to nearest")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220926193021.23287-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Fix TypeC mode initialization during system resume
Imre Deak [Thu, 22 Sep 2022 17:21:48 +0000 (20:21 +0300)]
drm/i915: Fix TypeC mode initialization during system resume

During system resume DP MST requires AUX to be working already before
the HW state readout of the given encoder. Since AUX requires the
encoder/PHY TypeC mode to be initialized, which atm only happens during
HW state readout, these AUX transfers can change the TypeC mode
incorrectly (disconnecting the PHY for an enabled encoder) and trigger
the state check WARNs in intel_tc_port_sanitize().

Fix this by initializing the TypeC mode earlier both during driver
loading and system resume and making sure that the mode can't change
until the encoder's state is read out. While at it add the missing
DocBook comments and rename
intel_tc_port_sanitize()->intel_tc_port_sanitize_mode() for consistency.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220922172148.2913088-1-imre.deak@intel.com
21 months agodrm/i915: Nuke intel_get_shared_dpll_id()
Ville Syrjälä [Wed, 21 Sep 2022 12:23:41 +0000 (15:23 +0300)]
drm/i915: Nuke intel_get_shared_dpll_id()

Each PLL knows its own ID so intel_get_shared_dpll_id() is
pointless. Get rid of it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220921122343.13061-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Always initialize dpll.lock
Ville Syrjälä [Wed, 21 Sep 2022 12:23:40 +0000 (15:23 +0300)]
drm/i915: Always initialize dpll.lock

Initialize the dll.lock mutex whether or not we manage to
initialize the rest of the dpll mgr.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220921122343.13061-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: WARN if PLL ref/unref got messed up
Ville Syrjälä [Wed, 21 Sep 2022 21:15:25 +0000 (00:15 +0300)]
drm/i915: WARN if PLL ref/unref got messed up

Spew a WARN if we try to ref/unref the same DPLL multiple
times for the same pipe.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220921211525.10675-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Pimp DPLL ref/unref debugs
Ville Syrjälä [Thu, 22 Sep 2022 19:13:50 +0000 (22:13 +0300)]
drm/i915: Pimp DPLL ref/unref debugs

We currently have a debug message in intel_reference_shared_dpll()
but no counterpart in intel_unreference_shared_dpll(). Add one.

Switch to the [CRTC:...] notation for the pipe name while at it.

v2: Use drm_dbg_kms() instead of drm_dbg() (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220922191350.4303-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Don't bail early from intel_dp_initial_fastset_check()
Ville Syrjälä [Thu, 22 Sep 2022 19:13:14 +0000 (22:13 +0300)]
drm/i915: Don't bail early from intel_dp_initial_fastset_check()

Do all the checks in intel_dp_initial_fastset_check() instead
of bailing out on the first condition that triggers.

This makes for better debug logs since we see all the reasons
why the full modeset computation is forced.

Also avoid the risk of someone accidentally adding a check
later in the function that would require connectors_changed=true
(ie. no fastset at all), but an earlier check may have already
bailed out with just mode_changed=true (ie. fastset is still
possible).

Pimp the debugs with the encoder id+name while at it.

v2: Call the return variable 'fastset' to convey its meaning

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220922191314.4252-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Force DPLL calculation for TC ports after readout
Ville Syrjälä [Thu, 22 Sep 2022 19:12:36 +0000 (22:12 +0300)]
drm/i915: Force DPLL calculation for TC ports after readout

We always allocate two DPLLs (TC and TBT) for TC ports. This
is because we can't know ahead of time wherher we need to put
the PHY into DP-Alt or TBT mode.

However during readout we can obviously only read out the state
of the DPLL that the port is actually using. Thus the state after
readout will not have both DPLLs populated.

We run into problems if during readout the TC port is in DP-Alt
mode, but we then perform a modeset on the port without going
through the full .compute_config() machinery, and during said
modeset the port cannot be switched back into DP-Alt mode and
we need to take the TBT fallback path. Such a modeset can
happen eg. due to cdclk reprogramming.

This wasn't a problem earlier because we did all the DPLL
calculations much later in the modeset. So even if flagged
a modeset very late we'd still have gone through the DPLL
calculations. But now all the DPLL calculations happen much
earlier and so we need to deal with it, or else we'll attempt
a modeset without a DPLL.

To guarantee that we always have both DPLLs fully cal/ulated
for TC ports force a full modeset computation during the
initial commit.

v2: Avoid bitwise operation on bool (Jani)
    Call the return variable 'fastset' to convey its meaning

Reported-by: Lee Shawn C <shawn.c.lee@intel.com>
Fixes: b000abd3b3d2 ("drm/i915: Do .crtc_compute_clock() earlier")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220922191236.4194-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: fix device info for devices without display
Jani Nikula [Fri, 16 Sep 2022 08:26:42 +0000 (11:26 +0300)]
drm/i915: fix device info for devices without display

Commit 00c6cbfd4e8a ("drm/i915: move pipe_mask and cpu_transcoder_mask
to runtime info") moved the pipe_mask member from struct
intel_device_info to intel_runtime_info, but overlooked some of our
platforms initializing device info .display = {}. This is significant,
as pipe_mask is the single point of truth for a device having a display
or not; the platforms in question left pipe_mask to whatever was set for
the platforms they "inherit" from in the complex macro scheme we have.

Add new NO_DISPLAY macro initializing .__runtime.pipe_mask = 0, which
will cause the device info .display sub-struct to be zeroed in
intel_device_info_runtime_init(). A better solution (or simply audit of
proper use of HAS_DISPLAY() checks) is required before moving forward
with [1].

Also clear all the display related members in runtime info if there's no
display. The latter is a bit tedious, but it's for completeness at this
time, to ensure similar functionality as before.

[1] https://lore.kernel.org/r/dfda1bf67f02ceb07c280b7a13216405fd1f7a34.1660137416.git.jani.nikula@intel.com

Fixes: 00c6cbfd4e8a ("drm/i915: move pipe_mask and cpu_transcoder_mask to runtime info")
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Maarten Lankhort <maarten.lankhorst@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220916082642.3451961-1-jani.nikula@intel.com
21 months agodrm/i915: Add missing invalidate to g4x wm readout
Ville Syrjälä [Wed, 22 Jun 2022 15:54:48 +0000 (18:54 +0300)]
drm/i915: Add missing invalidate to g4x wm readout

Let's not forget to mark the unused watermark levels as invalid
after the readout. The vlv/chv codepath has this but the g4x
didn't for some reason.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220622155452.32587-6-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
21 months agodrm/i915: Simplify up vlv watermark sanitation
Ville Syrjälä [Wed, 22 Jun 2022 15:54:47 +0000 (18:54 +0300)]
drm/i915: Simplify up vlv watermark sanitation

We can simplify the vlv watermark sanitation by reusing the
second half of vlv_compute_pipe_wm() to convert the sanitized
raw watermarks into the proper form to be used as the
optimal/intermediate watermarks.

Also to be consistent with normal watermark computation the sanitized
watermarks should be all 0 for any disabled plane. Previously we
zeroed out the watermarks only up to the level (ie. PM2/5/DVDFS)
that was enabled.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220622155452.32587-5-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
21 months agodrm/i915: Simplify up g4x watermark sanitation
Ville Syrjälä [Wed, 22 Jun 2022 15:54:46 +0000 (18:54 +0300)]
drm/i915: Simplify up g4x watermark sanitation

We can simplify the g4x watermark sanitation by reusing the
second half of g4x_compute_pipe_wm() to convert the sanitized
raw watermarks into the proper form to be used as the
optimal/intermediate watermarks.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220622155452.32587-4-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
21 months agodrm/i915: Split vlv_compute_pipe_wm() into two
Ville Syrjälä [Wed, 22 Jun 2022 15:54:45 +0000 (18:54 +0300)]
drm/i915: Split vlv_compute_pipe_wm() into two

Split vlv_compute_pipe_wm() into two halves. The first half computes
the new raw watermarks, and the second half munges those up into real
watermarks for the particular pipe.

We can reuse the second half for watermark sanitation as well.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220622155452.32587-3-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanslav.lisovskiy@intel.com>
21 months agodrm/i915: Split g4x_compute_pipe_wm() into two
Ville Syrjälä [Wed, 22 Jun 2022 15:54:44 +0000 (18:54 +0300)]
drm/i915: Split g4x_compute_pipe_wm() into two

Split g4x_compute_pipe_wm() into two halves. The first half computes
the new raw watermarks, and the second half munges those up into real
watermarks for the particular pipe.

We can reuse the second half for watermark sanitation as well.

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220622155452.32587-2-ville.syrjala@linux.intel.com
21 months agodrm/i915: Don't init eDP if we can't find a fixed mode
Ville Syrjälä [Mon, 12 Sep 2022 11:18:12 +0000 (14:18 +0300)]
drm/i915: Don't init eDP if we can't find a fixed mode

In the unlikely case of not finding a fixed mode don't register
the eDP connector. I think there are some places where we'd oops
if we didn't have a fixed mode for eDP so presumable this doesn't
typically happen. But better safe than sorry.

Also pimp the debugs with the encoder id+name. I think dumping
the encoder rather than the connector provides more information
here (eg. to match against the port information in the VBT).

We can also drop the extra check from intel_edp_add_properties().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-14-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Clean up connector->*_allowed setup
Ville Syrjälä [Mon, 12 Sep 2022 11:18:11 +0000 (14:18 +0300)]
drm/i915: Clean up connector->*_allowed setup

All the connectors are zero initialized so no need to clear
the *_allowed flags we don't support. Only leave the ones we want
to set. And while at it switch to booleans instead of ints.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-13-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Extract intel_attach_scaling_mode_property()
Ville Syrjälä [Mon, 12 Sep 2022 11:18:10 +0000 (14:18 +0300)]
drm/i915: Extract intel_attach_scaling_mode_property()

Consolidate the scaling_mode property setup into a single
place.

The one slight complicateion here is that GMCH platforms can't
do the CENTER mode except on the LVDS port. But we can deal with
that by just checking the connector type.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-12-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Move eDP scaling_mode prop setup to the proper place
Ville Syrjälä [Mon, 12 Sep 2022 11:18:09 +0000 (14:18 +0300)]
drm/i915: Move eDP scaling_mode prop setup to the proper place

We have an eDP specific intel_edp_add_properties() so move
the eDP scaling_mode property setup there from
intel_dp_add_properties().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-11-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Extract intel_lvds_add_properties()
Ville Syrjälä [Mon, 12 Sep 2022 11:18:08 +0000 (14:18 +0300)]
drm/i915: Extract intel_lvds_add_properties()

Move the LVDS connector property setup to a dedicated
function to depollute intel_lvds_init() a bit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-10-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Extract intel_dp_mst_add_properties()
Ville Syrjälä [Mon, 12 Sep 2022 11:18:07 +0000 (14:18 +0300)]
drm/i915: Extract intel_dp_mst_add_properties()

Move the DP MST connector property setup into its own function
so it's not spread all over intel_dp_add_mst_connector().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Extract intel_tv_add_properties()
Ville Syrjälä [Mon, 12 Sep 2022 11:18:06 +0000 (14:18 +0300)]
drm/i915: Extract intel_tv_add_properties()

Pull all the TV connector property setup into its own neat function.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Extract intel_edp_backlight_setup()
Ville Syrjälä [Mon, 12 Sep 2022 11:18:05 +0000 (14:18 +0300)]
drm/i915: Extract intel_edp_backlight_setup()

Pull the eDP backlight setup into its own function. No
reason to pollute intel_edp_init_connector() with all
the mundane details.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-7-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Pass intel_encoder to to_lvds_encoder()
Ville Syrjälä [Mon, 12 Sep 2022 11:18:04 +0000 (14:18 +0300)]
drm/i915: Pass intel_encoder to to_lvds_encoder()

Most of our encoder type cast stuff already operates on
intel_encoder rather than drm_encoder. Switch to_lvds_encoder()
over as well.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-6-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Use BIT() when dealing with output types
Ville Syrjälä [Mon, 12 Sep 2022 11:18:03 +0000 (14:18 +0300)]
drm/i915: Use BIT() when dealing with output types

Most places that deal with output types already use BIT()
but a few places still use manual shifts. Convert the
stragglers over to BIT().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-5-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Drop pointless 'budget' variable
Ville Syrjälä [Mon, 12 Sep 2022 11:18:02 +0000 (14:18 +0300)]
drm/i915: Drop pointless 'budget' variable

Just return the thing directly from the switch statement.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-4-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Clean up transcoder_to_stream_enc_status()
Ville Syrjälä [Mon, 12 Sep 2022 11:18:01 +0000 (14:18 +0300)]
drm/i915: Clean up transcoder_to_stream_enc_status()

Drop the pointless middle man variable and just return the
correct thing directly.  And while at it change the return
type to u32 since this is a register value we're returning.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-3-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Drop pointless middle man variable
Ville Syrjälä [Mon, 12 Sep 2022 11:18:00 +0000 (14:18 +0300)]
drm/i915: Drop pointless middle man variable

No need for the 'procmon' variable here. Just return the correct
thing from the switch statement directly.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912111814.17466-2-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
21 months agodrm/i915: Move hotplug inversion logic into separate helper
Gustavo Sousa [Thu, 22 Sep 2022 16:49:49 +0000 (13:49 -0300)]
drm/i915: Move hotplug inversion logic into separate helper

Use *_hpd_invert() helpers whenever possible to isolate logic specific
to hotplug inversion from common HPD setup logic to improve readability
and maintainability of the source code.

While we only define dg1_hpd_invert() here, future platforms are likely
to have different hotplug inversion needs, thus it makes sense grouping
different implementations under a common suffix.

v2: Fix coding style and prefer to use small *_hdp_invert() helpers
    instead of a generic one.

CC: Jani Nikula <jani.nikula@linux.intel.com>
CC: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220922164949.163985-1-gustavo.sousa@intel.com
21 months agodrm/i915: Remove unused function parameter
Niranjana Vishwanathapura [Thu, 22 Sep 2022 21:39:16 +0000 (14:39 -0700)]
drm/i915: Remove unused function parameter

The function parameter 'exclude' in funciton
i915_sw_fence_await_reservation() is not used.
Remove it.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220922213916.12112-1-niranjana.vishwanathapura@intel.com
21 months agodrm/i915: Parse and set stepping for platforms with GMD
José Roberto de Souza [Fri, 16 Sep 2022 01:46:47 +0000 (18:46 -0700)]
drm/i915: Parse and set stepping for platforms with GMD

Expand the current stepping convention to accommodate the GMD
stepping info. Typically GMD step maps to letter stepping
by "A + step %4" and number to "A + step /4" i.e, GMD step
0 maps to STEP_A0, 1 to _A1, 2 to _A2, 3 to _A3, 4 to STEP_B0...

Future platforms might break this formulae and may require a table
mapping to decode GMD step compatible with the convention.

v2:
 - Pass the updated ip version structure
v3:
 - Skip using GMD to step table(MattR)

Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220916014648.1310346-3-radhakrishna.sripada@intel.com
21 months agodrm/i915: Read graphics/media/display arch version from hw
Matt Roper [Fri, 16 Sep 2022 01:46:46 +0000 (18:46 -0700)]
drm/i915: Read graphics/media/display arch version from hw

Going forward, the hardware teams no longer consider new platforms to
have a "generation" in the way we've defined it for past platforms.
Instead, each IP block (graphics, media, display) will have their own
architecture major.minor versions and stepping ID's which should be read
directly from a register in the MMIO space.

Bspec: 63361, 64111

v2:
  - Move the IP version readout to intel_device_info.c
  - Convert the macro into a function

v3:
  - Move subplatform init to runtime early init
  - Cache runtime ver, release info to compare with hardware values.
  - Use IP_VER for snaity check(MattR)

v4:
  - Minor doccumentation changes.
  - Normalize HAS_GMD_ID macro value.(JaniN)

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220916014648.1310346-2-radhakrishna.sripada@intel.com
21 months agodrm/i915/fbc: Remove stale FIXME
Ville Syrjälä [Fri, 16 Sep 2022 16:52:05 +0000 (19:52 +0300)]
drm/i915/fbc: Remove stale FIXME

Remove the old tales about 90/270 degree rotation
effectively preventing FBC. That hasn't been true since
we stopped demanding the fence is present in
commit 691f7ba58d52 ("drm/i915/display/fbc: Make fences
a nice-to-have for GEN9+")

Also fix up the multiline comment formatting while at it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220916165206.1499-2-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coeho <luciano.coelho@intel.com>
21 months agodrm/i915: Nuke stale plane cdclk ratio FIXMEs
Ville Syrjälä [Fri, 16 Sep 2022 16:52:04 +0000 (19:52 +0300)]
drm/i915: Nuke stale plane cdclk ratio FIXMEs

The plane ratio stuff got implemented in
commit bb6ae9e653dc ("drm/i915: Allow planes to
declare their minimum acceptable cdclk") so these
FIXMEs have no business being here.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220916165206.1499-1-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
22 months agodrm/i915/fbc: Use lockdep_assert_held()
Ville Syrjälä [Mon, 20 Jun 2022 18:29:17 +0000 (21:29 +0300)]
drm/i915/fbc: Use lockdep_assert_held()

Replace the mutex_is_locked() stuff with lockdep_assert_held() since
that's what it's there for.

Also sprinkle these around so that we have more or less
mirrored coverage for the enable vs. disable instead of the
current situation where the asserts seem to be more or less
randomly thrown around.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220620182917.10765-2-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
22 months agodrm/i915/fbc: Move flip_pending assignmnt
Ville Syrjälä [Mon, 20 Jun 2022 18:29:16 +0000 (21:29 +0300)]
drm/i915/fbc: Move flip_pending assignmnt

Move the flip_pending assignment into __intel_fbc_post_update()
from intel_fbc_post_update(). Now mirrors the pre_update() side.

The only reason the assignment was in the higher level function
is that we used to call __intel_fbc_post_update() from elsewhere
as well. That got cleaned up in commit b39d2c620242 ("drm/i915/fbc:
Call intel_fbc_activate() directly from frontbuffer flush")

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220620182917.10765-1-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
22 months agodrm/i915: WARN if a port should use VBT provided vswing tables
Ville Syrjälä [Fri, 16 Sep 2022 20:41:32 +0000 (23:41 +0300)]
drm/i915: WARN if a port should use VBT provided vswing tables

We don't parse the VBT vswing/preemphassis tables at all currently.
Let's WARN if a port wants to use them so we get a heads up that
whether we really need to implement this stuff or not. My
current stash contains no VBTs with this bit set.

v2: Move to print_ddi_port() (Jani)

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220916204132.10469-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
22 months agodrm/i915/display: remove ipc_enabled from struct drm_i915_private
Jani Nikula [Fri, 16 Sep 2022 11:38:50 +0000 (14:38 +0300)]
drm/i915/display: remove ipc_enabled from struct drm_i915_private

The ipc_enabled member was supposed to be moved under the display wm
sub-struct, but due to a rebase fail only the new one was added and the
old one was left behind. Finish the job.

Fixes: 70296670f672 ("drm/i915/display: move IPC under display wm sub-struct")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220916113850.3712354-1-jani.nikula@intel.com
22 months agodrm/i915/hotplug: refactor hotplug init slightly
Jani Nikula [Fri, 16 Sep 2022 13:06:34 +0000 (16:06 +0300)]
drm/i915/hotplug: refactor hotplug init slightly

Rename intel_hpd_init_work() to the more generic intel_hpd_init_early(),
and move the hotplug storm initialization there. This lets us move the
HPD_STORM_DEFAULT_THRESHOLD macro to intel_hotplug.c too.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220916130634.3781122-2-jani.nikula@intel.com
22 months agodrm/i915/hotplug: move hotplug storm debugfs to intel_hotplug.c
Jani Nikula [Fri, 16 Sep 2022 13:06:33 +0000 (16:06 +0300)]
drm/i915/hotplug: move hotplug storm debugfs to intel_hotplug.c

The debugfs should be where the implementation details are.

v2: Rebase

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220916130634.3781122-1-jani.nikula@intel.com
22 months agodrm/i915: Fix return type of mode_valid function hook
Nathan Huckleberry [Tue, 13 Sep 2022 20:55:27 +0000 (13:55 -0700)]
drm/i915: Fix return type of mode_valid function hook

All of the functions used for intel_dvo_dev_ops.mode_valid have a return
type of enum drm_mode_status, but the mode_valid field in the struct
definition has a return type of int.

The mismatched return type breaks forward edge kCFI since the underlying
function definitions do not match the function hook definition.

The return type of the mode_valid field should be changed from int to
enum drm_mode_status.

Reported-by: Dan Carpenter <error27@gmail.com>
Link: https://github.com/ClangBuiltLinux/linux/issues/1703
Cc: llvm@lists.linux.dev
Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220913205531.155046-1-nhuck@google.com
22 months agodrm/i915/mtl: Update CHICKEN_TRANS* register addresses
Madhumitha Tolakanahalli Pradeep [Tue, 13 Sep 2022 18:33:41 +0000 (11:33 -0700)]
drm/i915/mtl: Update CHICKEN_TRANS* register addresses

In Display version 14, Transcoder Chicken Registers have updated address.
This patch performs checks to use the right register when required.

v2: Omit display version check in i915_reg.h(Jani)
v3:
 - Remove extra whitespace introduced
 - Fix reg definitions for MTL_CHICKEN_TRANS(MattR)

Bspec: 34387, 50054
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220913183341.908028-6-radhakrishna.sripada@intel.com
22 months agodrm/i915/mtl: Update MBUS_DBOX credits
Radhakrishna Sripada [Tue, 13 Sep 2022 18:33:40 +0000 (11:33 -0700)]
drm/i915/mtl: Update MBUS_DBOX credits

Display version 14 platforms have different credits values
compared to ADL-P. Update the credits based on pipe usage.

v2: Simplify DBOX BW Credit definition(MattR)
v3:
 - Simplify only pipe per dbuf bank check(MattR)
 - Skip modeset check to handle the case when a new pipe within
   dbuf bank gets added/removed.(MattR)

Bspec: 49213

Cc: Jose Roberto de Souza <jose.souza@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Original Author: Caz Yokoyama
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220913183341.908028-5-radhakrishna.sripada@intel.com
22 months agodrm/i915/dsc: convert dsc debugfs entry from output_bpp to input_bpc
Swati Sharma [Fri, 2 Sep 2022 19:06:58 +0000 (00:36 +0530)]
drm/i915/dsc: convert dsc debugfs entry from output_bpp to input_bpc

Convert dsc debugfs entry from output_bpp to input_bpc. The rationale
is to validate different input bpc across various platforms.

v2: -improved commit message (Jani N)
    -styling fixes (Jani N)

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220902190658.9459-2-swati2.sharma@intel.com
22 months agodrm/i915/ipc: use intel_uncore_rmw() to enable/disable
Jani Nikula [Mon, 12 Sep 2022 11:45:16 +0000 (14:45 +0300)]
drm/i915/ipc: use intel_uncore_rmw() to enable/disable

Don't duplicate the rmw function.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/113a17cd18401b0e4c83396575b67aa6efb07346.1662983005.git.jani.nikula@intel.com
22 months agodrm/i915/display: move IPC under display wm sub-struct
Jani Nikula [Mon, 12 Sep 2022 11:45:15 +0000 (14:45 +0300)]
drm/i915/display: move IPC under display wm sub-struct

Move display IPC related member under drm_i915_private display
sub-struct.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/04ccaaceee9293e5a6c75761ba9d36792c36f095.1662983005.git.jani.nikula@intel.com
22 months agodrm/i915/ipc: register debugfs only if IPC available
Jani Nikula [Mon, 12 Sep 2022 11:45:14 +0000 (14:45 +0300)]
drm/i915/ipc: register debugfs only if IPC available

It looks like trying to enable IPC via debugfs on platforms that don't
have IPC resulted in dmesg info message about IPC being enabled, which
is clearly not possible and would not happen.

Seems sensible to register IPC debugfs only on platforms that have IPC.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b18edb4f96c9d2ec728ef04e6f99d161fe5641d1.1662983005.git.jani.nikula@intel.com
22 months agodrm/i915/ipc: move IPC debugfs to skl_watermark.c
Jani Nikula [Mon, 12 Sep 2022 11:45:13 +0000 (14:45 +0300)]
drm/i915/ipc: move IPC debugfs to skl_watermark.c

Follow the new direction for debugfs files, moving the details where the
implementation is. It seems quite natural skl_watermark.c is the place
that controls IPC details, even for debugfs, not
intel_display_debugfs.c.

Rename the functions and convert dev_priv->i915 while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9d59b18f5dc06e86a48c1ce0f40d625f51e3e85a.1662983005.git.jani.nikula@intel.com
22 months agodrm/i915/ipc: refactor and rename IPC functions
Jani Nikula [Mon, 12 Sep 2022 11:45:12 +0000 (14:45 +0300)]
drm/i915/ipc: refactor and rename IPC functions

Rename the IPC functions to have skl_watermark_ipc_ prefix, rename
enable to update to reflect what the function actually does, and add
enabled function to abstract direct ->ipc_enabled access for state
query.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/536237d5bc919e8c97a96796f235f5bb264ceff2.1662983005.git.jani.nikula@intel.com
22 months agodrm/i915/display: Use drm helper instead of own loop for damage clips
Jouni Högander [Tue, 23 Aug 2022 11:29:19 +0000 (14:29 +0300)]
drm/i915/display: Use drm helper instead of own loop for damage clips

Use existing drm_atomic_helper_damage_merged from generic drm code
instead of implementing own loop to iterate over damage_clips.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220823112920.352563-4-jouni.hogander@intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
22 months agodrm/i915/display: Use original src in psr2 sel fetch area calculation
Jouni Högander [Tue, 23 Aug 2022 11:29:18 +0000 (14:29 +0300)]
drm/i915/display: Use original src in psr2 sel fetch area calculation

drm_plane_state->src is modified when offset is calculated:

before calculation:
src.x1 = 8192, src.y1 = 8192

after calculation (pitch = 65536, cpp = 4, alignment = 262144)
src.x1 = 8192, src.y1 = 0, offset = 0x20000000

Damage clips are relative to original coodrdinates provided by
user-space. To compare these against src coordinates we need to use
original coordinates as provided by user-space. These can be obtained
by using drm_plane_state_src.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220823112920.352563-3-jouni.hogander@intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
22 months agodrm/i915/psr: Disable PSR2 when SDP is sent on prior line
Jouni Högander [Mon, 5 Sep 2022 10:23:55 +0000 (13:23 +0300)]
drm/i915/psr: Disable PSR2 when SDP is sent on prior line

Selective update doesn't work if SU start address is 0 and start/end
SDP is configured to be sent prior to SU start/end lines. PSR2 has to be
disabled in this case for Alder Lake.

HSDES: 22012279113

Cc: Mika Kahola <mika.kahola@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220905102355.176622-3-jouni.hogander@intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
22 months agodrm/i915/psr: Equation changed for sending start/stop on prior line
Jouni Högander [Mon, 5 Sep 2022 10:23:54 +0000 (13:23 +0300)]
drm/i915/psr: Equation changed for sending start/stop on prior line

Equation for sending start/end SDP prior to the SU region start/end
has changed. Update used formula.

Bspec: 49274

Cc: Mika Kahola <mika.kahola@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220905102355.176622-2-jouni.hogander@intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
22 months agodrm/i915: Fix TV encoder clock computation
Ville Syrjälä [Fri, 9 Sep 2022 20:59:32 +0000 (23:59 +0300)]
drm/i915: Fix TV encoder clock computation

The TV encoder has its own special clocking strategy,
which means we can't just use intel_crtc_dotclock() to
figure out what the resulting dotclock will be given
the actual DPLL port_clock. Additionally the DPLL can't
always generate exactly the frequency we initially asked
for. This results in us computing a bogus dotclock/etc.,
and it won't match the readout which is handled by the
encoder itself properly. Naturally the state checker
becomes unhappy with the mismatch.

To do this sanely we'll need to move the DPLL computation
into encoder->compute_config() so that all the derived
state gets correctly computed based on the actual DPLL
output frequency. Start doing that just for the TV encoder
initally as intel_crtc_dotclock() should be able to handle
other encoder types well enough. Though eventually this
should be done for all encoder types rather than
doing it from intel_crtc_compute_config().

With this we actually do some of the DPLL state computation
twice, but we can skip the second actual .find_dpll() search
by flagging .clock_set=true after we've done it once. We also
still need to avoid clobbering the correct
adjusted_mode.crtc_clock set up by encoder->compute_config()
when called a second time from intel_crtc_compute_config().

Fixes: 665a7b04092c ("drm/i915: Feed the DPLL output freq back into crtc_state")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220909205932.32537-1-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com>
22 months agodrm/i915/bios: Add the "Disable compression for the Display Port/HDMI external displa...
Ville Syrjälä [Wed, 7 Sep 2022 09:35:34 +0000 (12:35 +0300)]
drm/i915/bios: Add the "Disable compression for the Display Port/HDMI external display" bit

The child device block has gained a new bit for disabling
compression for external displays. Seems stupid, but there it is.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907093534.29004-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
22 months agodrm/i915/bios: Fix VBT ACPI DPMS bit polarity
Ville Syrjälä [Wed, 7 Sep 2022 09:35:33 +0000 (12:35 +0300)]
drm/i915/bios: Fix VBT ACPI DPMS bit polarity

We have the ACPI vs. not ACPI DPMS bit polarity the
wrong way around. Fix it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907093534.29004-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
22 months agodrm/i915/dp: use drm_dp_phy_name() for logging
Jani Nikula [Mon, 12 Sep 2022 13:23:13 +0000 (16:23 +0300)]
drm/i915/dp: use drm_dp_phy_name() for logging

Drop the local intel_dp_phy_name() function, and replace with
drm_dp_phy_name(). This lets us drop a number of local buffers.

v2: Rebase

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912132313.2774603-1-jani.nikula@intel.com
22 months agodrm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailbox
Radhakrishna Sripada [Fri, 2 Sep 2022 06:03:39 +0000 (23:03 -0700)]
drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailbox

From Meteorlake, Latency Level, SAGV bloack time are read from
LATENCY_SAGV register instead of the GT driver pcode mailbox. DDR type
and QGV information are also to be read from Mem SS registers.

v2:
 - Simplify MTL_MEM_SS_INFO_QGV_POINT macro(MattR)
 - Nit: Rearrange the bit def's from higher to lower(MattR)
 - Restore platform definition for ADL-P(MattR)
 - Move back intel_qgv_point def to intel_bw.c(Jani)
v3:
 - Rebase

Bspec: 64636, 64608

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Original Author: Caz Yokoyama
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220902060342.151824-9-radhakrishna.sripada@intel.com
22 months agodrm/i915/mtl: Add DP AUX support on TypeC ports
Imre Deak [Fri, 2 Sep 2022 06:03:38 +0000 (23:03 -0700)]
drm/i915/mtl: Add DP AUX support on TypeC ports

On MTL TypeC ports the AUX_CH_CTL and AUX_CH_DATA addresses have
changed wrt. previous platforms, adjust the code accordingly.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220902060342.151824-8-radhakrishna.sripada@intel.com
22 months agodrm/i915/mtl: Add display power wells
Imre Deak [Fri, 2 Sep 2022 06:03:37 +0000 (23:03 -0700)]
drm/i915/mtl: Add display power wells

Add support for display power wells on MTL. The differences from XE_LPD:
- The AUX HW block is moved to the PICA block, where the registers are on
  an always-on power well and the functionality needs to be powered on/off
  via the AUX_CH_CTL register: [1], [2]
- The DDI IO power on/off programming sequence is moved to the PHY PLL
  enable/disable sequence. [3], [4], [5]

Bspec: [1] 49233, [2] 65247, [3] 64568, [4] 65451, [5] 65450

v2:
 - Update the comment in aux power well enable
 - Reuse the noop sync fn for aux sync.
 - Use REG_BIT for new register bit definitions

Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220902060342.151824-7-radhakrishna.sripada@intel.com
22 months agodrm/i915/mtl: Add gmbus and gpio support
Radhakrishna Sripada [Fri, 2 Sep 2022 06:03:36 +0000 (23:03 -0700)]
drm/i915/mtl: Add gmbus and gpio support

Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC.
From spec we have registers GPIO_CTL[1-5] mapped to native display phys and
GPIO_CTL[9-12] are mapped to TC ports.

v2:
 - Drop unused GPIO pins(MattR)

BSpec: 49306

Cc: Matt Roper <matthew.d.roper@intel.com>
Original Author: Brian J Lovin
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220902060342.151824-6-radhakrishna.sripada@intel.com
22 months agodrm/i915: Move display and media IP version to runtime info
Radhakrishna Sripada [Fri, 2 Sep 2022 22:10:54 +0000 (15:10 -0700)]
drm/i915: Move display and media IP version to runtime info

Future platforms can read the IP version from a register and the
IP version numbers need not be hard coded in device info. Move the
ip version for media and display to runtime info.

On platforms where hard coding of IP version is required, update
the IP version in __runtime under device_info.

v2:
 - Avoid name collision for ip versions(Jani)
v4.1:
 - Fix build error in mock_gem_device.c
v4.2:
 - Use ip instead of version for ip_vesion member.(MattR)

Suggested-by: Jani Nikula <jani.nikula@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220902221054.173524-1-radhakrishna.sripada@intel.com
22 months agoMerge drm/drm-next into drm-intel-next
Jani Nikula [Mon, 12 Sep 2022 08:11:02 +0000 (11:11 +0300)]
Merge drm/drm-next into drm-intel-next

Backmerge to sync the DP MST atomic changes to drm-intel-next.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
22 months agodrm/vkms: fix 32bit compilation error by replacing macros
Melissa Wen [Sat, 10 Sep 2022 19:03:03 +0000 (18:03 -0100)]
drm/vkms: fix 32bit compilation error by replacing macros

Replace vkms_formats macro for fixed-point operations with functions
from drm/drm_fixed.h to do the same job and fix 32-bit compilation
errors.

v2:
- don't cast results to s32 (Igor)
- add missing drm_fixp2int conversion (Igor)

Fixes: a19c2ac9858 ("drm: vkms: Add support to the RGB565 format")
Tested-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com> (v1)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reported-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220910190303.682897-1-mwen@igalia.com
22 months agoMerge tag 'drm-misc-next-2022-09-09' of git://anongit.freedesktop.org/drm/drm-misc...
Dave Airlie [Sun, 11 Sep 2022 11:46:57 +0000 (21:46 +1000)]
Merge tag 'drm-misc-next-2022-09-09' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for v6.1-rc1:

[airlied - fix sun4i_tv build]

UAPI Changes:
- Hide unregistered connectors from GETCONNECTOR ioctl.
- drm/virtio no longer advertises LINEAR modifier, as it doesn't work.
-

Cross-subsystem Changes:
- Fix GPF in udmabuf failure path.

Core Changes:
- Rework TTM placement to use intersect/compatible functions.
- Drop legacy DP-MST support.
- More DP-MST related fixes, and move all state into atomic.
- Make DRM_MIPI_DBI select DRM_KMS_HELPER.
- Add audio_infoframe packing for DP.
- Add logging when some atomic check functions fail.
- Assorted documentation updates and fixes.

Driver Changes:
- Assorted cleanups and fixes in msm, lcdif, nouveau, virtio,
  panel/ilitek, bridge/icn6211, tve200, gma500, bridge/*, panfrost, via,
  bochs, qxl, sun4i.
- Add add AUO B133UAN02.1, IVO M133NW4J-R3, Innolux N120ACA-EA1 eDP panels.
- Improve DP-MST modeset state handling in amdgpu, nouveau, i915.
- Drop DP-MST from radeon driver, it was broken and only user of legacy
  DP-MST.
- Handle unplugging better in vc4.
- Simplify drm cmdparser tests.
- Add DP support to ti-sn65dsi86.
- Add MT8195 DP support to mediatek.
- Support RGB565, XRGB64, and ARGB64 formats in vkms.
- Convert sun4i tv support to atomic.
- Refactor vc4/vec TV Modesetting, and fix timings.
- Use atomic helpers instead of simple display helpers in ssd130x.

Maintainer changes:
- Add Douglas Anderson as reviewer for panel-edp.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/a489485b-3ebc-c734-0f80-aed963d89efe@linux.intel.com
22 months agodrm/i915: Use REG_FIELD_GET() to extract skl+ wm latencies
Ville Syrjälä [Thu, 8 Sep 2022 19:16:46 +0000 (22:16 +0300)]
drm/i915: Use REG_FIELD_GET() to extract skl+ wm latencies

Replace the hand rolled stuff with REG_FIELD_GET() for reading
out the skl+ watermark latencies.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220908191646.20239-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
22 months agodrm/i915: Extract skl_watermark.c
Ville Syrjälä [Thu, 8 Sep 2022 19:16:45 +0000 (22:16 +0300)]
drm/i915: Extract skl_watermark.c

Pull all the skl+ watermark code (and the dbuf/sagv/ipc code
since it's all sort of intertwined and I'm too lazy to think
of a finer grained split right now) into its own file from the
catch-all intel_pm.c.

Also sneak in the s/dev_priv/i915/ rename while at it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220908191646.20239-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
22 months agodrm/i915: Split intel_read_wm_latency() into per-platform versions
Ville Syrjälä [Thu, 8 Sep 2022 19:16:44 +0000 (22:16 +0300)]
drm/i915: Split intel_read_wm_latency() into per-platform versions

No reaon to have this humongous if ladder in intel_read_wm_latency().
Just split it into nicer per-platforms functions.

Also do the s/dev_priv/i915/ while touching all of this code.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220908191646.20239-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
22 months agodrm/i915/dsb: hide struct intel_dsb better
Jani Nikula [Thu, 8 Sep 2022 16:57:02 +0000 (19:57 +0300)]
drm/i915/dsb: hide struct intel_dsb better

struct intel_dsb can be an opaque type, hidden in intel_dsb.c. Make it
so. Reduce related includes while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220908165702.973854-1-jani.nikula@intel.com
22 months agodrm/dp_mst: Avoid deleting payloads for connectors staying enabled
Imre Deak [Wed, 7 Sep 2022 14:25:42 +0000 (17:25 +0300)]
drm/dp_mst: Avoid deleting payloads for connectors staying enabled

When an MST connector stays enabled during a commit the connector's MST
state needs to be added to the atomic state, but the corresponding MST
payload allocation shouldn't be set for deletion; fix such modesets by
ensuring the above even if the connector was already enabled before the
modeset.

The issue led to the following:
[  761.992923] i915 0000:00:02.0: drm_WARN_ON(payload->delete)
[  761.992949] WARNING: CPU: 6 PID: 1401 at drivers/gpu/drm/display/drm_dp_mst_topology.c:4221 drm_dp_atomic_find_time_slots+0x236/0x280 [drm_display_helper]
[  761.992955] Modules linked in: snd_hda_intel i915 drm_buddy drm_display_helper drm_kms_helper ttm drm snd_hda_codec_hdmi snd_intel_dspcfg snd_hda_codec snd_hwdep snd_hda_core snd_pcm prime_numbers i2c_algo_bit syscopyarea sysfillrect sysimgblt fb_sys_fops x86_pkg_temp_thermal cdc_ether coretemp crct10dif_pclmul usbnet crc32_pclmul mii ghash_clmulni_intel e1000e mei_me ptp i2c_i801 pps_core mei i2c_smbus intel_lpss_pci fuse [last unloaded: drm]
[  761.992986] CPU: 6 PID: 1401 Comm: testdisplay Tainted: G     U             6.0.0-rc4-imre+ #565
[  761.992989] Hardware name: Intel Corporation Alder Lake Client Platform/AlderLake-P DDR5 RVP, BIOS ADLPFWI1.R00.3135.A00.2203251419 03/25/2022
[  761.992990] RIP: 0010:drm_dp_atomic_find_time_slots+0x236/0x280 [drm_display_helper]
[  761.992994] Code: 4c 8b 67 50 4d 85 e4 75 03 4c 8b 27 e8 03 28 4e e1 48 c7 c1 8b 26 2c a0 4c 89 e2 48 c7 c7 a8 26 2c a0 48 89 c6 e8 31 d5 88 e1 <0f> 0b 49 8b 85 d0 00 00 00 4c 89 fa 48 c7 c6 a0 41 2c a0 48 8b 78
[  761.992995] RSP: 0018:ffffc9000177ba60 EFLAGS: 00010286
[  761.992998] RAX: 0000000000000000 RBX: ffff88810d2f1540 RCX: 0000000000000000
[  761.992999] RDX: 0000000000000001 RSI: ffffffff82368a25 RDI: 00000000ffffffff
[  761.993000] RBP: ffff888142299d80 R08: ffff8884adbfdfe8 R09: 00000000ffefffff
[  761.993001] R10: ffff8884a6bfe000 R11: ffff8884ac443c30 R12: ffff888102972f90
[  761.993002] R13: ffff8881163e2cf0 R14: 00000000000003ac R15: ffff88810c501000
[  761.993003] FS:  00007f81e4c459c0(0000) GS:ffff888496500000(0000) knlGS:0000000000000000
[  761.993004] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[  761.993005] CR2: 0000555dac962a98 CR3: 0000000123a34006 CR4: 0000000000770ee0
[  761.993006] PKRU: 55555554
[  761.993007] Call Trace:
[  761.993009]  <TASK>
[  761.993012]  intel_dp_mst_compute_config+0x19a/0x350 [i915]
[  761.993090]  intel_atomic_check+0xf37/0x3180 [i915]
[  761.993168]  drm_atomic_check_only+0x5d3/0xa60 [drm]
[  761.993182]  drm_atomic_commit+0x56/0xc0 [drm]
[  761.993192]  ? drm_plane_get_damage_clips.cold+0x1c/0x1c [drm]
[  761.993204]  drm_atomic_helper_set_config+0x78/0xc0 [drm_kms_helper]
[  761.993214]  drm_mode_setcrtc+0x1ed/0x750 [drm]
[  761.993232]  ? drm_mode_getcrtc+0x180/0x180 [drm]
[  761.993241]  drm_ioctl_kernel+0xb5/0x150 [drm]
[  761.993252]  drm_ioctl+0x203/0x3d0 [drm]
[  761.993261]  ? drm_mode_getcrtc+0x180/0x180 [drm]
[  761.993276]  __x64_sys_ioctl+0x8a/0xb0
[  761.993281]  do_syscall_64+0x38/0x90
[  761.993285]  entry_SYSCALL_64_after_hwframe+0x63/0xcd
[  761.993287] RIP: 0033:0x7f81e551aaff
[  761.993288] Code: 00 48 89 44 24 18 31 c0 48 8d 44 24 60 c7 04 24 10 00 00 00 48 89 44 24 08 48 8d 44 24 20 48 89 44 24 10 b8 10 00 00 00 0f 05 <41> 89 c0 3d 00 f0 ff ff 77 1f 48 8b 44 24 18 64 48 2b 04 25 28 00
[  761.993290] RSP: 002b:00007fff4304af10 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
[  761.993292] RAX: ffffffffffffffda RBX: 00007fff4304afa0 RCX: 00007f81e551aaff
[  761.993293] RDX: 00007fff4304afa0 RSI: 00000000c06864a2 RDI: 0000000000000004
[  761.993294] RBP: 00000000c06864a2 R08: 0000000000000000 R09: 0000555dac8a9c68
[  761.993294] R10: 0000000000000000 R11: 0000000000000246 R12: 00000000000008c4
[  761.993295] R13: 0000000000000004 R14: 0000555dac8a9c68 R15: 00007fff4304b098
[  761.993301]  </TASK>

Fixes: 083351e96386 ("drm/display/dp_mst: Fix modeset tracking in drm_dp_atomic_release_vcpi_slots()")
Testcase: igt@testdisplay
Cc: Lyude Paul <lyude@redhat.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907142542.1681994-1-imre.deak@intel.com
22 months agodrm/panel-edp: Add Innolux N120ACA-EA1 panel entry
Chen-Yu Tsai [Thu, 8 Sep 2022 08:54:54 +0000 (16:54 +0800)]
drm/panel-edp: Add Innolux N120ACA-EA1 panel entry

This panel has the same delay timing as N116BCA-EA1 from the same
company, which is also the same as delay_200_500_e80_d50.

Add an entry for it.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220908085454.1024167-2-wenst@chromium.org
22 months agodrm/sun4i: tv: Merge mode_set into atomic_enable
Maxime Ripard [Mon, 29 Aug 2022 13:11:50 +0000 (15:11 +0200)]
drm/sun4i: tv: Merge mode_set into atomic_enable

Our mode_set implementation can be merged into our atomic_enable
implementation to simplify things, so let's do this.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-36-459522d653a7@cerno.tech
22 months agodrm/i915: Round TMDS clock to nearest
Ville Syrjälä [Wed, 7 Sep 2022 09:10:57 +0000 (12:10 +0300)]
drm/i915: Round TMDS clock to nearest

Use round-to-nearest behavour when calculating the TMDS clock.
Matches what we do for most other clock related things.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-18-ville.syrjala@linux.intel.com
22 months agodrm/i915: Use a fixed N value always
Ville Syrjälä [Wed, 7 Sep 2022 09:10:56 +0000 (12:10 +0300)]
drm/i915: Use a fixed N value always

Windows/BIOS always uses fixed N values. Let's match that
behaviour.

Allows us to also get rid of that constant_n quirk stuff.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-17-ville.syrjala@linux.intel.com
22 months agodrm/i915: Allow M/N change during fastset on bdw+
Ville Syrjälä [Wed, 7 Sep 2022 09:10:55 +0000 (12:10 +0300)]
drm/i915: Allow M/N change during fastset on bdw+

On BDW+ M/N are double buffered and so we can easily reprogram them
during a fastset. So for eDP panels that support seamless DRRS we
can just change these without a full modeset.

For earlier platforms we'd need to play tricks with M1/N1 vs.
M2/N2 during the fastset to make sure we do the switch atomically.
Not sure the added complexity is worth the hassle, so leave it
alone for now.

The slight downside is that we have to keep the link running at
a link rate capable of supporting the highest refresh rate we
want to use. For the moment we just pick the highest mode the
panel reports and calculate the link based on that. This might
need further refinement (eg. if we run into bandwidth
restrictions)...

v2: Only use the high link rate if the platform really supports
    the seamless M/N change uring fastset (ie. bdw+)
v3: Rebase due to HAS_DOUBLE_BUFFERED_M_N()

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-16-ville.syrjala@linux.intel.com
22 months agodrm/i915: Add intel_panel_highest_mode()
Ville Syrjälä [Wed, 7 Sep 2022 09:10:54 +0000 (12:10 +0300)]
drm/i915: Add intel_panel_highest_mode()

Add a function to get the fixed_mode with the highest clock.
The plan is to use this for the link bw calculation on seamless
DRRS panels so that we alwasy end up with the same link params
regardless of the requested refresh rate. This will allow fastset
to do seamless refresh rate changes based on userspace request
instead of having to go for a full modeset.

TODO: the function name isn't great

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-15-ville.syrjala@linux.intel.com
22 months agodrm/i915: Skip intel_modeset_pipe_config_late() if the pipe is not enabled
Ville Syrjälä [Wed, 7 Sep 2022 09:10:53 +0000 (12:10 +0300)]
drm/i915: Skip intel_modeset_pipe_config_late() if the pipe is not enabled

No sense in calling intel_modeset_pipe_config_late() for a disabled
pipe.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-14-ville.syrjala@linux.intel.com
22 months agodrm/i915: Nuke fastet state copy hacks
Ville Syrjälä [Wed, 7 Sep 2022 09:10:52 +0000 (12:10 +0300)]
drm/i915: Nuke fastet state copy hacks

Now that we no longer do the fuzzy clock and M/N checks we can
get rid of the fastset state copy hacks.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-13-ville.syrjala@linux.intel.com
22 months agodrm/i915: Set active dpll early for icl+
Ville Syrjälä [Wed, 7 Sep 2022 09:10:51 +0000 (12:10 +0300)]
drm/i915: Set active dpll early for icl+

To make the fastboot checks at least somewhat sensible let's mark
the expected DPLL as the active one right after we finished the
state computation. Otherwise intel_pipe_config_compare() will
always be comparing things against NULL/0.

TODO: This is still not really right. If the previous commit
had to fall back to the other PLL then the comparisong will
now fail. I guess intel_pipe_config_compare() should rather
be comparing port_dplls[] instead. But to do that we really
should just unify every platform to use the port_dplls[]
approach whether they have any need for PLL fallbacks or not.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-12-ville.syrjala@linux.intel.com
22 months agodrm/i915: Make all clock checks non-fuzzy
Ville Syrjälä [Wed, 7 Sep 2022 09:10:50 +0000 (12:10 +0300)]
drm/i915: Make all clock checks non-fuzzy

Now that we backfeed the actual DPLL frequency into the
compute crtc state all our clocks should come out exact.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-11-ville.syrjala@linux.intel.com
22 months agodrm/i915: Make M/N checks non-fuzzy
Ville Syrjälä [Wed, 7 Sep 2022 09:10:49 +0000 (12:10 +0300)]
drm/i915: Make M/N checks non-fuzzy

Now that we no longer fuzz M/N during fastset these should
match exctly.

In order to get a match with what the BIOS does we need to round
M/N down. And we do the opposite rounding when doing the readback.
That gets us pretty much the same thing back.

There can still be slight rounding differences between FDI M/N
vs. the DPLL output so we allow for tiny deviation in
intel_pipe_config_sanity_check().

v2: Tweak rounding/sanity check stuff a bit

Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-10-ville.syrjala@linux.intel.com
22 months agodrm/i915: Compute clocks earlier
Ville Syrjälä [Wed, 7 Sep 2022 09:10:48 +0000 (12:10 +0300)]
drm/i915: Compute clocks earlier

Do the DPLL computation before fastset checks. This should
allow us to get rid of all that horrible fuzzy clock handling
for fastsets. Who knows how many bugs there are caused by our
state not actually matching what the hardware will generate.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-9-ville.syrjala@linux.intel.com