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Davide Italiano [Wed, 16 Nov 2016 05:10:28 +0000 (05:10 +0000)]
[ELF] Convert ELF.h to Expected<T>.
This has two advantages:
1) We slowly move away from ErrorOr to the new handling interface,
in the hope of having an uniform error handling in LLVM, eventually.
2) We're starting to have *meaningful* error messages for invalid
object ELF files, rather than a generic "parse error". At some point
we should include also the offset to improve the quality of the
diagnostic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287081
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Saleem Abdulrasool [Wed, 16 Nov 2016 04:08:46 +0000 (04:08 +0000)]
test: use separate input file for test
Rather than using sed to generate the input and pipe the result to
strings, use the static input instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287079
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Konstantin Zhuravlyov [Wed, 16 Nov 2016 03:39:12 +0000 (03:39 +0000)]
[AMDGPU] Refactor v_mac_{f16, f32} patterns into a class NFC
Differential Revision: https://reviews.llvm.org/D26711
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287077
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Matthias Braun [Wed, 16 Nov 2016 03:38:27 +0000 (03:38 +0000)]
AArch64: Use DeadRegisterDefinitionsPass before regalloc.
Doing this before register allocation reduces register pressure as we do
not even have to allocate a register for those dead definitions.
Differential Revision: https://reviews.llvm.org/D26111
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287076
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Richard Smith [Wed, 16 Nov 2016 03:36:29 +0000 (03:36 +0000)]
Fix build break when the host C compiler is C89.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287075
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Konstantin Zhuravlyov [Wed, 16 Nov 2016 03:16:26 +0000 (03:16 +0000)]
[AMDGPU] Handle f16 select{_cc}
- Select `select` to `v_cndmask_b32`
- Expand `select_cc`
- Refactor patterns
Differential Revision: https://reviews.llvm.org/D26714
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287074
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Dean Michael Berris [Wed, 16 Nov 2016 02:18:23 +0000 (02:18 +0000)]
[XRay][docs] Define requirements on installed log handlers.
Summary:
We update the documentation to define what the requirements are for the
provided XRay log handler. This is to make it clear that the function
pointer provided must do internal synchronisation and that there are no
guarantees provided by XRay on when the function shall be invoked once
it has been installed as a log handler.
Reviewers: rSerge, rengolin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D26651
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287073
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Quentin Colombet [Wed, 16 Nov 2016 01:07:12 +0000 (01:07 +0000)]
[RegAllocGreedy] Record missed hint for late recoloring.
In https://reviews.llvm.org/D25347, Geoff noticed that we still have
useless copy that we can eliminate after register allocation. At the
time the allocation is chosen for those copies, they are not useless
but, because of changes in the surrounding code, later on they might
become useless.
The Greedy allocator already has a mechanism to deal with such cases
with a late recoloring. However, we missed to record the some of the
missed hints.
This commit fixes that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287070
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Rui Ueyama [Wed, 16 Nov 2016 00:59:27 +0000 (00:59 +0000)]
Align Modi and FileInfo substreams on 32-byte offsets.
This is required by DbiStream, but DbiStreamBuilder didn't align
these substreams, so the output of DbiSTreamBuilder couldn't be
read by DbiStream.
Test will be added to LLD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287067
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Vyacheslav Klochkov [Wed, 16 Nov 2016 00:55:50 +0000 (00:55 +0000)]
Fixed the lost FastMathFlags for CALL operations in SLPVectorizer.
Reviewer: Michael Zolotukhin.
Differential Revision: https://reviews.llvm.org/D26575
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287064
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Justin Lebar [Wed, 16 Nov 2016 00:44:47 +0000 (00:44 +0000)]
[BypassSlowDivision] Handle division by constant numerators better.
Summary:
We don't do BypassSlowDivision when the denominator is a constant, but
we do do it when the numerator is a constant.
This patch makes two related changes to BypassSlowDivision when the
numerator is a constant:
* If the numerator is too large to fit into the bypass width, don't
bypass slow division (because we'll never run the smaller-width
code).
* If we bypass slow division where the numerator is a constant, don't
OR together the numerator and denominator when determining whether
both operands fit within the bypass width. We need to check only the
denominator.
Reviewers: tra
Subscribers: llvm-commits, jholewinski
Differential Revision: https://reviews.llvm.org/D26699
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287062
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Justin Lebar [Wed, 16 Nov 2016 00:44:43 +0000 (00:44 +0000)]
[BypassSlowDivision] Simplify partially-tautological if statement.
if (A || (B && A)) --> if (A).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287061
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Rui Ueyama [Wed, 16 Nov 2016 00:38:33 +0000 (00:38 +0000)]
Fix Modi and File count if there are more than 65535 modules/files.
These numbers are intended to be capped at 65535, but
`std::max<uint16_t>(UINT16_MAX, N)` always returns N for any N because
the expression is the same as `std::max((uint16_t)UINT16_MAX, (uint16_t)N)`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287060
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Joerg Sonnenberger [Wed, 16 Nov 2016 00:37:30 +0000 (00:37 +0000)]
Always use relative jump table encodings on PowerPC64.
For the default, small and medium code model, use the existing
difference from the jump table towards the label. For all other code
models, setup the picbase and use the difference between the picbase and
the block address.
Overall, this results in smaller data tables at the expensive of one or
two more arithmetic operation at the jump site. Given that we only create
jump tables with a lot more than two entries, it is a net win in size.
For larger code models the assumption remains that individual functions
are no larger than 2GB.
Differential Revision: https://reviews.llvm.org/D26336
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287059
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Jan Vesely [Tue, 15 Nov 2016 23:55:15 +0000 (23:55 +0000)]
AMDGPU/GCN: Exit early in hazard recognizer if there is no vreg argument
wbinvl.* are vector instruction that do not sue vector registers.
v2: check only M?BUF instructions
Differential Revision: https://reviews.llvm.org/D26633
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287056
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Sanjay Patel [Tue, 15 Nov 2016 23:09:53 +0000 (23:09 +0000)]
[x86] regenerate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287051
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Kevin Enderby [Tue, 15 Nov 2016 23:07:41 +0000 (23:07 +0000)]
General clean up of Mach-O error handling in llvm-objdump.
To get a good error message for all files that could contain Mach-O
files the code in llvm-objdump needs to use the archive member name
and name of the architecture of a slice of a universal file in those cases
where the error come from a Mach-O file in an archive or a universal file.
Most of this is fixed by moving the call to checkSymbolTable() into
ProcessMachO() and calling it when the operation needs the symbol
table. And then calling the form of report_error() that has the
ArchiveName and ArchitectureName arguments. One other place
needed to call this form of report_error() also with these arguments.
Also changed the code in MachODump.cpp to not use report_fatal_error()
and use report_error() instead to make the code smaller and cleaner. All
cases of this are for errors with the symbol table which should now never
be tripped since checkSymbolTable() should be called first to get a good
error message in these cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287050
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Sanjay Patel [Tue, 15 Nov 2016 23:01:11 +0000 (23:01 +0000)]
[x86] auto-generate better checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287049
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Sanjay Patel [Tue, 15 Nov 2016 22:42:20 +0000 (22:42 +0000)]
[x86] auto-generate better checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287048
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Filipe Cabecinhas [Tue, 15 Nov 2016 22:37:30 +0000 (22:37 +0000)]
[AddressSanitizer] Add support for (constant-)masked loads and stores.
This patch adds support for instrumenting masked loads and stores under
ASan, if they have a constant mask.
isInterestingMemoryAccess now supports returning a mask to be applied to
the loads, and instrumentMop will use it to generate additional checks.
Added tests for v4i32 v8i32, and v4p0i32 (~v4i64) for both loads and
stores (as well as a test to verify we don't add checks to non-constant
masks).
Differential Revision: https://reviews.llvm.org/D26230
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287047
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Sanjay Patel [Tue, 15 Nov 2016 22:33:16 +0000 (22:33 +0000)]
[x86] auto-generate better checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287046
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Amaury Sechet [Tue, 15 Nov 2016 22:19:59 +0000 (22:19 +0000)]
[C API] Prevent nullptr dereferences in C API for counting attributes.
See https://reviews.llvm.org/D26392
Patch by @maleadt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287044
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Peter Collingbourne [Tue, 15 Nov 2016 21:36:35 +0000 (21:36 +0000)]
Object: replace backslashes with slashes in embedded relative thin archive paths on Windows.
This makes these thin archives portable between *nix and Windows.
Differential Revision: https://reviews.llvm.org/D26696
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287038
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Chad Rosier [Tue, 15 Nov 2016 21:34:12 +0000 (21:34 +0000)]
[AArch64] Add support for Qualcomm's Falkor CPU.
Differential Revision: https://reviews.llvm.org/D26673
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287036
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Tom Stellard [Tue, 15 Nov 2016 21:25:56 +0000 (21:25 +0000)]
AMDGPU/SI: Fix pattern for i16 = sign_extend i1
Reviewers: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye
Differential Revision: https://reviews.llvm.org/D26670
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287035
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Sanjay Patel [Tue, 15 Nov 2016 21:19:28 +0000 (21:19 +0000)]
[x86] add tests for FP-logic equivalent instruction replacement
The ANDN test needs at least 3 different fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287032
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Chad Rosier [Tue, 15 Nov 2016 21:18:18 +0000 (21:18 +0000)]
[AArch64] Refactor test per Matthias' request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287031
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Kostya Serebryany [Tue, 15 Nov 2016 21:12:50 +0000 (21:12 +0000)]
[sanitizer-coverage] make sure asan does not instrument coverage guards (reported in https://github.com/google/oss-fuzz/issues/84)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287030
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Kuba Brecka [Tue, 15 Nov 2016 21:07:03 +0000 (21:07 +0000)]
Fix llvm-symbolizer to correctly sort a symbol array and calculate symbol sizes
Sometimes, llvm-symbolizer gives wrong results due to incorrect sizes of some symbols. The reason for that was an incorrectly sorted array in computeSymbolSizes. The comparison function used subtraction of unsigned types, which is incorrect. Let's change this to return explicit -1 or 1.
Differential Revision: https://reviews.llvm.org/D26537
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287028
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Tim Northover [Tue, 15 Nov 2016 21:06:07 +0000 (21:06 +0000)]
GlobalISel: remove unused variable to silence warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287027
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Tim Northover [Tue, 15 Nov 2016 20:26:01 +0000 (20:26 +0000)]
llvm-objdump: deal with unexpected object files more gracefully.
Specifically, we don't want to segfault on release builds, so print the problem
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287022
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Matt Arsenault [Tue, 15 Nov 2016 20:22:55 +0000 (20:22 +0000)]
AMDGPU: Enable store clustering
Also respect the TII hook for these like the generic code does
in case we want a flag later to disable this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287021
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Haicheng Wu [Tue, 15 Nov 2016 20:16:48 +0000 (20:16 +0000)]
[AArch64] Lower multiplication by a constant int to shl+add+shl
Lower a = b * C where C = (2^n + 1) * 2^m to
add w0, w0, w0, lsl n
lsl w0, w0, m
Differential Revision: https://reviews.llvm.org/
D229245
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287019
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Matt Arsenault [Tue, 15 Nov 2016 20:14:27 +0000 (20:14 +0000)]
AMDGPU: Analyze mubuf with immediate soffset
Fixes giving up on clustering common addr64 accesses with
constant 0 soffset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287018
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Matt Arsenault [Tue, 15 Nov 2016 19:58:54 +0000 (19:58 +0000)]
AMDGPU: Fix return after else
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287015
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Wei Mi [Tue, 15 Nov 2016 19:42:05 +0000 (19:42 +0000)]
Revert r286999 which caused buildbot test failures. Some testcases need to be made target specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287014
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Matt Arsenault [Tue, 15 Nov 2016 19:34:37 +0000 (19:34 +0000)]
AMDGPU: Replace assert(false) with unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287013
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Davide Italiano [Tue, 15 Nov 2016 19:15:18 +0000 (19:15 +0000)]
[ELF] Rewrite isMips64EL() using isMipsELF64(). NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287011
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Stanislav Mekhanoshin [Tue, 15 Nov 2016 19:00:15 +0000 (19:00 +0000)]
[AMDGPU] Add wave barrier builtin
The wave barrier represents the discardable barrier. Its main purpose is to
carry convergent attribute, thus preventing illegal CFG optimizations. All lanes
in a wave come to convergence point simultaneously with SIMT, thus no special
instruction is needed in the ISA. The barrier is discarded during code generation.
Differential Revision: https://reviews.llvm.org/D26585
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287007
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Sanjay Patel [Tue, 15 Nov 2016 18:44:53 +0000 (18:44 +0000)]
[x86] auto-generate checks; NFC
Also, fix the test params to use an attribute rather than a CPU model
and remove the AVX run because that does nothing but check for a 'v'
prefix in all of these tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287003
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Wei Mi [Tue, 15 Nov 2016 18:35:53 +0000 (18:35 +0000)]
[LSR] Allow formula containing Reg for SCEVAddRecExpr related with outerloop.
In RateRegister of existing LSR, if a formula contains a Reg which is a SCEVAddRecExpr,
and this SCEVAddRecExpr's loop is an outerloop, the formula will be marked as Loser
and dropped.
Suppose we have an IR that %for.body is outerloop and %for.body2 is innerloop. LSR only
handle inner loop now so only %for.body2 will be handled.
Using the logic above, formula like
reg(%array) + reg({1,+, %size}<%for.body>) + 1*reg({0,+,1}<%for.body2>) will be dropped
no matter what because reg({1,+, %size}<%for.body>) is a SCEVAddRecExpr type reg related
with outerloop. Only formula like
reg(%array) + 1*reg({{1,+, %size}<%for.body>,+,1}<nuw><nsw><%for.body2>) will be kept
because the SCEVAddRecExpr related with outerloop is folded into the initial value of the
SCEVAddRecExpr related with current loop.
But in some cases, we do need to share the basic induction variable
reg{0 ,+, 1}<%for.body2> among LSR Uses to reduce the final total number of induction
variables used by LSR, so we don't want to drop the formula like
reg(%array) + reg({1,+, %size}<%for.body>) + 1*reg({0,+,1}<%for.body2>) unconditionally.
From the existing comment, it tries to avoid considering multiple level loops at the same time.
However, existing LSR only handles innermost loop, so for any SCEVAddRecExpr with a loop other
than current loop, it is an invariant and will be simple to handle, and the formula doesn't have
to be dropped.
Differential Revision: https://reviews.llvm.org/D26429
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286999
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Pawel Bylica [Tue, 15 Nov 2016 18:29:24 +0000 (18:29 +0000)]
Integer legalization: fix MUL expansion
Summary:
This fixes the runtime results produces by the fallback multiplication expansion introduced in r270720.
For tests I created a fuzz tester that compares the results with Boost.Multiprecision.
Reviewers: hfinkel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D26628
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286998
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Zaara Syeda [Tue, 15 Nov 2016 17:54:19 +0000 (17:54 +0000)]
vector load store with length (left justified) llvm portion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286993
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Sanjay Patel [Tue, 15 Nov 2016 17:47:13 +0000 (17:47 +0000)]
fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286989
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Wei Mi [Tue, 15 Nov 2016 17:34:52 +0000 (17:34 +0000)]
[IndVars] Change the order to compute WidenAddRec in widenIVUse.
When both WidenIV::getWideRecurrence and WidenIV::getExtendedOperandRecurrence
return non-null but different WideAddRec, if getWideRecurrence is called
before getExtendedOperandRecurrence, we won't bother to call
getExtendedOperandRecurrence again. But As we know it is possible that after
SCEV folding, we cannot prove the legality using the SCEVAddRecExpr returned
by getWideRecurrence. Meanwhile if getExtendedOperandRecurrence returns non-null
WideAddRec, we know for sure that it is legal to do widening for current instruction.
So it is better to put getExtendedOperandRecurrence before getWideRecurrence, which
will increase the chance of successful widening.
Differential Revision: https://reviews.llvm.org/D26059
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286987
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Diana Picus [Tue, 15 Nov 2016 16:42:10 +0000 (16:42 +0000)]
[ARM] GlobalISel: Remove unused members. NFCI
This silences some warnings that I didn't see with my host compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286981
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Craig Topper [Tue, 15 Nov 2016 16:27:33 +0000 (16:27 +0000)]
[AVX-512] Add AVX-512 vector shift intrinsics to memory santitizer.
Just needed to add the intrinsics to the exist switch. The code is generic enough to support the wider vectors with no changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286980
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Simon Pilgrim [Tue, 15 Nov 2016 16:24:40 +0000 (16:24 +0000)]
[X86][SSE] Improve SINT_TO_FP of boolean vector results (signum)
This patch helps avoids poor legalization of boolean vector results (e.g. 8f32 -> 8i1 -> 8i16) that feed into SINT_TO_FP by inserting an early SIGN_EXTEND and so help improve the truncation logic.
This is not necessary for AVX512 targets where boolean vectors are legal - AVX512 manages to lower ( sint_to_fp vXi1 ) into some form of ( select mask, 1.0f , 0.0f ) in most cases.
Fix for PR13248
Differential Revision: https://reviews.llvm.org/D26583
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286979
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Sanjay Patel [Tue, 15 Nov 2016 16:01:16 +0000 (16:01 +0000)]
[InstCombine] add tests for bitcasted selects; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286978
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Pablo Barrio [Tue, 15 Nov 2016 15:42:23 +0000 (15:42 +0000)]
Revert "[JumpThreading] Unfold selects that depend on the same condition"
This reverts commit
ac54d0066c478a09c7cd28d15d0f9ff8af984afc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286976
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Pablo Barrio [Tue, 15 Nov 2016 15:42:17 +0000 (15:42 +0000)]
Revert "[JumpThreading] Prevent non-deterministic use lists"
This reverts commit
f2c2f5354070469dac253373c66527ca971ddc66.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286975
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Diana Picus [Tue, 15 Nov 2016 15:38:15 +0000 (15:38 +0000)]
[ARM] Make sure GlobalISel is only initialized once. NFCI
Move some code inside the proper 'if' block to make sure it is only run once,
when the subtarget is first created. Things can still break if we use different
ARM target machines or if we have functions with different 'target-cpu' or
'target-features', we should fix that too in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286974
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Robert Lougher [Tue, 15 Nov 2016 14:27:33 +0000 (14:27 +0000)]
[LoopVectorizer] When estimating reg usage, unused insts may "end" another use
The register usage algorithm incorrectly treats instructions whose value is
not used within the loop (e.g. those that do not produce a value).
The algorithm first calculates the usages within the loop. It iterates over
the instructions in order, and records at which instruction index each use
ends (in fact, they're actually recorded against the next index, as this is
when we want to delete them from the open intervals).
The algorithm then iterates over the instructions again, adding each
instruction in turn to a list of open intervals. Instructions are then
removed from the list of open intervals when they occur in the list of uses
ended at the current index.
The problem is, instructions which are not used in the loop are skipped.
However, although they aren't used, the last use of a value may have been
recorded against that instruction index. In this case, the use is not deleted
from the open intervals, which may then bump up the estimated register usage.
This patch fixes the issue by simply moving the "is used" check after the loop
which erases the uses at the current index.
Differential Revision: https://reviews.llvm.org/D26554
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286969
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Tony Jiang [Tue, 15 Nov 2016 14:25:56 +0000 (14:25 +0000)]
[PowerPC] Implement BE VSX load/store builtins - llvm portion.
This patch implements all the overloads for vec_xl_be and vec_xst_be. On BE,
they behaves exactly the same with vec_xl and vec_xst, therefore they are
simply implemented by defining a matching macro. On LE, they are implemented
by defining new builtins and intrinsics. For int/float/long long/double, it
is just a load (lxvw4x/lxvd2x) or store(stxvw4x/stxvd2x). For char/char/short,
we also need some extra shuffling before or after call the builtins to get the
desired BE order. For int128, simply call vec_xl or vec_xst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286967
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Diana Picus [Tue, 15 Nov 2016 14:11:11 +0000 (14:11 +0000)]
Get GlobalISel to build on Linux after r286407
r286407 has introduced calls to llvm::AddLandingPadInfo, which lives in the
SelectionDAG component. Add it to LLVMBuild to avoid linker failures on Linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286962
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Zvi Rackover [Tue, 15 Nov 2016 13:50:35 +0000 (13:50 +0000)]
[X86][FastISel] Assert that we are dealing with arithmetic with overflow intrinsics. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286961
91177308-0d34-0410-b5e6-
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Sam Kolton [Tue, 15 Nov 2016 13:39:07 +0000 (13:39 +0000)]
[AMDGPU] TableGen: change individual instruction flags to bit type from bits<1>
Summary: This is needed to be able to use this flags in InstrMappings.
Reviewers: tstellarAMD, vpykhtin
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye
Differential Revision: https://reviews.llvm.org/D26666
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286960
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Zvi Rackover [Tue, 15 Nov 2016 13:29:23 +0000 (13:29 +0000)]
[X86][FastISel] Fix lowering of overflow result on AVX512 targets
Summary:
Fix a case where the overflow value of type i1, which is legal on AVX512, was assigned to a VK1 register class.
We always want this value to be assigned to a GPR since the overflow return value is lowered to a SETO instruction.
Fixes pr30981.
Reviewers: mkuper, igorb, craig.topper, guyblank, qcolombet
Subscribers: qcolombet, llvm-commits
Differential Revision: https://reviews.llvm.org/D26620
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286958
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Florian Hahn [Tue, 15 Nov 2016 13:28:42 +0000 (13:28 +0000)]
Test commit, remove trailing space.
This commit is used to test commit access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286957
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Rafael Espindola [Tue, 15 Nov 2016 13:21:32 +0000 (13:21 +0000)]
clang format include/llvm/Support/ELF.h. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286956
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NAKAMURA Takumi [Tue, 15 Nov 2016 13:16:50 +0000 (13:16 +0000)]
DWARFAbbreviationDeclaration.h: Fix a typo in r286924. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286954
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Joerg Sonnenberger [Tue, 15 Nov 2016 12:39:46 +0000 (12:39 +0000)]
Introduce TLI predicative for base-relative Jump Tables.
For 64bit ABIs it is common practice to use relative Jump Tables with
potentially different relocation bases. As the logic for the jump table
itself doesn't depend on the relocation base, make it easier for targets
to use the generic logic. Start by dropping the now redundant MIPS logic.
Differential Revision: https://reviews.llvm.org/D26578
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286951
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Javed Absar [Tue, 15 Nov 2016 11:34:54 +0000 (11:34 +0000)]
[ARM] Add machine scheduler for Cortex-R52
This patch adds the Sched Machine Model for Cortex-R52.
Details of the pipeline and descriptions are in comments
in file ARMScheduleR52.td included in this patch.
Reviewers: rengolin, jmolloy
Differential Revision: https://reviews.llvm.org/D26500
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286949
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Daniel Sanders [Tue, 15 Nov 2016 10:13:09 +0000 (10:13 +0000)]
Fix -Wunused introduced in r286945 for release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286946
91177308-0d34-0410-b5e6-
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Daniel Sanders [Tue, 15 Nov 2016 09:51:02 +0000 (09:51 +0000)]
[tablegen] Extract portions of AsmMatcherEmitter for re-use by another generator. NFC.
Summary:
This change is preparation for a change that will allow targets to verify that the instructions
they emit meet the predicates they specify. This is useful to ensure that C++
legalization/lowering/instruction-selection doesn't incorrectly select code for a different
subtarget than intended. Such cases are not caught by the integrated assembler when emitting
instructions directly to an object file.
Reviewers: qcolombet
Subscribers: qcolombet, beanz, mgorny, llvm-commits, modocache
Differential Revision: https://reviews.llvm.org/D25614
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286945
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Adam Nemet [Tue, 15 Nov 2016 08:40:51 +0000 (08:40 +0000)]
[opt-viewer] Add support for libYAML for faster parsing
This results in a speed-up of over 6x on sqlite3.
Before:
$ time -p /org/llvm/utils/opt-viewer/opt-viewer.py ./MultiSource/Applications/sqlite3/CMakeFiles/sqlite3.dir/sqlite3.c.opt.yaml html
real 415.07
user 410.00
sys 4.66
After with libYAML:
$ time -p /org/llvm/utils/opt-viewer/opt-viewer.py ./MultiSource/Applications/sqlite3/CMakeFiles/sqlite3.dir/sqlite3.c.opt.yaml html
real 63.96
user 60.03
sys 3.67
I followed these steps to get libYAML working with PyYAML: http://rmcgibbo.github.io/blog/2013/05/23/faster-yaml-parsing-with-libyaml/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286942
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Asaf Badouh [Tue, 15 Nov 2016 07:55:22 +0000 (07:55 +0000)]
DAGCombiner: fix combine of trunc and select
bugzilla:
https://llvm.org/bugs/show_bug.cgi?id=29002
pr29002
Differential Revision: https://reviews.llvm.org/D26449
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286938
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Matt Arsenault [Tue, 15 Nov 2016 06:49:28 +0000 (06:49 +0000)]
TableGen: Add operator !or
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286936
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Zvi Rackover [Tue, 15 Nov 2016 06:34:33 +0000 (06:34 +0000)]
[X86][GlobalISel] Add minimal call lowering support to the IRTranslator
Summary:
Add basic functionality to support call lowering for X86.
Currently only supports functions which return void and take zero arguments.
Inspired by commit 286573.
Reviewers: ab, qcolombet, t.p.northover
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D26593
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286935
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Craig Topper [Tue, 15 Nov 2016 05:21:55 +0000 (05:21 +0000)]
[AVX-512] Add an example test case for PR31018.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286934
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Craig Topper [Tue, 15 Nov 2016 05:04:51 +0000 (05:04 +0000)]
[X86] Add LLVM version number for each intrinsic handled by auto upgrade for age tracking.
One day we'd like to remove some of this autoupgrade support and it will be easier if we know how long some of it has been around.
Differential Revision: https://reviews.llvm.org/D26321
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286933
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Matt Arsenault [Tue, 15 Nov 2016 02:25:28 +0000 (02:25 +0000)]
AMDGPU: Fix f16 fabs/fneg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286931
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Lang Hames [Tue, 15 Nov 2016 02:14:57 +0000 (02:14 +0000)]
[ORC] Work around an apparent modules/linkage issue.
<rdar://problem/
29247092>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286930
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Rui Ueyama [Tue, 15 Nov 2016 01:57:05 +0000 (01:57 +0000)]
Simplify identify_magic.
This patch defines a memcmp-ish helper function to simplify identify_magic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286928
91177308-0d34-0410-b5e6-
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Greg Clayton [Tue, 15 Nov 2016 01:23:06 +0000 (01:23 +0000)]
Improve DWARF parsing speed by improving DWARFAbbreviationDeclaration
This patch gets a DWARF parsing speed improvement by having DWARFAbbreviationDeclaration instances know if they have a fixed byte size. If an abbreviation has a fixed byte size that can be calculated given a DWARFUnit, then parsing a DIE becomes two steps: parse ULEB128 abbrev code, and then add constant size to the offset.
This patch also adds a fixed byte size to each DWARFAbbreviationDeclaration::AttributeSpec so that attributes can quickly skip their values if needed without the need to lookup the fixed for size.
Notable improvements:
- DWARFAbbreviationDeclaration::findAttributeIndex() now returns an Optional<uint32_t> instead of a uint32_t and we no longer have to look for the magic -1U return value
- Optional<uint32_t> DWARFAbbreviationDeclaration::findAttributeIndex(dwarf::Attribute attr) const;
- DWARFAbbreviationDeclaration now has a getAttributeValue() function that extracts an attribute value given a DIE offset that takes advantage of the DWARFAbbreviationDeclaration::AttributeSpec::ByteSize
- bool DWARFAbbreviationDeclaration::getAttributeValue(const uint32_t DIEOffset, const dwarf::Attribute Attr, const DWARFUnit &U, DWARFFormValue &FormValue) const;
- A DWARFAbbreviationDeclaration instance can return a fixed byte size for itself so DWARF parsing is faster:
- Optional<size_t> DWARFAbbreviationDeclaration::getFixedAttributesByteSize(const DWARFUnit &U) const;
- Any functions that used to take a "const DWARFUnit *U" that would crash if U was NULL now take a "const DWARFUnit &U" and are only called with a valid DWARFUnit
Differential Revision: https://reviews.llvm.org/D26567
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286924
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Rui Ueyama [Tue, 15 Nov 2016 00:58:50 +0000 (00:58 +0000)]
Fix -Wswitch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286920
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Rui Ueyama [Tue, 15 Nov 2016 00:54:54 +0000 (00:54 +0000)]
Add a file magic for CL.exe's object file created with /GL.
This patch makes it possible to identify object files created by CL.exe
with /GL option. Such file contains Microsoft proprietary intermediate
code instead of target machine code to do LTO.
I need this to print out user-friendly error message from LLD.
Differential Revision: https://reviews.llvm.org/D26645
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286919
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Lang Hames [Tue, 15 Nov 2016 00:49:12 +0000 (00:49 +0000)]
[ORC] Temporarily disable RPCUtils unit test.
This broke s390x due to a bug in the QueueChannel implementation that led to it
infinite-looping. Disabling it while I look into a fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286917
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Saleem Abdulrasool [Tue, 15 Nov 2016 00:43:52 +0000 (00:43 +0000)]
llvm-strings: support the `-n` option
Permit specifying the match length (the `-n` or `--bytes` option). The
deprecated `-[length]` form is not supported as an option. This allows the
strings tool to display only the specified length strings rather than the
hardcoded default length of >= 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286914
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Matt Arsenault [Tue, 15 Nov 2016 00:05:42 +0000 (00:05 +0000)]
AMDGPU: Set hasExtraSrcRegAllocReq on v_div_scale_*
This doesn't solve any problems I know about, but this should have
more conservative assumptions about the operands'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286913
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Matt Arsenault [Tue, 15 Nov 2016 00:04:33 +0000 (00:04 +0000)]
AMDGPU: Fix formatting of 1/2pi immediate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286912
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Tom Stellard [Tue, 15 Nov 2016 00:03:14 +0000 (00:03 +0000)]
MIRParser: Add support for parsing vreg reg alloc hints
Reviewers: qcolombet, MatzeB
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D26573
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286911
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Vitaly Buka [Tue, 15 Nov 2016 00:01:40 +0000 (00:01 +0000)]
Avoid calling std::memcmp with nullptr
Summary:
UBSAN complains that this is undefined behavior.
We can assume that empty substring (N==1) always satisfy conditions. So
std::memcmp will be called only only for N > 1 and Str.size() > 0.
Reviewers: ruiu, zturner
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D26646
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286910
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Evandro Menezes [Mon, 14 Nov 2016 23:29:01 +0000 (23:29 +0000)]
[AArch64] Compute the Newton series for reciprocals natively
Implement the Newton series for square root, its reciprocal and reciprocal
natively using the specialized instructions in AArch64 to perform each
series iteration.
Differential revision: https://reviews.llvm.org/D26518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286907
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Peter Collingbourne [Mon, 14 Nov 2016 23:18:38 +0000 (23:18 +0000)]
Linker: Remove unnecessary call to copyMetadata in IRLinker::linkGlobalVariable.
This was causing us to create duplicate metadata on global variables.
Debug info test case by Adrian Prantl, additional test cases by me.
Fixes PR31012.
Differential Revision: https://reviews.llvm.org/D26622
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286905
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Tim Northover [Mon, 14 Nov 2016 22:50:22 +0000 (22:50 +0000)]
GlobalISel: add tests for G_ZEXT/G_SEXT to types smaller than 32-bits.
Support was accidentally added in r286407, but there were no tests at the time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286903
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Sanjay Patel [Mon, 14 Nov 2016 22:44:06 +0000 (22:44 +0000)]
[InstCombine] add tests to show missing bitcast folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286900
91177308-0d34-0410-b5e6-
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Adrian Prantl [Mon, 14 Nov 2016 22:09:18 +0000 (22:09 +0000)]
Remove redundant uses of \brief.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286897
91177308-0d34-0410-b5e6-
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Vitaly Buka [Mon, 14 Nov 2016 22:05:19 +0000 (22:05 +0000)]
Don't pass nullptr into memcpy
Summary:
It's undefined according UBSAN.
Not sure which CL caused test failures, but seems writeBytes for empty buffer
should be OK.
Reviewers: rnk, zturner
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D26638
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286896
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Tom Stellard [Mon, 14 Nov 2016 21:50:13 +0000 (21:50 +0000)]
RegAllocGreedy: Properly initialize this pass, so that -run-pass will work
Reviewers: qcolombet, MatzeB
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D26572
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286895
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Kuba Brecka [Mon, 14 Nov 2016 21:41:13 +0000 (21:41 +0000)]
[tsan] Add support for C++ exceptions into TSan (call __tsan_func_exit during unwinding), LLVM part
This adds support for TSan C++ exception handling, where we need to add extra calls to __tsan_func_exit when a function is exitted via exception mechanisms. Otherwise the shadow stack gets corrupted (leaked). This patch moves and enhances the existing implementation of EscapeEnumerator that finds all possible function exit points, and adds extra EH cleanup blocks where needed.
Differential Revision: https://reviews.llvm.org/D26177
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286893
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Saleem Abdulrasool [Mon, 14 Nov 2016 21:10:41 +0000 (21:10 +0000)]
Revert "Revert "llvm-strings: support printing the filename""
Change the dynamic files to static in the hope that it will actually fix the
transient errors that Ive been unable to reproduce.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286891
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Kevin Enderby [Mon, 14 Nov 2016 20:57:04 +0000 (20:57 +0000)]
Add a checkSymbolTable() method to the MachOObjectFile class.
The philosophy of the error checking in libObject for Mach-O files
is that the constructor will check the load commands so for their
tables the offsets and sizes are properly contained in the file.
But there is no checking of the entries of any of the tables.
For the contents of the tables themselves the methods accessing
the contents of the entries return errors as needed. In some
cases this however makes it difficult or cumbersome to produce
a good error message which would include the tool name, file name,
archive member, and name of the architecture of a slice of a universal file
the error occurred in.
So idea is that there will be a method to check a table which can
be called up front before using it allowing a good error message
to be produced before a table is used. And if only verification of
the Mach-O file and its tables are wanted a new possible method
checkAllTables() could be added to call all of the methods to
check all the tables at some time when such methods exist.
The checkSymbolTable() is the first of such methods to check
one of the Mach-O file tables. This method initially will used in
llvm-objdump’s DisassembleMachO() routine before it gets the
section and symbol information. As if there are problems with
the symbol table currently the error is first encountered by the
bool operator() in the SymbolSorter() struct which passed to
std::sort(). In this case there is no context as to the file name
the symbol which results a poor error message:
LLVM ERROR: truncated or malformed object (bad string index: 22 for symbol at index 1)
with the added call to the checkSymbolTable() method the
error message includes the tool name and file name:
llvm-objdump: 'macho-invalid-symbol-strx': truncated or malformed object (bad string table index: 22 past the end of string table, for symbol at index 1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286887
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Krzysztof Parzyszek [Mon, 14 Nov 2016 20:53:09 +0000 (20:53 +0000)]
[Hexagon] Give a predicate function a more meaningful name
Change "orisadd" to "IsOrAdd" to follow the naming conventions, and
change "isOrAdd" in the C++ code to "isOrEquivalentToAdd".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286886
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Tim Northover [Mon, 14 Nov 2016 20:31:53 +0000 (20:31 +0000)]
ARM: try to fix GCC 4.8 compilation again after r286881.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286882
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Tim Northover [Mon, 14 Nov 2016 20:28:24 +0000 (20:28 +0000)]
Recommit: ARM: sort register lists by encoding in push/pop instructions.
For example we were producing
push {r8, r10, r11, r4, r5, r7, lr}
This is misleading (r4, r5 and r7 are actually pushed before the rest), and
other components (stack folding recently) often forget to deal with the extra
complexity coming from the different order, leading to miscompiles. Finally, we
warn about our own code in -no-integrated-as mode without this, which is really
not a good idea.
Fixed usage of std::sort so that we (hopefully) use instantiations that
actually exist in GCC 4.8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286881
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Geoff Berry [Mon, 14 Nov 2016 19:59:11 +0000 (19:59 +0000)]
[AArch64] Change some pointers to references. NFC.
Follow-up change to r286875.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286879
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Michael Kuperstein [Mon, 14 Nov 2016 19:58:11 +0000 (19:58 +0000)]
[X86] Tests exhibiting bad parial reloading behavior. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286878
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Geoff Berry [Mon, 14 Nov 2016 19:39:04 +0000 (19:39 +0000)]
[AArch64] Split 0 vector stores into scalar store pairs.
Summary:
Replace a splat of zeros to a vector store by scalar stores of WZR/XZR.
The load store optimizer pass will merge them to store pair stores.
This should be better than a movi to create the vector zero followed by
a vector store if the zero constant is not re-used, since one
instructions and one register live range will be removed.
For example, the final generated code should be:
stp xzr, xzr, [x0]
instead of:
movi v0.2d, #0
str q0, [x0]
Reviewers: t.p.northover, mcrosier, MatzeB, jmolloy
Subscribers: aemerson, rengolin, llvm-commits
Differential Revision: https://reviews.llvm.org/D26561
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286875
91177308-0d34-0410-b5e6-
96231b3b80d8
Geoff Berry [Mon, 14 Nov 2016 19:39:00 +0000 (19:39 +0000)]
[AArch64] Factor out transform code from split16BStore. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286874
91177308-0d34-0410-b5e6-
96231b3b80d8