OSDN Git Service
Anders Waldenborg [Tue, 15 Oct 2013 12:08:59 +0000 (12:08 +0000)]
Add AllTargetsBindings sublibrary instead of having static inlines in the llvm-c headers.
This new library will be linked in when using the "all-targets"
component and contains the LLVMInitializeAll* functions.
This means that those functions will exist as real symbols in
the shared library, and can therefore can be called from
bindings that are using ffi the shared library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192690
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Richard Sandiford [Tue, 15 Oct 2013 08:42:59 +0000 (08:42 +0000)]
[SystemZ] Use A(G)SI when spilling the target of a constant addition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192681
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David Majnemer [Tue, 15 Oct 2013 08:30:07 +0000 (08:30 +0000)]
docs: Remove incompatibility with Solaris shell
There doesn't seem to be a need in checking if a directory exists if we
will just rm -rf it once we affirm that it does. Instead, just blindly
try to delete it.
This fixes PR17541.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192679
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Job Noorman [Tue, 15 Oct 2013 08:19:39 +0000 (08:19 +0000)]
Fix MSP430 calling convention to match MSPGCC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192678
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NAKAMURA Takumi [Tue, 15 Oct 2013 06:36:36 +0000 (06:36 +0000)]
llvm/test/CodeGen/X86/break-avx-dep.ll: Relax an expression to be matched to also r[89], not only rXX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192675
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Craig Topper [Tue, 15 Oct 2013 05:20:47 +0000 (05:20 +0000)]
Remove x86_sse42_crc32_64_8 intrinsic. It has no functional difference from x86_sse42_crc32_32_8 and was not mapped to a clang builtin. I'm not even sure why this form of the instruction is even called out explicitly in the docs. Also add AutoUpgrade support to convert it into the other intrinsic with appropriate trunc and zext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192672
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Andrew Trick [Tue, 15 Oct 2013 03:39:43 +0000 (03:39 +0000)]
Improve on r192635, ExeDepsFix for avx, and add a test case.
rdar:
15221834 False AVX register dependencies cause 5x slowdown on
flops-5/6 and significant slowdown on several others.
This was blocking the switch to MI-Sched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192669
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Chandler Carruth [Tue, 15 Oct 2013 02:03:44 +0000 (02:03 +0000)]
Simplify formatting and sort these. No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192668
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Akira Hatanaka [Tue, 15 Oct 2013 01:48:30 +0000 (01:48 +0000)]
[mips] Define a pseudo instruction which writes to both the lower and higher
parts of the accumulators and gets expanded post-RA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192667
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Akira Hatanaka [Tue, 15 Oct 2013 01:21:37 +0000 (01:21 +0000)]
[mips] Use predicates to guard instructions using accumulator registers instead
of relying on AddedComplexity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192665
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Akira Hatanaka [Tue, 15 Oct 2013 01:12:50 +0000 (01:12 +0000)]
[mips] Rename isel nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192663
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Akira Hatanaka [Tue, 15 Oct 2013 01:06:30 +0000 (01:06 +0000)]
[mips] Transfer kill flag to the newly created operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192662
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Akira Hatanaka [Tue, 15 Oct 2013 01:00:00 +0000 (01:00 +0000)]
[mips] Set HI/LO registers' HWEncoding field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192661
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Akira Hatanaka [Tue, 15 Oct 2013 00:48:42 +0000 (00:48 +0000)]
[mips] Delete unnecessary code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192660
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Rafael Espindola [Mon, 14 Oct 2013 23:40:11 +0000 (23:40 +0000)]
Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192642
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Michael Gottesman [Mon, 14 Oct 2013 22:36:51 +0000 (22:36 +0000)]
Update comment list of GLOBALVAR modifiers in BitcodeWriter to include externally_initialized.
Thanks to Shuxin Yang for catching this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192637
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Quentin Colombet [Mon, 14 Oct 2013 22:32:09 +0000 (22:32 +0000)]
[X86][FastISel] During X86 fastisel, the address of indirect call was resolved
through bitcast, ptrtoint, and inttoptr instructions. This is valid
only if the related instructions are in that same basic block, otherwise
we may reference variables that were not live accross basic blocks
resulting in undefined virtual registers.
The bug was exposed when both SDISel and FastISel were used within the same
function, i.e., one basic block is issued with FastISel and another with SDISel,
as demonstrated with the testcase.
<rdar://problem/
15192473>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192636
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Andrew Trick [Mon, 14 Oct 2013 22:19:03 +0000 (22:19 +0000)]
Fix the ExecutionDepsFix pass to handle AVX instructions.
This pass is needed to break false dependencies. Without it, unlucky
register assignment can result in wild (5x) swings in
performance. This pass was trying to handle AVX but not getting it
right. AVX doesn't have partial register defs, it has unused register
reads in which the high bits of a source operand are copied into the
unused bits of the dest.
Fixing this requires conservative liveness analysis. This is awkard
because the pass already has its own pseudo-liveness. However, proper
liveness is expensive, and we would like to use a generic utility to
compute it. The fix only invokes liveness on-demand. It is rare to
detect a case that needs undef-read dependence breaking, but when it
happens, it can be needed many times within a very large block.
I think the existing heuristic which uses a register window of 16 is
too conservative for loop-carried false dependencies. If the loop is a
reduction. The out-of-order engine may be able to execute several loop
iterations in parallel. However, I'll leave this tuning exercise for
next time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192635
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Andrew Trick [Mon, 14 Oct 2013 22:18:59 +0000 (22:18 +0000)]
LiveRegUnits: Use *MBB for consistency and convenience.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192634
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Andrew Trick [Mon, 14 Oct 2013 22:18:56 +0000 (22:18 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192633
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Nick Lewycky [Mon, 14 Oct 2013 22:02:53 +0000 (22:02 +0000)]
Fix a typo, in a comment, in a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192632
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Eric Christopher [Mon, 14 Oct 2013 21:52:26 +0000 (21:52 +0000)]
Revert part of a fix from 2010, changes since then:
a) x86-64 TLS has been documented
b) the code path should use movq for the correct relocation
to be generated.
I've also added a fixme for the test case that we should improve
the code generated, it should look something like is documented
in the tls abi document.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192631
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Eric Christopher [Mon, 14 Oct 2013 21:52:23 +0000 (21:52 +0000)]
Reformat this routine slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192630
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Eric Christopher [Mon, 14 Oct 2013 21:52:18 +0000 (21:52 +0000)]
Remove some extraneous whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192629
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Andrew Trick [Mon, 14 Oct 2013 20:45:19 +0000 (20:45 +0000)]
LiveRegUnits::removeRegsInMask safety.
Clobbering is exclusive not inclusive on register units.
For liveness, we need to consider all the preserved registers.
e.g. A regmask that clobbers YMM0 may preserve XMM0.
Units are only clobbered when all super-registers are clobbered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192623
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Andrew Trick [Mon, 14 Oct 2013 20:45:17 +0000 (20:45 +0000)]
Use a SparseSet in LiveRegUnits.
Some clients may add block live ins and may track liveness over a
large scope. This guarantees an efficient implementation in all cases
with no memory allocation/deallocation, independent of the number of
target registers. It could be slightly less convenient but is fine in
the expected case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192622
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Andrew Trick [Mon, 14 Oct 2013 20:45:14 +0000 (20:45 +0000)]
Move LiveRegUnits implementation into .cpp. Comment and format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192621
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Andrew Trick [Mon, 14 Oct 2013 20:45:11 +0000 (20:45 +0000)]
Remove extra indentation in LiveRegUnits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192620
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Andrew Trick [Mon, 14 Oct 2013 20:45:09 +0000 (20:45 +0000)]
Convert LiveRegUnits methods to the current convention (it's new code).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192619
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Manman Ren [Mon, 14 Oct 2013 20:33:57 +0000 (20:33 +0000)]
Debug Info: static member DIE creation.
Clean up creation of static member DIEs. We can create static member DIEs from
two places, so we call getOrCreateStaticMemberDIE from the two places.
getOrCreateStaticMemberDIE will get or create the context DIE first, then it
will check if the DIE already exists, if not, we create the static member DIE
and add it to the context.
Creation of static member DIEs are handled in a similar way as subprogram DIEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192618
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David Blaikie [Mon, 14 Oct 2013 20:15:04 +0000 (20:15 +0000)]
Fix indenting.
That wasn't confusing /at all/...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192617
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Hans Wennborg [Mon, 14 Oct 2013 18:16:37 +0000 (18:16 +0000)]
vs2013 msbuild integration: add missing .target files, fix typo in CMakeLists
This should fix PR17568.
Patch by Josh Samuel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192610
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Will Dietz [Mon, 14 Oct 2013 16:57:17 +0000 (16:57 +0000)]
MachineSink: Fix and tweak critical-edge breaking heuristic.
Per original comment, the intention of this loop
is to go ahead and break the critical edge
(in order to sink this instruction) if there's
reason to believe doing so might "unblock" the
sinking of additional instructions that define
registers used by this one. The idea is that if
we have a few instructions to sink "together"
breaking the edge might be worthwhile.
This commit makes a few small changes
to help better realize this goal:
First, modify the loop to ignore registers
defined by this instruction. We don't
sink definitions of physical registers,
and sinking an SSA definition isn't
going to unblock an upstream instruction.
Second, ignore uses of physical registers.
Instructions that define physical registers are
rejected for sinking, and so moving this one
won't enable moving any defining instructions.
As an added bonus, while virtual register
use-def chains are generally small due
to SSA goodness, iteration over the uses
and definitions (used by hasOneNonDBGUse)
for physical registers like EFLAGS
can be rather expensive in practice.
(This is the original reason for looking at this)
Finally, to keep things simple continue
to only consider this trick for registers that
have a single use (via hasOneNonDBGUse),
but to avoid spuriously breaking critical edges
only do so if the definition resides
in the same MBB and therefore this one directly
blocks it from being sunk as well.
If sinking them together is meant to be,
let the iterative nature of this pass
sink the definition into this block first.
Update tests to accomodate this change,
add new testcase where sinking avoids pipeline stalls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192608
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Rafael Espindola [Mon, 14 Oct 2013 16:48:32 +0000 (16:48 +0000)]
Remove utils/profile.pl.
It uses now removed opt options.
Patch by Alastair Murray!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192606
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Rafael Espindola [Mon, 14 Oct 2013 16:46:46 +0000 (16:46 +0000)]
Remove lib/Transforms/Instrumentation/ProfilingUtils.*
They were leftover from the old profiling support.
Patch by Alastair Murray.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192605
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Rafael Espindola [Mon, 14 Oct 2013 16:39:04 +0000 (16:39 +0000)]
Remove the now unused strong phi elimination pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192604
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Chris Lattner [Mon, 14 Oct 2013 16:05:55 +0000 (16:05 +0000)]
Basic blocks typically have few predecessors. Use a SmallDenseMap to
avoid a heap allocation when this is the case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192602
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Evgeniy Stepanov [Mon, 14 Oct 2013 15:16:25 +0000 (15:16 +0000)]
[msan] Instrument x86.*_cvt* intrinsics.
Currently MSan checks that arguments of *cvt* intrinsics are fully initialized.
That's too much to ask: some of them only operate on lower half, or even
quarter, of the input register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192599
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Chad Rosier [Mon, 14 Oct 2013 14:37:20 +0000 (14:37 +0000)]
[AArch64] Add support for NEON scalar integer compare instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192596
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Bernard Ogden [Mon, 14 Oct 2013 13:17:07 +0000 (13:17 +0000)]
Add Cortex-A57 support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192591
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Bernard Ogden [Mon, 14 Oct 2013 13:16:57 +0000 (13:16 +0000)]
Add subtarget feature support for Cortex-A53
Some previous implicit defaults have changed, for example FP and NEON
are now on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192590
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Matheus Almeida [Mon, 14 Oct 2013 13:07:39 +0000 (13:07 +0000)]
[mips][msa] Direct Object Emission support for BIT instructions.
List of instructions:
bclri.{b,h,w,d}
binsli.{b,h,w,d}
binsri.{b,h,w,d}
bnegi.{b,h,w,d}
bseti.{b,h,w,d}
sat_s.{b,h,w,d}
sat_u.{b,h,w,d}
slli.{b,h,w,d}
srai.{b,h,w,d}
srari.{b,h,w,d}
srli.{b,h,w,d}
srlri.{b,h,w,d}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192589
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Matheus Almeida [Mon, 14 Oct 2013 12:57:18 +0000 (12:57 +0000)]
[mips][msa] Direct Object Emission support for VEC instructions.
List of instructions:
and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192588
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Matheus Almeida [Mon, 14 Oct 2013 12:38:17 +0000 (12:38 +0000)]
[mips][msa] Direct Object Emission of INSVE.{b,h,w,d}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192587
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Matheus Almeida [Mon, 14 Oct 2013 12:22:43 +0000 (12:22 +0000)]
[mips][msa] Direct Object Emission for the majority of the ELM instructions.
List of instructions:
copy_s.{b,h,w}
copy_u.{b,h,w}
sldi.{b,h,w,d}
splati.{b,h,w,d}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192586
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Matheus Almeida [Mon, 14 Oct 2013 11:49:30 +0000 (11:49 +0000)]
[mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction.
INSERT is the first type of MSA instruction that requires a change to the way
MSA registers are parsed. This happens because MSA registers may be suffixed by
an index in the form of an immediate or a general purpose register. The changes
to parseMSARegs reflect that requirement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192582
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Evgeniy Stepanov [Mon, 14 Oct 2013 09:52:09 +0000 (09:52 +0000)]
[msan] Fix handling of scalar select of vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192575
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Elena Demikhovsky [Mon, 14 Oct 2013 07:26:51 +0000 (07:26 +0000)]
Fixed a bug in dynamic allocation memory on stack.
The alignment of allocated space was wrong, see Bugzila 17345.
Done by Zvi Rackover <zvi.rackover@intel.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192573
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Craig Topper [Mon, 14 Oct 2013 05:19:58 +0000 (05:19 +0000)]
Create classes to reduce the size of the tablegen entries for the CRC32 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192568
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Craig Topper [Mon, 14 Oct 2013 04:55:01 +0000 (04:55 +0000)]
Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192567
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Craig Topper [Mon, 14 Oct 2013 01:42:32 +0000 (01:42 +0000)]
Add disassembler support for SSE4.1 register/register form of PEXTRW. There is a shorter encoding that was part of SSE2, but a memory form was added in SSE4.1. This is the register form of that encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192566
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Craig Topper [Mon, 14 Oct 2013 01:21:22 +0000 (01:21 +0000)]
Mark MOVMSKPS/MOVMSKPD/VPINSRWrr64i as AsmParserOnly to remove them from the disassembler tables. Add PINSRWrr64i to complement the AVX version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192565
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David Majnemer [Mon, 14 Oct 2013 01:17:32 +0000 (01:17 +0000)]
Windows: Fix a typo in an assert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192564
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Craig Topper [Mon, 14 Oct 2013 00:24:33 +0000 (00:24 +0000)]
Don't use 64-bit versions of MOVMSKPD in CodeGen. The instructions only produce a 1-bit result so we can just use SUBREG_TO_REG to extend the 32-bit versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192562
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David Majnemer [Mon, 14 Oct 2013 00:06:58 +0000 (00:06 +0000)]
Windows: Don't bother with pinning Kernel32.dll
We don't delay load it so it shouldn't be going anywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192561
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Will Dietz [Sun, 13 Oct 2013 22:09:26 +0000 (22:09 +0000)]
MC: Don't assume incoming StringRef's are null terminated.
This can happen when processing command line arguments, which
are often stored as std::string's and later turned into
StringRef's via std::string::data(). Unfortunately this
is not guaranteed to return a null-terminated string
until C++11, causing breakage on platforms that don't do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192558
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Vincent Lejeune [Sun, 13 Oct 2013 17:56:28 +0000 (17:56 +0000)]
R600: improve dump of S_WAITCNT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192557
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Vincent Lejeune [Sun, 13 Oct 2013 17:56:21 +0000 (17:56 +0000)]
R600/SI: Add SinkingPass before ISel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192556
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Vincent Lejeune [Sun, 13 Oct 2013 17:56:16 +0000 (17:56 +0000)]
R600/SI: Support byval arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192555
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Vincent Lejeune [Sun, 13 Oct 2013 17:56:10 +0000 (17:56 +0000)]
R600: Use masked read sel for texture instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192554
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Vincent Lejeune [Sun, 13 Oct 2013 17:56:04 +0000 (17:56 +0000)]
R600: fix swizzle export
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192553
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Vincent Lejeune [Sun, 13 Oct 2013 17:55:57 +0000 (17:55 +0000)]
R600: Clear the VPM bit of export instructions.
It makes apparently no change it to set this bit or not but the
docs recommand to left it cleared.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192552
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David Majnemer [Sun, 13 Oct 2013 10:34:21 +0000 (10:34 +0000)]
Windows: Use GetModuleHandleEx instead of LoadLibrary
We were using an anti-pattern of:
- LoadLibrary
- GetProcAddress
- FreeLibrary
This is problematic because of several reasons:
- We are holding on to pointers into a library we just unloaded.
- Calling LoadLibrary results in an increase in the reference count of
the library in question and any libraries that it depends on and
so-on and so-forth. This is none too quick.
Instead, use GetModuleHandleEx with GET_MODULE_HANDLE_EX_FLAG_PIN. This
is done because because we didn't bring the reference for the library
into existence and therefor shouldn't count on it being around later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192550
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Will Dietz [Sun, 13 Oct 2013 03:08:49 +0000 (03:08 +0000)]
TargetLowering: Don't index into empty string.
(This is triggered by current lit tests)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192549
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Will Dietz [Sat, 12 Oct 2013 21:29:16 +0000 (21:29 +0000)]
yaml2coff/elf: Touchup for compatibility.
* std::string::append(int, int) can be ambiguous.
* std::vector<>::data() is a C++11 feature, use ArrayRef abstraction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192542
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Arnold Schwaighofer [Sat, 12 Oct 2013 18:56:27 +0000 (18:56 +0000)]
SLPVectorizer: Sort PHINodes based on their opcode
Before this patch we relied on the order of phi nodes when we looked for phi
nodes of the same type. This could prevent vectorization of cases where there
was a phi node of a second type in between phi nodes of some type.
This is important for vectorization of an internal graphics kernel. On the test
suite + external on x86_64 (and on a run on armv7s) it showed no impact on
either performance or compile time.
radar://
15024459
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192537
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Tobias Grosser [Sat, 12 Oct 2013 18:29:15 +0000 (18:29 +0000)]
LoopVectorize: Add missing INITIALIZE_PASS_DEPENDENCY macros
Contributed-by: Peter Zotov <whitequark@whitequark.org>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192536
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Benjamin Kramer [Sat, 12 Oct 2013 11:17:12 +0000 (11:17 +0000)]
Force a CPU on test so it doesn't depend on microarchitectural scheduling decisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192532
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Bill Wendling [Sat, 12 Oct 2013 08:42:59 +0000 (08:42 +0000)]
Update so that it uses the `-V' command line option and supports Python 3.x.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192527
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Craig Topper [Sat, 12 Oct 2013 05:41:08 +0000 (05:41 +0000)]
Remove more filters from the disassembler. Mark some AVX512 instructions as CodeGenOnly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192525
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Tom Stellard [Sat, 12 Oct 2013 05:02:51 +0000 (05:02 +0000)]
R600: Store disassembly in a special ELF section when feature +DumpCode is enabled.
Patch by: Jay Cornwall
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192523
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Craig Topper [Sat, 12 Oct 2013 04:46:18 +0000 (04:46 +0000)]
Mark some more instructions as CodeGenOnly. Remove filters from the disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192522
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Reed Kotler [Sat, 12 Oct 2013 02:19:08 +0000 (02:19 +0000)]
For Mips16, start to consolidate all forms of 32 bit literal loading so that
they can be better handled and optimized in the Mips16 constant island code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192520
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Will Dietz [Sat, 12 Oct 2013 00:55:57 +0000 (00:55 +0000)]
Add missing #include's to cctype when using isdigit/alpha/etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192519
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Manman Ren [Fri, 11 Oct 2013 23:58:05 +0000 (23:58 +0000)]
Debug Info: remove form from function addDIEEntry.
The form must be a reference form in addDIEEntry. Which reference form to
use will be decided by the callee.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192517
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Andrew Kaylor [Fri, 11 Oct 2013 22:47:10 +0000 (22:47 +0000)]
Fixing problems in lli's RemoteMemoryManager.
This fixes a problem from a previous check-in where a return value was omitted.
Previously the remote/stubs-remote.ll and remote/stubs-sm-pic.ll tests were reporting passes, but they should have been failing. Those tests attempt to link against an external symbol and remote symbol resolution is not supported. The old RemoteMemoryManager implementation resulted in local symbols being used for resolution and the child process crashed but the test didn't notice. With this check-in remote symbol resolution fails, and so the test (correctly) fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192514
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Andrew Kaylor [Fri, 11 Oct 2013 21:25:48 +0000 (21:25 +0000)]
Adding multiple object support to MCJIT EH frame handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192504
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Matt Arsenault [Fri, 11 Oct 2013 21:03:41 +0000 (21:03 +0000)]
R600: Add scalar i32 add test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192501
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Matt Arsenault [Fri, 11 Oct 2013 21:03:39 +0000 (21:03 +0000)]
Use CHECK-LABEL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192500
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Matt Arsenault [Fri, 11 Oct 2013 21:03:36 +0000 (21:03 +0000)]
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192499
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Benjamin Kramer [Fri, 11 Oct 2013 19:49:09 +0000 (19:49 +0000)]
fConversion: Attempt #2 at fixing the MSVC build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192492
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Benjamin Kramer [Fri, 11 Oct 2013 19:39:48 +0000 (19:39 +0000)]
IfConversion: Try to unbreak the MSVC build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192487
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Benjamin Kramer [Fri, 11 Oct 2013 19:05:08 +0000 (19:05 +0000)]
Mips: Disassemble sign-extended 64 bit immediates properly.
This doesn't change the meaning of the output, but makes look right. PR17539.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192483
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Matthias Braun [Fri, 11 Oct 2013 19:04:37 +0000 (19:04 +0000)]
Remove kill flags after if conversion if necessary
When if converting something like:
true:
... = R0<kill>
false:
... = R0<kill>
then the instructions of the true block must not have a <kill> flag
anymore, as the instruction of the false block follow and do still read
the R0 value.
Specifically this patch determines the set of register live-in in the
false block (possibly after simulating the liveness changes of the
duplicated instructions). Each of these live-in registers mustn't be
killed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192482
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Matthias Braun [Fri, 11 Oct 2013 19:04:35 +0000 (19:04 +0000)]
Introduce ad hoc liveness tracking utility: LiveRegUnits
Contains a set of live register (units) and code to move forward and
backward in the schedule while updating the live set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192481
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Quentin Colombet [Fri, 11 Oct 2013 18:54:49 +0000 (18:54 +0000)]
[DAGCombiner] Load slicing test case: attempt to really fix the buildbots (used sse4.2 instead of avx!).
<rdar://problem/
14477220>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192480
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Renato Golin [Fri, 11 Oct 2013 18:50:22 +0000 (18:50 +0000)]
Add warning about CHECK-DAG with variable definition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192479
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Manman Ren [Fri, 11 Oct 2013 18:50:00 +0000 (18:50 +0000)]
Debug Info Testing Case: check for the name of a structure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192478
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Stephen Lin [Fri, 11 Oct 2013 18:38:36 +0000 (18:38 +0000)]
Really fix CHECK-LABEL and CHECK-DAG interaction. This actually just restores the initial implementation that was in r186162 but got lost in some subsequent refactoring. More explicit variable names and comments are present now to hopefully prevent repeat regression, as well as another test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192477
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Quentin Colombet [Fri, 11 Oct 2013 18:29:42 +0000 (18:29 +0000)]
[DAGCombiner] Reapply load slicing (192471) with a test that explicitly set sse4.2 support.
This should fix the buildbots.
Original commit message:
[DAGCombiner] Slice a big load in two loads when the element are next to each
other in memory and the target has paired load and performs post-isel loads
combining.
E.g., this optimization will transform something like this:
a = load i64* addr
b = trunc i64 a to i32
c = lshr i64 a, 32
d = trunc i64 c to i32
into:
b = load i32* addr1
d = load i32* addr2
Where addr1 = addr2 +/- sizeof(i32), if the target supports paired load and
performs post-isel loads combining.
One should overload TargetLowering::hasPairedLoad to provide this information.
The default is false.
<rdar://problem/
14477220>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192476
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Quentin Colombet [Fri, 11 Oct 2013 18:17:17 +0000 (18:17 +0000)]
[DAGCombiner] Revert load slicing (r192471), until I figure out why it fails on ubuntu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192474
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Matthias Braun [Fri, 11 Oct 2013 18:09:19 +0000 (18:09 +0000)]
Revert "Tests: Be less dependent on a specific schedule/regalloc"
This reverts r192454
Apparently FileCheck isn't as smart as I though and does not enforce a
topological order between variable defs+uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192472
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Quentin Colombet [Fri, 11 Oct 2013 18:01:14 +0000 (18:01 +0000)]
[DAGCombiner] Slice a big load in two loads when the element are next to each
other in memory and the target has paired load and performs post-isel loads
combining.
E.g., this optimization will transform something like this:
a = load i64* addr
b = trunc i64 a to i32
c = lshr i64 a, 32
d = trunc i64 c to i32
into:
b = load i32* addr1
d = load i32* addr2
Where addr1 = addr2 +/- sizeof(i32), if the target supports paired load and
performs post-isel loads combining.
One should overload TargetLowering::hasPairedLoad to provide this information.
The default is false.
<rdar://problem/
14477220>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192471
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Rafael Espindola [Fri, 11 Oct 2013 16:48:02 +0000 (16:48 +0000)]
Fix handling of CHECK-DAG inside of CHECK-LABEL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192463
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Renato Golin [Fri, 11 Oct 2013 16:14:39 +0000 (16:14 +0000)]
Better info when debugging vectorizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192460
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Amara Emerson [Fri, 11 Oct 2013 16:03:43 +0000 (16:03 +0000)]
[ARM] Fix FP ABI attributes with no VFP enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192458
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Matthias Braun [Fri, 11 Oct 2013 15:40:14 +0000 (15:40 +0000)]
fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192455
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Matthias Braun [Fri, 11 Oct 2013 15:40:12 +0000 (15:40 +0000)]
Tests: Be less dependent on a specific schedule/regalloc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192454
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Matheus Almeida [Fri, 11 Oct 2013 13:58:32 +0000 (13:58 +0000)]
This reverts 192447 because of compiler warning generated on darwin build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192451
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Matheus Almeida [Fri, 11 Oct 2013 13:56:12 +0000 (13:56 +0000)]
This reverts r192449 because of compiler warning generated on darwin build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192450
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