OSDN Git Service
Craig Topper [Sat, 11 Aug 2018 05:33:00 +0000 (05:33 +0000)]
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
Now we switch to the subregister in expandPostRAPseudos where we already switched the opcode.
This simplifies a few isel patterns that used the pseudo directly. And magically seems to have improved our ability to CSE it in the undef-label.ll test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339496
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Richard Trieu [Sat, 11 Aug 2018 04:18:05 +0000 (04:18 +0000)]
Fix WebAssembly instruction printer after r339474
Treat the stack variants of control instructions the same as regular
instructions. Otherwise, the vector ControlFlowStack will be the wrong
size and have out-of-bounds access. This was detected by MemorySanitizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339495
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Tom Stellard [Sat, 11 Aug 2018 01:08:34 +0000 (01:08 +0000)]
[gold] Fix Tests cases on i686
Reviewers: tejohnson
Reviewed By: tejohnson
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D50583
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339492
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Tom Stellard [Sat, 11 Aug 2018 00:51:54 +0000 (00:51 +0000)]
AMDGPU/GlobalISel: Define instruction mapping for G_INSERT
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D49625
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339491
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JF Bastien [Fri, 10 Aug 2018 22:41:09 +0000 (22:41 +0000)]
Re-commit "[NFC] More ConstantMerge refactoring"
My previous change moved some code upwards which caused an assert in debug mode
because the global value didn't necessarily have an initializer. Don't do that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339485
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Philip Reames [Fri, 10 Aug 2018 22:21:56 +0000 (22:21 +0000)]
[LICM] Hoist assumes out of loops
If we have an assume which is known to execute and whose operand is invariant, we can lift that into the pre-header. So long as we don't change which paths the assume executes on, this is a legal transformation. It's likely to be a useful canonicalization as other transforms only look for dominating assumes.
Differential Revision: https://reviews.llvm.org/D50364
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339481
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JF Bastien [Fri, 10 Aug 2018 22:10:20 +0000 (22:10 +0000)]
Revert "[NFC] More ConstantMerge refactoring"
Sanitizers seem unhappy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339480
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Eli Friedman [Fri, 10 Aug 2018 22:03:25 +0000 (22:03 +0000)]
Fix unused lambda capture warning from r339472.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339479
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JF Bastien [Fri, 10 Aug 2018 21:58:00 +0000 (21:58 +0000)]
[NFC] More ConstantMerge refactoring
This makes my upcoming patch much easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339478
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Wouter van Oortmerssen [Fri, 10 Aug 2018 21:32:47 +0000 (21:32 +0000)]
[WebAssembly] Added default stack-only instruction mode for MC.
Summary:
Moved Explicit Locals pass to last.
Made that pass obligatory.
Made it convert from register to stack based instructions, and removed the registers.
Fixes to related code that was expecting register based instructions.
Added the correct testing flag to all tests, depending on what the
format they were expecting so far.
Translated one test to stack format as example: reg-stackify-stack.ll
tested:
llvm-lit -v `find test -name WebAssembly`
unittests/MC/*
Reviewers: dschuff, sunfish
Subscribers: jfb, llvm-commits, aheejin, eraman, jgravelle-google, sbc100
Differential Revision: https://reviews.llvm.org/D50568
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339474
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Eli Friedman [Fri, 10 Aug 2018 21:21:53 +0000 (21:21 +0000)]
[ARM] Adjust AND immediates to make them cheaper to select.
LLVM normally prefers to minimize the number of bits set in an AND
immediate, but that doesn't always match the available ARM instructions.
In Thumb1 mode, prefer uxtb or uxth where possible; otherwise, prefer
a two-instruction sequence movs+ands or movs+bics.
Some potential improvements outlined in
ARMTargetLowering::targetShrinkDemandedConstant, but seems to work
pretty well already.
The ARMISelDAGToDAG fix ensures we don't generate an invalid UBFX
instruction due to a larger-than-expected mask. (It's orthogonal, in
some sense, but as far as I can tell it's either impossible or nearly
impossible to reproduce the bug without this change.)
According to my testing, this seems to consistently improve codesize by
a small amount by forming bic more often for ISD::AND with an immediate.
Differential Revision: https://reviews.llvm.org/D50030
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339472
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Zachary Turner [Fri, 10 Aug 2018 21:09:05 +0000 (21:09 +0000)]
[MS Demangler] Support extern "C" functions.
There are two cases we need to support with extern "C"
functions. The first is the case of a '9' indicating that
the function has no prototype. This occurs when we mangle
a symbol inside of an extern "C" function, but not the
function itself.
The second case is when we have an overloaded extern "C"
functions. In this case we emit $$J0 to indicate this.
This patch adds support for both of these cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339471
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Sanjay Patel [Fri, 10 Aug 2018 21:00:27 +0000 (21:00 +0000)]
[InstCombine] add tests for fsub factorization; NFC
The tests show that;
1. The fold doesn't fire for vectors, but it should.
2. The fold fires regardless of uses, but it shouldn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339470
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Sanjay Patel [Fri, 10 Aug 2018 20:30:35 +0000 (20:30 +0000)]
[InstCombine] rearrange code for foldSelectBinOpIdentity; NFCI
This is a retry of rL339439 with a fix for the problem that
caused the original commit to be reverted at rL339446.
That problem was that the compare can be integer while
the binop is FP or vice-versa, so we need to use the binop
type when we ask for the identity constant.
A test to guard against the problem was added at rL339453.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339469
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Matt Davis [Fri, 10 Aug 2018 20:24:27 +0000 (20:24 +0000)]
[llvm-mca] Make InstrBuilder::getOrCreateInstrDesc private. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339468
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Sanjay Patel [Fri, 10 Aug 2018 20:12:36 +0000 (20:12 +0000)]
[InstCombine] add tests to show disabling of libcall/intrinsic shrinking; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339467
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Zachary Turner [Fri, 10 Aug 2018 20:08:46 +0000 (20:08 +0000)]
Resubmit r339450 - [MS Demangler] Add conversion operator tests
This was broken because of a malformed check line. Incidentally,
this exposed a case where we crash when we should just be returning
an error, so we should fix that. The demangler shouldn't crash due
to user input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339466
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Zachary Turner [Fri, 10 Aug 2018 19:57:36 +0000 (19:57 +0000)]
[MS Demangler] Demangle cv qualifiers on template args.
Before we wouldn't properly demangle something like
Foo<const int>. Template args have a special escape sequence
'$$C' that is optional, but if it is present contains
qualifiers. So we need to check for this and only if it
present, demangle qualifiers before demangling the type.
With this fix, we re-enable some tests that were previously
marked FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339465
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Matt Arsenault [Fri, 10 Aug 2018 19:20:17 +0000 (19:20 +0000)]
AMDGPU: More canonicalized operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339464
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Sanjay Patel [Fri, 10 Aug 2018 19:20:16 +0000 (19:20 +0000)]
revert r339450 - [MS Demangler] Add conversion operator tests
Something here causes an assertion failure that killed a bunch of bots.
Example:
http://lab.llvm.org:8011/builders/reverse-iteration/builds/7021/steps/check_all/logs/stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339463
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Matt Arsenault [Fri, 10 Aug 2018 18:58:56 +0000 (18:58 +0000)]
AMDGPU: Combine and of seto/setuo and fp_class
Clear the nan (or non-nan) test bits from the mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339462
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Matt Arsenault [Fri, 10 Aug 2018 18:58:49 +0000 (18:58 +0000)]
AMDGPU: Turn class x, p_zero|n_zero into fcmp oeq x, 0
The library does use this for some reason.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339461
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Matt Arsenault [Fri, 10 Aug 2018 18:58:41 +0000 (18:58 +0000)]
AMDGPU: Match isfinite pattern to class instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339460
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Matt Arsenault [Fri, 10 Aug 2018 17:57:12 +0000 (17:57 +0000)]
AMDGPU: Add LLVM_FALLTHROUGH
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339458
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Aaron Ballman [Fri, 10 Aug 2018 17:26:07 +0000 (17:26 +0000)]
Update the coding standards and developer policy documentation surrounding whitespace.
Clarify that you should not introduce trailing whitespace when making a commit and that you should not remove trailing whitespace that's unrelated to code you are changing or are about to change. Then clarified the developer policy around what is considered an obvious whitespace commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339455
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Sanjay Patel [Fri, 10 Aug 2018 17:20:24 +0000 (17:20 +0000)]
[InstCombine] add/update tests for selectBinOpIdentity; NFC
This includes a test that would have exposed the bug in rL339439
which was reverted at rL339446. The compare can be integer while
the binop is FP or vice-versa, so we need to use the binop type
when we ask for the identity constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339453
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Zachary Turner [Fri, 10 Aug 2018 16:55:59 +0000 (16:55 +0000)]
[MS Demangler] Add conversion operator tests.
The mangled names were added in the original commit, but
the demangled equivalents weren't, so nothing was actually
being checked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339450
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Jordan Rupprecht [Fri, 10 Aug 2018 16:25:58 +0000 (16:25 +0000)]
[llvm-objcopy] NFC: consistently use typename ELFT::<X> definitions in headers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339448
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Evgeniy Stepanov [Fri, 10 Aug 2018 16:21:37 +0000 (16:21 +0000)]
[hwasan] Add -hwasan-with-ifunc flag.
Summary: Similar to asan's flag, it can be used to disable the use of ifunc to access hwasan shadow address.
Reviewers: vitalybuka, kcc
Subscribers: srhines, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D50544
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339447
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Sanjay Patel [Fri, 10 Aug 2018 16:12:19 +0000 (16:12 +0000)]
[InstCombine] revert r339439 - rearrange code for foldSelectBinOpIdentity
That was supposed to be NFC, but it exposed a logic hole somewhere that
caused bots to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339446
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David Bolvansky [Fri, 10 Aug 2018 15:29:09 +0000 (15:29 +0000)]
[InstCombine][NFC] Added tests for select with binop fold
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339441
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Sanjay Patel [Fri, 10 Aug 2018 15:11:26 +0000 (15:11 +0000)]
[InstCombine] rearrange code for foldSelectBinOpIdentity; NFCI
This should make it easier to folow and to add the planned enhancements
such as D50190.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339439
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Zachary Turner [Fri, 10 Aug 2018 15:04:56 +0000 (15:04 +0000)]
[MS Demangler] Properly demangle conversion operators.
These were completely broken before. We need to handle
the 'B' operator tag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339436
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Zachary Turner [Fri, 10 Aug 2018 14:53:33 +0000 (14:53 +0000)]
[MS Demangler] Disable a couple of tests.
The check lines are marked FIXME but not the mangled names.
This is causing an error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339435
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Zachary Turner [Fri, 10 Aug 2018 14:31:04 +0000 (14:31 +0000)]
[MS Demangler] Fix several issues related to templates.
These were uncovered when porting the mangling tests in
ms-templates.cpp from clang/CodeGenCXX over to demangling
tests. The main issues fixed here are surrounding integer
literal signed and unsignedness, empty array dimensions,
and pointer and reference non-type template parameters.
Differential Revision: https://reviews.llvm.org/D50512
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339434
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Sam Parker [Fri, 10 Aug 2018 13:57:13 +0000 (13:57 +0000)]
[ARM] Disallow zexts in ARMCodeGenPrepare
Enabling ARMCodeGenPrepare by default caused a whole load of
failures. This is due to zexts and truncs not being handled properly.
ZExts are messy so it's just easier to disable for now and truncs
are allowed only as 'sinks'. I still need to figure out why allowing
them as 'sources' causes so many failures. The other main changes are
that we are explicit in the types that we converting to, it's now
always 'TypeSize'. Type support is also now performed while checking
for valid opcodes as it unnecessarily complicated having the checks
are different stages.
I've moved the tests around too, so we have the zext and truncs in
their own file as well as the overflowing opcode tests.
Differential Revision: https://reviews.llvm.org/D50518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339432
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Simon Pilgrim [Fri, 10 Aug 2018 11:42:42 +0000 (11:42 +0000)]
[X86][SSE] Pull out repeated shift getOpcode() calls. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339425
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Simon Pilgrim [Fri, 10 Aug 2018 11:02:44 +0000 (11:02 +0000)]
Fix -Wimplicit-fallthrough warning introduced in rL339397.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339422
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Andrea Di Biagio [Fri, 10 Aug 2018 10:43:43 +0000 (10:43 +0000)]
[Tablegen][SubtargetEmitter] refactor method `emitSchedModelHelpersImpl()`. NFCI
Part of the logic has been moved to helper functions to (hopefully) improve
readability.
Added a few code comments to better describe how the algorithm works.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339421
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Hans Wennborg [Fri, 10 Aug 2018 09:48:53 +0000 (09:48 +0000)]
Rename the cfguard module flag to cfguardtable
The previous name sounds like it inserts cfguard implementation, but it
really just emits the table of address-taken functions. Change the name
to better reflect that.
Clang will be updated in the next commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339419
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Max Kazantsev [Fri, 10 Aug 2018 09:20:46 +0000 (09:20 +0000)]
[NFC] Add tests that demonstrate that MustExecute is fundamentally broken
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339417
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Alexander Potapenko [Fri, 10 Aug 2018 08:06:43 +0000 (08:06 +0000)]
[MSan] Shrink the register save area for non-SSE builds
If code is compiled for X86 without SSE support, the register save area
doesn't contain FPU registers, so `AMD64FpEndOffset` should be equal to
`AMD64GpEndOffset`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339414
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George Burgess IV [Fri, 10 Aug 2018 05:14:43 +0000 (05:14 +0000)]
[MemorySSA] "Fix" lifetime intrinsic handling
MemorySSA currently creates MemoryAccesses for lifetime intrinsics, and
sometimes treats them as clobbers. This may/may not be the best way
forward, but while we're doing it, we should consider
MayAlias/PartialAlias to be clobbers.
The ideal fix here is probably to remove all of this reasoning about
lifetimes from MemorySSA + put it into the passes that need to care. But
that's a wayyy broader fix that needs some consensus, and we have
miscompiles + a release branch today, and this should solve the
miscompiles just as well.
differential revision is D43269. Landing without an explicit LGTM (and
without using the special please-autoclose-this syntax) so we can still
use that revision as a place to decide what the right fix here is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339411
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David Bolvansky [Fri, 10 Aug 2018 04:32:54 +0000 (04:32 +0000)]
[InstCombine] Transform str(n)cmp to memcmp
Summary:
Motivation examples:
int strcmp_memcmp() {
char buf[12];
return strcmp(buf, "key") == 0;
}
int strcmp_memcmp2() {
char buf[12];
return strcmp(buf, "key") != 0;
}
int strncmp_memcmp() {
char buf[12];
return strncmp(buf, "key", 3) == 0;
}
can be turned to memcmp.
See test file for more cases.
Reviewers: efriedma
Reviewed By: efriedma
Subscribers: spatel, llvm-commits
Differential Revision: https://reviews.llvm.org/D50233
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339410
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Heejin Ahn [Thu, 9 Aug 2018 23:58:51 +0000 (23:58 +0000)]
[WebAssembly] Gate i64x2 and f64x2 on -wasm-enable-unimplemented
Summary:
i64x2 and f64x2 operations are not implemented in V8, so we normally
do not want to emit them. However, they are in the SIMD spec proposal,
so we still want to be able to test them in the toolchain. This patch
adds a flag to enable their emission.
Reviewers: aheejin, dschuff
Subscribers: sunfish, jgravelle-google, sbc100, llvm-commits
Differential Revision: https://reviews.llvm.org/D50423
Patch by Thomas Lively (tlively)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339407
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Craig Topper [Thu, 9 Aug 2018 23:27:42 +0000 (23:27 +0000)]
[X86] Qualify one of the heuristics in combineMul to only apply to positive multiply amounts.
This seems to slightly help the performance of one of our internal benchmarks. We probably need better heuristics here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339406
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Jordan Rupprecht [Thu, 9 Aug 2018 22:52:03 +0000 (22:52 +0000)]
[llvm-objcopy] NFC: Add some color to error()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339404
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Matt Arsenault [Thu, 9 Aug 2018 22:40:08 +0000 (22:40 +0000)]
ValueTracking: Start enhancing isKnownNeverNaN
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339399
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Heejin Ahn [Thu, 9 Aug 2018 22:35:23 +0000 (22:35 +0000)]
[WebAssembly] Fix wasm backend compilation on gcc 5.4: variable name cannot match class
Summary:
gcc does not like
const Region *Region;
It wants a different name for the variable.
Is there a better convention for what name to use in such a case?
Reviewers: sbc100, aheejin
Subscribers: aheejin, jgravelle-google, dschuff, llvm-commits
Differential Revision: https://reviews.llvm.org/D50472
Patch by Alon Zakai (kripken)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339398
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Reid Kleckner [Thu, 9 Aug 2018 22:24:04 +0000 (22:24 +0000)]
[MC] Move EH DWARF encodings from MC to CodeGen, NFC
Summary:
The TType encoding, LSDA encoding, and personality encoding are all
passed explicitly by CodeGen to the assembler through .cfi_* directives,
so only the AsmPrinter needs to know about them.
The FDE CFI encoding however, controls the encoding of the label
implicitly created by the .cfi_startproc directive. That directive seems
to be special in that it doesn't take an encoding, so the assembler just
has to know how to encode one DSO-local label reference from .eh_frame
to .text.
As a result, it looks like MC will continue to have to know when the
large code model is in use. Perhaps we could invent a '.cfi_startproc
[large]' flag so that this knowledge doesn't need to pollute the
assembler.
Reviewers: davide, lliu0, JDevlieghere
Subscribers: hiraditya, fedor.sergeev, llvm-commits
Differential Revision: https://reviews.llvm.org/D50533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339397
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Sanjay Patel [Thu, 9 Aug 2018 22:20:44 +0000 (22:20 +0000)]
[InstSimplify] move minnum/maxnum with Inf folds from instcombine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339396
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Jake Ehrlich [Thu, 9 Aug 2018 22:05:19 +0000 (22:05 +0000)]
Add owner for llvm-objcopy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339394
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JF Bastien [Thu, 9 Aug 2018 21:56:09 +0000 (21:56 +0000)]
[NFC] ConstantMerge: factor out some functions
This makes the code easier to read and will make an upcoming patch I have easier to review because that patch needed this refactoring to reuse some of the functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339391
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JF Bastien [Thu, 9 Aug 2018 21:36:57 +0000 (21:36 +0000)]
ConstantMerge: update MadeChange when change is made
It was always false, which is obviously wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339390
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Philip Reames [Thu, 9 Aug 2018 21:15:33 +0000 (21:15 +0000)]
[LICM] Suppress a compiler warning noticed by one of the bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339388
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Ana Pazos [Thu, 9 Aug 2018 20:51:53 +0000 (20:51 +0000)]
[RISC-V] Fixed alias for addi x2, x2, 0
A missing check for non-zero immediate in MCOperandPredicate
caused c.addi16sp sp, 0 to be selected which is not a valid
instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339381
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Philip Reames [Thu, 9 Aug 2018 20:18:42 +0000 (20:18 +0000)]
[LICM] hoist fences out of loops w/o memory operations
The motivating case is an otherwise dead loop with a fence in it. At the moment, this goes all the way through the optimizer and we end up emitting an entirely pointless loop on x86. This case may seem a bit contrived, but we've seen it in real code as the result of otherwise reasonable lowering strategies combined w/thread local memory optimizations (such as escape analysis).
To handle this simple case, we can teach LICM to hoist must execute fences when there is no other memory operation within the loop.
Differential Revision: https://reviews.llvm.org/D50489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339378
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Stephen Kelly [Thu, 9 Aug 2018 20:15:13 +0000 (20:15 +0000)]
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339377
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Stephen Kelly [Thu, 9 Aug 2018 20:15:08 +0000 (20:15 +0000)]
Remove obsolete policy settings
Summary:
The line
cmake_minimum_required(VERSION 3.4.3)
already has the effect of setting to NEW all policies present in that
release:
https://cmake.org/cmake/help/v3.4/manual/cmake-policies.7.html
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D50407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339376
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Sanjay Patel [Thu, 9 Aug 2018 18:42:12 +0000 (18:42 +0000)]
[InstCombine] allow fsub+fmul FMF folds for vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339368
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David Carlier [Thu, 9 Aug 2018 18:29:07 +0000 (18:29 +0000)]
Fix few g++ 8 warning with non obvious copy object operations
Reviewers: dblaikie, dexonsmith
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D50296
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339367
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JF Bastien [Thu, 9 Aug 2018 18:28:54 +0000 (18:28 +0000)]
[NFC] Remove magic bool param in RAUW
Use an enum class instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339366
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Krzysztof Parzyszek [Thu, 9 Aug 2018 18:03:45 +0000 (18:03 +0000)]
[Hexagon] Map ISD::TRAP to J2_trap0(#0)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339365
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Alina Sbirlea [Thu, 9 Aug 2018 17:53:26 +0000 (17:53 +0000)]
SCEV should forget all loops containing a deleted block.
Summary:
LoopSimplifyCFG should update ScEv for all loops after a block is deleted.
If the deleted block "Succ" is part of L, then it is part of all parent loops, so forget topmost loop.
Reviewers: greened, mkazantsev, sanjoy
Subscribers: jlebar, javed.absar, uabelho, llvm-commits
Differential Revision: https://reviews.llvm.org/D50422
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339363
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Paul Semel [Thu, 9 Aug 2018 17:49:04 +0000 (17:49 +0000)]
[llvm-objcopy] Add --prefix-symbols option
Differential Revision: https://reviews.llvm.org/D50381
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339362
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Sanjay Patel [Thu, 9 Aug 2018 17:40:27 +0000 (17:40 +0000)]
[InstCombine] add vector tests for fsub+fmul; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339361
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Reid Kleckner [Thu, 9 Aug 2018 17:29:26 +0000 (17:29 +0000)]
[GlobalOpt] Don't apply fastcc if it would break inalloca invariants
The inalloca parameter has to be the only parameter passed in memory.
Changing the convention to fastcc can break that.
At some point we should teach global opt how to optimize ABI attributes
like inalloca and maybe byval. These attributes are mainly used to match
C ABIs. They are harder for LLVM to optimize and they don't always
generate the best code.
Fixes PR38487
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339360
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Sanjay Patel [Thu, 9 Aug 2018 17:26:22 +0000 (17:26 +0000)]
[SelectionDAG] try harder to convert funnel shift to rotate
Similar to rL337966 - if the DAGCombiner's rotate matching was
working as expected, I don't think we'd see any test diffs here.
AArch only goes right, and PPC only goes left.
x86 has both, so no diffs there.
Differential Revision: https://reviews.llvm.org/D50091
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339359
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Paul Semel [Thu, 9 Aug 2018 17:05:21 +0000 (17:05 +0000)]
[llvm-objcopy] Add --dump-section
Differential Revision: https://reviews.llvm.org/D49979
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339358
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Michael Berg [Thu, 9 Aug 2018 17:00:03 +0000 (17:00 +0000)]
extend folding fsub/fadd to fneg for FMF
Summary: This change provides a common optimization path for both Unsafe and FMF driven optimization for this fsub fold adding reassociation, as it the flag that most closely represents the translation
Reviewers: spatel, wristow, arsenm
Reviewed By: spatel
Subscribers: wdng
Differential Revision: https://reviews.llvm.org/D50195
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339357
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Evandro Menezes [Thu, 9 Aug 2018 16:34:38 +0000 (16:34 +0000)]
[ARM] Adjust the feature set for Exynos
Enable `FeatureZCZeroing`, `FeatureHasSlowFPVMLx`, `FeatureExpandMLx`,
`FeatureProfUnpredicate`, `FeatureSlowVDUP32`, `FeatureSlowVGETLNi32`,
`FeatureSplatVFPToNeon`, `FeatureHasRetAddrStack`, `FeatureSlowFPBrcc` for
all Exynos processors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339356
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Evandro Menezes [Thu, 9 Aug 2018 16:13:24 +0000 (16:13 +0000)]
[ARM] Replace processor check with feature
Add new feature, `FeatureUseWideStrideVFP`, that replaces the need for a
processor check. Otherwise, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339354
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Andrea Di Biagio [Thu, 9 Aug 2018 15:32:48 +0000 (15:32 +0000)]
[MC][PredicateExpander] Extend the grammar to support simple switch and return statements.
This patch introduces tablegen class MCStatement.
Currently, an MCStatement can be either a return statement, or a switch
statement.
```
MCStatement:
MCReturnStatement
MCOpcodeSwitchStatement
```
A MCReturnStatement expands to a return statement, and the boolean expression
associated with the return statement is described by a MCInstPredicate.
An MCOpcodeSwitchStatement is a switch statement where the condition is a check
on the machine opcode. It allows the definition of multiple checks, as well as a
default case. More details on the grammar implemented by these two new
constructs can be found in the diff for TargetInstrPredicates.td.
This patch makes it easier to read the body of auto-generated TargetInstrInfo
predicates.
In future, I plan to reuse/extend the MCStatement grammar to describe more
complex target hooks. For now, this is just a first step (mostly a minor
cosmetic change to polish the new predicates framework).
Differential Revision: https://reviews.llvm.org/D50457
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339352
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Bjorn Pettersson [Thu, 9 Aug 2018 15:19:07 +0000 (15:19 +0000)]
[MC] Remove PhysRegSize from MCRegisterClass
Summary:
The interface to get size and spill size of a register
was moved from MCRegisterInfo to TargetRegisterInfo over
a year ago. Afaik the old interface has bee around
to give out-of-tree targets a chance to adapt to the
new interface.
One problem with the old MCRegisterClass::PhysRegSize was that
it represented the size of a register as "size in bits" / 8.
So a register had to be a multiple of eight bits wide for the
size to be correct (and the byte size for the target needed to
be eight bits).
Reviewers: kparzysz, qcolombet
Reviewed By: kparzysz
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47199
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339350
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Sanjay Patel [Thu, 9 Aug 2018 15:07:13 +0000 (15:07 +0000)]
[InstCombine] reduce code duplication; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339349
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Simon Pilgrim [Thu, 9 Aug 2018 13:56:04 +0000 (13:56 +0000)]
[TargetLowering] Add BuildSDIVPattern helper to BuildExactSDIV (NFCI).
As requested in D50392, pull the magic constant calculations out into a helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339346
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Sjoerd Meijer [Thu, 9 Aug 2018 12:45:09 +0000 (12:45 +0000)]
[ARM] FP16: codegen support for VTRN
Differential Revision: https://reviews.llvm.org/D50454
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339340
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Simon Pilgrim [Thu, 9 Aug 2018 12:37:36 +0000 (12:37 +0000)]
[X86][SSE] Remove PMULDQ/PMULUDQ by zero
Exposed by D50328
Differential Revision: https://reviews.llvm.org/D50328
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339337
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Simon Pilgrim [Thu, 9 Aug 2018 12:30:02 +0000 (12:30 +0000)]
[X86][SSE] Combine (some) target shuffles with multiple uses
As discussed on D41794, we have many cases where we fail to combine shuffles as the input operands have other uses.
This patch permits these shuffles to be combined as long as they don't introduce additional variable shuffle masks, which should reduce instruction dependencies and allow the total number of shuffles to still drop without increasing the constant pool.
However, this may mean that some memory folds may no longer occur, and on pre-AVX require the occasional extra register move.
This also exposes some poor PMULDQ/PMULUDQ codegen which was doing unnecessary upper/lower calculations which will in fact fold to zero/undef - the fix will be added in a followup commit.
Differential Revision: https://reviews.llvm.org/D50328
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339335
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Hans Wennborg [Thu, 9 Aug 2018 11:57:36 +0000 (11:57 +0000)]
vs integration: bump version number
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339330
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Hans Wennborg [Thu, 9 Aug 2018 11:52:48 +0000 (11:52 +0000)]
vs integration: update the manifest to require VS 2017
It previously erroneously said only VS2015 was required.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339329
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Andrew V. Tischenko [Thu, 9 Aug 2018 09:23:26 +0000 (09:23 +0000)]
[X86] Improved sched models for X86 XCHG*rr and XADD*rr instructions.
Differential Revision: https://reviews.llvm.org/D49861
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339321
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Hans Wennborg [Thu, 9 Aug 2018 08:41:03 +0000 (08:41 +0000)]
cmake: don't pack system libs unless CMAKE_INSTALL_UCRT_LIBRARIES is set (PR38476)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339319
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Jonas Hahnfeld [Thu, 9 Aug 2018 07:45:49 +0000 (07:45 +0000)]
[NVPTX] Select atomic loads and stores
According to PTX ISA .volatile has the same memory synchronization
semantics as .relaxed.sys, so it can be used to implement monotonic
atomic loads and stores. This is important for OpenMP's atomic
construct where
- 'read's and 'write's are lowered to atomic loads and stores, and
- an update of float or double types are lowered into a cmpxchg loop.
(Note that PTX could do better because it has atom.add.f{32,64} but
LLVM's atomicrmw instruction only allows integer types.)
Higher levels of atomicity (like acquire and release) need additional
synchronization properties which were added with PTX ISA 6.0 / sm_70.
So using these instructions still results in an error.
Differential Revision: https://reviews.llvm.org/D50391
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339316
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Roger Ferrer Ibanez [Thu, 9 Aug 2018 07:08:20 +0000 (07:08 +0000)]
[RISCV] Add "lla" pseudo-instruction to assembler
This pseudo-instruction is similar to la but uses PC-relative addressing
unconditionally. This is, la is only different to lla when using -fPIC. This
pseudo-instruction seems often forgotten in several specs but it is definitely
mentioned in binutils opcodes/riscv-opc.c. The semantics are defined both in
page 37 of the "RISC-V Reader" book but also in function macro found in
gas/config/tc-riscv.c.
This is a very first step towards adding PIC support for Linux in the RISC-V
backend.
The lla pseudo-instruction expands to a sequence of auipc + addi with a couple
of pc-rel relocations where the second points to the first one. This is
described in
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#pc-relative-symbol-addresses
For now, this patch only introduces support of that pseudo instruction at the
assembler parser.
Differential Revision: https://reviews.llvm.org/D49661
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339314
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Philip Reames [Thu, 9 Aug 2018 04:21:02 +0000 (04:21 +0000)]
[LICM] Add tests for future hoisting of fence instructions [NFC]
The main interesting case is a fence in an otherwise dead loop or one containing only arithmetic. This can happen as a result of DSE or other transforms from seemingly reasonable initial IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339310
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JF Bastien [Thu, 9 Aug 2018 04:17:48 +0000 (04:17 +0000)]
[NFC] ConstantMerge: don't insert when find should be used
Summary: DenseMap's operator[] performs an insertion if the entry isn't found. The second phase of ConstantMerge isn't trying to insert anything: it's just looking to see if the first phased performed an insertion. Use find instead, avoiding insertion of every single global initializer in the map of constants. This has the side-effect of making all entries in CMap non-null (because only global declarations would have null initializers, and that would be a bug).
Subscribers: dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D50476
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339309
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Philip Reames [Thu, 9 Aug 2018 03:44:28 +0000 (03:44 +0000)]
[LICM] Add an assert to ensure all instruction types needing aliasing are handled [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339308
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Petr Hosek [Thu, 9 Aug 2018 02:16:18 +0000 (02:16 +0000)]
[CMake] Use normalized Windows target triples
Changes the default Windows target triple returned by
GetHostTriple.cmake from the old environment names (which we wanted to
move away from) to newer, normalized ones. This also requires updating
all tests to use the new systems names in constraints.
Differential Revision: https://reviews.llvm.org/D47381
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339307
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Paul Robinson [Wed, 8 Aug 2018 23:50:22 +0000 (23:50 +0000)]
[DWARF] Verifier now handles .debug_types sections.
Differential Revision: https://reviews.llvm.org/D50466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339302
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Sanjay Patel [Wed, 8 Aug 2018 23:06:59 +0000 (23:06 +0000)]
[x86] add test for commuted variant for fsub fold; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339300
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Sanjay Patel [Wed, 8 Aug 2018 23:04:43 +0000 (23:04 +0000)]
[DAGCombiner] loosen constraints for fsub+fadd fold
isNegatibleForFree() should not matter here (as the test diffs show)
because it's always a win to replace an fsub+fadd with fneg. The
problem in D50195 persists because either (1) we are doing these
folds in the wrong order or (2) we're missing another fold for fadd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339299
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Sanjay Patel [Wed, 8 Aug 2018 22:46:30 +0000 (22:46 +0000)]
[DAGCombiner] move fadd simplification ahead of other folds
I don't know if it's possible to expose this diff in a test,
but we should always try simplifications (no new nodes created)
before more complicated transforms for efficiency (similar to
what we do in IR).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339298
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Stefan Granitz [Wed, 8 Aug 2018 22:38:23 +0000 (22:38 +0000)]
[Demangle] Add another test for ItaniumPartialDemangler
Summary: Show the behavior of print operations in the ItaniumPartialDemangler. It's a summary of what the current integration in LLDB assumes. For new users this may be a useful example.
Reviewers: erik.pilkington
Subscribers: llvm-commits, lldb-commits
Differential Revision: https://reviews.llvm.org/D50473
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339297
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Petr Hosek [Wed, 8 Aug 2018 22:23:57 +0000 (22:23 +0000)]
[ADT] Normalize empty triple components
LLVM triple normalization is handling "unknown" and empty components
differently; for example given "x86_64-unknown-linux-gnu" and
"x86_64-linux-gnu" which should be equivalent, triple normalization
returns "x86_64-unknown-linux-gnu" and "x86_64--linux-gnu". autoconf's
config.sub returns "x86_64-unknown-linux-gnu" for both
"x86_64-linux-gnu" and "x86_64-unknown-linux-gnu". This changes the
triple normalization to behave the same way, replacing empty triple
components with "unknown".
This addresses PR37129.
Differential Revision: https://reviews.llvm.org/D50219
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339294
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Sanjay Patel [Wed, 8 Aug 2018 22:18:16 +0000 (22:18 +0000)]
[x86] add tests for fsub+fadd with FMF; NFC
These are related to the block of code under review in D50195.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339293
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Jonas Devlieghere [Wed, 8 Aug 2018 21:16:50 +0000 (21:16 +0000)]
[DWARF] Unclamp line table version on Darwin for v5 and later.
On Darwin we pin the DWARF line tables to version 2. Stop doing so for
DWARF v5 and later.
Differential revision: https://reviews.llvm.org/D49381
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339288
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Michal Gorny [Wed, 8 Aug 2018 20:45:03 +0000 (20:45 +0000)]
[cmake] Append LLVM_VERSION_SUFFIX to SOVERSION
Append LLVM_VERSION_SUFFIX to SOVERSION. This makes it possible
to use the suffix to differentiate binary-incompatible versions
of LLVM built via BUILD_SHARED_LIBS.
We are planning to use this to temporarily preserve ABI-incompatible
variants of LLVM while switching the system between them, e.g. when
rebuilding the system to use libc++. Normally this would mean that once
LLVM is rebuilt using libc++ all the reverse dependencies become
immediately broken. Using a distinct SOVERSION allows us to preserve
the ABI compatibility before all the packages are rebuilt.
Differential Revision: https://reviews.llvm.org/D39939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339286
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Michal Gorny [Wed, 8 Aug 2018 20:44:58 +0000 (20:44 +0000)]
cmake: Store LLVM_VERSION_SUFFIX in LLVMConfig.cmake
Store LLVM_VERSION_SUFFIX along with other version components
in LLVMConfig.cmake. This fixes preserving the suffix set while building
LLVM to stand-alone builds of other components, e.g. clang,
and therefore improves uniformity between the two build models.
Given that there is no apparent reason to omit this part of version,
that it is distributed to subprojects when building as part of LLVM
and that it is included in LLVM_PACKAGE_VERSION, I think it was omitted
accidentally rather than done on purpose.
Differential Revision: https://reviews.llvm.org/D43701
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339285
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Eli Friedman [Wed, 8 Aug 2018 20:03:10 +0000 (20:03 +0000)]
[ARM] Avoid spilling lr with Thumb1 tail calls.
Normally, if any registers are spilled, we prefer to spill lr on Thumb1
so we can fold the "bx lr" into the "pop". However, if there are tail
calls involved, restoring lr is expensive, so skip the optimization in
that case.
The spill of r7 in the new test also isn't necessary, but that's
mostly orthogonal to this patch. (It's the same code in
ARMFrameLowering, but it's not related to tail calls.)
Differential Revision: https://reviews.llvm.org/D49459
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339283
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