Make MDNode::intersect faster than O(n * m)

It is pretty easy to get it down to O(nlogn + mlogm).  This
implementation has the added benefit of automatically deduplicating
entries between the two sets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278837 91177308-0d34-0410-b5e6-96231b3b80d8

Don't passively concatenate MDNodes

I have audited all the callers of concatenate and none require duplicate
entries to service concatenation.
These duplicates serve no purpose but to needlessly embiggen the IR.

N.B. Layering getMostGenericAliasScope on top of concatenate makes it
O(nlogn + mlogm) instead of O(n*m).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278836 91177308-0d34-0410-b5e6-96231b3b80d8

[Hexagon] Standardize next batch of pseudo instructions

ALIGNA          PS_aligna
ALLOCA          PS_alloca
TFR_FI          PS_fi
TFR_FIA         PS_fia
TFR_PdFalse     PS_false
TFR_PdTrue      PS_true
VMULW           PS_vmulw
VMULW_ACC       PS_vmulw_acc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278832 91177308-0d34-0410-b5e6-96231b3b80d8

[Coroutines] Part 7: Split coroutine into subfunctions

Summary:
This patch adds simple coroutine splitting logic to CoroSplit pass.

Documentation and overview is here: http://llvm.org/docs/Coroutines.html.

Upstreaming sequence (rough plan)
1.Add documentation. (https://reviews.llvm.org/D22603)
2.Add coroutine intrinsics. (https://reviews.llvm.org/D22659)
...
7. Split coroutine into subfunctions <= we are here
8. Coroutine Frame Building algorithm
9. Handle coroutine with unwinds
10+. The rest of the logic

Reviewers: majnemer

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23461

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278830 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add helper functions for foldICmpWithConstant; NFCI

Besides breaking up a 700 line function to improve readability,
this sinks the 'FIXME: ConstantInt' check into each helper. So
now we can independently break that restriction within any of the
helper functions.

As much as possible, the code was only {cut/paste/clang-format}'ed
to minimize risk (no functional changes intended), so several more
readability improvements are still possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278828 91177308-0d34-0410-b5e6-96231b3b80d8

[libFuzzer] refactoring around PCMap, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278825 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] Enforce compact branch restrictions

Check both operands for use of the $zero register which cannot be used with
a compact branch instruction.

Reviewers: dsanders, vkalintris

Differential Review: https://reviews.llvm.org/D23547

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278824 91177308-0d34-0410-b5e6-96231b3b80d8

[Hexagon] Clean up some miscellaneous V60 intrinsics a bit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278823 91177308-0d34-0410-b5e6-96231b3b80d8

When the inline spiller rematerializes an instruction, take the debug location from the instruction
that immediately follows the rematerialization point.

Patch by Andrea DiBiagio.

Differential Revision: http://reviews.llvm.org/D23539

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278822 91177308-0d34-0410-b5e6-96231b3b80d8

Remove a stale comment from the test, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278821 91177308-0d34-0410-b5e6-96231b3b80d8

[Asan] Unpoison red zones even if use-after-scope was disabled with runtime flag

Summary: PR27453

Reviewers: eugenis

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23481

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278818 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] use m_APInt in foldICmpWithConstant; NFCI

There's some formatting and pointer deref ugliness here that I intend to fix in
subsequent patches. The overall goal is to refactor the obnoxiously long switch
and incrementally remove the restriction to scalar types (allow folds for vector
splats). This patch introduces the use of m_APInt which means the RHSV reference
is now a pointer (and may have matched a vector splat), but the check of 'RHS'
remains, so vector folds are disallowed and no functional change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278816 91177308-0d34-0410-b5e6-96231b3b80d8

[Hexagon] Standardize vector predicate load/store pseudo instructions

- Remove unused instructions: LDriq_pred_vec_V6, STriq_pred_vec_V6, and
  the 128B counterparts.
- Rename:
    LDriq_pred_V6         PS_vloadrq_ai
    LDriq_pred_V6_128B    PS_vloadrq_ai_128B
    STriq_pred_V6         PS_vstorerq_ai
    STriq_pred_V6_128B    PS_vstorerq_ai_128B

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278813 91177308-0d34-0410-b5e6-96231b3b80d8

[AArch64][GlobalISel] Select G_MUL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278810 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalISel] Fix G_MUL comment. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278809 91177308-0d34-0410-b5e6-96231b3b80d8

[AArch64][GlobalISel] Factor out unsupported binop check. NFC.

We're going to need it for G_MUL, and, if other targets end up using
something similar, we can easily put it in the generic selector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278808 91177308-0d34-0410-b5e6-96231b3b80d8

[ADCE] Modify data structures to support removing control flow

Summary:
This is part of a serious of patches to evolve ADCE.cpp to support
removing of unnecessary control flow.

This patch changes the data structures to hold liveness information to
support the additional information we will eventually need. In
particular we now have a notion of basic blocks being live because
they contain a live operations. This will eventually feed into control
dependence analysis of which branches are live. We cater to getting
from instructions to associated block information and from blocks to
information about their terminators.

This patch also changes the structure of the main loop of the
algorithm so that it alternates propagating liveness between
instructions and usign control dependence information to mark branches
live.

We force all terminators live for now until we add code to handlinge
removing control flow in a later patch.

No changes to effective behavior with this patch

Previous patches:

D23065 [ADCE] Refactor anticipating new functionality (NFC)
D23102 [ADCE] Refactoring for new functionality (NFC)

Reviewers: nadav, majnemer, mehdi_amini

Subscribers: freik, twoh, llvm-commits

Differential Revision: https://reviews.llvm.org/D23225

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278807 91177308-0d34-0410-b5e6-96231b3b80d8

[Pipeliner] Fix an asssert due to invalid Phi in the epilog

The pipeliner was generating an invalid Phi name for an operand
in the epilog block, which caused an assert in the live variable
analysis pass. The fix is to the code that generates new Phis
in the epilog block. In this case, there is an existing Phi that
needs to be reused rather than creating a new Phi instruction.

Differential Revision: https://reviews.llvm.org/D23513

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278805 91177308-0d34-0410-b5e6-96231b3b80d8

[AArch64][GlobalISel] Select (variable) shifts.

For now, no support for immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278804 91177308-0d34-0410-b5e6-96231b3b80d8

[AArch64][GlobalISel] Robustize select tests. NFC.

Using the same register means nothing was checking for operand order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278803 91177308-0d34-0410-b5e6-96231b3b80d8

[AArch64][GlobalISel] Select p0 G_FRAME_INDEX.

And mark it as legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278802 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalISel] Mention pointers in LowLevelType.h. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278801 91177308-0d34-0410-b5e6-96231b3b80d8

[x86] Refactor a PowerPC specific ctlz/srl transformation (NFC).

Following the discussion on D22038, this refactors a PowerPC specific setcc -> srl(ctlz) transformation so it can be used by other targets.

Differential Revision: https://reviews.llvm.org/D23445

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278799 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][AVX] Fixed typo in zero element insertion

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278798 91177308-0d34-0410-b5e6-96231b3b80d8

[Hexagon] Improve test to check for @PCREL, only run llc, not opt -> llc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278796 91177308-0d34-0410-b5e6-96231b3b80d8

[MemorySanitizer] [MIPS] Changed memory mapping to support pie executable.

Reviewed by eugenis
Differential: D22994

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278795 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Add support for combining v2f64 target shuffles to VZEXT_MOVL byte rotations

The combine was only matching v2i64 as it assumed lowering to MOVQ - but we have v2f64 patterns that match in a similar fashion

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278794 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][AVX512BW] Updated tests to demonstrate AVX512BW's inability to vectorize v64i8 shifts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278790 91177308-0d34-0410-b5e6-96231b3b80d8

Correct the upper bound for a CBZ/CBNZ branch target.

Summary:
Fix for the upper bound check that was causing a build failure.

Reviewers: olista01, rengolin, t.p.northover

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23501

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278789 91177308-0d34-0410-b5e6-96231b3b80d8

[Thumb] Validate branch target for CBZ/CBNZ instructions.

Summary:
The assembler currently does not check the branch target for CBZ/CBNZ
instructions, which only permit branching forwards with a positive offset. This
adds validation for the branch target to ensure negative PC-relative offsets are
not encoded into the instruction, whether specified as a literal or as an
assembler symbol.

Reviewers: rengolin, t.p.northover

Subscribers: llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D23312

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278788 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Add support for combining target shuffles to PALIGNR byte rotations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278787 91177308-0d34-0410-b5e6-96231b3b80d8

[AVR] Fix compile errors

Differential Revision: https://reviews.llvm.org/D23450

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278784 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add xgetbv/xsetbv intrinsics to non-windows platforms

Differential Revision: https://reviews.llvm.org/D21958

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278782 91177308-0d34-0410-b5e6-96231b3b80d8

[InstSimplify] Fold gep (gep V, C), (xor V, -1) to C-1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278779 91177308-0d34-0410-b5e6-96231b3b80d8

FunctionImport: missed one occurence of ImportListForModule to rename (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278778 91177308-0d34-0410-b5e6-96231b3b80d8

FunctionImport: rename ImportsForModule to ImportList for consistency (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278777 91177308-0d34-0410-b5e6-96231b3b80d8

[LTO] Simplify APIs and constify (NFC)

Summary:
Multiple APIs were taking a StringMap for the ImportLists containing
the entries for for all the modules while operating on a single entry
for the current module. Instead we can pass the desired ModuleImport
directly. Also some of the APIs were not const, I believe just to be
able to use operator[] on the StringMap.

Reviewers: tejohnson

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23537

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278776 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for missing vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278768 91177308-0d34-0410-b5e6-96231b3b80d8

[LTO] Rename variables with meaningul names, i.e. more than one character (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278766 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for missing vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278765 91177308-0d34-0410-b5e6-96231b3b80d8

[AMDGPU] Give enum an explicit 64-bit type to fix MSVC 2013 failures

Recall that MSVC always gives enums the type 'int', nothing else.  MSVC
2015 does not appear to have this problem anymore.

Clang-cl -Wmicrosoft-enum-value flags this, FWIW, so now I have a true
positive for my warning. :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278762 91177308-0d34-0410-b5e6-96231b3b80d8

[ThinLTO] Fix temp file dumping, enable via llvm-lto and test it

Summary:
Fixed a bug in ThinLTOCodeGenerator's temp file dumping. The Twine
needs to be passed directly as an argument, or a copy saved into a
std::string.

It doesn't seem there are any consumers of this, so I added a new option
to llvm-lto to enable saving of temp files during ThinLTO, and augmented
a test to use it to check post-import but pre-opt bitcode.

Reviewers: mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278761 91177308-0d34-0410-b5e6-96231b3b80d8

Don't use %llc_dwarf with -mtriple, they don't combine

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278758 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for missing vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278757 91177308-0d34-0410-b5e6-96231b3b80d8

Linker: Avoid some ridiculous indentation by using a temporary. NFC

This was indented really awkwardly, and clang-format didn't seem to
know how to do any better. Avoid the issue with a temporary variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278756 91177308-0d34-0410-b5e6-96231b3b80d8

Adding the triple for test comitted with r278703.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278755 91177308-0d34-0410-b5e6-96231b3b80d8

[sancov] extracting AArch64 test to a separate file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278754 91177308-0d34-0410-b5e6-96231b3b80d8

[ADT] Fix DepthFirstIterator's std::iterator base to have normal typedefs

Summary: This is similiar to r278752, where I found that the std::iterator<...> base can be normal.

Reviewers: dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23527

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278753 91177308-0d34-0410-b5e6-96231b3b80d8

[ADT] Change PostOrderIterator to use NodeRef. NFC.

Reviewers: dblaikie

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D23522

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278752 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for missing vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278751 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo in lowering for fp128 ueq.

Regression from r259791.

Differential Revision: https://reviews.llvm.org/D23374

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278750 91177308-0d34-0410-b5e6-96231b3b80d8

AMDGPU/R600: Convert buffer id to VTX_READ input

Use patterns instead of multiple instructions
Add buffer id to asm string

https://reviews.llvm.org/D22650

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278749 91177308-0d34-0410-b5e6-96231b3b80d8

Really fix the issue with 502957cc9cf805dc6093950e8cdcd0db4969d933. Windows %p and FileCheck limitations makes the test linux only

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278748 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for missing vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278747 91177308-0d34-0410-b5e6-96231b3b80d8

GlobalISel: support loads and stores of strange types.

Before we mischaracterized structs and i1 types as a scalar with size 0 in
various ways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278744 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unnecessary flag from new test

Remove -disable-inlining flag that snuck into the test I added for r278739.
It doesn't have an effect in ThinLTO mode (something that should be fixed),
but in any case the checks depend on inlining currently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278743 91177308-0d34-0410-b5e6-96231b3b80d8

update tests to use FileCheck and exact checking

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278741 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "[ValueTracking] Improve ValueTracking on left shift with nsw flag"

This reverts commit r278172.  It causes PR28946.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278740 91177308-0d34-0410-b5e6-96231b3b80d8

[ThinLTO] Remove functions resolved to available_externally from comdats

Summary:
thinLTOResolveWeakForLinkerModule needs to drop any preempted weak symbols
that were converted to available_externally from comdats, otherwise we
will get a verification failure (since available_externally is a
declaration for the linker, and no declarations can be in a comdat).

Reviewers: mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23015

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278739 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for missing vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278737 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a test that failed due to:
 https://llvm.org/svn/llvm-project/llvm/trunk@278725 91177308-0d34-0410-b5e6-96231b3b80d8

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278732 91177308-0d34-0410-b5e6-96231b3b80d8

Enhance SCEV to compute the trip count for some loops with unknown stride.

Patch by Pankaj Chawla

Differential Revision: https://reviews.llvm.org/D22377

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278731 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add test for missing vector icmp fold

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278727 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278726 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-objdump: Implement source[line numbers] interleaving

Differential Revsion: https://reviews.llvm.org/D22932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278725 91177308-0d34-0410-b5e6-96231b3b80d8

[libFuzzer] print a verbose message after executing inputs in non-fuzzing mode

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278724 91177308-0d34-0410-b5e6-96231b3b80d8

[libFuzzer] fix the bot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278721 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for missing vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278717 91177308-0d34-0410-b5e6-96231b3b80d8

update test to use FileCheck and autogenerated checks

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278714 91177308-0d34-0410-b5e6-96231b3b80d8

Fix WAsm test after LSR change in r278658

Now the increment is done in a different location

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278713 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "[Thumb] Validate branch target for CBZ/CBNZ instructions."

This currently breaks the greendragon clang-stage1-configure-RA/ and
brotli. It is probably just uncovering a pre-existing problem. Reverting
temporarily to get the buildbots green again. A reduced testcase will
follow shortly.

This reverts commit r278659.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278711 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for missing vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278709 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add test for missing vector icmp fold

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278708 91177308-0d34-0410-b5e6-96231b3b80d8

minimize test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278707 91177308-0d34-0410-b5e6-96231b3b80d8

remove unnecessary IR comments about uses

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278705 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for missing vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278704 91177308-0d34-0410-b5e6-96231b3b80d8

Local variables whose address is taken and passed on to a call are described
in debug info using their stack slots instead of as an indirection of param reg + 0
offset. This is done by detecting FrameIndexSDNodes in SelectionDAG and generating
FrameIndexDbgValues for them. This ultimately generates DBG_VALUEs with stack
location operands.

Differential Revision: http://reviews.llvm.org/D23283

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278703 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for missing vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278689 91177308-0d34-0410-b5e6-96231b3b80d8

[libFuzzer] add InsertRepeatedBytes and EraseBytes.

New mutation: InsertRepeatedBytes.
Updated mutation: EraseByte => EraseBytes.

This helps https://github.com/google/sanitizers/issues/710
where libFuzzer was not able to find a known bug.
Now it finds it in minutes.

Hopefully, the change is general enough to help other targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278687 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] auto-generate exact checks

Note that several of these tests belong in InstSimplify rather than
InstCombine because they return existing operands or constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278684 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for missing vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278683 91177308-0d34-0410-b5e6-96231b3b80d8

AMDGPU: Update AMDGPURuntimeMetadata.h for enums of address space qualifiers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278682 91177308-0d34-0410-b5e6-96231b3b80d8

AMDGPU: Don't fold subregister extracts into tied operands

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278676 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "[SimplifyCFG] Rewrite SinkThenElseCodeToEnd"

This reverts commit r278660.

It causes downstream assertion failure in InstCombine on shuffle
instructions. Comes up in __mm_swizzle_epi32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278672 91177308-0d34-0410-b5e6-96231b3b80d8

[AMDGPU] fix failure on printing of non-existing instruction operands.

Differential revision: https://reviews.llvm.org/D23323

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278665 91177308-0d34-0410-b5e6-96231b3b80d8

MachineLoop: add methods findLoopControlBlock and findLoopPreheader

This adds two new utility functions findLoopControlBlock and findLoopPreheader
to MachineLoop and MachineLoopInfo. These functions are refactored and taken
from the Hexagon target as they are target independent; thus this is intendend to
be a non-functional change.

Differential Revision: https://reviews.llvm.org/D22959

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278661 91177308-0d34-0410-b5e6-96231b3b80d8

[SimplifyCFG] Rewrite SinkThenElseCodeToEnd

The new version has several advantages:
  1) IMSHO it's more readable and neater
  2) It handles loads and stores properly
  3) It can handle any number of incoming blocks rather than just two. I'll be taking advantage of this in a followup patch.

With this change we can now finally sink load-modify-store idioms such as:

    if (a)
      return *b += 3;
    else
      return *b += 4;

    =>

    %z = load i32, i32* %y
    %.sink = select i1 %a, i32 5, i32 7
    %b = add i32 %z, %.sink
    store i32 %b, i32* %y
    ret i32 %b

When this works for switches it'll be even more powerful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278660 91177308-0d34-0410-b5e6-96231b3b80d8

[Thumb] Validate branch target for CBZ/CBNZ instructions.

Summary:
The assembler currently does not check the branch target for CBZ/CBNZ
instructions, which only permit branching forwards with a positive offset. This
adds validation for the branch target to ensure negative PC-relative offsets are
not encoded into the instruction, whether specified as a literal or as an
assembler symbol.

Reviewers: rengolin, t.p.northover

Subscribers: llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D23312

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278659 91177308-0d34-0410-b5e6-96231b3b80d8

[LSR] Don't try and create post-inc expressions on non-rotated loops

If a loop is not rotated (for example when optimizing for size), the latch is not the backedge. If we promote an expression to post-inc form, we not only increase register pressure and add a COPY for that IV expression but for all IVs!

Motivating testcase:

    void f(float *a, float *b, float *c, int n) {
      while (n-- > 0)
        *c++ = *a++ + *b++;
    }

It's imperative that the pointer increments be located in the latch block and not the header block; if not, we cannot use post-increment loads and stores and we have to keep both the post-inc and pre-inc values around until the end of the latch which bloats register usage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278658 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] PADDUSB/W instructions should be commutable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278654 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Mark some of the X86 SDNodes as commutative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278653 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] X86ISD::FANDN is not commutative or associative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278652 91177308-0d34-0410-b5e6-96231b3b80d8

[ScopedNoAliasAA] collectMDInDomain should be a free function

collectMDInDomain doesn't use any class members, making it a free
function is not a functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278651 91177308-0d34-0410-b5e6-96231b3b80d8

[ScopedNoAliasAA] Only collect noalias nodes if we have alias.scope nodes

No functional change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278646 91177308-0d34-0410-b5e6-96231b3b80d8

[ScopedNoAliasAA] Replace !ScopeNodes.size() with ScopeNodes.empty()

No functional change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278645 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "[ScopedNoAliasAA] Remove an unneccesary set"

This reverts commit r278641.  I'm not sure why but this has upset the
multistage builders...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278644 91177308-0d34-0410-b5e6-96231b3b80d8

[ScopedNoAliasAA] Remove an unneccesary set

We are trying to prove that one group of operands is a subset of
another.  We did this by populating two Sets and determining that every
element within one was inside the other.

However, this is unnecessary.  We can simply construct a single set and
test if each operand is within it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278641 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add test for missing vector icmp fold

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278639 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add tests for vector icmp folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278637 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] add test for potentially missing vector icmp fold

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278636 91177308-0d34-0410-b5e6-96231b3b80d8