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Florian Hahn [Thu, 19 Apr 2018 12:06:26 +0000 (12:06 +0000)]
[IR/BasicBlockTest] Fix asan failure introduced in rL330316.
The argument has to be deleted after the module containing the function
gets deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330320
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Simon Pilgrim [Thu, 19 Apr 2018 11:37:26 +0000 (11:37 +0000)]
[X86][FMA] Remove FMA reg-reg InstRW scheduler overrides.
These are all already handled identically by WriteFMA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330319
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Simon Pilgrim [Thu, 19 Apr 2018 11:16:33 +0000 (11:16 +0000)]
[X86][BtVer2] Remove 128-bit F16C InstRW overrides.
These are already handled identically by WriteCvtF2F.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330318
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Simon Pilgrim [Thu, 19 Apr 2018 10:59:49 +0000 (10:59 +0000)]
[llvm-exegesis] Fix PfmIssueCountersTable creation
This patch ensures that the pfm issue counter tables are the correct size, accounting for the invalid resource entry at the beginning of the resource tables.
It also fixes an issue with pfm failing to match event counters due to a trailing comma added to all the event names.
I've also added a counter comment to each entry as it helps locate problems with the tables.
Note: I don't have access to a SandyBridge test machine, which is the only model to make use of multiple event counters being mapped to a single resource. I don't know if pfm accepts a comma-seperated list or not, but that is what it was doing.
Differential Revision: https://reviews.llvm.org/D45787
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330317
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Florian Hahn [Thu, 19 Apr 2018 09:48:07 +0000 (09:48 +0000)]
[BasicBlock] Add instructionsWithoutDebug methods to skip debug insts.
Reviewers: aprantl, vsk, mattd, chandlerc
Reviewed By: aprantl, vsk
Differential Revision: https://reviews.llvm.org/D45657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330316
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Simon Dardis [Thu, 19 Apr 2018 09:45:04 +0000 (09:45 +0000)]
[mips] Guard some macro expansions properly
Reviewers: atanasyan, abeserminji
Differential Revision: https://reviews.llvm.org/D45565
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330315
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Sjoerd Meijer [Thu, 19 Apr 2018 08:21:50 +0000 (08:21 +0000)]
[ARM] Add some missing FP16 VSEL test cases
Differential Revision: https://reviews.llvm.org/D45724
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330313
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Sander de Smalen [Thu, 19 Apr 2018 07:35:08 +0000 (07:35 +0000)]
[AArch64][AsmParser] NFC: Cleanup parsing of scalar registers.
Summary:
- Renamed tryParseRegister to tryParseScalarRegister, which
now returns an OperandMatchResultTy.
- Moved matching of certain aliases into matchRegisterNameAlias.
- Changed type of most 'Reg' variables to 'unsigned'.
This is patch [1/4] in a series to add assembler/disassembler support for
SVE's contiguous LD1 (scalar+scalar) instructions:
- Patch [1/4]: https://reviews.llvm.org/D45687
- Patch [2/4]: https://reviews.llvm.org/D45688
- Patch [3/4]: https://reviews.llvm.org/D45689
- Patch [4/4]: https://reviews.llvm.org/D45690
Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro, samparker
Reviewed By: samparker
Subscribers: samparker, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D45687
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330311
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Craig Topper [Thu, 19 Apr 2018 05:34:05 +0000 (05:34 +0000)]
[X86] Scrub scheduling information for MUL/IMUL on Intel CPUs.
This removes a bunch of unnecessary InstRW overrides. It also cleans up the missing information from the Sandy Bridge model. Other fixes to other models.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330308
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Bob Haarman [Wed, 18 Apr 2018 23:04:09 +0000 (23:04 +0000)]
Fix data race in X86FloatingPoint.cpp ASSERT_SORTED
Summary:
ASSERT_SORTED checks if a table is sorted, and uses a boolean to
prevent the check from being run again if it was earlier determined
that the table is in fact sorted. Unsynchronized reads and writes of
that boolean triggered ThreadSanitizer's data race detection. This
change rewrites the code to use std::atomic<bool> instead.
Fixes PR36922.
Reviewers: rnk
Reviewed By: rnk
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D45742
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330301
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Craig Topper [Wed, 18 Apr 2018 22:07:53 +0000 (22:07 +0000)]
[X86] Correct the Defs, Uses, hasSideEffects, mayLoad, mayStore for XCHG and XADD instructions.
I don't think we emit any of these from codegen except for using XCHG16ar as 2 byte NOP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330298
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Artem Belevich [Wed, 18 Apr 2018 21:51:48 +0000 (21:51 +0000)]
[NVPTX, CUDA] Added support for m8n32k16 and m32n8k16 variants of wmma instructions.
The new instructions were added added for sm_70+ GPUs in CUDA-9.1.
Differential Revision: https://reviews.llvm.org/D45068
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330296
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Simon Pilgrim [Wed, 18 Apr 2018 20:47:48 +0000 (20:47 +0000)]
[llvm-mca][X86] Add mmx versions of SSSE3 instructions
Move PABS instructions incorrectly tested under SSE2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330295
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Alex Bradbury [Wed, 18 Apr 2018 20:36:12 +0000 (20:36 +0000)]
[RISCV] Add test changes missed from rL330293
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330294
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Alex Bradbury [Wed, 18 Apr 2018 20:34:23 +0000 (20:34 +0000)]
[RISCV] Introduce pattern for materialising immediates with 0 for lower 12 bits
These immediates can be materialised with just an lui, rather than an lui+addi
pair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330293
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Alex Bradbury [Wed, 18 Apr 2018 20:25:07 +0000 (20:25 +0000)]
[RISCV] Add imm-cse.ll test case
This test case demonstrates that common subexpression elimination takes place
between code sequences for materialising constants. In particular, it
demonstrates that redundant lui aren't generated. This would capture a
regression if applying a patch such as D41949.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330291
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Lei Huang [Wed, 18 Apr 2018 20:22:26 +0000 (20:22 +0000)]
[NFC] test case clean up
1. remove redundant tests
2. update XForm_tests to generated expected code gen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330290
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Alex Bradbury [Wed, 18 Apr 2018 20:17:29 +0000 (20:17 +0000)]
[RISCV] Expand codegen -> compression sanity checks and move to a single file
The objdump tests interfere with update_llc_test_checks.py and can't be
automatically update them. Put the sanitify check for compression on the
codegen codepath into a separate file, and expand it to also include tests of
integer materialisation. This would catch changes such as those triggered by
D41949.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330288
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Craig Topper [Wed, 18 Apr 2018 20:15:00 +0000 (20:15 +0000)]
[X86] Fix the Uses/Defs,mayLoad,mayStore,hasSideEffects flags for the CMPXCHG instructions.
The compiler only emits the locked version of these which use different instruction definitions. The versions fixed here are only used by the assembler/disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330287
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Alex Bradbury [Wed, 18 Apr 2018 19:02:31 +0000 (19:02 +0000)]
Revert "[RISCV] implement li pseudo instruction"
Reverts rL330224, while issues with the C extension and missed common
subexpression elimination opportunities are addressed. Neither of these issues
are visible in current RISC-V backend unit tests, which clearly need
expanding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330281
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Lei Huang [Wed, 18 Apr 2018 17:41:46 +0000 (17:41 +0000)]
[Power9]Legalize and emit code for converting Unsigned HWord/Char to Quad-Precision
Legalize and emit code for converting unsigned HWord/Char to QP:
xscvsdqp
xscvudqp
Only covering patterns for unsigned forms cause we don't have part-word
sign-extending integer loads into VSX registers.
Differential Revision: https://reviews.llvm.org/D45494
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330278
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Amara Emerson [Wed, 18 Apr 2018 17:10:19 +0000 (17:10 +0000)]
[AArch64] Add isel pattern for v8i8->v2f32 NVCASTs.
rdar://
39454635
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330276
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Alex Bradbury [Wed, 18 Apr 2018 16:43:03 +0000 (16:43 +0000)]
[RISCV] Add specific tests for materialising imm32hi20 constants
i.e. constants that can be materialised with a single lui, as the lower 12
bits are zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330274
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Lei Huang [Wed, 18 Apr 2018 16:34:22 +0000 (16:34 +0000)]
[Power9]Legalize and emit code for converting (Un)Signed Word to Quad-Precision
Legalize and emit code for converting (Un)Signed Word to quad-precision via:
xscvsdqp
xscvudqp
Differential Revision: https://reviews.llvm.org/D45389
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330273
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Alexey Bataev [Wed, 18 Apr 2018 16:13:41 +0000 (16:13 +0000)]
[DEBUG] Initial adaptation of NVPTX target for debug info emission.
Summary:
Patch adds initial emission of the debug info for NVPTX target.
Currently, only .file and .loc directives are emitted, everything else is
commented out to not break the compilation of Cuda.
Reviewers: echristo, jlebar, tra, jholewinski
Subscribers: mgorny, aprantl, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D41827
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330271
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Chandler Carruth [Wed, 18 Apr 2018 15:52:50 +0000 (15:52 +0000)]
[x86] Switch EFLAGS copy lowering to use reg-reg form of testing for
a zero register.
Previously I tried this and saw LLVM unable to transform this to fold
with memory operands such as spill slot rematerialization. However, it
clearly works as shown in this patch. We turn these into `cmpb $0,
<mem>` when useful for folding a memory operand without issue. This form
has no disadvantage compared to `testb $-1, <mem>`. So overall, this is
likely no worse and may be slightly smaller in some cases due to the
`testb %reg, %reg` form.
Differential Revision: https://reviews.llvm.org/D45475
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330269
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Jonas Devlieghere [Wed, 18 Apr 2018 15:26:51 +0000 (15:26 +0000)]
[llvm-mca] Use WithColor for printing errors
Use convenience helpers in WithColor to print errors and notes.
Differential revision: https://reviews.llvm.org/D45666
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330267
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Aaron Smith [Wed, 18 Apr 2018 15:26:26 +0000 (15:26 +0000)]
[support] Revert the changes made to Path.inc for the default Windows code page
Path.inc/widenPath tries to decode the path using both UTF-8 and the default Windows code page.
This is no longer necessary with the new InitLLVM method which ensures that the command line
arguemnts are already UTF-8 on Windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330266
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Pavel Labath [Wed, 18 Apr 2018 15:23:21 +0000 (15:23 +0000)]
Fix macosx build broken by r330249
It seems llc crashes when targetting darwin with split-dwarf (pr37164).
This happens on all inputs, not just the one I added in the above
commit. Work around the issue by hardcoding the target triple to linux,
which is what all split-dwarf tests seem to be doing.
As I don't know of a way to specify the os part of the triple without
spelling out the architecture as well, I move the new test to the X86
folder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330265
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Chandler Carruth [Wed, 18 Apr 2018 15:13:16 +0000 (15:13 +0000)]
[x86] Fix PR37100 by teaching the EFLAGS copy lowering to rewrite uses
across basic blocks in the limited cases where it is very straight
forward to do so.
This will also be useful for other places where we do some limited
EFLAGS propagation across CFG edges and need to handle copy rewrites
afterward. I think this is rapidly approaching the maximum we can and
should be doing here. Everything else begins to require either heroic
analysis to prove how to do PHI insertion manually, or somehow managing
arbitrary PHI-ing of EFLAGS with general PHI insertion. Neither of these
seem at all promising so if those cases come up, we'll almost certainly
need to rewrite the parts of LLVM that produce those patterns.
We do now require dominator trees in order to reliably diagnose patterns
that would require PHI nodes. This is a bit unfortunate but it seems
better than the completely mysterious crash we would get otherwise.
Differential Revision: https://reviews.llvm.org/D45673
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330264
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Simon Pilgrim [Wed, 18 Apr 2018 14:46:54 +0000 (14:46 +0000)]
[llvm-exegesis] Early out if the scheduler models have no extra info.
We were calling getExtraProcessorInfo() without checking hasExtraProcessorInfo(), resulting in an assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330263
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Jonas Devlieghere [Wed, 18 Apr 2018 14:42:33 +0000 (14:42 +0000)]
[llvm-profdata] Use WithColor for printing errors
Use convenience helpers in WithColor to print errors and warnings.
Differential revision: https://reviews.llvm.org/D45658
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330262
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Jonas Devlieghere [Wed, 18 Apr 2018 14:41:47 +0000 (14:41 +0000)]
[llvm-link] Use WithColor for printing errors
Use convenience helpers in WithColor to print errors and warnings.
Differential revision: https://reviews.llvm.org/D45667
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330261
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Simon Pilgrim [Wed, 18 Apr 2018 14:22:33 +0000 (14:22 +0000)]
[llvm-exegesis] Use LLVMTargetMachine pointer everywhere. NFCI.
Avoid calling the unique_ptr multiple times.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330260
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Sanjay Patel [Wed, 18 Apr 2018 14:21:31 +0000 (14:21 +0000)]
[SimplifyLibcalls] Realloc(null, N) -> Malloc(N)
Patch by Dávid Bolvanský!
Differential Revision: https://reviews.llvm.org/D45413
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330259
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Simon Pilgrim [Wed, 18 Apr 2018 13:58:41 +0000 (13:58 +0000)]
[llvm-exegesis] Put a newline at the end of each error report.
Makes multiple error messages much easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330258
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David Stuttard [Wed, 18 Apr 2018 13:53:31 +0000 (13:53 +0000)]
[AMDGPU] Fix issues for backend divergence tracking
Summary:
A change to use divergence analysis in the AMDGPU backend was getting formal
arguments incorrect (not tagged as divergent) unless they were VGPR0, VGPR1 or
VGPR2
For graphics shaders it is possible to have more than these passed in as VGPR
Modified the checking code to check for any VGPR registers passed in as formal
arguments.
Also, some intrinsics that are sources of divergence may have been lowered
during instruction selection and are missed on subsequent calls to
isSDNodeSourceOfDivergence - added the relevant AMDGPUISD checks as well.
Finally, the FunctionLoweringInfo tracks virtual registers that are live across
basic block boundaries. This is used to check for divergence of CopyFromRegister
registers using the DivergenceAnalysis analysis. For multiple blocks the lazily
evaluated inverted map VirtReg2Value was not cleared when the ValueMap map was.
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D45372
Change-Id: I112f3bd6dfe0f62e63ce9b43b893982778e4bee3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330257
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Sam Parker [Wed, 18 Apr 2018 13:50:28 +0000 (13:50 +0000)]
[IRCE] Only check for NSW on equality predicates
After investigation discussed in D45439, it would seem that the nsw
flag restriction is unnecessary in most cases. So the IsInductionVar
lambda has been removed, the functionality extracted, and now only
require nsw when using eq/ne predicates.
Differential Revision: https://reviews.llvm.org/D45617
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330256
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Simon Pilgrim [Wed, 18 Apr 2018 13:39:03 +0000 (13:39 +0000)]
[llvm-exegesis] Pull out LLVMTargetMachine to simplify debugging. NFCI.
Has been useful while trying to get around all the error reporting issues mentioned on PR37049.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330255
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Momchil Velikov [Wed, 18 Apr 2018 13:37:12 +0000 (13:37 +0000)]
Add tests for shrink wrapping and VLAs
Differential revision: https://reviews.llvm.org/D45727
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330253
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Teresa Johnson [Wed, 18 Apr 2018 13:25:23 +0000 (13:25 +0000)]
[gold] Add support for optimization remarks
Summary:
Adds support for LTO opt remarks (optionally with hotness) to
gold-plugin.
Reviewers: anemet
Subscribers: fhahn, mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D45752
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330252
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Pavel Labath [Wed, 18 Apr 2018 13:13:27 +0000 (13:13 +0000)]
[cmake] Improve pthread_[gs]etname_np detection code
Summary:
Due to some android peculiarities, in some build configurations
(statically linked executables targeting older releases) we could detect
the presence of these functions (because they are present in libc.a,
where check_library_exists searches), but then fail to build because the
headers did not include the definition.
This attempts to remedy that by upgrading the check_library_exists to
check_symbol_exists, which will check that the function is declared too.
I am hoping that a more thorough check will make the messy #ifdef we
have accumulated in the code obsolete, so I optimistically try to remove
them.
Reviewers: zturner, kparzysz, danalbert
Subscribers: srhines, mgorny, krytarowski, llvm-commits
Differential Revision: https://reviews.llvm.org/D45359
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330251
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Florian Hahn [Wed, 18 Apr 2018 12:29:24 +0000 (12:29 +0000)]
[LoopUnroll] Only peel if a predicate becomes known in the loop body.
If a predicate does not become known after peeling, peeling is unlikely
to be beneficial.
Reviewers: mcrosier, efriedma, mkazantsev, junbuml
Reviewed By: mkazantsev
Differential Revision: https://reviews.llvm.org/D44983
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330250
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Pavel Labath [Wed, 18 Apr 2018 12:11:59 +0000 (12:11 +0000)]
[CodeGen/Dwarf] Make debug_names compatible with split-dwarf
Summary:
Previously we crashed for the combination of the two features because we
tried to reference the dwo CU from the main object file. The fix
consists of two items:
- reference the skeleton CU from the name index (the consumer is
expected to use the skeleton CU to find the real data).
- use the main object file string pool for the strings in the index
Reviewers: JDevlieghere, aprantl, dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45566
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330249
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Greg Bedwell [Wed, 18 Apr 2018 10:27:45 +0000 (10:27 +0000)]
[UpdateTestChecks] Add update_mca_test_checks.py script
This script can be used to regenerate tests in the
test/tools/llvm-mca directory (PR36904).
Regenerated a number of tests using the pattern: test/tools/llvm-mca/*/*/*.s
Differential Revision: https://reviews.llvm.org/D45369
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330246
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Bjorn Pettersson [Wed, 18 Apr 2018 08:08:04 +0000 (08:08 +0000)]
[DebugInfo] Sink related dbg users when sinking in InstCombine
Summary:
When sinking an instruction in InstCombine we now also sink
the DbgInfoIntrinsics that are using the sunken value.
Example)
When sinking the load in this input
bb.X:
%0 = load i64, i64* %start, align 4, !dbg !31
tail call void @llvm.dbg.value(metadata i64 %0, ...)
br i1 %cond, label %for.end, label %for.body.lr.ph
for.body.lr.ph:
br label %for.body
we now also move the dbg.value, like this
bb.X:
br i1 %cond, label %for.end, label %for.body.lr.ph
for.body.lr.ph:
%0 = load i64, i64* %start, align 4, !dbg !31
tail call void @llvm.dbg.value(metadata i64 %0, ...)
br label %for.body
In the past we haven't moved the dbg.value so we got
bb.X:
tail call void @llvm.dbg.value(metadata i64 %0, ...)
br i1 %cond, label %for.end, label %for.body.lr.ph
for.body.lr.ph:
%0 = load i64, i64* %start, align 4, !dbg !31
br label %for.body
So in the past we got a debug-use before the def of %0.
And that dbg.value was also on the path jumping to %for.end, for
which %0 never was defined.
CodeGenPrepare normally comes to rescue later (when not moving
the dbg.value), since it moves dbg.value instrinsics quite
brutally, without really analysing if it is correct to move
the intrinsic (see PR31878).
So at the moment this patch isn't expected to have much impact,
besides that it is moving the dbg.value already in opt, making
the IR look more sane directly.
This can be seen as a preparation to (hopefully) make it possible
to turn off CodeGenPrepare::placeDbgValues later as a solution
to PR31878.
I also adjusted test/DebugInfo/X86/sdagsplit-1.ll to make the
IR in the test case up-to-date with this behavior in InstCombine.
Reviewers: rnk, vsk, aprantl
Reviewed By: vsk, aprantl
Subscribers: mattd, JDevlieghere, llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D45425
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330243
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Matt Davis [Wed, 18 Apr 2018 07:58:45 +0000 (07:58 +0000)]
[NFC] Remove doxygen brief tag from BasicBlock.h
Summary: Documentation is built using the AutoBrief configuration option in docs/doxygen.cfg.in. This change removes the redundant brief tags from BasicBlock.h. I'm happy to write a sed script and remove all \brief tags as a separate commit later.
Reviewers: aprantl
Reviewed By: aprantl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45708
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330242
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Craig Topper [Wed, 18 Apr 2018 06:41:25 +0000 (06:41 +0000)]
[X86][Broadwell] Remove some unnecessary InstRW overrides and add some FIXMEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330241
91177308-0d34-0410-b5e6-
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Craig Topper [Wed, 18 Apr 2018 06:04:30 +0000 (06:04 +0000)]
[X86] Give CMOV 2 cycle latency on SLM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330239
91177308-0d34-0410-b5e6-
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Craig Topper [Wed, 18 Apr 2018 05:15:24 +0000 (05:15 +0000)]
[X86] Don't crash on bad operand modifiers in inline assembly
Summary: Previously if a modifer was placed on a non-GPR register class we would hit an assert or crash.
Reviewers: echristo
Reviewed By: echristo
Subscribers: eraman, llvm-commits
Differential Revision: https://reviews.llvm.org/D45751
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330238
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Sanjay Patel [Wed, 18 Apr 2018 00:36:40 +0000 (00:36 +0000)]
[InstCombine] peek through bitcasted vector/array pointer GEP operand
The bitcast may be interfering with other combines or vectorization
as shown in PR16739:
https://bugs.llvm.org/show_bug.cgi?id=16739
Most pointer-related optimizations are probably able to look through
this bitcast, but removing the bitcast shrinks the IR, so it's at
least a size savings.
Differential Revision: https://reviews.llvm.org/D44833
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330237
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Bob Haarman [Tue, 17 Apr 2018 23:37:18 +0000 (23:37 +0000)]
Fix lock order inversion between ManagedStatic and Statistic
Summary:
Statistic and ManagedStatic both use mutexes. There was a lock order
inversion where, during initialization, Statistic's mutex would be
held while taking ManagedStatic's, and in llvm_shutdown,
ManagedStatic's mutex would be held while taking Statistic's
mutex. This change causes Statistic's initialization code to avoid
holding its mutex while calling ManagedStatic's methods, avoiding the
inversion.
Reviewers: dsanders, rtereshin
Reviewed By: dsanders
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D45398
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330236
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Stanislav Mekhanoshin [Tue, 17 Apr 2018 23:09:05 +0000 (23:09 +0000)]
[AMDGPU] Enabled v2.16 literals for VOP3P
Literal encoding needs op_sel_hi to select low 16 bit in this case.
Differential Revision: https://reviews.llvm.org/D45745
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330230
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Vedant Kumar [Tue, 17 Apr 2018 22:03:08 +0000 (22:03 +0000)]
[Mem2Reg] Create merged debug locations for inserted phis
Track the debug locations of the incoming values to newly-created phis,
and apply merged debug locations to the phis.
A merged location will be on line 0, but will have the correct scope
set. This improves crash reporting when an inlined instruction with a
merged location triggers a machine exception. A debugger will be able to
narrow down the crash to the correct inlined scope, instead of simply
pointing to the outer scope of the caller.
Taken together with a change allows generating merged line-0 locations
for instructions which aren't calls, this results in a 0.5% increase in
the uncompressed size of the .debug_line section of a stage2+Release
build of clang (-O3 -g).
rdar://
33858697
Differential Revision: https://reviews.llvm.org/D45397
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330227
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Vedant Kumar [Tue, 17 Apr 2018 22:03:07 +0000 (22:03 +0000)]
[Mem2Reg] Make RenamePassData a struct, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330226
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Alex Bradbury [Tue, 17 Apr 2018 21:56:40 +0000 (21:56 +0000)]
[RISCV] implement li pseudo instruction
The implementation follows the MIPS backend and expands the
pseudo instruction directly during asm parsing. As the result, only
real MC instructions are emitted to the MCStreamer. Additionally,
PseudoLI instructions are emitted during codegen. The actual
expansion to real instructions is performed during MI to MC lowering
and is similar to the expansion performed by the GNU Assembler.
Differential Revision: https://reviews.llvm.org/D41949
Patch by Mario Werner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330224
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Peter Collingbourne [Tue, 17 Apr 2018 21:44:17 +0000 (21:44 +0000)]
llvm-pdbutil: Fix an off-by-one error.
Differential Revision: https://reviews.llvm.org/D45740
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330222
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Stanislav Mekhanoshin [Tue, 17 Apr 2018 21:40:04 +0000 (21:40 +0000)]
LoadStoreVectorizer crashes due to unsized type
When we skip bitcasts while looking for GEP in LoadSoreVectorizer
we should also verify that the type is sized otherwise we assert
Differential Revision: https://reviews.llvm.org/D45709
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330221
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Keith Wyss [Tue, 17 Apr 2018 21:30:29 +0000 (21:30 +0000)]
[XRay] Typed event logging intrinsic
Summary:
Add an LLVM intrinsic for type discriminated event logging with XRay.
Similar to the existing intrinsic for custom events, but also accepts
a type tag argument to allow plugins to be aware of different types
and semantically interpret logged events they know about without
choking on those they don't.
Relies on a symbol defined in compiler-rt patch D43668. I may wait
to submit before I can see demo everything working together including
a still to come clang patch.
Reviewers: dberris, pelikan, eizan, rSerge, timshen
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45633
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330219
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Heejin Ahn [Tue, 17 Apr 2018 21:19:21 +0000 (21:19 +0000)]
[WebAssembly] Add an assertion for an invalid CFG
Summary:
It was not easy to provide a test case for D45648 (rL330079) because the bug
didn't manifest itself in the set of currently valid IRs. Added an assertion to
check this faster, thanks to @dblaikie's suggestion.
Reviewers: dblaikie
Subscribers: jfb, dschuff, sbc100, jgravelle-google, llvm-commits, dblaikie
Differential Revision: https://reviews.llvm.org/D45711
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330217
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Rui Ueyama [Tue, 17 Apr 2018 21:09:16 +0000 (21:09 +0000)]
Rename sys::Process::GetArgumentVector -> sys::windows::GetCommandLineArguments
GetArgumentVector (or GetCommandLineArguments) is very Windows-specific.
I think it doesn't make much sense to provide that function from sys::Process.
I also made a change so that the function takes a BumpPtrAllocator
instead of a SpecificBumpPtrAllocator. The latter is the class to call
dtors, but since char * is trivially destructible, we should use the
former class.
Differential Revision: https://reviews.llvm.org/D45641
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330216
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Dan Gohman [Tue, 17 Apr 2018 20:46:42 +0000 (20:46 +0000)]
[WebAssembly] Teach fast-isel to gracefully recover from illegal return types.
Fixes PR36564.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330215
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Zachary Turner [Tue, 17 Apr 2018 20:06:43 +0000 (20:06 +0000)]
[llvm-pdbutil] Dump first section contribution for each module.
The DBI stream contains a list of module descriptors. At the
beginning of each descriptor is a structure representing the first
section contribution in the output file for that module. LLD
currently doesn't fill out this structure at all, but link.exe
does. So as a precursor to emitting this data in LLD, we first
need a way to dump it so that it can be checked.
This patch adds support for the dumping, and verifies via a test
that LLD emits bogus information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330208
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Craig Topper [Tue, 17 Apr 2018 19:35:19 +0000 (19:35 +0000)]
[X86] Add separate scheduling class for PSADBW instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330204
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Craig Topper [Tue, 17 Apr 2018 19:35:14 +0000 (19:35 +0000)]
[X86] Remove unnecessary InstRW overrides. Add somes FIXMEs/TODOs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330203
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Craig Topper [Tue, 17 Apr 2018 17:30:06 +0000 (17:30 +0000)]
[X86] Remove -mcpu=skx/knl from some tests and use -mattr instead.
mcpu exposes other tuning flags. These tests are only trying to test instruction set features so it is better to use mattr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330196
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Momchil Velikov [Tue, 17 Apr 2018 16:29:58 +0000 (16:29 +0000)]
Revert "Fix incorrect choice of callee-saved registers save/restore points (take 2)"
Revert in order to fix the test to not run when required targets aren't
configured.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330193
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Momchil Velikov [Tue, 17 Apr 2018 15:59:06 +0000 (15:59 +0000)]
Fix incorrect choice of callee-saved registers save/restore points (take 2)
Add the accidentally omitted testcase.
Differential revision: https://reviews.llvm.org/D45524
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330192
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Krzysztof Parzyszek [Tue, 17 Apr 2018 15:23:09 +0000 (15:23 +0000)]
[Hexagon] Do not merge initializers for stack and non-stack expressions
Stack addressing needs addressing modes that provide an offset field
immediately following the frame index. An initializer from a non-stack
addressing could force the stack address to use a form that does not
provide an offset field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330191
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whitequark [Tue, 17 Apr 2018 14:52:43 +0000 (14:52 +0000)]
[LLVM-C] [PR34633] Avoid calling ->dump() methods from LLVMDump*.
LLVMDump* functions are available in Release builds too.
Patch by Brenton Bostick.
Differential Revision: https://reviews.llvm.org/D44600
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330189
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Nemanja Ivanovic [Tue, 17 Apr 2018 13:07:01 +0000 (13:07 +0000)]
[PowerPC] Mark the BDNZ intrinsic as NoDuplicate
Duplicating this intrinsic is not generally valid because it has the side-effect
of decrementing the CTR. Any passes that duplicate it would need to be taught to
keep the regions formed completely disjoint.
This patch should be NFC for typical uses as CTRLoops runs after the remaining
loop passes. It only affects situations where the loop passes are scheduled on
the IR after the codegen passes (as is the case with some JIT pipelines).
Fixes https://bugs.llvm.org/show_bug.cgi?id=37050
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330186
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Momchil Velikov [Tue, 17 Apr 2018 08:37:38 +0000 (08:37 +0000)]
Fix incorrect choice of callee-saved registers save/restore points
Make the shrink wrapping pass pay attention to uses/defs of the stack pointer.
Differential revision: https://reviews.llvm.org/D45524
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330183
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Michael Zolotukhin [Tue, 17 Apr 2018 07:31:27 +0000 (07:31 +0000)]
Revert "Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." again."
This reverts r330175. There are still stage3/stage4 miscompares.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330180
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Simon Pilgrim [Tue, 17 Apr 2018 07:22:44 +0000 (07:22 +0000)]
[X86] Add FP comparison scheduler classes
Split VCMP/VMAX/VMIN instructions off to WriteFCmp and VCOMIS instructions off to WriteFCom instead of assuming they match WriteFAdd
Differential Revision: https://reviews.llvm.org/D45656
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330179
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Gerolf Hoflehner [Tue, 17 Apr 2018 07:22:34 +0000 (07:22 +0000)]
[DAGCombiner] Fix for oss-fuzz bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330178
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Michael Zolotukhin [Tue, 17 Apr 2018 04:45:40 +0000 (04:45 +0000)]
[SSAUpdaterBulk] Add debug logging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330176
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Michael Zolotukhin [Tue, 17 Apr 2018 04:45:22 +0000 (04:45 +0000)]
Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." again.
One more, hopefully the last, bug is fixed: when forming UsesToRewrite
we should ignore phi operands coming from edges that we want to delete.
This reverts r329910.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330175
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Gerolf Hoflehner [Tue, 17 Apr 2018 04:02:24 +0000 (04:02 +0000)]
[IR] Upgrade comment token in objc retain release marker for asm call
Older compiler issued '#' instead of ';'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330173
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Peter Collingbourne [Tue, 17 Apr 2018 01:54:34 +0000 (01:54 +0000)]
COFF: Make SectionChunk::Relocs field an ArrayRef. NFCI.
Differential Revision: https://reviews.llvm.org/D45714
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330172
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whitequark [Tue, 17 Apr 2018 01:09:12 +0000 (01:09 +0000)]
CODE_OWNERS: Take ownership of C API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330171
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Roman Tereshin [Mon, 16 Apr 2018 23:39:44 +0000 (23:39 +0000)]
[DebugInfo] Follow-up bug fix on "Fixing a couple of DI duplication bugs of CloneModule"
Apparently, DebugInfoFinder::processCompileUnit doesn't process all
of the possible kinds of DIImportedEntit'ies, e.g. DIGlobalVariable's.
Previously introduced `llvm_unreachable` is therefore incorrect.
Removing it here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330167
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Saleem Abdulrasool [Mon, 16 Apr 2018 21:57:10 +0000 (21:57 +0000)]
Revert "build: reserve `--color-diagnostics` for lld"
This reverts SVN r330158.
Seems that there was a change to linker flags handling in SVN r316972.
That would alter the behaviour to correct the linker flag handling in
CMake (requiring CMake 3.4.3+). Since that is already the minimum
version required for LLVM, hard coding the knowledge of the linker is
not required, which is a strictly better solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330161
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Saleem Abdulrasool [Mon, 16 Apr 2018 21:05:56 +0000 (21:05 +0000)]
build: reserve `--color-diagnostics` for lld
When building out-of-tree compilers (e.g. swift), the linker check here
may yield incorrect values. Ensure that we are using lld before we
attempt to use `--color-diagnostics` for the linker. Other linkers (i.e
bfd, gold) do not support this flag and the test can pass in some cases
and then fail subsequently when building.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330158
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Zachary Turner [Mon, 16 Apr 2018 20:42:06 +0000 (20:42 +0000)]
[PDB] Correctly use the target machine when writing DBI stream.
Using Config->is64() will treat ARM64 as Amd64, which is incorrect.
Furthermore, there are more esoteric architectures that could
theoretically be encountered. Just set it directly to the machine
type, which we already know anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330157
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Mandeep Singh Grang [Mon, 16 Apr 2018 18:56:10 +0000 (18:56 +0000)]
[RISCV] Fix assert message operator
Summary:
Specifying assert message with an || operator makes the compiler interpret it
as a bool. Changed it to &&.
Reviewers: asb, apazos
Reviewed By: asb
Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, llvm-commits
Differential Revision: https://reviews.llvm.org/D45660
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330148
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Zachary Turner [Mon, 16 Apr 2018 18:17:13 +0000 (18:17 +0000)]
Resubmit "Fix some incorrect fields in our generated PDBs."
This fixes the failing tests. They simply hadn't been updated
to match the new output resulting from this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330145
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Craig Topper [Mon, 16 Apr 2018 18:14:19 +0000 (18:14 +0000)]
[X86] Remove unnecessary -mattr to enable avx512bw when the -mcpu already enabled it. NFC
This makes the test similar to the arith-sub.ll and arith-mul.ll tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330144
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Haicheng Wu [Mon, 16 Apr 2018 18:09:49 +0000 (18:09 +0000)]
[SLP] Use getExtractWithExtendCost() to compute the scalar cost of extractelement/ext pair
We use getExtractWithExtendCost to calculate the cost of extractelement and
s|zext together when computing the extract cost after vectorization, but we
calculate the cost of extractelement and s|zext separately when computing the
scalar cost which is larger than it should be.
Differential Revision: https://reviews.llvm.org/D45469
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330143
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Lang Hames [Mon, 16 Apr 2018 18:05:24 +0000 (18:05 +0000)]
[ORC] Add a MaterializationResponsibility class to track responsibility for
materializing function definitions.
MaterializationUnit instances are responsible for resolving and finalizing
symbol definitions when their materialize method is called. By contract, the
MaterializationUnit must materialize all definitions it is responsible for and
no others. If it can not materialize all definitions (because of some error)
then it must notify the associated VSO about each definition that could not be
materialized. The MaterializationResponsibility class tracks this
responsibility, asserting that all required symbols are resolved and finalized,
and that no extraneous symbols are resolved or finalized. In the event of an
error it provides a convenience method for notifying the VSO about each
definition that could not be materialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330142
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Lang Hames [Mon, 16 Apr 2018 18:05:22 +0000 (18:05 +0000)]
[ORC] Merge VSO notifyResolutionFailed and notifyFinalizationFailed in to
notifyMaterializationFailed.
The notifyMaterializationFailed method can determine which error to raise by
looking at which queue the pending queries are in (resolution or finalization).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330141
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Krzysztof Parzyszek [Mon, 16 Apr 2018 17:35:30 +0000 (17:35 +0000)]
[Hexagon] Turn off flag enabling auto-vectorization
It was turned on for testing and was accidentally left on in the commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330139
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Lei Huang [Mon, 16 Apr 2018 17:30:24 +0000 (17:30 +0000)]
[NFC] Move verificaiton check for f128 conversion into LowerINT_TO_FP()
Move veriication check for legal conversions to f128 into LowerINT_TO_FP()
and fix some indentations to match other sections of the code for readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330138
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Sanjay Patel [Mon, 16 Apr 2018 17:15:13 +0000 (17:15 +0000)]
[InstCombine] simplify code in SimplifyAssociativeOrCommutative; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330137
91177308-0d34-0410-b5e6-
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Craig Topper [Mon, 16 Apr 2018 17:05:01 +0000 (17:05 +0000)]
[Attributes] Fix a bug in AttributeList::get so it can handle a mix of FunctionIndex and ReturnIndex/arg indices at the same time
The code uses the index of the last element in the sorted array to determine the maximum size needed for the vector. But if the last index is a FunctionIndex(~0), attrIdxToArrayIdx will return 0 and the vector will have size 1. If there are any indices before FunctionIndex, those values would return a value larger than 0 from attrIdxToArrayIdx. So in this case we need to look in front of the FunctionIndex to get the true size needed.
Differential Revision: https://reviews.llvm.org/D45632
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330136
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Adrian McCarthy [Mon, 16 Apr 2018 17:01:18 +0000 (17:01 +0000)]
Remove faulty assertion in llvm-pdbutil
If a class's first data member is an instance of an empty class, then an
assertion in the PrettyClassLayoutGraphicalDumper would fail. The
storage is reserved, but it's not marked as in use.
As far as I understand, it's the assertion that's faulty, so I removed it
and updated the nearby comment.
Found by running llvm-pdbutil against its own PDB, and this assertion would
fail on HashAdjusters, which is a HashTable whose first data member is a
TraitsT, which is a PdbHashTraits<T>, which is an empty struct. (The struct
has a specialization for uint32_t, but that specialization doesn't apply
here because the T is actually ulittle32_t.)
Differential Revision: https://reviews.llvm.org/D45645
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330135
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Zachary Turner [Mon, 16 Apr 2018 16:55:41 +0000 (16:55 +0000)]
Revert "Fix some incorrect fields in our generated PDBs."
There are a couple of failing tests which slipped under my radar
so I'm reverting this while I attempt to fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330133
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Brock Wyma [Mon, 16 Apr 2018 16:53:57 +0000 (16:53 +0000)]
[CodeView] Initial support for emitting S_THUNK32 symbols for compiler...
When emitting CodeView debug information, compiler-generated thunk routines
should be emitted using S_THUNK32 symbols instead of S_GPROC32_ID symbols so
Visual Studio can properly step into the user code. This initial support only
handles standard thunk ordinals.
Differential Revision: https://reviews.llvm.org/D43838
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330132
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Zachary Turner [Mon, 16 Apr 2018 16:27:49 +0000 (16:27 +0000)]
Fix some incorrect fields in our generated PDBs.
Most of these are pretty trivial and obvious. Setting the toolchain
version to 14.11 is perhaps a little questionable, but we've been bitten
in the past where one of our version fields sidn't match MSVC's, and I
definitely don't want to go through that diagnosis again as it was
pretty time consuming and hard to track down.
I found all of these by using llvm-pdbutil export to dump the dbi and
pdb streams to a file, then using fc followed by llvm-pdbutil explain to
explain the mismatched bytes.
There are still some more, these are just the low hanging fruit.
Differential Revision: https://reviews.llvm.org/D45276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330130
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Sanjay Patel [Mon, 16 Apr 2018 15:19:24 +0000 (15:19 +0000)]
[InstCombine] simplify getBinOpsForFactorization(); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330129
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David Blaikie [Mon, 16 Apr 2018 14:23:15 +0000 (14:23 +0000)]
SmallVectorMemoryBuffer: Fix some comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330128
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