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8 years ago[Support][Unittests] Add unittest for recursive_directory_iterator::level()
Bruno Cardoso Lopes [Fri, 13 May 2016 21:31:32 +0000 (21:31 +0000)]
[Support][Unittests] Add unittest for recursive_directory_iterator::level()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269488 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "Revert "[Unroll] Implement a conservative and monotonically increasing cost...
Michael Zolotukhin [Fri, 13 May 2016 21:23:25 +0000 (21:23 +0000)]
Revert "Revert "[Unroll] Implement a conservative and monotonically increasing cost tracking system during the full unroll heuristic analysis that avoids counting any instruction cost until that instruction becomes "live" through a side-effect or use outside the...""

This reverts commit r269395.

Try to reapply with a fix from chapuni.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269486 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agofix documentation comments; NFC
Sanjay Patel [Fri, 13 May 2016 21:23:08 +0000 (21:23 +0000)]
fix documentation comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269485 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agopdbdump: Print "Publics" stream.
Rui Ueyama [Fri, 13 May 2016 21:21:53 +0000 (21:21 +0000)]
pdbdump: Print "Publics" stream.

Publics stream seems to contain information as to public symbols.
It actually contains a serialized hash table along with fixed-sized
headers. This patch is not complete. It scans only till the end of
the stream and dump the header information. I'll write code to
de-serialize the hash table later.

Reviewers: zturner

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20256

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269484 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSDAG: Implement Select instead of SelectImpl in NVPTXDAGToDAGISel
Justin Bogner [Fri, 13 May 2016 21:12:53 +0000 (21:12 +0000)]
SDAG: Implement Select instead of SelectImpl in NVPTXDAGToDAGISel

- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269483 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCorrect spelling in comment (NFC)
Matthew Simpson [Fri, 13 May 2016 21:01:07 +0000 (21:01 +0000)]
Correct spelling in comment (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269482 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Unify LowerGlobalAddress
Jan Vesely [Fri, 13 May 2016 20:39:34 +0000 (20:39 +0000)]
AMDGPU: Unify LowerGlobalAddress

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19794

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269481 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/R600: Fold global address operand
Jan Vesely [Fri, 13 May 2016 20:39:31 +0000 (20:39 +0000)]
AMDGPU/R600: Fold global address operand

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19793

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269480 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/R600: Implement memory loads from constant AS
Jan Vesely [Fri, 13 May 2016 20:39:29 +0000 (20:39 +0000)]
AMDGPU/R600: Implement memory loads from constant AS

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19792

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269479 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/R600: Add support for emitting MCExpr
Jan Vesely [Fri, 13 May 2016 20:39:26 +0000 (20:39 +0000)]
AMDGPU/R600: Add support for emitting MCExpr

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19791

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269478 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Add support for MCExpr to instruction printer
Jan Vesely [Fri, 13 May 2016 20:39:24 +0000 (20:39 +0000)]
AMDGPU: Add support for MCExpr to instruction printer

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19790

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269477 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/R600: Use machine operands instead of ints to track literals
Jan Vesely [Fri, 13 May 2016 20:39:22 +0000 (20:39 +0000)]
AMDGPU/R600: Use machine operands instead of ints to track literals

This will be used for global addresses

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19789

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269476 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/R600: There are other uses for ALU_LITERAL besides Imm
Jan Vesely [Fri, 13 May 2016 20:39:20 +0000 (20:39 +0000)]
AMDGPU/R600: There are other uses for ALU_LITERAL besides Imm

This will be used for GV

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19788

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269475 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Make CONST_DATA_PTR available to R600
Jan Vesely [Fri, 13 May 2016 20:39:18 +0000 (20:39 +0000)]
AMDGPU: Make CONST_DATA_PTR available to R600

Rename to AMDGPUconstdata_ptr

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19786

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269474 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/EG,CM: Add instruction to read from constant AS (VTX2)
Jan Vesely [Fri, 13 May 2016 20:39:16 +0000 (20:39 +0000)]
AMDGPU/EG,CM: Add instruction to read from constant AS (VTX2)

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19785

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269473 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agouse range-loops; NFCI
Sanjay Patel [Fri, 13 May 2016 20:24:53 +0000 (20:24 +0000)]
use range-loops; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269471 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDisable test from r269436 on unsupported platforms
Steven Wu [Fri, 13 May 2016 20:10:51 +0000 (20:10 +0000)]
Disable test from r269436 on unsupported platforms

Fixing bots failure. test/ExecutionEngine/RuntimeDyld/SystemZ/cfi-relo-pc64.s
requires SystemZ backend. Mark the test as unsupported if the backend is not
available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269470 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "(HEAD -> master, origin/master, origin/HEAD) [ProfileData] (llvm) Use Error...
Vedant Kumar [Fri, 13 May 2016 20:09:39 +0000 (20:09 +0000)]
Revert "(HEAD -> master, origin/master, origin/HEAD) [ProfileData] (llvm) Use Error in InstrProf and Coverage, NFC"

This reverts commit r269462. It fails two llvm-profdata tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269466 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ProfileData] (llvm) Use Error in InstrProf and Coverage, NFC
Vedant Kumar [Fri, 13 May 2016 20:01:27 +0000 (20:01 +0000)]
[ProfileData] (llvm) Use Error in InstrProf and Coverage, NFC

Transition InstrProf and Coverage over to the stricter Error/Expected
interface.

Differential Revision: http://reviews.llvm.org/D19901

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269462 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[codeview] Align class and print names of types
Reid Kleckner [Fri, 13 May 2016 19:37:07 +0000 (19:37 +0000)]
[codeview] Align class and print names of types

Summary: This way we can get rid of one of the fields in the .def file.

Reviewers: llvm-commits

Subscribers: zturner

Differential Revision: http://reviews.llvm.org/D20251

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269461 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoARM: use callee-saved list in the order they're actually saved.
Tim Northover [Fri, 13 May 2016 19:16:14 +0000 (19:16 +0000)]
ARM: use callee-saved list in the order they're actually saved.

When setting the frame pointer, the offset from SP is calculated based on the
stack slot it gets allocated, but this slot is in turn based on the order of
the CSR list so that list should match the order we actually save the registers
in. Mostly it did, but in the edge-case of MachO AAPCS targets it was wrong.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269459 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Hexagon] Remove dead nodes from SelectionDAG to avoid cycles
Krzysztof Parzyszek [Fri, 13 May 2016 18:48:15 +0000 (18:48 +0000)]
[Hexagon] Remove dead nodes from SelectionDAG to avoid cycles

Recent changes to the instruction selection code exposed a problem where
a dead node was not removed on time. This node had both input and output
chains, which lead to an apparent cycle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269458 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRename getLargestLegalIntTypeSize to getLargestLegalIntTypeSizeInBits(). NFC.
Jun Bum Lim [Fri, 13 May 2016 18:38:35 +0000 (18:38 +0000)]
Rename getLargestLegalIntTypeSize to getLargestLegalIntTypeSizeInBits(). NFC.

Summary: Rename DataLayout::getLargestLegalIntTypeSize to DataLayout::getLargestLegalIntTypeSizeInBits() to prevent similar mistakes  fixed in r269433.

Reviewers: joker.eph, mcrosier

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D20248

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269456 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AMDGPU] Update nop insertion for debugger usage
Konstantin Zhuravlyov [Fri, 13 May 2016 18:21:28 +0000 (18:21 +0000)]
[AMDGPU] Update nop insertion for debugger usage
- Insert one nop for each high level statement instead of two
- Do not insert nop before prologue

Differential Revision: http://reviews.llvm.org/D20215

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269452 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "[ARM,AArch64] NFC. Add extra test cases for bswap lowering."
Renato Golin [Fri, 13 May 2016 18:19:42 +0000 (18:19 +0000)]
Revert "[ARM,AArch64] NFC. Add extra test cases for bswap lowering."

This reverts commit r269425, as it fails on Windows (Thumb only).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269451 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[libFuzzer] print the file name before executing the input so that if there is a...
Kostya Serebryany [Fri, 13 May 2016 18:10:33 +0000 (18:10 +0000)]
[libFuzzer] print the file name before executing the input so that if there is a crash we know which files has caused it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269450 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoregenerate checks and add a run to show missed shrinkage
Sanjay Patel [Fri, 13 May 2016 18:04:39 +0000 (18:04 +0000)]
regenerate checks and add a run to show missed shrinkage

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269449 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[libFuzzer] simplify FuzzerInterface.h
Kostya Serebryany [Fri, 13 May 2016 18:04:35 +0000 (18:04 +0000)]
[libFuzzer] simplify FuzzerInterface.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269448 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoregenerate checks
Sanjay Patel [Fri, 13 May 2016 18:02:16 +0000 (18:02 +0000)]
regenerate checks

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269447 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoadd support for -print-imm-hex for AArch64
Paul Osmialowski [Fri, 13 May 2016 18:00:09 +0000 (18:00 +0000)]
add support for -print-imm-hex for AArch64

Most immediates are printed in Aarch64InstPrinter using 'formatImm' macro,
but not all of them.

Implementation contains following rules:

- floating point immediates are always printed as decimal
- signed integer immediates are printed depends on flag settings
  (for negative values 'formatImm' macro prints the value as i.e -0x01
  which may be convenient when imm is an address or offset)
- logical immediates are always printed as hex
- the 64-bit immediate for advSIMD, encoded in "a:b:c:d:e:f:g:h" is always printed as hex
- the 64-bit immedaite in exception generation instructions like:
  brk, dcps1, dcps2, dcps3, hlt, hvc, smc, svc is always printed as hex
- the rest of immediates is printed depends on availability
  of -print-imm-hex

Signed-off-by: Maciej Gabka <maciej.gabka@arm.com>
Signed-off-by: Paul Osmialowski <pawel.osmialowski@arm.com>
Differential Revision: http://reviews.llvm.org/D16929

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269446 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[EarlyCSE] Change key type of AvailableCalls to Instruction*. NFCI.
Geoff Berry [Fri, 13 May 2016 17:54:58 +0000 (17:54 +0000)]
[EarlyCSE] Change key type of AvailableCalls to Instruction*.  NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269445 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[codeview] Dump the type index on the first line of each record
Reid Kleckner [Fri, 13 May 2016 17:48:24 +0000 (17:48 +0000)]
[codeview] Dump the type index on the first line of each record

This will make it easier to write FileCheck tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269444 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[obj2yaml] [yaml2obj] Basic support for MachO::load_command
Chris Bieneman [Fri, 13 May 2016 17:41:41 +0000 (17:41 +0000)]
[obj2yaml] [yaml2obj] Basic support for MachO::load_command

This patch adds basic support for MachO::load_command. Load command types and sizes are encoded in the YAML and expanded back into MachO.

The YAML doesn't yet support load command structs, that is coming next. In the meantime as a temporary measure when writing MachO files the load commands are padded with zeros so that the generated binary is valid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269442 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[InstCombine] handle zero constant vectors for LE/GE comparisons too
Sanjay Patel [Fri, 13 May 2016 17:28:12 +0000 (17:28 +0000)]
[InstCombine] handle zero constant vectors for LE/GE comparisons too

Enhancement to: http://reviews.llvm.org/rL269426
With discussion in: http://reviews.llvm.org/D17859

This should complete the fixes for: PR26701, PR26819:
https://llvm.org/bugs/show_bug.cgi?id=26701
https://llvm.org/bugs/show_bug.cgi?id=26819

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269439 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUpdate module map for r269380.
Richard Smith [Fri, 13 May 2016 17:27:08 +0000 (17:27 +0000)]
Update module map for r269380.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269438 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PGO] Add flags to control IRPGO warnings.
Rong Xu [Fri, 13 May 2016 17:26:06 +0000 (17:26 +0000)]
[PGO] Add flags to control IRPGO warnings.
Currently there is no reasonable way to control the warnings in the 'use' phase
of the IRPGO pass. This is problematic because the output can be somewhat
spammy. This patch adds some flags which allow us to optionally disable these
warnings. The current upstream behavior will remain the default.

Patch by Jake VanAdrighem (jvanadrighem@gmail.com)

Differential Revision: http://reviews.llvm.org/D20195

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269437 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[RuntimeDyld] Support R_390_PC64 relocation type
Bryan Chan [Fri, 13 May 2016 17:23:48 +0000 (17:23 +0000)]
[RuntimeDyld] Support R_390_PC64 relocation type

Summary: When the MCJIT generates ELF code, some DWARF data requires 64-bit PC-relative relocation (R_390_PC64). This patch adds support for R_390_PC64 relocation to RuntimeDyld::resolveSystemZRelocation, to avoid an assertion failure.

Reviewers: uweigand

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20033

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269436 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[MemCpyOpt] Use MaxIntSize in byte instead of bit
Jun Bum Lim [Fri, 13 May 2016 16:52:24 +0000 (16:52 +0000)]
[MemCpyOpt] Use MaxIntSize in byte instead of bit

Summary: This change fix the bug in isProfitableToUseMemset() where MaxIntSize shoule be in byte, not bit.

Reviewers: arsenm, joker.eph, mcrosier

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D20176

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269433 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "[llc] New diagnostic handler"
Renato Golin [Fri, 13 May 2016 16:02:44 +0000 (16:02 +0000)]
Revert "[llc] New diagnostic handler"

This reverts commit r269428, as it breaks the LLDB build. We need to
understand how to change LLDB in the same way as LLC before landing this
again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269432 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llc] New diagnostic handler
Renato Golin [Fri, 13 May 2016 15:37:46 +0000 (15:37 +0000)]
[llc] New diagnostic handler

Without a diagnostic handler installed, llc's behaviour is to exit on the first
error that it encounters. This is very different from the behaviour of clang
and other front ends, which try to gather as many errors as possible before
exiting.

This commit adds a diagnostic handler to llc, allowing it to find and report
more than one error. The old behaviour is preserved under a flag (-exit-on-error).

Some of the tests fail with the new diagnostic handler, so they have to use the
new flag in order to run under the previous behaviour. Some of these are known
bugs, others need further investigation. Ideally, we should fix the tests and
remove the flag at some point in the future.

Patch by Diana Picus.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269428 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[InstCombine] canonicalize* LE/GE vector integer comparisons to LT/GT (PR26701, PR26819)
Sanjay Patel [Fri, 13 May 2016 15:10:46 +0000 (15:10 +0000)]
[InstCombine] canonicalize* LE/GE vector integer comparisons to LT/GT (PR26701, PR26819)

*We don't currently handle the  edge case constants (min/max values), so it's not a complete
canonicalization.

To fully solve the motivating bugs, we need to enhance this to recognize a zero vector
too because that's a ConstantAggregateZero which is a ConstantData, not a ConstantVector
or a ConstantDataVector.

Differential Revision: http://reviews.llvm.org/D17859

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269426 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM,AArch64] NFC. Add extra test cases for bswap lowering.
Renato Golin [Fri, 13 May 2016 15:10:24 +0000 (15:10 +0000)]
[ARM,AArch64] NFC. Add extra test cases for bswap lowering.

These tests were sitting in Phab for many months. They're good tests and should be in.

Patch by Charlie Turner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269425 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[scan-build] fix warnings emiited on LLVM Analysis code base
Silviu Baranga [Fri, 13 May 2016 14:54:50 +0000 (14:54 +0000)]
[scan-build] fix warnings emiited on LLVM Analysis code base

Fix "Logic error" warnings of the type "Called C++ object pointer is
null" reported by Clang Static Analyzer on the following files:

lib/Analysis/ScalarEvolution.cpp,
lib/Analysis/LoopInfo.cpp.

Patch by Apelete Seketeli!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269424 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][AVX512] Moved CHECKs inside functions to stop update_llc_test_checks going...
Simon Pilgrim [Fri, 13 May 2016 14:47:55 +0000 (14:47 +0000)]
[X86][AVX512] Moved CHECKs inside functions to stop update_llc_test_checks going haywire

I'm not going to regenerate these anytime soon but do have some diffs to apply that I'd like to do with update_llc_test_checks

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269420 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[scan-build] fix dead store warnings emitted on LLVM Hexagon code base
Krzysztof Parzyszek [Fri, 13 May 2016 13:13:59 +0000 (13:13 +0000)]
[scan-build] fix dead store warnings emitted on LLVM Hexagon code base

Patch by Apelete Seketeli.

Differential Revision: http://reviews.llvm.org/D19900

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269415 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[MIB] Create a helper function getRegState to extract all register flags
Krzysztof Parzyszek [Fri, 13 May 2016 13:01:19 +0000 (13:01 +0000)]
[MIB] Create a helper function getRegState to extract all register flags

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269414 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAssure calling "cld" instruction in prologue of X86 interrupt handler function.
Amjad Aboud [Fri, 13 May 2016 12:46:57 +0000 (12:46 +0000)]
Assure calling "cld" instruction in prologue of X86 interrupt handler function.

Differential Revision: http://reviews.llvm.org/D18725

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269413 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips][ias] Work around yet another incorrect microMIPS relocation evaluation exposed...
Daniel Sanders [Fri, 13 May 2016 12:07:14 +0000 (12:07 +0000)]
[mips][ias] Work around yet another incorrect microMIPS relocation evaluation exposed by r268900.

It's not entirely clear why R_MICROMIPS_(GOT|HI16|LO16) are evaluated
incorrectly in a small number of the LNT tests at this point. However, it's not
related to the STO_MIPS_MICROMIPS issue.

At this point all the microMIPS-related changes of r268900 have been reverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269410 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoYet another attempt to appease MSVC...
Chandler Carruth [Fri, 13 May 2016 11:39:37 +0000 (11:39 +0000)]
Yet another attempt to appease MSVC...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269409 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips][microMIPS] Implement APPEND, BPOSGE32C, MODSUB, MULSA.W.PH and MULSAQ_S.W...
Hrvoje Varga [Fri, 13 May 2016 11:32:53 +0000 (11:32 +0000)]
[mips][microMIPS] Implement APPEND, BPOSGE32C, MODSUB, MULSA.W.PH and MULSAQ_S.W.PH instructions
Differential Revision: http://reviews.llvm.org/D14117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269408 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTry to fix MSVC by explicitly providing copy and move constructors so it
Chandler Carruth [Fri, 13 May 2016 10:55:23 +0000 (10:55 +0000)]
Try to fix MSVC by explicitly providing copy and move constructors so it
doesn't try to use the converting constructor template for those
operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269406 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-mc-fuzzer] Use LLVMFuzzerInitialize() instead of a custom main() and FuzzerDriver()
Daniel Sanders [Fri, 13 May 2016 10:23:04 +0000 (10:23 +0000)]
[llvm-mc-fuzzer] Use LLVMFuzzerInitialize() instead of a custom main() and FuzzerDriver()

Reviewers: kcc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269405 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Support/ELF] - Added few constants and structs relative to compressed sections.
George Rimar [Fri, 13 May 2016 10:20:12 +0000 (10:20 +0000)]
[Support/ELF] - Added few constants and structs relative to compressed sections.

Patch adds few constants and structs to support compressed sections.

SHF_COMPRESSED intersects with platform specific XCORE_SHF_CP_SECTION,
both has value of 0x800U.

Reference link:
http://www.sco.com/developers/gabi/latest/ch4.sheader.html

Differential revision: http://reviews.llvm.org/D20209

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269404 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSDAG: Clean up a dangling node in SparcISelDAGToDAG::SelectImpl
Justin Bogner [Fri, 13 May 2016 06:37:53 +0000 (06:37 +0000)]
SDAG: Clean up a dangling node in SparcISelDAGToDAG::SelectImpl

When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269396 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "[Unroll] Implement a conservative and monotonically increasing cost tracking...
Michael Zolotukhin [Fri, 13 May 2016 06:32:25 +0000 (06:32 +0000)]
Revert "[Unroll] Implement a conservative and monotonically increasing cost tracking system during the full unroll heuristic analysis that avoids counting any instruction cost until that instruction becomes "live" through a side-effect or use outside the..."

This reverts commit r269388.

It caused some bots to fail, I'm reverting it until I investigate the
issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269395 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSDAG: Clean up a dangling node in MipsISelDAGToDAG::SelectImpl
Justin Bogner [Fri, 13 May 2016 06:30:15 +0000 (06:30 +0000)]
SDAG: Clean up a dangling node in MipsISelDAGToDAG::SelectImpl

When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269394 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSDAG: Implement Select instead of SelectImpl in MSP430DAGToDAGISel
Justin Bogner [Fri, 13 May 2016 06:10:50 +0000 (06:10 +0000)]
SDAG: Implement Select instead of SelectImpl in MSP430DAGToDAGISel

- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269393 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LoopDist] Only run LAA for loops with the pragma
Adam Nemet [Fri, 13 May 2016 04:20:31 +0000 (04:20 +0000)]
[LoopDist] Only run LAA for loops with the pragma

This should fix some compile-time regressions after r267672.  Thanks to
Chris Matthews for bisecting it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269392 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Remove verifier check for scc live ins
Matt Arsenault [Fri, 13 May 2016 04:15:48 +0000 (04:15 +0000)]
AMDGPU: Remove verifier check for scc live ins

We only really need this to be true for SIFixSGPRCopies.
I'm not sure there's any way this could happen before that point.

Fixes a case where MachineCSE could introduce a cross block
scc use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269391 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ADT] Add an 'llvm::seq' function which produces an iterator range over
Chandler Carruth [Fri, 13 May 2016 03:57:50 +0000 (03:57 +0000)]
[ADT] Add an 'llvm::seq' function which produces an iterator range over
a sequence of values.

It increments through the values in the half-open range: [Begin, End),
producing those values when indirecting the iterator. It should support
integers, iterators, and any other type providing these basic arithmetic
operations.

This came up in the C++ standards committee meeting, and it seemed like
a useful construct that LLVM might want as well, and I wanted to
understand how easily we could solve it. I suspect this can be used to
write simpler counting loops even in LLVM along the lines of:

  for (int i : seq(0, v.size())) {
    ...
  };

As part of this, I had to fix the lack of a proxy object returned from
the operator[] in our iterator facade.

Differential Revision: http://reviews.llvm.org/D17870

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269390 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Unroll] Implement a conservative and monotonically increasing cost tracking system...
Michael Zolotukhin [Fri, 13 May 2016 01:42:39 +0000 (01:42 +0000)]
[Unroll] Implement a conservative and monotonically increasing cost tracking system during the full unroll heuristic analysis that avoids counting any instruction cost until that instruction becomes "live" through a side-effect or use outside the...

Summary:
...loop after the last iteration.

This is really hard to do correctly. The core problem is that we need to
model liveness through the induction PHIs from iteration to iteration in
order to get the correct results, and we need to correctly de-duplicate
the common subgraphs of instructions feeding some subset of the
induction PHIs. All of this can be driven either from a side effect at
some iteration or from the loop values used after the loop finishes.

This patch implements this by storing the forward-propagating analysis
of each instruction in a cache to recall whether it was free and whether
it has become live and thus counted toward the total unroll cost. Then,
at each sink for a value in the loop, we recursively walk back through
every value that feeds the sink, including looping back through the
iterations as needed, until we have marked the entire input graph as
live. Because we cache this, we never visit instructions more than twice
-- once when we analyze them and put them into the cache, and once when
we count their cost towards the unrolled loop. Also, because the cache
is only two bits and because we are dealing with relatively small
iteration counts, we can store all of this very densely in memory to
avoid this from becoming an excessively slow analysis.

The code here is still pretty gross. I would appreciate suggestions
about better ways to factor or split this up, I've stared too long at
the algorithmic side to really have a good sense of what the design
should probably look at.

Also, it might seem like we should do all of this bottom-up, but I think
that is a red herring. Specifically, the simplification power is *much*
greater working top-down. We can forward propagate very effectively,
even across strange and interesting recurrances around the backedge.
Because we use data to propagate, this doesn't cause a state space
explosion. Doing this level of constant folding, etc, would be very
expensive to do bottom-up because it wouldn't be until the last moment
that you could collapse everything. The current solution is essentially
a top-down simplification with a bottom-up cost accounting which seems
to get the best of both worlds. It makes the simplification incremental
and powerful while leaving everything dead until we *know* it is needed.

Finally, a core property of this approach is its *monotonicity*. At all
times, the current UnrolledCost is a conservatively low estimate. This
ensures that we will never early-exit from the analysis due to exceeding
a threshold when if we had continued, the cost would have gone back
below the threshold. These kinds of bugs can cause incredibly hard to
track down random changes to behavior.

We could use a techinque similar (but much simpler) within the inliner
as well to avoid considering speculated code in the inline cost.

Reviewers: chandlerc

Subscribers: sanjoy, mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D11758

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269388 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LoopUnrollAnalyzer] Don't treat gep-instructions with simplified offset as simplified.
Michael Zolotukhin [Fri, 13 May 2016 01:42:34 +0000 (01:42 +0000)]
[LoopUnrollAnalyzer] Don't treat gep-instructions with simplified offset as simplified.

Summary:
Currently we consider such instructions as simplified, which is incorrect,
because if their user isn't simplified, we can't actually simplify them too.
This biases our estimates of profitability: for instance the analyzer expects
much more gains from unrolling memcpy loops than there actually are.

Reviewers: hfinkel, chandlerc

Subscribers: mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D17365

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269387 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ThinLTO] Use correct pipeline for ThinLTO in gold-plugin.
Teresa Johnson [Fri, 13 May 2016 01:25:31 +0000 (01:25 +0000)]
[ThinLTO] Use correct pipeline for ThinLTO in gold-plugin.

This change is the gold side of the change made in D17115 and clang
patch r261045 to add a ThinLTO specific pipeline that moves more of
the optimization to the backends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269386 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove runtime specific code from common header
Xinliang David Li [Fri, 13 May 2016 00:23:49 +0000 (00:23 +0000)]
Remove runtime specific code from common header

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269384 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agodsymutil: Fix the DWOId mismatch check for cached modules.
Adrian Prantl [Fri, 13 May 2016 00:17:58 +0000 (00:17 +0000)]
dsymutil: Fix the DWOId mismatch check for cached modules.

In verbose mode, we emit a warning if the DWOId of a skeleton CU
mismatches the DWOId of the referenced module. This patch updates the
cached DWOId after a module has been loaded to the DWOId of the module
on disk (instead of storing the DWOId we expected to load). This
allows us to correctly emit the mismatch warning for all subsequent
object files that want to import the same module. This patch also
ensures both warnings are only emitted in verbose mode.

rdar://problem/26214027

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269383 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[codeview] Try to handle errors better in record iterator
Reid Kleckner [Thu, 12 May 2016 23:26:23 +0000 (23:26 +0000)]
[codeview] Try to handle errors better in record iterator

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269381 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[MachO] Extract MachO load command enums into a def file
Chris Bieneman [Thu, 12 May 2016 23:18:31 +0000 (23:18 +0000)]
[MachO] Extract MachO load command enums into a def file

Having the MachO enums in a def file instead of inline will allow us to write utilities and encoding/decoding methods for load commands without having to write a lot of mechanically repeated code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269380 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSDAG: Implement Select instead of SelectImpl in AArch64DAGToDAGISel
Justin Bogner [Thu, 12 May 2016 23:10:30 +0000 (23:10 +0000)]
SDAG: Implement Select instead of SelectImpl in AArch64DAGToDAGISel

This one has a lot of code churn, but it's all mechanical and
straightforward.

- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269379 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm-readobj: Fix GNU style entry point print width
Hemant Kulkarni [Thu, 12 May 2016 22:51:26 +0000 (22:51 +0000)]
llvm-readobj: Fix GNU style entry point print width

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269376 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[codeview] Fix dumping VFTables, stop when we see LF_PAD*
Reid Kleckner [Thu, 12 May 2016 22:46:41 +0000 (22:46 +0000)]
[codeview] Fix dumping VFTables, stop when we see LF_PAD*

Also stop visiting type records when we encounter an error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269374 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PM] Port of the DepndenceAnalysis to the new PM.
Chandler Carruth [Thu, 12 May 2016 22:19:39 +0000 (22:19 +0000)]
[PM] Port of the DepndenceAnalysis to the new PM.

Ported DA to the new PM by splitting the former DependenceAnalysis Pass
into a DependenceInfo result type and DependenceAnalysisWrapperPass type
and adding a new PM-style DependenceAnalysis analysis pass returning the
DependenceInfo.

Patch by Philip Pfaffe, most of the review by Justin.

Differential Revision: http://reviews.llvm.org/D18834

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269370 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm-readobj: Change Hex output for GNU style dynamic table print
Hemant Kulkarni [Thu, 12 May 2016 22:16:53 +0000 (22:16 +0000)]
llvm-readobj: Change Hex output for GNU style dynamic table print

Dynamic table when printed shows uppercase tag/values.
This changes it to lower case when printing in GNU style

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269368 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSDAG: Implement Select instead of SelectImpl in LanaiDAGToDAGISel
Justin Bogner [Thu, 12 May 2016 21:56:18 +0000 (21:56 +0000)]
SDAG: Implement Select instead of SelectImpl in LanaiDAGToDAGISel

- Where we were returning a node before, call ReplaceNode instead.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269364 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSDAG: Implement Select instead of SelectImpl in HexagonDAGToDAGISel
Justin Bogner [Thu, 12 May 2016 21:46:18 +0000 (21:46 +0000)]
SDAG: Implement Select instead of SelectImpl in HexagonDAGToDAGISel

- Where we were returning a node before, call ReplaceNode instead.
- Where we had already replaced all uses and we returned a node, just
  remove the dead node instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269358 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LAA] Use std::min. NFC
Adam Nemet [Thu, 12 May 2016 21:41:53 +0000 (21:41 +0000)]
[LAA] Use std::min.  NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269356 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSDAG: Clean up a dangling node in HexagonISelDAGToDAG::SelectImpl
Justin Bogner [Thu, 12 May 2016 21:24:23 +0000 (21:24 +0000)]
SDAG: Clean up a dangling node in HexagonISelDAGToDAG::SelectImpl

When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269355 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Support and tests for transform of LDR rt, = to MOV
Renato Golin [Thu, 12 May 2016 21:22:42 +0000 (21:22 +0000)]
[ARM] Support and tests for transform of LDR rt, = to MOV

This change implements the transformation in processInstruction() for the
LDR rt, =expression to MOV rt, expression when the expression can be evaluated
and can fit into the immediate field of the MOV or a MVN.

Across the ARM and Thumb instruction sets there are several cases to consider,
each with a different range of representatble constants.

In ARM we have:
 * Modified immediate (All ARM architectures)
 * MOVW (v6t2 and above)

In Thumb we have:
 * Modified immediate (v6t2, v7m and v8m.mainline)
 * MOVW (v6t2, v7m, v8.mainline and v8m.baseline)
 * Narrow Thumb MOV that can be used in an IT block (non flag-setting)

If the immediate fits any of the available alternatives then we make the transformation.

Fixes 25722.

Patch by Peter Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269354 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Fixup tests to take into account mov translation. NFC.
Renato Golin [Thu, 12 May 2016 21:22:37 +0000 (21:22 +0000)]
[ARM] Fixup tests to take into account mov translation. NFC.

Alter instances in the test-suite that use immediates that can be represented
in the immediate field of a MOV. The reason for doing this is that when the
LDR rt,=imm transformation to MOV rt, imm the existing tests do not need to
be modified.

Required by the patch that fixes PR25722.

Patch by Peter Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269353 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Delay ARM constant pool creation. NFC.
Renato Golin [Thu, 12 May 2016 21:22:31 +0000 (21:22 +0000)]
[ARM] Delay ARM constant pool creation. NFC.

This change adds a new constant pool kind to ARMOperand. When parsing the
operand for =immediate we create an instance of this operand rather than
creating a constant pool entry and rewriting the operand.

As the new operand kind is only created for ldr rt,= we can make ldr rt,=
an explicit pseudo instruction in ARM, Thumb and Thumb2

The pseudo instruction is expanded in processInstruction(). This creates the
constant pool and transforms the pseudo instruction into a pc-relative ldr to
the constant pool.

There are no functional changes and no modifications needed to existing tests.

Required by the patch that fixes PR25722.

Patch by Peter Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269352 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSDAG: Implement Select instead of SelectImpl in BPFDAGToDAGISel
Justin Bogner [Thu, 12 May 2016 21:14:47 +0000 (21:14 +0000)]
SDAG: Implement Select instead of SelectImpl in BPFDAGToDAGISel

- Where we were returning a node before, call ReplaceNode instead.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269350 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSDAG: Implement Select instead of SelectImpl in AMDGPUDAGToDAGISel
Justin Bogner [Thu, 12 May 2016 21:03:32 +0000 (21:03 +0000)]
SDAG: Implement Select instead of SelectImpl in AMDGPUDAGToDAGISel

- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269349 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTidied up switch cases. NFCI.
Simon Pilgrim [Thu, 12 May 2016 21:01:20 +0000 (21:01 +0000)]
Tidied up switch cases. NFCI.

Split FCMP//ICMP/SEL from the basic arithmetic cost functions. They were not sharing any notable code path (just the return) and were repeatedly testing the opcode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269348 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Docs] clarify semantics of x.with.overflow intrinsics
John Regehr [Thu, 12 May 2016 20:55:09 +0000 (20:55 +0000)]
[Docs] clarify semantics of x.with.overflow intrinsics

Differential Revision: http://reviews.llvm.org/D20151

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269346 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSDAG: Clean up dangling nodes in AArch64ISelDAGToDAG::SelectImpl
Justin Bogner [Thu, 12 May 2016 20:54:27 +0000 (20:54 +0000)]
SDAG: Clean up dangling nodes in AArch64ISelDAGToDAG::SelectImpl

When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269345 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()"
Tom Stellard [Thu, 12 May 2016 20:27:40 +0000 (20:27 +0000)]
Revert "LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()"

This reverts commit r269016 and also the follow-up commit r269020.

This patch caused PR27705.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269344 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm-dwp: Use llvm::Error to improve diagnostic quality/error handling in llvm-dwp
David Blaikie [Thu, 12 May 2016 19:59:54 +0000 (19:59 +0000)]
llvm-dwp: Use llvm::Error to improve diagnostic quality/error handling in llvm-dwp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269339 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm-readobj: Fix the GNU section header flags for SHF_MASKPROC and SHF_MASKOS
Hemant Kulkarni [Thu, 12 May 2016 19:58:52 +0000 (19:58 +0000)]
llvm-readobj: Fix the GNU section header flags for SHF_MASKPROC and SHF_MASKOS

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269338 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFixed the callee saved registers list for X86 AllRegs calling convention.
Amjad Aboud [Thu, 12 May 2016 19:58:32 +0000 (19:58 +0000)]
Fixed the callee saved registers list for X86 AllRegs calling convention.

32-bit AllRegs:
SSE: xmm0-xmm7
AVX: ymm0-ymm7
AVX512: zmm0-zmm7 + k0-k7

64-bit AllRegs:
SSE: xmm0-xmm15
AVX: ymm0-ymm15
AVX512: zmm0-zmm31 + k0-k7

Differential Revision: http://reviews.llvm.org/D20142

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269337 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[obj2yaml] Fix ASAN bot failure
Chris Bieneman [Thu, 12 May 2016 19:57:07 +0000 (19:57 +0000)]
[obj2yaml] Fix ASAN bot failure

I was leaking out of a unique_ptr, should have just kept it in the unique_ptr.

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/12738/steps/check-llvm%20asan/logs/stdio

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269336 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Give function a more appropriate name.
Chad Rosier [Thu, 12 May 2016 19:51:58 +0000 (19:51 +0000)]
[AArch64] Give function a more appropriate name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269335 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFixed dwarf X86-32 register mapping for k0-k7 registers.
Amjad Aboud [Thu, 12 May 2016 19:49:24 +0000 (19:49 +0000)]
Fixed dwarf X86-32 register mapping for k0-k7 registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269333 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Minor refactoring to simplify future patch. NFC.
Chad Rosier [Thu, 12 May 2016 19:38:18 +0000 (19:38 +0000)]
[AArch64] Minor refactoring to simplify future patch. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269329 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Hexagon] Expand VSelect pseudo instructions
Krzysztof Parzyszek [Thu, 12 May 2016 19:16:02 +0000 (19:16 +0000)]
[Hexagon] Expand VSelect pseudo instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269328 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[unittests] Use coveragemap_error in CoverageMappingReaderMock (NFC)
Vedant Kumar [Thu, 12 May 2016 19:01:11 +0000 (19:01 +0000)]
[unittests] Use coveragemap_error in CoverageMappingReaderMock (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269324 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PM] Make LowerAtomic a FunctionPass.
Davide Italiano [Thu, 12 May 2016 18:49:32 +0000 (18:49 +0000)]
[PM] Make LowerAtomic a FunctionPass.

Differential Revision: http://reviews.llvm.org/D20025

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269322 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LoopVectorizer] LoopVectorBody doesn't need to be a vector. NFC.
Michael Kuperstein [Thu, 12 May 2016 18:44:51 +0000 (18:44 +0000)]
[LoopVectorizer] LoopVectorBody doesn't need to be a vector. NFC.

LoopVectorBody was changed from a single pointer to a SmallVector when
store predication was introduced in r200270. Since r247139, store predication
no longer splits the vector loop body in-place, so we can go back to having
a single LoopVectorBody block.

This reverts the no-longer-needed changes from r200270.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269321 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[yaml2macho] Handle mach_header_64 reserved field
Chris Bieneman [Thu, 12 May 2016 18:21:09 +0000 (18:21 +0000)]
[yaml2macho] Handle mach_header_64 reserved field

I've added the reserved field as an "optional" in YAML, but I've added asserts in the yaml2macho code to enforce that the field is present in mach_header_64, but not in mach_header.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269320 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[yaml2macho] Use memset instead of bzero
Chris Bieneman [Thu, 12 May 2016 18:02:13 +0000 (18:02 +0000)]
[yaml2macho] Use memset instead of bzero

This should fix the bots I broke.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269319 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ObjectYAML] filetype is a required field in MachO headers
Chris Bieneman [Thu, 12 May 2016 17:53:01 +0000 (17:53 +0000)]
[ObjectYAML] filetype is a required field in MachO headers

Not sure how I managed to copy-pasta this wrong, but I did.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269317 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoGet rid of CVLeafTypes.def and combine with TypeRecords.def
Zachary Turner [Thu, 12 May 2016 17:45:51 +0000 (17:45 +0000)]
Get rid of CVLeafTypes.def and combine with TypeRecords.def

This merges the functionality of the macros in `CVLeafTypes.def` and the
macros in `TypeRecords.def` into a single set of macros.

Differential Revision: http://reviews.llvm.org/D20190
Reviewed By: rnk, amccarth

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269316 91177308-0d34-0410-b5e6-96231b3b80d8