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Etienne Bergeron [Mon, 25 Apr 2016 20:15:33 +0000 (20:15 +0000)]
Cleanup redundant expression in InstCombineAndOrXor.
Summary:
The expression is redundant on both side of operator |.
detected by : http://reviews.llvm.org/D19451
Reviewers: rnk, majnemer
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D19459
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267458
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Lang Hames [Mon, 25 Apr 2016 19:56:45 +0000 (19:56 +0000)]
[ORC] Thread Error/Expected through the RPC library.
This replaces use of std::error_code and ErrorOr in the ORC RPC support library
with Error and Expected. This required updating the OrcRemoteTarget API, Client,
and server code, as well as updating the Orc C API.
This patch also fixes several instances where Errors were dropped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267457
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Matt Arsenault [Mon, 25 Apr 2016 19:53:22 +0000 (19:53 +0000)]
AMDGPU/SI: Optimize adjacent s_nop instructions
Use the operand for how long to wait. This is somewhat
distasteful, since it would be better to just emit s_nop
with the right argument in the first place. This would require
changing TII::insertNoop to emit N operands, which would be easy.
Slightly more problematic is the post-RA scheduler and hazard recognizer
represent nops as a single null node, and would require inventing
another way of representing N nops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267456
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Kostya Serebryany [Mon, 25 Apr 2016 19:41:45 +0000 (19:41 +0000)]
[libFuzzer] remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267455
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Matt Arsenault [Mon, 25 Apr 2016 19:27:24 +0000 (19:27 +0000)]
AMDGPU: Implement addrspacecast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267452
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Matt Arsenault [Mon, 25 Apr 2016 19:27:18 +0000 (19:27 +0000)]
AMDGPU: Add queue ptr intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267451
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Matt Arsenault [Mon, 25 Apr 2016 19:27:13 +0000 (19:27 +0000)]
Add useful helpers to AddrSpaceCastInst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267450
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Matt Arsenault [Mon, 25 Apr 2016 19:27:09 +0000 (19:27 +0000)]
AMDGPU: Add DAG to debug dump
Also reorder case to match enum order
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267449
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Lang Hames [Mon, 25 Apr 2016 19:21:57 +0000 (19:21 +0000)]
[Support] Fix latent bugs in Expected and ExitOnError that were preventing them
from working with reference types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267448
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Philip Reames [Mon, 25 Apr 2016 18:48:43 +0000 (18:48 +0000)]
[LVI] Clarify comments describing the lattice values
There has been much recent confusion about the partition in the lattice between constant and non-constant values. Hopefully, documenting this will prevent confusion going forward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267440
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Philip Reames [Mon, 25 Apr 2016 18:30:31 +0000 (18:30 +0000)]
[LVI] Split solveBlockValueConstantRange into two [NFC]
This function handled both unary and binary operators. Cloning and specializing leads to much easier to follow code with minimal duplicatation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267438
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Evgeniy Stepanov [Mon, 25 Apr 2016 18:23:29 +0000 (18:23 +0000)]
[gold] Fix linkInModule and extend common.ll test.
Fix early exit from linkInModule. IRMover::move returns false on
success and true on error.
Add a few more cases of merged common linkage variables with
different sizes and alignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267437
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Chad Rosier [Mon, 25 Apr 2016 18:20:27 +0000 (18:20 +0000)]
Fix typo from r267432.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267436
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Krzysztof Parzyszek [Mon, 25 Apr 2016 18:09:36 +0000 (18:09 +0000)]
[Hexagon] Use llvm-mc instead of llc in an MC testcase
Remember to svn add the new file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267435
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Krzysztof Parzyszek [Mon, 25 Apr 2016 18:08:33 +0000 (18:08 +0000)]
[Hexagon] Use llvm-mc instead of llc in an MC testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267434
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Krzysztof Parzyszek [Mon, 25 Apr 2016 17:49:44 +0000 (17:49 +0000)]
[Hexagon] Register save/restore functions do not follow regular conventions
Do not mark them as modifying any of the volatile registers by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267433
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Chad Rosier [Mon, 25 Apr 2016 17:41:48 +0000 (17:41 +0000)]
[ValueTracking] Add an additional test case for r266767 where one operand is a const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267432
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Zachary Turner [Mon, 25 Apr 2016 17:38:08 +0000 (17:38 +0000)]
Resubmit "Refactor raw pdb dumper into library"
This fixes a number of endianness issues as well as an ODR
violation that hopefully causes everything to be happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267431
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Chad Rosier [Mon, 25 Apr 2016 17:23:36 +0000 (17:23 +0000)]
[ValueTracking] Improve isImpliedCondition when the dominating cond is false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267430
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Davide Italiano [Mon, 25 Apr 2016 17:18:45 +0000 (17:18 +0000)]
[gold-plugin] Remove dead assignment. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267429
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Davide Italiano [Mon, 25 Apr 2016 17:13:39 +0000 (17:13 +0000)]
[ELFRelocs] Other architectures do not have *_NUM reloc.
It also seems to be unused. Get rid of it.
Thanks to Rafael for pointing out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267428
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Adrian Prantl [Mon, 25 Apr 2016 17:04:32 +0000 (17:04 +0000)]
dsymutil: Only warn about clang module DWO id mismatches in verbose mode.
Until PR27449 (https://llvm.org/bugs/show_bug.cgi?id=27449) is fixed in
clang this warning is pointless, since ASTFileSignatures will change
randomly when a module is rebuilt.
rdar://problem/
25610919
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267427
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Sanjay Patel [Mon, 25 Apr 2016 16:56:52 +0000 (16:56 +0000)]
add tests for potential CGP transform (PR27344)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267426
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Jacques Pienaar [Mon, 25 Apr 2016 16:41:21 +0000 (16:41 +0000)]
[lanai] Expand findClosestSuitableAluInstr check to consider offset register.
Previously findClosestSuitableAluInstr was only considering the base register when checking the current instruction for suitability. Expand check to consider the offset if the offset is a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267424
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Marcin Koscielnicki [Mon, 25 Apr 2016 15:43:44 +0000 (15:43 +0000)]
[PR27390] [CodeGen] Reject indexed loads in CombinerDAG.
visitAND, when folding and (load) forgets to check which output of
an indexed load is involved, happily folding the updated address
output on the following testcase:
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
%typ = type { i32, i32 }
define signext i32 @_Z8access_pP1Tc(%typ* %p, i8 zeroext %type) {
%b = getelementptr inbounds %typ, %typ* %p, i64 0, i32 1
%1 = load i32, i32* %b, align 4
%2 = ptrtoint i32* %b to i64
%3 = and i64 %2, -
35184372088833
%4 = inttoptr i64 %3 to i32*
%_msld = load i32, i32* %4, align 4
%zzz = add i32 %1, %_msld
ret i32 %zzz
}
Fix this by checking ResNo.
I've found a few more places that currently neglect to check for
indexed load, and tightened them up as well, but I don't have test
cases for them. In fact, they might not be triggerable at all,
at least with current targets. Still, better safe than sorry.
Differential Revision: http://reviews.llvm.org/D19202
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267420
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Hrvoje Varga [Mon, 25 Apr 2016 15:40:08 +0000 (15:40 +0000)]
[mips][microMIPS] Revert commit r267137
Commit r267137 was the reason for failing tests in LLVM test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267419
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Zlatko Buljan [Mon, 25 Apr 2016 15:34:57 +0000 (15:34 +0000)]
[mips][microMIPS] Revert commit r266977
Commit r266977 was reason for failing LLVM test suite with error message: fatal error: error in backend: Cannot select: t17: i32 = rotr t2, t11 ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267418
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Sanjay Patel [Mon, 25 Apr 2016 15:26:57 +0000 (15:26 +0000)]
[x86] auto-generate checks for cmov tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267417
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Etienne Bergeron [Mon, 25 Apr 2016 15:06:33 +0000 (15:06 +0000)]
Fix incorrect redundant expression in target AMDGPU.
Summary:
The expression is detected as a redundant expression.
Turn out, this is probably a bug.
```
/home/etienneb/llvm/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:306:26: warning: both side of operator are equivalent [misc-redundant-expression]
if (isSMRD(*FirstLdSt) && isSMRD(*FirstLdSt)) {
```
Reviewers: rnk, tstellarAMD
Subscribers: arsenm, cfe-commits
Differential Revision: http://reviews.llvm.org/D19460
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267415
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David Majnemer [Mon, 25 Apr 2016 14:31:32 +0000 (14:31 +0000)]
[WinEH] Update SplitAnalysis::computeLastSplitPoint to cope with multiple EH successors
We didn't have logic to correctly handle CFGs where there was more than
one EH-pad successor (these are novel with WinEH).
There were situations where a register was live in one exceptional
successor but not another but the code as written would only consider
the first exceptional successor it found.
This resulted in split points which were insufficiently early if an
invoke was present.
This fixes PR27501.
N.B. This removes getLandingPadSuccessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267412
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Silviu Baranga [Mon, 25 Apr 2016 14:29:18 +0000 (14:29 +0000)]
[ARM] Add support for the X asm constraint
Summary:
This patch adds support for the X asm constraint.
To do this, we lower the constraint to either a "w" or "r" constraint
depending on the operand type (both constraints are supported on ARM).
Fixes PR26493
Reviewers: t.p.northover, echristo, rengolin
Subscribers: joker.eph, jgreenhalgh, aemerson, rengolin, llvm-commits
Differential Revision: http://reviews.llvm.org/D19061
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267411
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Artem Tamazov [Mon, 25 Apr 2016 14:13:51 +0000 (14:13 +0000)]
[AMDGPU][llvm-mc] s_getreg/setreg* - Add hwreg(...) syntax.
Added hwreg(reg[,offset,width]) syntax.
Default offset = 0, default width = 32.
Possibility to specify 16-bit immediate kept.
Added out-of-range checks.
Disassembling is always to hwreg(...) format.
Tests updated/added.
Differential Revision: http://reviews.llvm.org/D19329
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267410
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Anna Thomas [Mon, 25 Apr 2016 13:58:05 +0000 (13:58 +0000)]
Test commit: modified comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267406
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Chad Rosier [Mon, 25 Apr 2016 13:25:14 +0000 (13:25 +0000)]
Typo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267399
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Krzysztof Parzyszek [Mon, 25 Apr 2016 12:49:47 +0000 (12:49 +0000)]
[Hexagon] Correctly set "Flags" in ELF header
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267397
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James Molloy [Mon, 25 Apr 2016 10:48:29 +0000 (10:48 +0000)]
[GlobalOpt] Allow constant globals to be SRA'd
The current logic assumes that any constant global will never be SRA'd. I presume this is because normally constant globals can be pushed into their uses and deleted. However, that sometimes can't happen (which is where you really want SRA, so the elements that can be eliminated, are!).
There seems to be no reason why we can't SRA constants too, so let's do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267393
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Igor Kudrin [Mon, 25 Apr 2016 09:43:37 +0000 (09:43 +0000)]
[Coverage] Restore the correct count value after processing a nested region in case of combined regions.
If several regions cover the same area of code, we have to restore
the combined value for that area when return from a nested region.
This patch achieves that by combining regions before calling buildSegments.
Differential Revision: http://reviews.llvm.org/D18610
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267390
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Silviu Baranga [Mon, 25 Apr 2016 09:27:16 +0000 (09:27 +0000)]
[SCEV] Improve the run-time checking of the NoWrap predicate
Summary:
This implements a new method of run-time checking the NoWrap
SCEV predicates, which should be easier to optimize and nicer
for targets that don't correctly handle multiplication/addition
of large integer types (like i128).
If the AddRec is {a,+,b} and the backedge taken count is c,
the idea is to check that |b| * c doesn't have unsigned overflow,
and depending on the sign of b, that:
a + |b| * c >= a (b >= 0) or
a - |b| * c <= a (b <= 0)
where the comparisons above are signed or unsigned, depending on
the flag that we're checking.
The advantage of doing this is that we avoid extending to a larger
type and we avoid the multiplication of large types (multiplying
i128 can be expensive).
Reviewers: sanjoy
Subscribers: llvm-commits, mzolotukhin
Differential Revision: http://reviews.llvm.org/D19266
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267389
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Marcin Koscielnicki [Mon, 25 Apr 2016 09:24:34 +0000 (09:24 +0000)]
[PowerPC] [PR27387] Disallow r0 for ADD8TLS.
ADD8TLS, a variant of add instruction used for initial-exec TLS,
currently accepts r0 as a source register. While add itself supports
r0 just fine, linker can relax it to a local-exec sequence, converting
it to addi - which doesn't support r0.
Differential Revision: http://reviews.llvm.org/D19193
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267388
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Mehdi Amini [Mon, 25 Apr 2016 08:47:49 +0000 (08:47 +0000)]
Run GlobalOpt before emitting the bitcode for ThinLTO
This is motivated by reducing the size of the IR and thus reduce
compile time.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267385
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Mehdi Amini [Mon, 25 Apr 2016 08:47:37 +0000 (08:47 +0000)]
ThinLTO: Move createNameAnonFunctionPass insertion in PassManagerBuilder (NFC)
It is just code motion, but makes more sense this way.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267384
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Igor Breger [Mon, 25 Apr 2016 08:30:28 +0000 (08:30 +0000)]
fix comments
related to
Differential Revision: http://reviews.llvm.org/D17913
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267383
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Michael Zuckerman [Mon, 25 Apr 2016 05:27:51 +0000 (05:27 +0000)]
Fixing wrong mask size error. From __mmask8 to __mmask16.
Was reviewed over the shoulder by AsafBadouh.
Connected to review http://reviews.llvm.org/D19195.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267379
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Davide Italiano [Mon, 25 Apr 2016 04:38:08 +0000 (04:38 +0000)]
[Support/ELFRelocs] Add R_386_GOT32X.
The new relocation recently defined in the Intel386 psABI
was still missing from this file. A subsequent commit will
add support for GOT32X in MC, together with a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267378
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Craig Topper [Mon, 25 Apr 2016 04:30:29 +0000 (04:30 +0000)]
[X86] Replace a SmallVector used to pass 2 values to an ArrayRef parameter with a fixed size array. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267377
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Junmo Park [Mon, 25 Apr 2016 01:40:54 +0000 (01:40 +0000)]
Minor code cleanups. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267375
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Craig Topper [Mon, 25 Apr 2016 01:01:15 +0000 (01:01 +0000)]
[X86] Add a complete set of tests for all operand sizes of cttz/ctlz with and without zero undef being lowered to bsf/bsr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267373
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Adrian Prantl [Sun, 24 Apr 2016 22:23:13 +0000 (22:23 +0000)]
Verifier: Verify that each inlinable callsite of a debug-info-bearing function
in a debug-info-bearing function has a debug location attached to it. Failure to
do so causes an "!dbg attachment points at wrong subprogram for function"
assertion failure when the inliner sets up inline scope info.
rdar://problem/
25878916
This reaplies r267320 without changes after fixing an issue in the OpenMP IR
generator in clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267370
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Rafael Espindola [Sun, 24 Apr 2016 21:42:56 +0000 (21:42 +0000)]
Also check the IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267367
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Rafael Espindola [Sun, 24 Apr 2016 21:30:18 +0000 (21:30 +0000)]
Add a test for how we handle protected visibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267366
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Simon Pilgrim [Sun, 24 Apr 2016 20:30:48 +0000 (20:30 +0000)]
[X86][AVX] Added PR24935 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267362
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Saleem Abdulrasool [Sun, 24 Apr 2016 20:12:48 +0000 (20:12 +0000)]
ARM: fix __chkstk Frame Setup on WoA
This corrects the MI annotations for the stack adjustment following the __chkstk
invocation. We were marking the original SP usage as a Def rather than Kill.
The (new) assigned value is the definition, the original reference is killed.
Adjust the ISelLowering to mark Kills and FrameSetup as well.
This partially resolves PR27480.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267361
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Simon Pilgrim [Sun, 24 Apr 2016 19:31:56 +0000 (19:31 +0000)]
Tweak comments to make it clear that these combines are for SSE scalar instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267360
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Simon Pilgrim [Sun, 24 Apr 2016 18:35:59 +0000 (18:35 +0000)]
[InstCombine][SSE] Reduce DIVSS/DIVSD to FDIV if only first element is required
As discussed on D19318, if we only demand the first element of a DIVSS/DIVSD intrinsic, then reduce to a FDIV call. This matches the existing FADD/FSUB/FMUL patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267359
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Simon Pilgrim [Sun, 24 Apr 2016 18:23:14 +0000 (18:23 +0000)]
[InstCombine][SSE] Demanded vector elements for scalar intrinsics (Part 2 of 2)
Split from D17490. This patch improves support for determining the demanded vector elements through SSE scalar intrinsics:
1 - demanded vector element support for unary and some extra binary scalar intrinsics (RCP/RSQRT/SQRT/FRCZ and ADD/CMP/DIV/ROUND).
2 - addss/addsd get simplified to a fadd call if we aren't interested in the pass through elements
3 - if we don't need the lowest element of a scalar operation then just use the first argument (the pass through elements) directly
We can add support for propagating demanded elements through any equivalent packed SSE intrinsics in a future patch (these wouldn't use the pass through patterns).
Differential Revision: http://reviews.llvm.org/D19318
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267357
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Simon Pilgrim [Sun, 24 Apr 2016 18:12:42 +0000 (18:12 +0000)]
[InstCombine][SSE] Demanded vector elements for scalar intrinsics (Part 1 of 2)
This patch improves support for determining the demanded vector elements through SSE scalar intrinsics:
1 - recognise that we only need the lowest element of the second input for binary scalar operations (and all the elements of the first input)
2 - recognise that the roundss/roundsd intrinsics use the lowest element of the second input and the remaining elements from the first input
Differential Revision: http://reviews.llvm.org/D17490
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267356
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Simon Pilgrim [Sun, 24 Apr 2016 17:57:27 +0000 (17:57 +0000)]
[InstCombine] Avoid updating argument demanded elements in separate passes.
As discussed on D17490, we should attempt to update an intrinsic's arguments demanded elements in one pass if we can.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267355
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Nick Lewycky [Sun, 24 Apr 2016 17:55:57 +0000 (17:55 +0000)]
Fix typo in comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267354
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Nick Lewycky [Sun, 24 Apr 2016 17:55:41 +0000 (17:55 +0000)]
Remove emacs mode markers from .cpp files. NFC
.cpp files are unambiguously C++, you only need the mode markers on .h files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267353
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Simon Pilgrim [Sun, 24 Apr 2016 17:23:46 +0000 (17:23 +0000)]
[X86][InstCombine] Tidyup VPERMILVAR -> shufflevector conversion to helper function. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267352
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Simon Pilgrim [Sun, 24 Apr 2016 17:00:34 +0000 (17:00 +0000)]
[X86][InstCombine] Tidyup PSHUFB -> shufflevector conversion to helper function. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267351
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Simon Pilgrim [Sun, 24 Apr 2016 16:49:53 +0000 (16:49 +0000)]
[X86][SSE] getTargetShuffleMaskIndices - dropped (unused) UNDEF handling
We aren't currently making use of this in any successful mask decode and its actually incorrect as it inserts the wrong number of SM_SentinelUndef mask elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267350
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Simon Pilgrim [Sun, 24 Apr 2016 16:33:35 +0000 (16:33 +0000)]
[X86][SSE] Use range loop. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267349
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Craig Topper [Sun, 24 Apr 2016 16:30:51 +0000 (16:30 +0000)]
[Lanai] Use EVT::getEVTString() to print a type as a string instead of an enum encoding value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267348
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Simon Pilgrim [Sun, 24 Apr 2016 15:45:06 +0000 (15:45 +0000)]
[X86][SSE] Added SSSE3/AVX/AVX2 BITREVERSE tests
Codegen is pretty bad at the moment but could use PSHUFB quite efficiently
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267347
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Simon Pilgrim [Sun, 24 Apr 2016 15:05:04 +0000 (15:05 +0000)]
[X86][XOP] Fixed VPPERM permute op decoding (PR27472).
Fixed issue with VPPERM target shuffle mask decoding that was incorrectly masking off the 3-bit permute op with a 2-bit mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267346
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Duncan P. N. Exon Smith [Sun, 24 Apr 2016 15:04:28 +0000 (15:04 +0000)]
BitcodeReader: Delay metadata parsing until reading a function body
There's hardly any functionality change here. Instead of calling
materializeMetadata on the first call to materialize(GlobalValue*), wait
until the first one that's actually going to do something. Noticed by
inspection; I don't have a concrete case where this makes a difference.
Added an assertion in materializeMetadata to be sure this (or a future
change) doesn't delay materializeMetadata after function-level metadata.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267345
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Teresa Johnson [Sun, 24 Apr 2016 14:57:11 +0000 (14:57 +0000)]
[ThinLTO] Remove GlobalValueInfo class from index
Summary:
Remove the GlobalValueInfo and change the ModuleSummaryIndex to directly
reference summary objects. The info structure was there to support lazy
parsing of the combined index summary objects, which is no longer
needed and not supported.
Reviewers: joker.eph
Subscribers: joker.eph, llvm-commits
Differential Revision: http://reviews.llvm.org/D19462
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267344
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Simon Pilgrim [Sun, 24 Apr 2016 14:53:54 +0000 (14:53 +0000)]
[X86][SSE] Improved support for decoding target shuffle masks through bitcasts
Reused the ability to split constants of a type wider than the shuffle mask to work with masks generated from scalar constants transfered to xmm.
This fixes an issue preventing PSHUFB target shuffle masks decoding rematerialized scalar constants and also exposes the XOP VPPERM bug described in PR27472.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267343
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Duncan P. N. Exon Smith [Sun, 24 Apr 2016 14:25:37 +0000 (14:25 +0000)]
ModuleSummaryIndex: Avoid enum bitfields for MSVC portability
Enum bitfields have crazy portability issues with MSVC. Use unsigned
instead of LinkageTypes here in the ModuleSummaryIndex to address
Takumi's concerns from r267335.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267342
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Duncan P. N. Exon Smith [Sun, 24 Apr 2016 14:13:17 +0000 (14:13 +0000)]
Revert "Declare GlobalValue::LinkageTypes based on unsigned."
This reverts commit r267335. The build has been broken for hours
because of it:
http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/23352/
The correct fix is avoid using any enum in a bitfield.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267341
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Marcin Koscielnicki [Sun, 24 Apr 2016 13:57:49 +0000 (13:57 +0000)]
[SystemZ] [SSP] Add support for LOAD_STACK_GUARD.
This fixes PR22248 on s390x. The previous attempt at this was D19101,
which was before LOAD_STACK_GUARD existed. Compared to the previous
version, this always emits a rather ugly block of 4 instructions, involving
a thread pointer load that can't be shared with other potential users.
However, this is necessary for SSP - spilling the guard value (or thread
pointer used to load it) is counter to the goal, since it could be
overwritten along with the frame it protects.
Differential Revision: http://reviews.llvm.org/D19363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267340
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Simon Pilgrim [Sun, 24 Apr 2016 13:45:30 +0000 (13:45 +0000)]
[X86][SSE] Demonstrate issue with decoding shuffle masks that have been lowered as rematerialized constants on scalar unit
Found whilst investigating PR27472
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267339
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Aaron Ballman [Sun, 24 Apr 2016 13:03:20 +0000 (13:03 +0000)]
Silence two C4806 warnings ('|': unsafe operation: no value of type 'bool' promoted to type 'const unsigned int' can equal the given constant). The fact that they trigger with this code seems like it may be a bug, but the warning itself is still generally useful enough to retain it for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267337
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NAKAMURA Takumi [Sun, 24 Apr 2016 10:11:45 +0000 (10:11 +0000)]
Declare GlobalValue::LinkageTypes based on unsigned.
Or, "LinkageTypes Linkage : 4;" might be sign-extended on msc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267335
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NAKAMURA Takumi [Sun, 24 Apr 2016 08:02:00 +0000 (08:02 +0000)]
llvm/test/tools/gold/X86/thinlto.ll: Possible fix corresponding to r267318.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267334
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Duncan P. N. Exon Smith [Sun, 24 Apr 2016 06:52:01 +0000 (06:52 +0000)]
BitcodeReader: Fix some holes in upgrade from r267296
Add tests for some missing cases to bitcode upgrade in r267296.
- DICompositeType with an 'elements:' field, which will cause it to be
involved in a cycle after the upgrade.
- A DIDerivedType that references a class in 'extraData:'.
I updated test/Bitcode/dityperefs-3.8.ll with the missing cases and
regenerated test/Bitcode/dityperefs-3.8.ll.bc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267332
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Craig Topper [Sun, 24 Apr 2016 06:27:39 +0000 (06:27 +0000)]
[X86] Merge LowerCTLZ and LowerCTLZ_ZERO_UNDEF into a single function that branches internally for the one difference, allowing the rest of the code to be common. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267331
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Craig Topper [Sun, 24 Apr 2016 06:27:35 +0000 (06:27 +0000)]
[X86] Node need to check if AVX512 is supported when lowering vector CTLZ. The CTLZ operation is only Custom for vectors if AVX512 is enabled so if a vector gets here AVX512 is implied. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267330
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Mehdi Amini [Sun, 24 Apr 2016 05:31:43 +0000 (05:31 +0000)]
Add "hasSection" flag in the Summary
Reviewers: tejohnson
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19405
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267329
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Gerolf Hoflehner [Sun, 24 Apr 2016 05:14:01 +0000 (05:14 +0000)]
[MachineCombiner] Support for floating-point FMA on ARM64 (re-commit r267098)
The original patch caused crashes because it could derefence a null pointer
for SelectionDAGTargetInfo for targets that do not define it.
Evaluates fmul+fadd -> fmadd combines and similar code sequences in the
machine combiner. It adds support for float and double similar to the existing
integer implementation. The key features are:
- DAGCombiner checks whether it should combine greedily or let the machine
combiner do the evaluation. This is only supported on ARM64.
- It gives preference to throughput over latency: the heuristic used is
to combine always in loops. The targets decides whether the machine
combiner should optimize for throughput or latency.
- Supports for fmadd, f(n)msub, fmla, fmls patterns
- On by default at O3 ffast-math
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267328
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Craig Topper [Sun, 24 Apr 2016 04:38:34 +0000 (04:38 +0000)]
[X86] Remove isel patterns for selecting tzcnt/lzcnt from cmove/ne+cttz/ctlz. These are folded by DAG combine now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267326
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Craig Topper [Sun, 24 Apr 2016 04:38:32 +0000 (04:38 +0000)]
[CodeGen] Teach DAG combine to fold select_cc seteq X, 0, sizeof(X), ctlz_zero_undef(X) -> ctlz(X). InstCombine already does this for IR and X86 pattern matches this during isel.
A follow up commit will remove the X86 patterns to allow this to be tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267325
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Craig Topper [Sun, 24 Apr 2016 04:38:29 +0000 (04:38 +0000)]
Fix an assertion that can never fire because the condition ANDed with the string is just true or 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267324
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Adrian Prantl [Sun, 24 Apr 2016 03:47:37 +0000 (03:47 +0000)]
Revert "Verifier: Verify that each inlinable callsite of a debug-info-bearing function"
This reverts commit r267320 while investigating an OpenMP buildbot failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267322
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Adrian Prantl [Sun, 24 Apr 2016 03:23:02 +0000 (03:23 +0000)]
Verifier: Verify that each inlinable callsite of a debug-info-bearing function
in a debug-info-bearing function has a debug location attached to it. Failure to
do so causes an "!dbg attachment points at wrong subprogram for function"
assertion failure when the inliner sets up inline scope info.
rdar://problem/
25878916
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267320
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Mehdi Amini [Sun, 24 Apr 2016 03:18:18 +0000 (03:18 +0000)]
Reorganize GlobalValueSummary with a "Flags" bitfield.
Right now it only contains the LinkageType, but will be extended
with "hasSection", "isOptSize", "hasInlineAssembly", etc.
Differential Revision: http://reviews.llvm.org/D19404
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267319
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Mehdi Amini [Sun, 24 Apr 2016 03:18:11 +0000 (03:18 +0000)]
Add a version field in the bitcode for the summary
Differential Revision: http://reviews.llvm.org/D19456
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267318
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Mehdi Amini [Sun, 24 Apr 2016 03:18:01 +0000 (03:18 +0000)]
Add an internalization step to the ThinLTOCodeGenerator
Keeping as much as possible internal/private is
known to help the optimizer. Let's try to benefit from
this in ThinLTO.
Note: this is early work, but is enough to build clang (and
all the LLVM tools). I still need to write some lit-tests...
Differential Revision: http://reviews.llvm.org/D19103
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267317
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Craig Topper [Sun, 24 Apr 2016 02:01:25 +0000 (02:01 +0000)]
Fix a couple assertions that can never fire because they just contained the text string which always evaluates to true. Add a ! so they'll evaluate to false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267312
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Craig Topper [Sun, 24 Apr 2016 02:01:22 +0000 (02:01 +0000)]
[X86] Fix patterns that turn cmove/cmovne+ctlz/cttz into lzcnt/tzcnt instructions. Only one of the conditions should be valid for each pattern, not both. Update tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267311
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Davide Italiano [Sun, 24 Apr 2016 01:36:37 +0000 (01:36 +0000)]
[RuntimeDyldELF] Handle GOTPCRELX/REX_GOTPCRELX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267309
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Davide Italiano [Sun, 24 Apr 2016 01:08:35 +0000 (01:08 +0000)]
[MC/ELF] Make the relaxation test more interesting.
Add a case where we can't relax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267308
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Davide Italiano [Sun, 24 Apr 2016 01:03:57 +0000 (01:03 +0000)]
[MC/ELF] Implement support for GOTPCRELX/REX_GOTPCRELX.
The option to control the emission of the new relocations
is -relax-relocations (blatantly copied from GNU as).
It can't be enabled by default because it breaks relatively
recent versions of ld.bfd/ld.gold (late 2015).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267307
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Mehdi Amini [Sun, 24 Apr 2016 00:25:15 +0000 (00:25 +0000)]
Relax test using CHECK-DAG instead of CHECK-NEXT
It seems we still have some ordering issue in the combined index
emission, but I can't figure out why right now.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267306
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Mehdi Amini [Sun, 24 Apr 2016 00:03:57 +0000 (00:03 +0000)]
Fix test stability (was sensitive to the path)
This is a fixup for r267304.
The test was sensitive to the path in a subtle way:
the index in memory is sorted by GUID, which are hashes
that include the source filename for local globals.
Teresa recently added a directive at the IR level, so
we can specify it here to make the test independent of
the path.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267305
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Mehdi Amini [Sat, 23 Apr 2016 23:38:17 +0000 (23:38 +0000)]
Store and emit original name in combined index
Summary:
As discussed in D18298, some local globals can't
be renamed/promoted (because they have a section, or because
they are referenced from inline assembly).
To be able to detect naming collision, we need to keep around
the "GUID" using their original name without taking the linkage
into account.
Reviewers: tejohnson
Subscribers: joker.eph, llvm-commits
Differential Revision: http://reviews.llvm.org/D19454
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267304
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Mehdi Amini [Sat, 23 Apr 2016 23:29:24 +0000 (23:29 +0000)]
Always traverse GlobalVariable initializer when computing the export list
Summary:
We are always importing the initializer for a GlobalVariable.
So if a GlobalVariable is in the export-list, we pull in any
refs as well.
Reviewers: tejohnson
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19102
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267303
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Duncan P. N. Exon Smith [Sat, 23 Apr 2016 22:29:09 +0000 (22:29 +0000)]
DebugInfo: Change DIBuilder to make distinct DIGlobalVariables
A long overdue change to make DIGlobalVariable distinct. Much like
DISubprogram definitions (changed in r246098), it isn't logical to
unique DIGlobalVariable definitions from two different compile units.
(Longer-term, we should also find a way to reverse the link between
GlobalVariable and DIGlobalVariable, and between DIGlobalVariable and
DICompileUnit, so that debug info to do with optimized-out globals
disappears. Admittedly it's harder than with Function/DISubprogram,
since global variables may be constant-folded and the debug info should
still describe that somehow.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267301
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Davide Italiano [Sat, 23 Apr 2016 22:26:31 +0000 (22:26 +0000)]
[MC/ELF] Pass Fixup to getRelocType64.
In preparation for other changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267300
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