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Brian Paul [Fri, 18 May 2012 20:39:41 +0000 (14:39 -0600)]
mesa: reimplement IROUND(), add F_TO_I()
The different implementations of IROUND() behaved differently and in
the case of fistp, depended on the current x86 FPU rounding mode.
This caused some tests like piglit roundmode-pixelstore and
roundmode-getintegerv to fail on 32-bit x86 but pass on 64-bit x86.
Now IROUND() always rounds to the nearest integer (away from zero).
The new F_TO_I function converts a float to an int by whatever means
is fastest. We'll use this where we're more concerned with performance
and not too worried to how the conversion is done.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Brian Paul [Fri, 18 May 2012 19:33:53 +0000 (13:33 -0600)]
mesa: fix Z32_FLOAT -> uint conversion functions
The IROUND converted all arguments to 0 or 1. That's not what we wanted.
NOTE: This is a candidate for the 8.0 branch.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Brian Paul [Fri, 18 May 2012 19:33:25 +0000 (13:33 -0600)]
st/mesa: remove unused pipe variable
Brian Paul [Thu, 17 May 2012 22:23:02 +0000 (16:23 -0600)]
svga: whitespace, comments, formatting clean-ups
Brian Paul [Thu, 17 May 2012 21:48:50 +0000 (15:48 -0600)]
st/mesa: added st_print_current_vertex_program(), for debugging
Brian Paul [Thu, 17 May 2012 19:53:15 +0000 (13:53 -0600)]
svga: return PIPE_OK instead of 0
And fix the emit_rss() function's return type.
Brian Paul [Thu, 17 May 2012 16:07:46 +0000 (10:07 -0600)]
svga: fix zero-stride vertex array bug
For zero-stride vertex arrays, the svga driver copies the value into
the constant value and uses that value in the shader. The recent
gallium-userbuf changes caused a regression in this. An example
symptom was per-primitive glColor3f() calls getting ignored.
Where we copied the vertex value from the vertex buffer to the
constant buffer we neglected to take into account the
pipe_vertex_buffer::buffer_offset field. Adding that value to the
source offset fixes the problem. Actually, it looks like we should
have been doing this all along, but it never was an issue before for
some reason.
Brian Paul [Thu, 17 May 2012 13:44:32 +0000 (07:44 -0600)]
mesa: add GLSL_REPORT_ERRORS debug flag
If the MESA_GLSL env var contains "errors", GLSL compilation and
link errors will be reported to stderr.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Wed, 16 May 2012 17:09:23 +0000 (11:09 -0600)]
mesa: add some comments on shaderapi.c functions
Vinson Lee [Fri, 18 May 2012 06:09:35 +0000 (23:09 -0700)]
mesa: Remove undefinition of _P symbol.
IRIX isn't used anymore.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Ian Romanick [Fri, 18 May 2012 23:25:00 +0000 (16:25 -0700)]
Import release notes for 8.0.3, add news item
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Jeremy Huddleston [Fri, 18 May 2012 18:31:24 +0000 (11:31 -0700)]
darwin: Address a build failure on Leopard and earlier OS versions
<https://trac.macports.org/ticket/34499>
Regression-from:
51691f0767f6a75a1f549cd979a878a0ad12a228
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
Michel Dänzer [Fri, 18 May 2012 13:40:34 +0000 (15:40 +0200)]
radeonsi: Only honour point related rasterizer state when rendering points.
Avoids hangs when not rendering points.
Michel Dänzer [Fri, 18 May 2012 13:01:10 +0000 (15:01 +0200)]
radeonsi: Fix parameter cache offsets for fragment shader inputs.
Vinson Lee [Thu, 17 May 2012 06:44:53 +0000 (23:44 -0700)]
gallium/tgsi/text: Ensure ret is initialized in parse_immediate_data.
Fix uninitialized scalar variable defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tom Stellard [Fri, 18 May 2012 00:39:54 +0000 (20:39 -0400)]
radeon/llvm: Fix segfault while lowering lrp intrinsic
Tom Stellard [Thu, 17 May 2012 22:21:24 +0000 (18:21 -0400)]
radeon/llvm: Add DAG nodes for MIN instructions
Also, remove the AMDIL MIN* instruction defs.
José Fonseca [Fri, 18 May 2012 00:03:13 +0000 (01:03 +0100)]
llvmpipe: Avoid adding floating point zero to flat inputs.
Which could clobber integer inputs, if the addition is not optimized away
(e.g., if optimizations are disabled for debugging purposes).
José Fonseca [Thu, 17 May 2012 23:55:13 +0000 (00:55 +0100)]
Fix fetching integer inputs.
Olivier Galibert [Thu, 17 May 2012 14:48:54 +0000 (16:48 +0200)]
llvmpipe: Implement TXQ.
Piglits test for fragment shaders pass, vertex shaders fail. The
actual failure seems to be in the interpolators, and not the
textureSize query.
Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: José Fonseca <jose.r.fonseca@gmail.com>
Olivier Galibert [Thu, 17 May 2012 07:32:31 +0000 (09:32 +0200)]
llvmpipe: Don't mess with the provoking vertex when inverting a triangle.
Fixes a bunch of piglit tests related to flat interpolation of floats.
Signed-off-by: Olivier Galibert <galibert@pobox.com>
Signed-off-by: José Fonseca <jose.r.fonseca@gmail.com>
Tom Stellard [Thu, 17 May 2012 17:36:12 +0000 (13:36 -0400)]
radeon/llvm: Lower lrp intrinsic during ISel
Tom Stellard [Thu, 17 May 2012 18:34:40 +0000 (14:34 -0400)]
radeon/llvm: Remove AMDIL MAD instruction defs
Tom Stellard [Thu, 17 May 2012 17:41:21 +0000 (13:41 -0400)]
radeon/llvm: Remove AMDIL MUL_IEEE* instructions
Tom Stellard [Thu, 17 May 2012 18:31:36 +0000 (14:31 -0400)]
r600g: Handle MUL_IEEE in r600_bytecode_get_num_operands
Tom Stellard [Thu, 17 May 2012 17:13:17 +0000 (13:13 -0400)]
radeon/llvm: Expand fsub during ISel
Tom Stellard [Thu, 17 May 2012 17:05:07 +0000 (13:05 -0400)]
radeon/llvm: Remove AMDIL floating-point ADD instruction defs
Tom Stellard [Thu, 17 May 2012 16:54:43 +0000 (12:54 -0400)]
radeon/llvm: Remove AMDIL CMOVLOG* instruction defs
Tom Stellard [Thu, 17 May 2012 16:08:21 +0000 (12:08 -0400)]
radeon/llvm: Move lowering of ABS_i32 to ISel
Tom Stellard [Thu, 17 May 2012 15:46:19 +0000 (11:46 -0400)]
radeon/llvm: Remove sub patterns from AMDILInstrPatterns.td
Tom Stellard [Thu, 17 May 2012 11:35:15 +0000 (07:35 -0400)]
radeon/llvm: Add custom SDNodes for MAX
We now lower the various intrinsics for max to SDNodes and then use
tablegen patterns to lower the SDNodes to instructions.
Jordan Justen [Mon, 7 May 2012 23:17:31 +0000 (16:17 -0700)]
state_tracker: remove sw_primitive_restart from st_context
The VBO module now can handle primitive restart in software
if required.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Jordan Justen [Mon, 7 May 2012 23:11:55 +0000 (16:11 -0700)]
state_tracker: remove software handling of primitive restart
The VBO module now can handle primitive restart in software
if required. Therefore this support is no londer required.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Jordan Justen [Mon, 7 May 2012 22:44:34 +0000 (15:44 -0700)]
state_tracker: set PrimitiveRestartInSoftware if needed
If the PIPE_CAP_PRIMITIVE_RESTART screen param is not set, then enable
PrimitiveRestartInSoftware to enable software primitive restart
support in the VBO module.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Jordan Justen [Mon, 7 May 2012 22:50:21 +0000 (15:50 -0700)]
vbo: use software primitive restart in the VBO module
When PrimitiveRestartInSoftware is set, the VBO module will handle
primitive restart scenarios before calling the vbo->draw_prims
drawing function.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Mon, 7 May 2012 22:39:31 +0000 (15:39 -0700)]
mesa: add PrimitiveRestartInSoftware to gl_context.Const
If set, then the VBO module will handle all primitive
restart scenarios before calling the driver draw_prims.
Software primitive restart support is disabled by default.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Mon, 7 May 2012 22:50:21 +0000 (15:50 -0700)]
vbo: add software primitive restart support
vbo_sw_primitive_restart implements primitive restart in software
by splitting primitive draws apart.
This is based on similar support in mesa/state_tracker/st_draw.c.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 14 May 2012 17:18:23 +0000 (10:18 -0700)]
mesa: Check for framebuffer completeness before looking at the rb.
Otherwise, an incomplete framebuffer could have a NULL
_ColorReadBuffer and we'd deref that.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Mon, 14 May 2012 17:15:52 +0000 (10:15 -0700)]
mesa: Fix assertion failure when a cube face is not present.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Mon, 14 May 2012 16:14:54 +0000 (09:14 -0700)]
glsl: Drop the extra NULL specifiction on ir_assignment constructors.
It's an implied argument, and I don't think being explicit about it
helps.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Mon, 14 May 2012 15:51:03 +0000 (08:51 -0700)]
glsl: Fix assertion failure on handling switch on uint expressions.
Fixes piglit glsl-1.30/execution/switch/fs-uint.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Mon, 14 May 2012 15:45:59 +0000 (08:45 -0700)]
glsl: Reject non-scalar switch expressions.
The comment quotes spec saying that only scalar integers are allowed,
but we only checked for integer.
Fixes piglit switch-expression-const-ivec2.vert
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Mon, 14 May 2012 15:39:54 +0000 (08:39 -0700)]
glsl: Let the constructor figure out the types of switch-related expressions.
I noticed this while unindenting the code.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Mon, 14 May 2012 15:37:50 +0000 (08:37 -0700)]
glsl: Fix indentation of switch code.
I managed to completely trash it in
22d81f15.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Thu, 10 May 2012 22:38:11 +0000 (15:38 -0700)]
i965/vs: Fix up swizzle for dereference_array of matrices.
Fixes assertion failure in piglit:
vs-mat2-struct-assignment.shader_test
vs-mat2-array-assignment.shader_test
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Thu, 10 May 2012 21:56:48 +0000 (14:56 -0700)]
mesa: Throw error on glGetActiveUniform inside Begin/End.
Fixes piglit GL_ARB_shader_objeccts/getactiveuniform-beginend.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Thu, 23 Feb 2012 19:51:04 +0000 (11:51 -0800)]
glsl: Improve the local dead code optimization to eliminate unused channels.
Total instructions: 261582 -> 261316
135/2147 programs affected (6.3%)
36752 -> 36486 instructions in affected programs (0.7% reduction)
This excludes a tropics shader that now gets 16-wide mode and throws
off the numbers. 5 shaders are hurt: two extra MOVs in 4 tropics
shaders it looks like because we don't split register names according
to independent webs, and one gstreamer shader where it looks like
try_rewrite_rhs_to_dst() is falling on its face.
This should also help avoid a regression in VSes from idr's ARB
programs to GLSL work.
Eric Anholt [Tue, 8 May 2012 17:18:20 +0000 (10:18 -0700)]
i965/fs: Do more register coalescing by using the interference graph.
By using the live variables code for determining interference, we can
handle coalescing in the presence of control flow, which the other
register coalescing path couldn't.
Total instructions: 207184 -> 206990
74/1246 programs affected (5.9%)
33993 -> 33799 instructions in affected programs (0.6% reduction)
There is a newerth shader that loses out, because of some extra MOVs
that now get their dead-code nature obscured by coalescing. This
should be fixed by doing better at dead code elimination.
Christoph Bumiller [Thu, 17 May 2012 12:43:47 +0000 (14:43 +0200)]
nouveau: place static buffers in VRAM if preferred by the driver
Christoph Bumiller [Wed, 9 May 2012 18:32:44 +0000 (20:32 +0200)]
nv50/ir: fix reversed order of lane ops in quadops
Christoph Bumiller [Wed, 16 May 2012 19:08:37 +0000 (21:08 +0200)]
nv50,nvc0: handle user vertex buffers
And restructure VBO validation a little in the process.
Christoph Bumiller [Wed, 16 May 2012 18:54:23 +0000 (20:54 +0200)]
nv50,nvc0: handle user index buffers
Christoph Bumiller [Wed, 16 May 2012 18:52:41 +0000 (20:52 +0200)]
nv50,nvc0: handle user constbufs without wrapping them in a resource
Christoph Bumiller [Sun, 13 May 2012 19:32:47 +0000 (21:32 +0200)]
st/mesa: set PIPE_BIND_STREAM_OUTPUT for TFB target in st_bufferobj_data
Jeremy Huddleston [Sat, 28 Apr 2012 01:36:33 +0000 (18:36 -0700)]
darwin: Eliminate a possible race condition while destroying a surface
Introduced by:
c60ffd2840036af1ea6f2b6c6e1e9014bb8e2c34
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
Jeremy Huddleston [Fri, 11 May 2012 01:56:50 +0000 (18:56 -0700)]
darwin: Unlock our mutex before destroying it
http://xquartz.macosforge.org/trac/ticket/575
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
Michel Dänzer [Wed, 16 May 2012 21:52:19 +0000 (23:52 +0200)]
gallium/radeon: Fix r300g tiling breakage.
Commit
11f056a3f0b87e86267efa8b5ac9d36a343c9dc1 broke the r300g build. Fix it
up, and reinstate some code which isn't needed by r600g and radeonsi but is
by r300g.
Francisco Jerez [Wed, 16 May 2012 13:43:29 +0000 (15:43 +0200)]
gallium/auxiliary/pipe-loader: Fix usage of anonymous union.
Anonymous unions aren't part of the C99 standard. Fixes build on GCC
versions older than 4.6.
https://bugs.freedesktop.org/show_bug.cgi?id=50001
Reported-by: Michael Lange <michaell@gmx.org>
Michel Dänzer [Wed, 16 May 2012 16:19:13 +0000 (18:19 +0200)]
radeonsi: Initial tiling support.
Largely based on the corresponding Evergreen support in r600g.
Michel Dänzer [Wed, 16 May 2012 15:45:17 +0000 (17:45 +0200)]
r600g: Set tiling information for BOs being shared.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=48747
Michel Dänzer [Wed, 16 May 2012 15:45:10 +0000 (17:45 +0200)]
st/xorg: Better handling of EXA copies.
Always use the resource_copy_region hook. If a source and destination rectangle
overlap, copy to/from a temporary pixmap.
Michel Dänzer [Tue, 15 May 2012 15:14:12 +0000 (17:14 +0200)]
radeonsi: Bump MAX_DRAW_CS_DWORDS.
I missed this when updating si_context_draw().
José Fonseca [Wed, 16 May 2012 14:00:23 +0000 (15:00 +0100)]
draw,llvmpipe: Avoid named struct types on LLVM 3.0 and later.
Starting with LLVM 3.0, named structures are meant not for debugging, but
for recursive data types, previously also known as opaque types.
The recursive nature of these types leads to several memory management
difficulties. Given that we don't actually need recursive types, avoid
them altogether.
This is an attempt to address fdo bugs 41791 and 44466. The issue is
somewhat random so there's no easy way to check how effective this is.
Olivier Galibert [Tue, 15 May 2012 20:10:08 +0000 (22:10 +0200)]
llvmpipe: Color slot interpolation can be flat or perspective, not linear.
Fixes a bunch of glsl 1.10 interpolation piglit tests.
Signed-off-by: Olivier Galibert <galibert@pobox.com>
Signed-off-by: José Fonseca <jfonseca@vmware.com>
Homer Hsing [Tue, 15 May 2012 22:56:17 +0000 (18:56 -0400)]
configure.ac: Fix typos in the r600-llvm-compiler option
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
José Fonseca [Tue, 15 May 2012 12:10:26 +0000 (05:10 -0700)]
gallivm: Add MCRegisterInfo.h to silence benign warnings about missing implementation.
Trivial.
Paul Berry [Tue, 15 May 2012 14:29:26 +0000 (07:29 -0700)]
i965/blorp: Move exec() out of brw_blorp_params.
No functional change. This patch replaces the
brw_blorp_params::exec() method with a global function
brw_blorp_exec() that performs the operation described by the params
data structure.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Mon, 30 Apr 2012 04:41:42 +0000 (21:41 -0700)]
i965/gen6: Initial implementation of MSAA.
This patch enables MSAA for Gen6, by modifying intel_mipmap_tree to
understand multisampled buffers, adapting the rendering pipeline setup
to enable multisampled rendering, and adding multisample resolve
operations to brw_blorp_blit.cpp. Some preparation work is also
included for Gen7, but it is not yet enabled.
MSAA support is still fairly preliminary. In particular, the
following are not yet supported:
- Fully general blits between MSAA and non-MSAA buffers.
- Formats other than RGBA8, DEPTH24, and STENCIL8.
- Centroid interpolation.
- Coverage parameters (glSampleCoverage, GL_SAMPLE_ALPHA_TO_COVERAGE,
GL_SAMPLE_ALPHA_TO_ONE, GL_SAMPLE_COVERAGE, GL_SAMPLE_COVERAGE_VALUE,
GL_SAMPLE_COVERAGE_INVERT).
Fixes piglit tests "EXT_framebuffer_multisample/accuracy" on
i965/Gen6.
v2:
- In intel_alloc_renderbuffer_storage(), quantize the requested number
of samples to the next higher sample count supported by the
hardware. This ensures that a query of GL_SAMPLES will return the
correct value. It also ensures that MSAA is fully disabled on Gen7
for now (since Gen7 MSAA support doesn't work yet).
- When reading from a non-MSAA surface, ensure that s_is_zero is true
so that we won't try to read from a nonexistent sample.
Paul Berry [Mon, 30 Apr 2012 05:44:25 +0000 (22:44 -0700)]
i965/gen6+: Add code to perform blits on the render path ("blorp").
This patch expands the "blorp" component to be able to perform blits
as well as HiZ resolves. The new blitting code is located in
brw_blorp_blit.cpp. This includes the necessary fragment shader code
to look up pixels in the source buffer (which is configured as a
texture) and output them to the destination buffer (which is
configured as the render target).
Most of the time the fragment shader code is simple and
straightforward, since it merely has to apply a coordinate offset,
read from the texture, and write to the render target. However, in
the case of blitting stencil buffers, things are more complicated,
since the GPU stores stencil data using W tiling, and W tiling is not
supported for textures or render targets. So, we set up the stencil
buffers as Y tiled, and emit fragment shader code that adjusts the
coordinates to account for the difference between W and Y tiling.
Furthermore, since a rectangular region in W tiling does not
necessarily correspond to a rectangular region in Y tiling, we widen
the rectangle primitive to the nearest tile boundary and have the
fragment shader "kill" any pixels that don't fall inside the actual
desired destination rectangle.
All of this is a necessary prerequisite for implementing MSAA, since
we'll need to be able to blit between multisample color, depth, and
stencil buffers and their non-multisampled counterparts, and none of
the existing blitting mechanisms support multisampling.
In addition, the new blitting code should speed up operations where we
previously fell back to software rasterization, such as blitting of
stencil buffers. The current fallback sequence is: first we try to do
a blit using the hardware blitting engine. If that fails we try to do
a blit using the render path. If that also fails then we do the blit
using a meta-op (which may or may not fall back to software
rasterization).
Note that blitting using the render path has some limitations at the
moment: it only supports a few formats, and it doesn't support
clipping or scissoring. These limitations will be addressed in future
patch series.
v2:
- Add the code that configures the WM program to
gen{6,7}_emit_wm_config() and gen7_emit_ps_config() rather than
creating separate ...enable() functions.
- Call intel_prepare_render before determining which miptrees we are
blitting from/to, because it may cause miptrees to be reallocated.
- Allow the blit to mirror X and/or Y coordinates.
- Disable blorp blits on Gen7 for now, since they aren't working yet.
Paul Berry [Fri, 27 Apr 2012 01:01:01 +0000 (18:01 -0700)]
i965: Expose surface setup internals for use by blits.
This patch exposes the functions brw_get_surface_tiling_bits and
gen7_set_surface_tiling, so that they can be re-used when setting up
surface states in gen6_blorp.cpp and gen7_blorp.cpp.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Paul Berry [Mon, 30 Apr 2012 21:29:35 +0000 (14:29 -0700)]
i965: split gen{6,7}_blorp_exec functions into manageable chunks.
This patch splits up the gen6_blorp_exec and gen7_blorp_exec
functions, which were very long, into simple component functions.
With a few exceptions, there is one function per state packet.
This will allow blit functionality to be added without significantly
complicating the code.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
v2: Rename the functions gen{6,7}_emit_wm_disable() to
gen{6,7}_emit_wm_config() (since the WM is not actually disabled
during HiZ ops; it simply doesn't have a program). Also, on gen7,
split out the configration of 3DSTATE_PS to a separate function
gen7_emit_ps_config().
Paul Berry [Mon, 30 Apr 2012 05:00:46 +0000 (22:00 -0700)]
i965: Parameterize HiZ code to prepare for adding blitting.
This patch groups together the parameters used by the HiZ functions
into a new data structure, brw_hiz_resolve_params, rather than passing
each parameter individually between the HiZ functions. This data
structure is a subclass of brw_blorp_params, which represents the
parameters of a general-purpose blit or resolve operation. A future
patch will add another subclass for blits.
In addition, this patch generalizes the (width, height) parameters to
a full rect (x0, y0, x1, y1), since blitting operations will need to
be able to operate on arbitrary rectangles. Also, it renames several
of the HiZ functions to reflect the expanded role they will serve.
v2: Rename brw_hiz_resolve_params to brw_hiz_op_params. Move
gen{6,7}_blorp_exec() functions back into gen{6,7}_blorp.h.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Kenneth Graunke [Sat, 5 May 2012 00:06:39 +0000 (17:06 -0700)]
i965: Implement guardband clipping on Ivybridge.
Improves performance in Citybench:
- 320x240: 9.19589% +/- 0.557621%
- 1280x480: 3.90797% +/- 0.774429%
No apparent difference in OpenArena.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 5 May 2012 00:06:38 +0000 (17:06 -0700)]
i965: Implement guardband clipping on Sandybridge.
Improves performance in Citybench:
- 320x240: 19.8008% +/- 0.937818%
- 1280x480: 6.53856% +/- 0.859083%
No apparent difference in OpenArena nor Xonotic.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
José Fonseca [Tue, 15 May 2012 21:38:53 +0000 (22:38 +0100)]
llvmpipe: Add a test for lp_build_sgn.
Only floating point though, but better than nothing.
José Fonseca [Tue, 15 May 2012 21:36:09 +0000 (22:36 +0100)]
gallivm: Fix lp_build_sgn for normalized/fixed-point integers.
These types got broken with the recent commit that fixed lp_build_sgn
for negative integers.
José Fonseca [Tue, 15 May 2012 21:34:36 +0000 (22:34 +0100)]
gallivm: Fix lp_build_const_xxx for negative integers.
Do proper rounding.
Thanks to Olivier Galibert for investigating this.
Brian Paul [Mon, 14 May 2012 22:33:58 +0000 (16:33 -0600)]
svga: fix FBO / viewport bugs
When drawing to a FBO, the viewport wasn't always set correctly. It
was fine in the usual case of the viewport dims matching the surface
dims but broken otherwise. In particular, this was happening because
the viewport scale is negative for FBO rendering.
The piglit fbo-viewport test exercises this.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Vadim Girlin [Tue, 15 May 2012 14:48:51 +0000 (18:48 +0400)]
radeon/llvm: add support for texture offsets, fix TEX_LD
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Vadim Girlin [Tue, 15 May 2012 14:53:06 +0000 (18:53 +0400)]
radeon/llvm: add SET_GRADIENTS*, fix SAMPLE_G
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Vadim Girlin [Tue, 15 May 2012 14:48:26 +0000 (18:48 +0400)]
radeon/llvm: increase const regs count
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Vadim Girlin [Tue, 15 May 2012 14:48:16 +0000 (18:48 +0400)]
radeon/llvm: use IntrNoMem property for intrinsics where possible
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Vadim Girlin [Tue, 15 May 2012 14:48:06 +0000 (18:48 +0400)]
radeon/llvm: use correct intrinsic for CEIL
Should be round_posinf instead of round_neginf.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Vadim Girlin [Tue, 15 May 2012 14:47:53 +0000 (18:47 +0400)]
radeon/llvm: improve ABS_i32 lowering
We can save one instruction by lowering it to:
SUB_INT tmp, 0, src
MAX_INT dst, src, tmp
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Vadim Girlin [Tue, 15 May 2012 14:47:38 +0000 (18:47 +0400)]
radeon/llvm: fix BUILD_VECTOR lowering for replicated value
We expect that all elements will be assigned even if they are equal
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Vadim Girlin [Tue, 15 May 2012 14:47:22 +0000 (18:47 +0400)]
radeon/llvm: add names for AMDGPU* passes
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Vadim Girlin [Tue, 15 May 2012 14:47:02 +0000 (18:47 +0400)]
radeon/llvm: add generated files to .gitignore
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Paul Berry [Mon, 14 May 2012 16:24:46 +0000 (09:24 -0700)]
Add .gitignore files for recently-added gallium projects
This patch adds .gitignore files to ignore the makefiles generated by
the gallium pipe loader and the clover OpenCL state tracker.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
José Fonseca [Tue, 15 May 2012 11:27:15 +0000 (12:27 +0100)]
glsl: Fix lower_discard_flow prototype mismatch.
Should fix MSVC link failure.
Eric Anholt [Fri, 4 May 2012 20:09:38 +0000 (13:09 -0700)]
Revert "i965/fs: Jump from discard statements to the end of the program when done."
This reverts commit
31866308fcf989df992ace28b5b986c3d3770e90.
Fixes piglit glsl-fs-discard-exit-3 and unigine tropics rendering.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 4 May 2012 20:08:46 +0000 (13:08 -0700)]
glsl: Implement the GLSL 1.30+ discard control flow rule in GLSL IR.
Previously, I tried implementing this in the i965 driver, but did so
in a way that violated the intent of the spec, and broke Tropics.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 4 May 2012 20:37:08 +0000 (13:37 -0700)]
glsl: Remove the opt_discard_simplification pass.
This conflicts with the GLSL 1.30+ rules for derivatives after a
discard has occurred.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 8 May 2012 17:36:18 +0000 (10:36 -0700)]
i965/fs: Remove the requirement of no dead code for interference checks.
This will be convenient when I want to comment out optimization code
to see the raw program being optimized, but more importantly will let
the interference check be used during optimization.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 8 May 2012 20:01:52 +0000 (13:01 -0700)]
i965/fs: Add support for copy propagation.
We could do more by handling abs/negate and non-GRF sources, but this is
a good start. Improves tropics performance 0.30% +/- .17% (n=43).
shader-db results:
Total instructions: 208032 -> 207184
60/1246 programs affected (4.8%)
23286 -> 22438 instructions in affected programs (3.6% reduction)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 8 May 2012 20:40:44 +0000 (13:40 -0700)]
i965/fs: When doing no work for live interval calculation, do no allocation.
When I had a bug causing the backend to never finish optimizing, it
also sent me deep into swap. This avoids extra memory allocation per
trip through optimization, and thus may reduce the peak memory
allocation of the driver even in the success case.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 10 May 2012 15:49:17 +0000 (08:49 -0700)]
i965/gen7: Set tile_x/y to 0 in the no-stencil case.
Fixes compiler warnings.
Eric Anholt [Thu, 10 May 2012 15:50:14 +0000 (08:50 -0700)]
intel: Fix signed/unsigned comparison warnings.
Eric Anholt [Thu, 10 May 2012 15:46:35 +0000 (08:46 -0700)]
Eric Anholt [Thu, 10 May 2012 15:45:25 +0000 (08:45 -0700)]
Kenneth Graunke [Thu, 10 May 2012 23:10:15 +0000 (16:10 -0700)]
i965/fs: Add a local common subexpression elimination pass.
Total instructions: 18210 -> 17836
49/163 programs affected (30.1%)
12888 -> 12514 instructions in affected programs (2.9% reduction)
This reduces Lightsmark's "Scale down filter" shader from 395
instructions to 283, a whopping 28%. It also reduces register pressure
significantly: the SIMD8 program now uses 29 registers instead of 101,
giving us more than enough room for a SIMD16 program.
v2: Add && !inst->conditional_mod to the "skip some instructions" check.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>