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Mathieu Chartier [Fri, 29 Jul 2016 20:06:45 +0000 (20:06 +0000)]
Revert "Use try lock to fix class resolution race"
This reverts commit
a704eda0078989a73cac111ed309aca50d2e289b.
Bug:
27417671
Bug:
30500547
Change-Id: Ieea05236b9e61c722660cd9497c9d55d13ccd010
Mathieu Chartier [Wed, 13 Jul 2016 16:53:35 +0000 (09:53 -0700)]
Use try lock to fix class resolution race
There was some possible deadlocks related to EnsureResolved caused by
acquiring an object lock.
Scenario:
Thread 1 acquires lock on obj1
Thread 1 begins to resolve / initialize class1
Thread 1 blocks since it sees that class1 is already being resolved and
gets preempted before it can acquire the object lock on class1
Thread 2 finishes resolving and initializing class1 and locks class1
Thread 2 blocks attempting to lock obj1
Thread 1 blocks attempting to lock class1
Deadlock
Fixed the deadlock by changing EnsureResolved to use a try lock for the
unresolved case.
Added a test.
Test: Device boot, test-art-host, monitor_test
Bug:
27417671
Change-Id: Ic6e1c3ca6f45490cf8a7bf8e137dee71ac83ff64
Treehugger Robot [Wed, 27 Jul 2016 18:38:39 +0000 (18:38 +0000)]
Merge "Fix profiling output to properly display class info."
Jeff Hao [Wed, 27 Jul 2016 17:35:03 +0000 (10:35 -0700)]
Fix profiling output to properly display class info.
The profiler stores class def indexes, not type ids.
Change-Id: Ieec9374a2ba381387ed444f376922478183145f8
Mathieu Chartier [Tue, 26 Jul 2016 19:54:28 +0000 (19:54 +0000)]
Merge "Add missing filter cards to zygote mod union table"
Mathieu Chartier [Tue, 26 Jul 2016 00:48:52 +0000 (17:48 -0700)]
Add missing filter cards to zygote mod union table
Without filtering the cards, every object in the zygote is grayed
during the GC. This was deleted in a PS of previous CL.
GrayAllDirtyImmuneObjects goes from 1.974ms to 376.464us for CC on
N9 maps. This happens during the pause. This CL also fixes regression
in zygote PSS.
Bug:
29516968
Bug:
12687968
Change-Id: I42014e78b1de3ce9b2eefa3bd32f0d24e2ff71c6
Treehugger Robot [Mon, 25 Jul 2016 23:27:42 +0000 (23:27 +0000)]
Merge "Improve CC handling for immune objects"
Aart Bik [Mon, 25 Jul 2016 23:13:18 +0000 (23:13 +0000)]
Merge "Remove redundant 601 test, it's all in 600."
Treehugger Robot [Mon, 25 Jul 2016 23:06:39 +0000 (23:06 +0000)]
Merge "runtime: Refactor asm_support to be auto-generated (mostly)"
Mathieu Chartier [Fri, 22 Jul 2016 17:47:45 +0000 (10:47 -0700)]
Improve CC handling for immune objects
Currently we reduce ram for immune objects by racing agianst the
mutators to try and finish processing them before the mutators
change many objects to gray. However there is still a window of time
where the mutator can dirty immune pages by changing the lock words
to gray. These pages remain dirty for the lifetime of the app.
This CL changes uses the FlipCallback pause to gray all of the
immune objects that have a dirty card. Once these objects are all
gray we don't to gray any more objects in the immune spaces since
these objects are the only ones that may reference non immune
objects.
Also only scan objects that are gray when scanning immune spaces to
reduce scanning time.
System wide PSS after boot on N9, before:
61668 kB: .art mmap
11249 kB: .Zygote
After:
36013 kB: .art mmap
12251 kB: .Zygote
Results are better than demonstrated since there are more apps
running after.
Maps PSS / Private Dirty, before:
.art mmap 3703 3116
.Zygote 577 480
After:
.art mmap 1655 1092
.Zygote 476 392
System server before:
.art mmap 4453 3956
.Zygote 849 780
After:
.art mmap 2326 1748
.Zygote 640 564
EAAC:
Before:
ScanImmuneSpaces takes 669.434ms GC time
Scores: 718, 761, 753 average 744
GC time: 4.2s, 4.35s, 4.3s average 4.28s
After:
ScanImmuneSpaces takes 138.328ms GC time
Scores: 731, 730, 704 average 722
GC time: 3.92s, 3.83s, 3.85s average 3.87s
Additional GC pause time is 285us on Maps on N9.
TODO: Reduce this pause time.
Test: N9 booting, test-art-host, EAAC all run with CC
Bug:
29516968
Bug:
12687968
Change-Id: I584b10d017547b321f33eb23fb5d64372af6f69c
Treehugger Robot [Mon, 25 Jul 2016 22:24:42 +0000 (22:24 +0000)]
Merge "ART: Add pointer-size template to some reflection functions"
Igor Murashkin [Fri, 22 Jul 2016 22:59:16 +0000 (15:59 -0700)]
runtime: Refactor asm_support to be auto-generated (mostly)
Usage:
* If the defines are no longer up to date, re-run generate-asm-support
* To add a new field:
--- Edit one of the offset_ or constant def files.
--- Rebuild cpp-define-generator and re-run generate-asm-support
Change-Id: I772430fcf1ad9af40898ebb453848f8412612386
TODO: Integrate this into the build somehow
TODO: Account for 32 vs 64-bit and read barrier vs no read barrier
Aart Bik [Mon, 25 Jul 2016 22:12:24 +0000 (15:12 -0700)]
Remove redundant 601 test, it's all in 600.
Rationale:
Nicolas, I don't understand why you duplicated this test.
Since all (and now more) is in 600, removing this clone.
Change-Id: Ibc8b47549f054972f07b53b1554e7ab4dc0cb33e
Treehugger Robot [Mon, 25 Jul 2016 21:31:19 +0000 (21:31 +0000)]
Merge "Make java 8 run-tests runnable on the RI again."
Treehugger Robot [Mon, 25 Jul 2016 20:18:25 +0000 (20:18 +0000)]
Merge "Launch ahat server before processing the heap dump."
Andreas Gampe [Mon, 25 Jul 2016 20:06:04 +0000 (13:06 -0700)]
ART: Add pointer-size template to some reflection functions
The unstarted runtime may run code for a different pointer size,
even when no transaction is active (e.g., during startup). To
retain performance when the runtime is up and executing under
normal conditions, add a template parameter and use sizeof(void*)
in places where it is adequate.
For maintainability, it is necessary to drop the default for
the transaction template parameter. Implicit conversions from
bool to size_t may lead to incorrect code and hard to diagnose
problems. So instead ensure that all callers must give all
template parameter values.
Test: m test-art-host
Change-Id: I3076883422c8553ede4de5642409c5684a5a9aa8
Treehugger Robot [Mon, 25 Jul 2016 18:44:11 +0000 (18:44 +0000)]
Merge "Fix stream-tracing with default methods"
Aart Bik [Mon, 25 Jul 2016 17:53:51 +0000 (17:53 +0000)]
Merge "Make static helper methods member functions of OptimizingCompiler class"
Alex Light [Tue, 19 Jul 2016 18:21:32 +0000 (11:21 -0700)]
Fix stream-tracing with default methods
Test: Ran mma ART_TEST_TRACE=true ART_TEST_TRACE_STREAM=true -j40 test-art-host
Bug:
30102284
Bug:
30286605
Change-Id: I12f2534bc2d42a7504e6c1972c4cfdda2f77286f
Treehugger Robot [Mon, 25 Jul 2016 17:27:55 +0000 (17:27 +0000)]
Merge "Revert "Revert "ART: Add dex2oat swap usage test"""
Mathieu Chartier [Mon, 25 Jul 2016 16:44:33 +0000 (16:44 +0000)]
Merge "Add fast path to arm64 READ_BARRIER macro"
Andreas Gampe [Mon, 25 Jul 2016 15:27:35 +0000 (08:27 -0700)]
Revert "Revert "ART: Add dex2oat swap usage test""
Now correctly ignores the target (but with enough infrastructure
to introduce this some day).
This reverts commit
ec743ffd47ac9d3c10a449926d78c2eb51e5208e.
Bug:
29259363
Test: m test-art-host-gtest-dex2oat_test
Test: m test-art-target-gtest-dex2oat_test (shamu)
Change-Id: I11b4e755bc8cb1e2eea29cd006e8df67df632c00
Roland Levillain [Mon, 25 Jul 2016 14:49:51 +0000 (14:49 +0000)]
Merge "Do not emit stack maps for runtime calls to ReadBarrierMarkRegX."
Treehugger Robot [Sat, 23 Jul 2016 06:04:13 +0000 (06:04 +0000)]
Merge "Revert "ART: Add dex2oat swap usage test""
Andreas Gampe [Sat, 23 Jul 2016 05:17:18 +0000 (05:17 +0000)]
Revert "ART: Add dex2oat swap usage test"
The test doesn't correctly exclude the target, as it will only work
on the host.
This reverts commit
ab2a54093386c85756fe78daedd11ff4408a5988.
Bug:
29259363
Change-Id: Ie50df2e6f0c63cb10359c3862ad44ee3c03d4e3b
Mathieu Chartier [Thu, 21 Jul 2016 21:59:04 +0000 (14:59 -0700)]
Add fast path to arm64 READ_BARRIER macro
EAAC benchmark time from 978.7857143ms to 969.5714286ms on N9 based
on 42 samples. Reduces artReadBarrierSlow calls from 9M to 1M.
Not a huge improvement since we were already checking the lock word in
ReadBarrier::Barrier.
Test: N9 boots, test-art-host, EEAC runs. (All with CC enabled).
Bug:
30162165
Bug:
12687968
Change-Id: Ifb97b52ea84e21c7df83addfb91c5f05f41db32d
Wojciech Staszkiewicz [Fri, 22 Jul 2016 20:33:11 +0000 (13:33 -0700)]
Make static helper methods member functions of OptimizingCompiler class
Make RunOptimizations, MaybeRunInliner and RunArchOptimizations member
functions of OptimizingCompiler class.
Both versions of RunOptimizations are protected in preparation for
bisection bug search CL.
Change-Id: I596efa9ed3fccd1ed3798c6427cc166e2a5d28bd
Treehugger Robot [Fri, 22 Jul 2016 22:32:08 +0000 (22:32 +0000)]
Merge "ART: Change run-*-tests to ANDROID_{HOST|PRODUCT}_OUT"
Treehugger Robot [Fri, 22 Jul 2016 22:31:37 +0000 (22:31 +0000)]
Merge "ART: Add dex2oat swap usage test"
Treehugger Robot [Fri, 22 Jul 2016 18:43:01 +0000 (18:43 +0000)]
Merge "Combine offsets in loop-based dynamic BCE."
Roland Levillain [Fri, 22 Jul 2016 16:10:06 +0000 (17:10 +0100)]
Do not emit stack maps for runtime calls to ReadBarrierMarkRegX.
* Boot image code size variation on Nexus 5X
(aosp_bullhead-userdebug build):
- total ARM64 framework Oat files size change:
115584120 bytes ->
109124728 bytes (-5.59%)
- total ARM framework Oat files size change:
97387728 bytes ->
92517584 (-5.00%)
Test: ART host and target (ARM, ARM64) tests.
Bug:
29506760
Bug:
12687968
Change-Id: I979d9fb2b4e09f4c0c7bf33af2cd91750a67f989
Aart Bik [Fri, 15 Jul 2016 00:19:43 +0000 (17:19 -0700)]
Combine offsets in loop-based dynamic BCE.
Rationale:
Similar to what I did recently for dom-based dynamic BCE, this
CL combines offsets for the tests generated for loop-based
dynamic BCE. For a set of n references, this reduces the
number of generated tests from 2*n+1 down to at most 4
(in some cases even less).
TEST: 530-checker-loops3
BUG=
27430379
Change-Id: Ic80c2563eaae23f514c1fd52965dd83bccb9d190
Treehugger Robot [Fri, 22 Jul 2016 16:53:29 +0000 (16:53 +0000)]
Merge "ARM64/x86-64: Fix mterp fill-array-data-payload pointer calculation."
Vladimir Marko [Fri, 22 Jul 2016 09:52:24 +0000 (10:52 +0100)]
ARM64/x86-64: Fix mterp fill-array-data-payload pointer calculation.
Fix the pointer calculation to sign-extend the offset
instead of zero-extending it, just like we do for the switch
table pointer calculation. Clean up comments for the switch.
Test: Additional test in 412-new-array.
Change-Id: Ibb1d2d3fcb109f59280aca08de21e42edc4ce66b
Vladimir Marko [Fri, 22 Jul 2016 09:24:41 +0000 (09:24 +0000)]
Merge "ARM64: Improve mterp cmpl/cmpg."
Treehugger Robot [Thu, 21 Jul 2016 23:58:00 +0000 (23:58 +0000)]
Merge changes I295c7876,Ib4b84b7b
* changes:
ART: Remove PACKED from ArtMethod's ptr_sized_fields_
ART: Rename ArtMethod JNI field
Hiroshi Yamauchi [Thu, 21 Jul 2016 23:24:44 +0000 (23:24 +0000)]
Merge "Use non-CAS thread flip root visitor."
Andreas Gampe [Wed, 20 Jul 2016 01:27:17 +0000 (18:27 -0700)]
ART: Remove PACKED from ArtMethod's ptr_sized_fields_
Remove the PACKED(4) hack, as it's highly annoying when debugging
a 64-bit process. Instead, fix the actual offset and size computation
for cross-size accesses.
Test: m test-art-host
Change-Id: I295c78760b74b6a62946e76856f218b4eb159cdc
Andreas Gampe [Thu, 21 Jul 2016 22:36:22 +0000 (15:36 -0700)]
ART: Add dex2oat swap usage test
Add a test that checks that native alloc size goes down when using
swap, as an indication that we're actually effectively using swap.
Bug:
29259363
Test: m test-art-host-gtest-dex2oat_test
Change-Id: Ifa5aef1b97696309283de78be08699a6399a4d1d
Richard Uhler [Thu, 21 Jul 2016 20:52:48 +0000 (13:52 -0700)]
Launch ahat server before processing the heap dump.
Change-Id: Ic8f18ad3010cb0937f5ef68228359258ec4793fd
Test: Manually launch ahat on a large heap dump with ahat already
running. Verify that ahat fails immediately.
Test: Manually launch ahat on a large heap dump without ahat already
running. Verify that visiting localhost:7100 immediately
eventually resolves to the overview page rather than say the
site can't be reached.
Bug:
28611294
Hiroshi Yamauchi [Thu, 21 Jul 2016 03:25:27 +0000 (20:25 -0700)]
Use non-CAS thread flip root visitor.
We don't need to use CAS to update the thread-local GC roots for the
thread flip.
Bug:
12687968
Bug:
29517059
Test: libartd.so boot. ART tests. Ritzperf EAAC.
Change-Id: Ia2acab824f756bd7d2ad501b2040233e0d394356
Andreas Gampe [Tue, 19 Jul 2016 15:06:07 +0000 (08:06 -0700)]
ART: Rename ArtMethod JNI field
The field is multi-purpose, rename it to data and clean up
accessors in preparation of more checks.
Test: m test-art-host
Change-Id: Ib4b84b7b1a51ca201544bc488ce8770aa858c7fd
Treehugger Robot [Thu, 21 Jul 2016 18:26:27 +0000 (18:26 +0000)]
Merge "ART: Make run-test temp dir consistent"
Andreas Gampe [Thu, 21 Jul 2016 04:09:29 +0000 (21:09 -0700)]
ART: Make run-test temp dir consistent
We use the username as a directory component in run-test. Use the
same when driven through the Makefile.
Drop the username in run-test when TMP_DIR is set.
Test: m test-art-host-run-test
Test: art/test/run-test --host 001-HelloWorld
Change-Id: I060997ffbd80cd4da30dd6ac8d3954641de3292b
Mathieu Chartier [Thu, 21 Jul 2016 16:52:44 +0000 (16:52 +0000)]
Merge "Add a way to measure read barrier slow paths"
Vladimir Marko [Thu, 21 Jul 2016 11:59:46 +0000 (12:59 +0100)]
ARM64: Improve mterp cmpl/cmpg.
Use CSET+CNEG instead of MOV+CNEG+CSEL. Prefer the
CNEG/CSET alias over the CSNEG/CSINC for readability.
Test: Run ART test suite on Nexus 9 with the interpreter.
Change-Id: I5c4fb0cf2c053904253e8e82f3e7e05c774b0583
Treehugger Robot [Thu, 21 Jul 2016 14:19:33 +0000 (14:19 +0000)]
Merge "Change return type of artIsAssignableFromCode for MIPS64"
Roland Levillain [Thu, 21 Jul 2016 14:17:40 +0000 (14:17 +0000)]
Merge "Fix the definition of MACRO_LITERAL for OS X on x86-64."
Roland Levillain [Tue, 5 Jul 2016 17:55:32 +0000 (18:55 +0100)]
Fix the definition of MACRO_LITERAL for OS X on x86-64.
Test: "ART_USE_READ_BARRIER=true mmma art" on OS X.
Change-Id: Ia2d4c7a3eb7fec346ddfa4c7b0f7b700f1137344
Goran Jakovljevic [Thu, 21 Jul 2016 12:21:46 +0000 (14:21 +0200)]
Change return type of artIsAssignableFromCode for MIPS64
This has been missed by Ic505befc6c94e2dccbc8abf2b13d4c2d662e68d1.
This fixes MIPS64 build.
Bug:
30232671
Test: make -j 32 out/target/product/generic_mips64/obj/SHARED_LIBRARIES/libart_intermediates/arch/mips64/entrypoints_init_mips64.o
Change-Id: Iec89d25e2d38c6efc0d1025767d0ac2a8bdb7dcd
Roland Levillain [Thu, 21 Jul 2016 12:11:15 +0000 (12:11 +0000)]
Merge "Move caller-saves saving/restoring to ReadBarrierMarkRegX."
Vladimir Marko [Thu, 21 Jul 2016 10:33:13 +0000 (10:33 +0000)]
Merge "Clean up Class::FindStaticField()."
Roland Levillain [Wed, 20 Jul 2016 10:32:19 +0000 (11:32 +0100)]
Move caller-saves saving/restoring to ReadBarrierMarkRegX.
Instead of saving/restoring live caller-save registers
before/after the call to read barrier mark entry points
ReadBarrierMarkRegX, have these entry points save/restore
all the caller-save registers themselves (except register
rX, which contains the return value).
Also refactor the assembly code of these entry points
using macros.
* Boot image code size variation on Nexus 5X
(aosp_bullhead-userdebug build):
- total ARM64 framework Oat files size change:
119196792 bytes ->
115575920 bytes (-3.04%)
- total ARM framework Oat files size change:
100435212 bytes ->
97621188 bytes (-2.80%)
* Benchmarks (ARM64) score variations on Nexus 5X
(aosp_bullhead-userdebug build):
- RitzPerf (lower is better)
- average score difference: -2.71%
- CaffeineMark (higher is better)
- no real difference for most tests
(absolute variation lower than 1%)
- better score on the "Method" benchmark:
score variation 41253 -> 44891 (+8.82%)
Test: ART host and target (ARM, ARM64) tests.
Bug:
29506760
Bug:
12687968
Change-Id: I881bf73139a3f1c2bee9ffc6fc8c00f9a392afa6
Vladimir Marko [Thu, 21 Jul 2016 09:17:15 +0000 (09:17 +0000)]
Merge "ARM: Port instr simplification of array accesses."
Artem Serov [Wed, 6 Jul 2016 15:23:04 +0000 (16:23 +0100)]
ARM: Port instr simplification of array accesses.
After changing the addressing mode for array accesses (in
https://android-review.googlesource.com/248406) the 'add'
instruction that calculates the base address for the array can be
shared across accesses to the same array.
Before https://android-review.googlesource.com/248406:
add IP, r[Array], r[Index0], LSL #2
ldr r0, [IP, #12]
add IP, r[Array], r[Index1], LSL #2
ldr r0, [IP, #12]
Before this CL:
add IP. r[Array], #12
ldr r0, [IP, r[Index0], LSL #2]
add IP. r[Array], #12
ldr r0, [IP, r[Index1], LSL #2]
After this CL:
add IP. r[Array], #12
ldr r0, [IP, r[Index0], LSL #2]
ldr r0, [IP, r[Index1], LSL #2]
Link to the original optimization:
https://android-review.googlesource.com/#/c/127310/
Test: Run ART test suite on Nexus 6.
Change-Id: Iee26f9a0a7ca46abb90e3f60d19d22dc8dee4d8f
Vladimir Marko [Thu, 21 Jul 2016 09:15:23 +0000 (09:15 +0000)]
Merge changes Ibcc11ce7,I9867dc11
* changes:
ARM64: Improve Mterp.
ARM64: Fix mterp switch table pointer calculation.
Mathieu Chartier [Thu, 14 Jul 2016 20:30:03 +0000 (13:30 -0700)]
Add a way to measure read barrier slow paths
If enabled, this option counts number of slow paths, measures the
total slow path time per GC and records the info into a histogram.
Also added support for systrace to see which threads are performing
slow paths.
Added runtime option -Xgc:measure to enable. The info is dumped
for SIGQUIT.
Test: Volantis boot with CC, test-art-host with CC, run EEAC with CC
and -Xgc:measure
Bug:
30162165
Change-Id: I3c2bdb4156065249c45695f13c77c0579bc8e57a
Treehugger Robot [Thu, 21 Jul 2016 00:04:52 +0000 (00:04 +0000)]
Merge "Revert "Revert "Refactor GetIMTIndex"""
Treehugger Robot [Wed, 20 Jul 2016 22:08:47 +0000 (22:08 +0000)]
Merge "Make stream tracing have a higher thread count on host"
Alex Light [Wed, 20 Jul 2016 17:43:39 +0000 (10:43 -0700)]
Make stream tracing have a higher thread count on host
Test: mma ART_TEST_TRACE_STREAM=true -j40 test-art-host-run-test-debug-prebuild-optimizing-relocate-stream-cms-checkjni-image-npictest-ndebuggable-001-HelloWorld32
Bug:
30229615
Change-Id: Id396f569b9e21ff764562005624aabc964d4e95a
Treehugger Robot [Wed, 20 Jul 2016 20:38:30 +0000 (20:38 +0000)]
Merge "Refactor register allocation to be pluggable"
Treehugger Robot [Wed, 20 Jul 2016 19:42:28 +0000 (19:42 +0000)]
Merge "Fix accidental pass-by-value"
Treehugger Robot [Wed, 20 Jul 2016 18:22:10 +0000 (18:22 +0000)]
Merge changes I328ea51d,I577c5d02
* changes:
Compute oat and odex filenames eagerly.
Make a static OatFileAssistant::DexLocationToOatFileName function.
Vladimir Marko [Wed, 20 Jul 2016 13:25:30 +0000 (14:25 +0100)]
ARM64: Improve Mterp.
Several straight-forward optimizations:
- use ubfx instead of SHR+AND,
- do not mask shifting distance,
- use 64-bit LDRSH to avoid subsequent sign extension,
- use CBNZ instead of CMP+BNE for null checks,
- style: use SXTW alias instead of explicit SBFM.
Test: Run ART test suite on Nexus 9 with the interpreter.
Change-Id: Ibcc11ce7f455432ecb789f727da21f269f8370f0
Vladimir Marko [Wed, 20 Jul 2016 16:52:51 +0000 (17:52 +0100)]
ARM64: Fix mterp switch table pointer calculation.
Do not mix 32-bit and 64-bit registers with
add x0, xPC, w0, lsl #1
that ends up compiled as
add x0, xPC, w0, uxtx #1
instead of the required sxtx. Just sing-extend the offset
correctly in previous instructions.
Test: Additional test in 501-regression-packed-switch.
Change-Id: I9867dc1180743e98f9707a312241d2f5b726ca8c
Matthew Gharrity [Wed, 20 Jul 2016 17:13:45 +0000 (10:13 -0700)]
Fix accidental pass-by-value
Change-Id: I245111eabb43368875c1215ca4f3a1f1918492fe
Matthew Gharrity [Thu, 14 Jul 2016 20:24:00 +0000 (13:24 -0700)]
Refactor register allocation to be pluggable
Allow alternate register allocation strategies to be implemented
in subclasses of a common register allocation base class.
Test: m test-art-host
Change-Id: I7c5866aa9ddff8f53fcaf721bad47654ab221b4f
Vladimir Marko [Wed, 20 Jul 2016 12:01:15 +0000 (12:01 +0000)]
Merge "ART: Change return types of field access entrypoints"
Nicolas Geoffray [Wed, 20 Jul 2016 10:53:11 +0000 (10:53 +0000)]
Merge "Fix test after rename."
Nicolas Geoffray [Wed, 20 Jul 2016 10:49:47 +0000 (11:49 +0100)]
Fix test after rename.
bug:
29964720
Change-Id: I37cebc40ca83597b159eefbc492e8cc105996306
Andreas Gampe [Wed, 20 Jul 2016 05:34:53 +0000 (22:34 -0700)]
ART: Change return types of field access entrypoints
Ensure that return types guarantee full-width data as the compiled
code and mterp expect by using size_t and ssize_t.
This fixes Clang no longer sign-/zero-extending small return types.
Bug:
30232671
Test: m ART_TEST_RUN_TEST_NDEBUG=true ART_TEST_INTERPRETER=true test-art-host-run-test
Change-Id: Ic505befc6c94e2dccbc8abf2b13d4c2d662e68d1
Nicolas Geoffray [Wed, 20 Jul 2016 10:30:09 +0000 (10:30 +0000)]
Merge "JIT: Don't update the dex cache of another class loader."
Vladimir Marko [Wed, 20 Jul 2016 09:20:55 +0000 (09:20 +0000)]
Merge "ARM: Change mem address mode for array accesses."
Artem Serov [Mon, 11 Jul 2016 13:02:34 +0000 (14:02 +0100)]
ARM: Change mem address mode for array accesses.
Switch from:
add IP, r[Array], r[Index], LSL #2
ldr r0, [IP, #12]
To:
add IP. r[Array], #12
ldr r0, [IP, r[Index], LSL #2]
These is a base for the future TryExtractArrayAccessAddress
optimization port to arm.
Test: aosp_shamu-userdebug boots and passes "m test-art-target".
Change-Id: I6ab01ba3271a8f79599ddd91a6b63cd1b37d2d67
Treehugger Robot [Wed, 20 Jul 2016 00:02:38 +0000 (00:02 +0000)]
Merge "Refactor SSA deconstruction into its own class"
Treehugger Robot [Tue, 19 Jul 2016 22:07:57 +0000 (22:07 +0000)]
Merge "Tune the GC ergnomics for the read barrier config."
Stephen Hines [Tue, 19 Jul 2016 22:02:31 +0000 (22:02 +0000)]
Merge "Disable warnings triggered in Clang r271374"
Matthew Gharrity [Tue, 19 Jul 2016 21:32:52 +0000 (21:32 +0000)]
Revert "Revert "Refactor GetIMTIndex""
Originally reverted in order to revert
https://android-review.googlesource.com/#/c/244190/
but can now be merged again.
This reverts commit
d4ceecc85a5aab2ec23ea1bd010692ba8c8aaa0c.
Test: m test-art-host
Change-Id: Id9205f2b77a378fc0f06088e78c66e81a49f712d
Matthew Gharrity [Mon, 18 Jul 2016 20:38:44 +0000 (13:38 -0700)]
Refactor SSA deconstruction into its own class
Test: m test-art-host
Change-Id: Ie82c2802f76f27512ef922ba583caeccf5675063
Pirama Arumuga Nainar [Tue, 28 Jun 2016 17:51:10 +0000 (10:51 -0700)]
Disable warnings triggered in Clang r271374
http://b/
28149048
http://b/
29823425
Disable -Wconstant-conversion and -Wundefined-var-template. The second
bug above tracks that these warnings get reenabled.
Test: Tested build, boot and common usage for Arm, Arm64, x86, x86_64,
Mips images in AOSP and internal branch.
Change-Id: Iea20cf6b5dbec3247b55cf8130f88202e786e367
Hiroshi Yamauchi [Tue, 19 Jul 2016 00:07:26 +0000 (17:07 -0700)]
Tune the GC ergnomics for the read barrier config.
Add 1.0 to the heap growth multiplier for the read barrier config, which
reduces the GC frequency down to roughly the same as CMS in one of the
jank tests.
Bug:
29517059
Bug:
12687968
Test: ART run-tests.
Change-Id: I1302a2f17e862f152d2f92bc06a65c9e6defcba0
Nicolas Geoffray [Tue, 19 Jul 2016 16:06:23 +0000 (17:06 +0100)]
JIT: Don't update the dex cache of another class loader.
This only works for properly delegating class loaders. But Java allows
non-delegating ones :(
bug:
29964720
Change-Id: I8b785e6cdfe9a2b77322521a02b8e59ec332ad83
test:612-jit-dex-cache
Richard Uhler [Tue, 19 Apr 2016 20:24:41 +0000 (13:24 -0700)]
Compute oat and odex filenames eagerly.
Because we almost always need both of them anyway, and they aren't
expensive to compute.
Test: oat file assistant tests.
Change-Id: I328ea51da6eb8700329f829a0458b02e12d1ee9e
Richard Uhler [Tue, 19 Apr 2016 20:08:04 +0000 (13:08 -0700)]
Make a static OatFileAssistant::DexLocationToOatFileName function.
So that you can figure out an oat file name without instantiating an
OatFileAssistant object.
Test: oat file assistant tests.
Change-Id: I577c5d02225f926086e9833d45b88d8a92db52fa
Vladimir Marko [Tue, 19 Jul 2016 12:37:33 +0000 (12:37 +0000)]
Merge "ARM: Fix shifted register offset mem address mode for load signed."
Artem Serov [Mon, 11 Jul 2016 13:00:46 +0000 (14:00 +0100)]
ARM: Fix shifted register offset mem address mode for load signed.
For example 'ldrsh r0, [sp, r1, LSL #2]' previously
was assembled as 'ldrh'.
Test: New test in assembler_thumb2_test.cc .
Change-Id: I1d30724f0c2745b131876bffefdc0a780d76f6a1
Treehugger Robot [Mon, 18 Jul 2016 22:53:44 +0000 (22:53 +0000)]
Merge "Do allocation fence before pushing on allocation stack"
Andreas Gampe [Mon, 18 Jul 2016 21:56:56 +0000 (14:56 -0700)]
ART: Change run-*-tests to ANDROID_{HOST|PRODUCT}_OUT
Use ANDROID_{HOST|PRODUCT}_OUT to allow OUT_DIR and OUT_DIR_COMMON_BASE
usage.
Change-Id: Ia091b9be5153518ef58fc7686cb77669e7c1ca54
Test: art/tools/run-jdwp-tests
Test: art/tools/run-libcore-tests --mode=host
Mathieu Chartier [Mon, 18 Jul 2016 18:11:45 +0000 (11:11 -0700)]
Do allocation fence before pushing on allocation stack
Heap::VisitObjects relies on having valid classes for objects in
the allocation stack. If the writes reorder, the thread calling
VisitObjects could see the free list pointer instead of the class
of the object. I believe this is causing crashes in VisitObjects.
Bug:
28790624
Test: Volantis booted
Change-Id: I0f2d4097de1ef3f5caf670ecc977d4d6837872ca
Treehugger Robot [Mon, 18 Jul 2016 19:35:11 +0000 (19:35 +0000)]
Merge "Rename current register allocator implementation"
Treehugger Robot [Mon, 18 Jul 2016 18:49:56 +0000 (18:49 +0000)]
Merge "ART: Fix run-test script"
Andreas Gampe [Sat, 25 Jun 2016 05:30:29 +0000 (22:30 -0700)]
ART: Fix run-test script
Don't assume out is under BUILD_TOP.
Test: run-test with OUT_DIR_COMMON_BASE set
Change-Id: Iba408e807e6a15ff60de54d6d4d653814d4b11d0
Roland Levillain [Mon, 18 Jul 2016 15:40:34 +0000 (15:40 +0000)]
Merge "MIPS64: Highest/Lowest Bit Intrinsic Support"
Roland Levillain [Mon, 18 Jul 2016 15:07:19 +0000 (15:07 +0000)]
Merge "Fix the build with respect to new VIXL."
Roland Levillain [Mon, 18 Jul 2016 15:03:05 +0000 (16:03 +0100)]
Fix the build with respect to new VIXL.
Test: Build ART for ARM64.
Change-Id: I2a9ebf145c61db9f8ceec6616963bac3ad5a7eb9
Roland Levillain [Mon, 18 Jul 2016 14:28:05 +0000 (14:28 +0000)]
Merge "Fixes to build against new VIXL interface."
Nicolas Geoffray [Mon, 18 Jul 2016 12:16:46 +0000 (12:16 +0000)]
Merge "Add a new control flow simplifier."
Treehugger Robot [Mon, 18 Jul 2016 11:19:14 +0000 (11:19 +0000)]
Merge "ARM64: Improve code generated to spill/restore for slow paths."
Alexandre Rames [Fri, 15 Jul 2016 16:41:13 +0000 (17:41 +0100)]
ARM64: Improve code generated to spill/restore for slow paths.
Aligning the accesses allows generating better code.
Before:
add x16, sp, #0x44 (68)
stp x0, x1, [x16, #-16]
After:
stp x0, x1, [sp, #56]
Change-Id: I3e20ad3fa59d00aee4b4d14ea9d59c7cd546509e
Nicolas Geoffray [Fri, 15 Jul 2016 09:46:17 +0000 (10:46 +0100)]
Add a new control flow simplifier.
Run it in the dead code elimination phase, as it relates to
creating dead branches.
From 0.04 to 0.07% less code size framework/gms/docs/fb (70K saved on fb)
3%-5% runtime performance improvements on Richards/DeltaBlue/Ritz.
Compile-time is mixed, so in the noise (from 2% slower to 1% faster).
test:611-checker-simplify-if
Change-Id: Ife8b7882d57b5481f5ca9dc163beba655d7e78bf