OSDN Git Service
Diana Picus [Thu, 13 Dec 2018 12:06:54 +0000 (12:06 +0000)]
[ARM GlobalISel] Support exts and truncs for Thumb2
Mark G_SEXT, G_ZEXT and G_ANYEXT to 32 bits as legal and add support for
them in the instruction selector. This uses handwritten code again
because the patterns that are generated with TableGen are tuned for what
the DAG combiner would produce and not for simple sext/zext nodes.
Luckily, we only need to update the opcodes to use the Thumb2 variants,
everything else can be reused from ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349026
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Simon Pilgrim [Thu, 13 Dec 2018 11:20:48 +0000 (11:20 +0000)]
[TargetLowering] Add ISD::ROTL/ROTR vector expansion
Move existing rotation expansion code into TargetLowering and set it up for vectors as well.
Ideally this would share more of the funnel shift expansion, but we handle the shift amount modulo quite differently at the moment.
Begun removing x86 vector rotate custom lowering to use the expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349025
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Alex Bradbury [Thu, 13 Dec 2018 10:49:05 +0000 (10:49 +0000)]
[RISCV] Add support for the various RISC-V FMA instruction variants
Adds support for the various RISC-V FMA instructions (fmadd, fmsub, fnmsub, fnmadd).
The criteria for choosing whether a fused add or subtract is used, as well as
whether the product is negated or not, is whether some of the arguments to the
llvm.fma.* intrinsic are negated or not. In the tests, extraneous fadd
instructions were added to avoid the negation being performed using a xor
trick, which prevented the proper FMA forms from being selected and thus
tested.
The FMA instruction patterns might seem incorrect (e.g., fnmadd: -rs1 * rs2 -
rs3), but they should be correct. The misleading names were inherited from
MIPS, where the negation happens after computing the sum.
The llvm.fmuladd.* intrinsics still do not generate RISC-V FMA instructions,
as that depends on TargetLowering::isFMAFasterthanFMulAndFAdd.
Some comments in the test files about what type of instructions are there
tested were updated, to better reflect the current content of those test
files.
Differential Revision: https://reviews.llvm.org/D54205
Patch by Luís Marques.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349023
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Arnaud A. de Grandmaison [Thu, 13 Dec 2018 10:31:32 +0000 (10:31 +0000)]
[AArch64] Catch some more CMN opportunities.
Fixes https://bugs.llvm.org/show_bug.cgi?id=33486
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349022
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Clement Courbet [Thu, 13 Dec 2018 09:56:19 +0000 (09:56 +0000)]
[CodeGen] Allow mempcy/memset to generate small overlapping stores.
Summary:
All targets either just return false here or properly model `Fast`, so I
don't think there is any reason to prevent CodeGen from doing the right
thing here.
Subscribers: nemanjai, javed.absar, eraman, jsji, llvm-commits
Differential Revision: https://reviews.llvm.org/D55365
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349016
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Vitaly Buka [Thu, 13 Dec 2018 09:47:39 +0000 (09:47 +0000)]
[asan] Don't check ODR violations for particular types of globals
Summary:
private and internal: should not trigger ODR at all.
unnamed_addr: current ODR checking approach fail and rereport false violation if
a linker merges such globals
linkonce_odr, weak_odr: could cause similar problems and they are already not
instrumented for ELF.
Reviewers: eugenis, kcc
Subscribers: kubamracek, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D55621
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349015
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Matt Arsenault [Thu, 13 Dec 2018 08:27:48 +0000 (08:27 +0000)]
AMDGPU/GlobalISel: Legalize f64 fadd/fmul
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349014
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Matt Arsenault [Thu, 13 Dec 2018 08:23:56 +0000 (08:23 +0000)]
Fix missing C++ mode comment in header
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349013
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Matt Arsenault [Thu, 13 Dec 2018 08:23:51 +0000 (08:23 +0000)]
AMDGPU/GlobalISel: RegBankSelect some simple operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349012
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Matt Arsenault [Thu, 13 Dec 2018 08:11:45 +0000 (08:11 +0000)]
AMDGPU/GlobalISel: Test cleanups
Remove IR and registers sections
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349011
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Craig Topper [Thu, 13 Dec 2018 06:14:25 +0000 (06:14 +0000)]
[X86] Remove assert leftover from when i1 was a legal type. Add more accurate assert. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349007
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Stanislav Mekhanoshin [Thu, 13 Dec 2018 05:52:11 +0000 (05:52 +0000)]
[AMDGPU] Fix build failure, second attempt
Some compilers complain that variable is captured and some
complain when it is not. Switch to [&].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349006
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Stanislav Mekhanoshin [Thu, 13 Dec 2018 05:21:25 +0000 (05:21 +0000)]
[AMDGPU] Fix build failure
Fixed error 'lambda capture 'CondReg' is not required to be captured
for this use'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349005
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Stanislav Mekhanoshin [Thu, 13 Dec 2018 03:17:40 +0000 (03:17 +0000)]
[AMDGPU] Simplify negated condition
Optimize sequence:
%sel = V_CNDMASK_B32_e64 0, 1, %cc
%cmp = V_CMP_NE_U32 1, %1
$vcc = S_AND_B64 $exec, %cmp
S_CBRANCH_VCC[N]Z
=>
$vcc = S_ANDN2_B64 $exec, %cc
S_CBRANCH_VCC[N]Z
It is the negation pattern inserted by DAGCombiner::visitBRCOND() in the
rebuildSetCC().
Differential Revision: https://reviews.llvm.org/D55402
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349003
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David L. Jones [Thu, 13 Dec 2018 03:15:11 +0000 (03:15 +0000)]
Revert r348645 - "[MemCpyOpt] memset->memcpy forwarding with undef tail"
This revision caused trucated memsets for structs with padding. See:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20181210/610520.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349002
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Davide Italiano [Thu, 13 Dec 2018 01:11:52 +0000 (01:11 +0000)]
[LoopUtils] Prefer a set over a map. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348999
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Philip Reames [Thu, 13 Dec 2018 00:54:05 +0000 (00:54 +0000)]
[test] Add a set of test for constant folding deopt operands with CVP
For anyone curious, the first test example is illustrative of a real code idiom produced by branching on the result of a three way comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348997
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Shoaib Meenai [Thu, 13 Dec 2018 00:08:25 +0000 (00:08 +0000)]
[Support] Fix FileNameLength passed to SetFileInformationByHandle
The rename_internal function used for Windows has a minor bug where the
filename length is passed as a character count instead of a byte count.
Windows internally ignores this field, but other tools that hook NT
api's may use the documented behavior:
MSDN documentation specifying the size should be in bytes:
https://docs.microsoft.com/en-us/windows/desktop/api/winbase/ns-winbase-_file_rename_info
Patch by Ben Hillis.
Differential Revision: https://reviews.llvm.org/D55624
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348995
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Shoaib Meenai [Wed, 12 Dec 2018 23:57:21 +0000 (23:57 +0000)]
[gn build] Fix defines define on Windows
On Windows, we won't go into the `host_os != "win"` block, so `defines`
won't have been defined, and we'll run into an undefined identifier
error when we try to later append to it. Unconditionally define it at
the start and append to it everywhere else.
Differential Revision: https://reviews.llvm.org/D55617
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348993
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Daniel Sanders [Wed, 12 Dec 2018 23:48:13 +0000 (23:48 +0000)]
[globalisel] Add GISelChangeObserver::changingInstr()
Summary:
In addition to knowing that an instruction is changed. It's also useful to
know when it's about to change. For example, it might print the instruction so
you can track the changes in a debug log, it might remove it from some queue
while it's being worked on, or it might want to change several instructions as
a single transaction and act on all the changes at once.
Added changingInstr() to all existing uses of changedInstr()
Reviewers: aditya_nandakumar
Reviewed By: aditya_nandakumar
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D55623
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348992
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Sam Clegg [Wed, 12 Dec 2018 23:40:58 +0000 (23:40 +0000)]
[WebAssembly] Update dylink section parsing
This updates the format of the dylink section in accordance with
recent "spec" change:
https://github.com/WebAssembly/tool-conventions/pull/77
Differential Revision: https://reviews.llvm.org/D55609
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348989
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Davide Italiano [Wed, 12 Dec 2018 23:32:35 +0000 (23:32 +0000)]
[LoopDeletion] Update debug values after loop deletion.
When loops are deleted, we don't keep track of variables modified inside
the loops, so the DI will contain the wrong value for these.
e.g.
int b() {
int i;
for (i = 0; i < 2; i++)
;
patatino();
return a;
-> 6 patatino();
7 return a;
8 }
9 int main() { b(); }
(lldb) frame var i
(int) i = 0
We mark instead these values as unavailable inserting a
@llvm.dbg.value(undef to make sure we don't end up printing an incorrect
value in the debugger. We could consider doing something fancier,
for, e.g. constants, in the future.
PR39868.
rdar://problem/
46418795)
Differential Revision: https://reviews.llvm.org/D55299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348988
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Nikita Popov [Wed, 12 Dec 2018 23:19:03 +0000 (23:19 +0000)]
[InstCombine] Fix negative GEP offset evaluation for 32-bit pointers
This fixes https://bugs.llvm.org/show_bug.cgi?id=39908.
The evaluateGEPOffsetExpression() function simplifies GEP offsets for
use in comparisons against zero, basically by converting X*Scale+Offset==0
to X+Offset/Scale==0 if Scale divides Offset. However, before this is done,
Offset is masked down to the pointer size. This results in incorrect
results for negative Offsets, because we basically end up dividing the
32-bit offset *zero* extended to 64-bit bits (rather than sign extended).
Fix this by explicitly sign extending the truncated value.
Differential Revision: https://reviews.llvm.org/D55449
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348987
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Fangrui Song [Wed, 12 Dec 2018 22:46:37 +0000 (22:46 +0000)]
[llvm-objcopy] Change Segment::Type from uint64_t to uint32_t
Summary:
In both Elf{32,64}_Phdr, the field Elf{32,64}_World p_type is uint32_t.
Also reorder the fields to be similar to Elf64_Phdr (which is different
from Elf32_Phdr but quite similar).
Reviewers: rupprecht, jhenderson, jakehehrlich, alexshap, espindola
Reviewed By: rupprecht
Subscribers: emaste, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D55618
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348985
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Ryan Prichard [Wed, 12 Dec 2018 22:45:06 +0000 (22:45 +0000)]
[hwasan] Android: Switch from TLS_SLOT_TSAN(8) to TLS_SLOT_SANITIZER(6)
Summary:
The change is needed to support ELF TLS in Android. See D55581 for the
same change in compiler-rt.
Reviewers: srhines, eugenis
Reviewed By: eugenis
Subscribers: srhines, llvm-commits
Differential Revision: https://reviews.llvm.org/D55592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348983
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Sanjay Patel [Wed, 12 Dec 2018 22:11:05 +0000 (22:11 +0000)]
[PhaseOrdering] add test for funnel shift (rotate); NFC
As mentioned in D55604, there are 2 bugs here:
1. The new pass manager is speculating wildly by default.
2. The old pass manager is not converting this to funnel shift.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348980
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Daniel Sanders [Wed, 12 Dec 2018 21:32:01 +0000 (21:32 +0000)]
[globalisel] Rename GISelChangeObserver's erasedInstr() to erasingInstr() and related nits. NFC
Summary:
There's little of interest that can be done to an already-erased instruction.
You can't inspect it, write it to a debug log, etc. It ought to be notification
that we're about to erase it. Rename the function to clarify the timing of the
event and reflect current usage.
Also fixed one case where we were trying to print an erased instruction.
Reviewers: aditya_nandakumar
Reviewed By: aditya_nandakumar
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D55611
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348976
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Craig Topper [Wed, 12 Dec 2018 21:21:31 +0000 (21:21 +0000)]
[X86] Don't emit MULX by default with BMI2
MULX has somewhat improved register allocation constraints compared to the legacy MUL instruction. Both output registers are encoded instead of fixed to EAX/EDX, but EDX is used as input. It also doesn't touch flags. Unfortunately, the encoding is longer.
Prefering it whenever BMI2 is enabled is probably not optimal. Choosing it should somehow be a function of register allocation constraints like converting adds to three address. gcc and icc definitely don't pick MULX by default. Not sure what if any rules they have for using it.
Differential Revision: https://reviews.llvm.org/D55565
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348975
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David Blaikie [Wed, 12 Dec 2018 21:15:48 +0000 (21:15 +0000)]
Fix for llvm-dwarfdump changes for subroutine types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348974
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Craig Topper [Wed, 12 Dec 2018 20:50:24 +0000 (20:50 +0000)]
[X86] Move stack folding test for MULX to a MIR test. Add a MULX32 case as well
A future patch may stop using MULX by default so use MIR to ensure we're always testing MULX.
Add the 32-bit case that we couldn't do in the 64-bit mode IR test due to it being promoted to a 64-bit mul.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348972
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Aakanksha Patil [Wed, 12 Dec 2018 20:49:17 +0000 (20:49 +0000)]
[AMDGPU] Support for "uniform-work-group-size" attribute
Updated the annotate-kernel-features pass to support the propagation of uniform-work-group attribute from the kernel to the called functions. Once this pass is run, all kernels, even the ones which initially did not have the attribute, will be able to indicate weather or not they have uniform work group size depending on the value of the attribute.
Differential Revision: https://reviews.llvm.org/D50200
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348971
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Saleem Abdulrasool [Wed, 12 Dec 2018 20:35:47 +0000 (20:35 +0000)]
Support: use internal `call_once` on PPC64le
Use the replacement execute once threading support in LLVM for PPC64le. It
seems that GCC does not define `__ppc__` and so we would actually call out to
the C++ runtime there which is not what the current code intended. Check both
`__ppc__` and `__PPC__`. This avoids the need for checking the endianness.
Thanks to nemanjai for the hint about GCC's behaviour and the fact that the
reviewed condition could be simplified.
Original patch by Sarvesh Tamba!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348970
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Simon Pilgrim [Wed, 12 Dec 2018 19:56:38 +0000 (19:56 +0000)]
[X86] Added missing constant pool checks. NFCI.
So the extra checks in D55600 don't look like a regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348966
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David Blaikie [Wed, 12 Dec 2018 19:53:03 +0000 (19:53 +0000)]
DebugInfo/DWARF: Pretty print subroutine types
Doesn't handle varargs and other fun things, but it's a start. (also
doesn't print these strictly as valid C++ when it's a pointer to
function, it'll print as "void(int)*" instead of "void (*)(int)")
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348965
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Scott Linder [Wed, 12 Dec 2018 19:39:27 +0000 (19:39 +0000)]
[AMDGPU] Emit MessagePack HSA Metadata for v3 code object
Continue to present HSA metadata as YAML in ASM and when output by tools
(e.g. llvm-readobj), but encode it in Messagepack in the code object.
Differential Revision: https://reviews.llvm.org/D48179
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348963
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David Blaikie [Wed, 12 Dec 2018 19:34:02 +0000 (19:34 +0000)]
DebugInfo/DWARF: Improve dumping of pointers to members ('int foo::*' rather than 'int*')
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348962
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David Blaikie [Wed, 12 Dec 2018 19:33:08 +0000 (19:33 +0000)]
DebugInfo/DWARF: Refactor type dumping to dump types, rather than DIEs that reference types
This lays the foundation for dumping types not referenced by DW_AT_type
attributes (in the near-term, that'll be DW_AT_containing_type for a
DW_TAG_ptr_to_member_type - in the future, potentially dumping the
pretty printed name next to the DW_TAG for the type, rather than only
when the type is referenced from elsewhere)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348961
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David Blaikie [Wed, 12 Dec 2018 19:23:55 +0000 (19:23 +0000)]
DebugInfo/DWARF: Refactor getAttributeValueAsReferencedDie to accept a DWARFFormValue
Save searching for the attribute again when you already have the
DWARFFormValue at hand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348960
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Craig Topper [Wed, 12 Dec 2018 19:20:21 +0000 (19:20 +0000)]
[X86] Emit SBB instead of SETCC_CARRY from LowerSELECT. Break false dependency on the SBB input.
I'm hoping we can just replace SETCC_CARRY with SBB. This is another step towards that.
I've explicitly used zero as the input to the setcc to avoid a false dependency that we've had with the SETCC_CARRY. I changed one of the patterns that used NEG to instead use an explicit compare with 0 on the LHS. We needed the zero anyway to avoid the false dependency. The negate would clobber its input register. By using a CMP we can avoid that which could be useful.
Differential Revision: https://reviews.llvm.org/D55414
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348959
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Simon Pilgrim [Wed, 12 Dec 2018 19:01:39 +0000 (19:01 +0000)]
Fix Wdocumentation warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348958
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Florian Hahn [Wed, 12 Dec 2018 18:55:14 +0000 (18:55 +0000)]
[ConstantFold] Use getMinSignedBits for APInt in isIndexInRangeOfArrayType.
Indices for getelementptr can be signed so we should use
getMinSignedBits instead of getActiveBits here. The function later calls
getSExtValue to get the int64_t value, which also checks
getMinSignedBits.
This fixes https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=11647.
Reviewers: mssimpso, efriedma, davide
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D55536
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348957
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Simon Pilgrim [Wed, 12 Dec 2018 18:53:12 +0000 (18:53 +0000)]
[X86] Added missing constant pool checks. NFCI.
So the extra checks in D55600 don't look like a regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348956
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David Blaikie [Wed, 12 Dec 2018 18:46:25 +0000 (18:46 +0000)]
llvm-dwarfdump: Dump array dimensions in stringified type names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348954
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Simon Pilgrim [Wed, 12 Dec 2018 18:32:29 +0000 (18:32 +0000)]
[SelectionDAG] Add a generic isSplatValue function
This patch introduces a generic function to determine whether a given vector type is known to be a splat value for the specified demanded elements, recursing up the DAG looking for BUILD_VECTOR or VECTOR_SHUFFLE splat patterns.
It also keeps track of the elements that are known to be UNDEF - it returns true if all the demanded elements are UNDEF (as this may be useful under some circumstances), so this needs to be handled by the caller.
A wrapper variant is also provided that doesn't take the DemandedElts or UndefElts arguments for cases where we just want to know if the SDValue is a splat or not (with/without UNDEFS).
I had hoped to completely remove the X86 local version of this function, but I'm seeing some regressions in shift/rotate codegen that will take a little longer to fix and I hope to get this in sooner so I can continue work on PR38243 which needs more capable splat detection.
Differential Revision: https://reviews.llvm.org/D55426
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348953
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Artem Belevich [Wed, 12 Dec 2018 18:31:04 +0000 (18:31 +0000)]
[NVPTX] do not rely on cached subtarget info.
If a module has function references, but no functions
themselves, we may end up never calling runOnMachineFunction
and therefore would never initialize nvptxSubtarget field
which would eventually cause a crash.
Instead of relying on nvptxSubtarget being initialized by
one of the methods, retrieve subtarget info directly.
Differential Revision: https://reviews.llvm.org/D55580
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348952
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Michael Kruse [Wed, 12 Dec 2018 18:07:19 +0000 (18:07 +0000)]
[LV] Fix signed/unsigned comparison warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348949
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Nico Weber [Wed, 12 Dec 2018 18:04:57 +0000 (18:04 +0000)]
[gn build] Merge r348944
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348948
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Michael Kruse [Wed, 12 Dec 2018 17:59:01 +0000 (17:59 +0000)]
[docs] Use correct ending quotes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348947
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Sanjay Patel [Wed, 12 Dec 2018 17:58:27 +0000 (17:58 +0000)]
[x86] allow 8-bit adds to be promoted by convertToThreeAddress() to form LEA
This extends the code that handles 16-bit add promotion to form LEA to also allow 8-bit adds.
That allows us to combine add ops with register moves and save some instructions. This is
another step towards allowing add truncation in generic DAGCombiner (see D54640).
Differential Revision: https://reviews.llvm.org/D55494
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348946
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Nico Weber [Wed, 12 Dec 2018 17:57:10 +0000 (17:57 +0000)]
[gn build] Add all non-test build files for lld
Version.inc.in processing has a potentially interesting part which I've punted
on for now (LLD_REVISION and LLD_REPOSITORY are set to empty strings for now).
lld now builds in the gn build. But no symlinks to it are created yet, so it
can't be meaningfully run yet.
Differential Revision: https://reviews.llvm.org/D55593
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348945
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Michael Kruse [Wed, 12 Dec 2018 17:32:52 +0000 (17:32 +0000)]
[Unroll/UnrollAndJam/Vectorizer/Distribute] Add followup loop attributes.
When multiple loop transformation are defined in a loop's metadata, their order of execution is defined by the order of their respective passes in the pass pipeline. For instance, e.g.
#pragma clang loop unroll_and_jam(enable)
#pragma clang loop distribute(enable)
is the same as
#pragma clang loop distribute(enable)
#pragma clang loop unroll_and_jam(enable)
and will try to loop-distribute before Unroll-And-Jam because the LoopDistribute pass is scheduled after UnrollAndJam pass. UnrollAndJamPass only supports one inner loop, i.e. it will necessarily fail after loop distribution. It is not possible to specify another execution order. Also,t the order of passes in the pipeline is subject to change between versions of LLVM, optimization options and which pass manager is used.
This patch adds 'followup' attributes to various loop transformation passes. These attributes define which attributes the resulting loop of a transformation should have. For instance,
!0 = !{!0, !1, !2}
!1 = !{!"llvm.loop.unroll_and_jam.enable"}
!2 = !{!"llvm.loop.unroll_and_jam.followup_inner", !3}
!3 = !{!"llvm.loop.distribute.enable"}
defines a loop ID (!0) to be unrolled-and-jammed (!1) and then the attribute !3 to be added to the jammed inner loop, which contains the instruction to distribute the inner loop.
Currently, in both pass managers, pass execution is in a fixed order and UnrollAndJamPass will not execute again after LoopDistribute. We hope to fix this in the future by allowing pass managers to run passes until a fixpoint is reached, use Polly to perform these transformations, or add a loop transformation pass which takes the order issue into account.
For mandatory/forced transformations (e.g. by having been declared by #pragma omp simd), the user must be notified when a transformation could not be performed. It is not possible that the responsible pass emits such a warning because the transformation might be 'hidden' in a followup attribute when it is executed, or it is not present in the pipeline at all. For this reason, this patche introduces a WarnMissedTransformations pass, to warn about orphaned transformations.
Since this changes the user-visible diagnostic message when a transformation is applied, two test cases in the clang repository need to be updated.
To ensure that no other transformation is executed before the intended one, the attribute `llvm.loop.disable_nonforced` can be added which should disable transformation heuristics before the intended transformation is applied. E.g. it would be surprising if a loop is distributed before a #pragma unroll_and_jam is applied.
With more supported code transformations (loop fusion, interchange, stripmining, offloading, etc.), transformations can be used as building blocks for more complex transformations (e.g. stripmining+stripmining+interchange -> tiling).
Reviewed By: hfinkel, dmgreen
Differential Revision: https://reviews.llvm.org/D49281
Differential Revision: https://reviews.llvm.org/D55288
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348944
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Wei Mi [Wed, 12 Dec 2018 17:09:27 +0000 (17:09 +0000)]
[SampleFDO] Extend profile-sample-accurate option to cover isFunctionColdInCallGraph
For SampleFDO, when a callsite doesn't appear in the profile, it will not be marked as cold callsite unless the option -profile-sample-accurate is specified.
But profile-sample-accurate doesn't cover function isFunctionColdInCallGraph which is used to decide whether a function should be put into text.unlikely section, so even if the user knows the profile is accurate and specifies profile-sample-accurate, those functions not appearing in the sample profile are still not be put into text.unlikely section right now.
The patch fixes that.
Differential Revision: https://reviews.llvm.org/D55567
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348940
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Neil Henning [Wed, 12 Dec 2018 16:15:21 +0000 (16:15 +0000)]
[AMDGPU] Extend the SI Load/Store optimizer to combine more things.
I've extended the load/store optimizer to be able to produce dwordx3
loads and stores, This change allows many more load/stores to be combined,
and results in much more optimal code for our hardware.
Differential Revision: https://reviews.llvm.org/D54042
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348937
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Simon Atanasyan [Wed, 12 Dec 2018 15:32:03 +0000 (15:32 +0000)]
[mips] Enable using of integrated assembler in all cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348934
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Sanjay Patel [Wed, 12 Dec 2018 15:28:21 +0000 (15:28 +0000)]
[AggressiveInstCombine] add tests for rotates with branch; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348933
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Simon Pilgrim [Wed, 12 Dec 2018 13:43:07 +0000 (13:43 +0000)]
[TargetLowering] Add ISD::AND handling to SimplifyDemandedVectorElts
If either of the operand elements are zero then we know the result element is going to be zero (even if the other element is undef).
Differential Revision: https://reviews.llvm.org/D55558
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348926
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Simon Pilgrim [Wed, 12 Dec 2018 13:21:03 +0000 (13:21 +0000)]
Regenerate knownbits test. NFCI.
A future SimplifyDemandedBits patch will affect this code and I want to ensure the codegen diff is obvious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348925
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Piotr Sobczak [Wed, 12 Dec 2018 11:20:04 +0000 (11:20 +0000)]
[AMDGPU] Set metadata access for explicit section
Summary:
This patch provides a means to set Metadata section kind
for a global variable, if its explicit section name is
prefixed with ".AMDGPU.metadata."
This could be useful to make the global variable go to
an ELF section without any section flags set.
Reviewers: dstuttard, tpr, kzhuravl, nhaehnle, t-tye
Reviewed By: dstuttard, kzhuravl
Subscribers: llvm-commits, arsenm, jvesely, wdng, yaxunl, t-tye
Differential Revision: https://reviews.llvm.org/D55267
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348922
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James Henderson [Wed, 12 Dec 2018 10:34:01 +0000 (10:34 +0000)]
[lit]Add llvm-readelf to tool substitutions
Reviewed by: rnk, alexsahp
Differential Revision: https://reviews.llvm.org/D55564
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348921
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Diana Picus [Wed, 12 Dec 2018 10:32:15 +0000 (10:32 +0000)]
[ARM GlobalISel] Select load/store for Thumb2
Unfortunately we can't use TableGen for this because it doesn't yet
support predicates on the source pattern root. Therefore, add a bit of
handwritten code to the instruction selector to handle the most basic
cases.
Also mark them as legal and extract their legalizer test cases to a new
test file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348920
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Jonas Paulsson [Wed, 12 Dec 2018 08:26:24 +0000 (08:26 +0000)]
[SystemZ] Minor cleanup of SchedModels
Some fixes of a few InstRWs for z13 and z14.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348917
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Simon Atanasyan [Wed, 12 Dec 2018 07:03:04 +0000 (07:03 +0000)]
[mips] Use llvm-mc -triple option instead of combination of arch,target-abi,mcpu. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348914
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Mikael Holmen [Wed, 12 Dec 2018 06:33:45 +0000 (06:33 +0000)]
Fix compiler warning about unused variable [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348913
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Leonard Chan [Wed, 12 Dec 2018 06:29:14 +0000 (06:29 +0000)]
[Intrinsic] Signed Fixed Point Multiplication Intrinsic
Add an intrinsic that takes 2 signed integers with the scale of them provided
as the third argument and performs fixed point multiplication on them.
This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.
Differential Revision: https://reviews.llvm.org/D54719
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348912
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Craig Topper [Wed, 12 Dec 2018 05:56:01 +0000 (05:56 +0000)]
[X86] Combine vpmovdw+vpacksswb into vpmovdb.
This is similar to the combine we already have for vpmovdw+vpackuswb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348910
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Craig Topper [Wed, 12 Dec 2018 05:55:59 +0000 (05:55 +0000)]
[X86] Add a few more fptosi test cases to demonstrate -x86-experimental-vector-widening legalization not combining vpacksswb+vpmovdw.
We are able to combine vpackuswb+vpmovdw, but we didn't have packsswb+vpmovdw at the time that combine was added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348909
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Nico Weber [Wed, 12 Dec 2018 03:05:59 +0000 (03:05 +0000)]
[gn build] Add build files for DebugInfo/{DWARF,PDB}, Option, ToolDrivers/llvm-lib, and WindowsManifest
The diff in targets.gni is due to me running `gn format` on all .gn and .gni
files.
llvm_enable_dia_sdk is in a gni file because I'm going to have to read it when
writing the lit invocations for check-llvm and check-lld. I've never had the
DIA sdk installed locally so I never tested building with it enabled -- it
probably doesn't Just Work and needs some path to diaguids.lib. We can finish
that once somebody needs it.
Differential Revision: https://reviews.llvm.org/D55591
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348908
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Florian Hahn [Wed, 12 Dec 2018 02:22:12 +0000 (02:22 +0000)]
[ConstantInt] Check active bits before calling getZExtValue.
Without this check, we hit an assertion in getZExtValue, if the constant
value does not fit into an uint64_t.
As getZExtValue returns an uint64_t, should we update
getAggregateElement to take an uin64_t as well?
This fixes https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=6109.
Reviewers: efriedma, craig.topper, spatel
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D55547
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348906
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Nico Weber [Wed, 12 Dec 2018 00:04:38 +0000 (00:04 +0000)]
[gn build] Add build files for lib/LTO, lib/Linker, lib/Passes, lib/Transforms/{IPO,Instrumentation,ObjCARC}
Differential Revision: https://reviews.llvm.org/D55553
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348905
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Nathan Lanza [Wed, 12 Dec 2018 00:04:06 +0000 (00:04 +0000)]
Implement IMAGE_REL_AMD64_SECREL for RuntimeDyldCOFFX86_64
lldb on Windows uses the ExecutionEngine for expression evaluation
and hits the llvm_unreachable due to this relocation. Thus, implement
the relocation and add a test to verify it's function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348904
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Nico Weber [Wed, 12 Dec 2018 00:03:23 +0000 (00:03 +0000)]
[gn build] Add build files for Target/X86/... and for tools/llc
The tablegen setup for Target/X86 is a bit different from the CMake build: In
the CMake build, Target/X86/CMakeLists.txt has a single tablegen target that
does everything. But some of the generated files are only used privately by a
subproject, so in the GN build some of the tablegen invocations are
smaller-scoped, mostly for build cleanliness. (It helps also a tiny bit with
build parallelism since now e.g. the cpp files in MCTargetDesc can build after
just 3 .inc files are generated instead of being blocked on all 13. But it's
not a big win, since things depending on Target still need to wait for all 11,
even though all .inc file use is internal to lib/Target.)
Also add a build file for llc, since now all its dependencies have build files.
Differential Revision: https://reviews.llvm.org/D55524
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348903
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Reid Kleckner [Tue, 11 Dec 2018 23:07:39 +0000 (23:07 +0000)]
[codeview] Look through typedefs in getCompleteTypeIndex
Summary:
Any time a symbol record, whether it's S_UDT, S_LOCAL, or S_[GL]DATA32,
references a record type, it should use the complete type index, even if
there's a typedef in the way.
Fixes the compiler part of PR39853.
Reviewers: zturner, aganea
Subscribers: hiraditya, arphaman, llvm-commits
Differential Revision: https://reviews.llvm.org/D55236
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348902
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Craig Topper [Tue, 11 Dec 2018 22:07:06 +0000 (22:07 +0000)]
[GISel] Add parentheses to an assert because gcc is mean.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348900
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Jordan Rupprecht [Tue, 11 Dec 2018 21:26:52 +0000 (21:26 +0000)]
Revert "debuginfo: Use symbol difference for CU length to simplify assembly reading/editing"
Temporarily reverts commit r348806 due to strange asm compilation issues in certain modes (combination of asan+cuda+other things). Will provide repro soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348898
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Gor Nishanov [Tue, 11 Dec 2018 21:23:09 +0000 (21:23 +0000)]
[coroutines] Improve suspend point simplification
Summary:
Enable suspend point simplification for cases where:
* coro.save and coro.suspend are in different basic blocks
* where there are intervening intrinsics
Reviewers: modocache, tks2103, lewissbaker
Reviewed By: modocache
Subscribers: EricWF, llvm-commits
Differential Revision: https://reviews.llvm.org/D55160
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348897
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Wolfgang Pieb [Tue, 11 Dec 2018 21:13:53 +0000 (21:13 +0000)]
[Debuginfo] Prevent CodeGenPrepare from dropping debuginfo references.
This fixes PR39845. CodeGenPrepare employs a transactional model when
performing optimizations, i.e. it changes the IR to attempt an optimization
and rolls back the change when it finds the change inadequate. It is during
the rollback that references to locals were dropped from debug value
intrinsics. This patch reinstates debuginfo references during rollbacks.
Reviewers: aprantl, vsk
Differential Revision: https://reviews.llvm.org/D55396
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348896
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Nikita Popov [Tue, 11 Dec 2018 20:29:16 +0000 (20:29 +0000)]
[ConstantFolding] Handle leading zero-size elements in load folding
Struct types may have leading zero-size elements like [0 x i32], in
which case the "real" element at offset 0 will not necessarily coincide
with the 0th element of the aggregate. ConstantFoldLoadThroughBitcast()
wants to drill down the element at offset 0, but currently always picks
the 0th aggregate element to do so. This patch changes the code to find
the first non-zero-size element instead, for the struct case.
The motivation behind this change is https://github.com/rust-lang/rust/issues/48627.
Rust is fond of emitting [0 x iN] separators between struct elements to
enforce alignment, which prevents constant folding in this particular case.
The additional tests with [
4294967295 x [0 x i32]] check that we don't
end up unnecessarily looping over a large number of zero-size elements
of a zero-size array.
Differential Revision: https://reviews.llvm.org/D55169
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348895
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Aditya Nandakumar [Tue, 11 Dec 2018 20:04:40 +0000 (20:04 +0000)]
[GISel]: Add MachineIRBuilder support for passing in Flags while building
https://reviews.llvm.org/D55516
Add the ability to pass in flags to buildInstr calls. Currently no
validation is performed but that can be easily performed based on the
opcode (if necessary).
Reviewed by: paquette.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348893
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Fedor Sergeev [Tue, 11 Dec 2018 19:05:35 +0000 (19:05 +0000)]
[NewPM] fixing asserts on deleted loop in -print-after-all
IR-printing AfterPass instrumentation might be called on a loop
that has just been invalidated. We should skip printing it to
avoid spurious asserts.
Reviewed By: chandlerc, philip.pfaffe
Differential Revision: https://reviews.llvm.org/D54740
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348887
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Mandeep Singh Grang [Tue, 11 Dec 2018 18:36:14 +0000 (18:36 +0000)]
[COFF, ARM64] Emit COFF function header
Summary:
Emit COFF header when printing out the function. This is important as the
header contains two important pieces of information: the storage class for the
symbol and the symbol type information. This bit of information is required for
the linker to correctly identify the type of symbol that it is dealing with.
This patch mimics X86 and ARM COFF behavior for function header emission.
Reviewers: rnk, mstorsjo, compnerd, TomTan, ssijaric
Reviewed By: mstorsjo
Subscribers: dmajor, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D55535
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348875
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Vedant Kumar [Tue, 11 Dec 2018 18:05:31 +0000 (18:05 +0000)]
[HotColdSplitting] Disable outlining landingpad instructions (PR39917)
It's currently not safe to outline landingpad instructions (see
llvm.org/PR39917). Like @llvm.eh.typeid.for, the order and content of
previous landingpad instructions in a function alters the lowering of
subsequent landingpads by renumbering type info ID's. Outlining a
landingpad therefore breaks exception handling & unwinding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348870
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Fangrui Song [Tue, 11 Dec 2018 17:34:15 +0000 (17:34 +0000)]
[XRay] Add a helper function sortByKey to simplify code
Reviewers: dberris, mboerger
Reviewed By: dberris
Subscribers: mgrang, llvm-commits
Differential Revision: https://reviews.llvm.org/D55548
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348869
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Sanjay Patel [Tue, 11 Dec 2018 16:38:03 +0000 (16:38 +0000)]
[InstCombine] try to convert x86 movmsk intrinsic to generic IR (PR39927)
call iM movmsk(sext <N x i1> X) --> zext (bitcast <N x i1> X to iN) to iM
This has the potential to create less-than-8-bit scalar types as shown in
some of the test diffs, but it looks like the backend knows how to deal
with that in these patterns. This is the simple part of the fix suggested in:
https://bugs.llvm.org/show_bug.cgi?id=39927
Differential Revision: https://reviews.llvm.org/D55529
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348862
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Nikita Popov [Tue, 11 Dec 2018 16:37:26 +0000 (16:37 +0000)]
[BDCE] Add tests for PR39771; NFC
These involve cases where certain uses are dead by means of having
no demanded bits, even though the used instruction still has demanded
bits when other uses are taken into account. BDCE currently does not
simplify such cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348861
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Sid Manning [Tue, 11 Dec 2018 16:15:03 +0000 (16:15 +0000)]
[llvm-readelf] Add -e/--headers support to readobj/elf
Differential Revision: https://reviews.llvm.org/D55298
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348859
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Craig Topper [Tue, 11 Dec 2018 15:32:14 +0000 (15:32 +0000)]
Fix not correct imm operand assertion for SUB32ri in X86CondBrFolding::analyzeCompare
Summary:
When doing X86CondBrFolding::analyzeCompare, it will meet the SUB32ri instruction as below to use the global address for its operand,
%733:gr32 = SUB32ri %62:gr32(tied-def 0), @img2buf_normal, implicit-def $eflags
JNE_1 %bb.41, implicit $eflags
so the assertion "assert(MI.getOperand(ValueIndex).isImm() && "Expecting Imm operand")" is not correct and change the assert to if make X86CondBrFolding::analyzeCompare return false as not finding the compare for this
Patch by Jianping Chen
Reviewers: smaslov, LuoYuanke, liutianle, Jianping
Reviewed By: Jianping
Subscribers: lebedev.ri, llvm-commits
Differential Revision: https://reviews.llvm.org/D54250
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348853
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Sanjay Patel [Tue, 11 Dec 2018 15:29:40 +0000 (15:29 +0000)]
[x86] clean up code for converting 16-bit ops to LEA; NFC
As discussed in D55494, we want to extend this to handle 8-bit
ops too, but that could be extended further to enable this on
32-bit systems too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348851
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Sanjay Patel [Tue, 11 Dec 2018 14:05:03 +0000 (14:05 +0000)]
[x86] remove dead code for 16-bit LEA formation; NFC
As discussed in:
D55494
...this code has been disabled/dead for a long time (the code references
Athlon and Pentium 4), and there's almost no chance that it will be used
given the last decade of uarch evolution. Also, in SDAG we promote 16-bit
ops to 32-bit, so there's almost no way to test this code any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348845
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Clement Courbet [Tue, 11 Dec 2018 13:38:43 +0000 (13:38 +0000)]
Revert r348843 "[CodeGen] Allow mempcy/memset to generate small overlapping stores."
Breaks ARM/memcpy-inline.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348844
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Clement Courbet [Tue, 11 Dec 2018 13:15:56 +0000 (13:15 +0000)]
[CodeGen] Allow mempcy/memset to generate small overlapping stores.
Summary:
All targets either just return false here or properly model `Fast`, so I
don't think there is any reason to prevent CodeGen from doing the right
thing here.
Subscribers: nemanjai, javed.absar, eraman, jsji, llvm-commits
Differential Revision: https://reviews.llvm.org/D55365
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348843
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Simon Pilgrim [Tue, 11 Dec 2018 11:08:40 +0000 (11:08 +0000)]
[TargetLowering] Add ISD::EXTRACT_VECTOR_ELT support to SimplifyDemandedBits
Let SimplifyDemandedBits attempt to simplify all elements of a vector extraction.
Part of PR39689.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348839
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Simon Pilgrim [Tue, 11 Dec 2018 10:44:54 +0000 (10:44 +0000)]
Fix "not all control paths return a value" MSVC warnings. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348838
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David Stenberg [Tue, 11 Dec 2018 10:33:38 +0000 (10:33 +0000)]
[DeadArgElim] Fixes for dbg.values using dead arg/return values
Summary:
When eliminating a dead argument or return value in a function with
local linkage, all uses, including in dbg.value intrinsics, would be
replaced with null constants. This would mean that, for example for an
integer argument, the debug info would incorrectly express that the
value is 0. Instead, replace all uses with undef to indicate that the
argument/return value is optimized out.
Also, make sure that metadata uses of return values are rewritten even
if there are no non-metadata uses of the value.
As a bit of historical curiosity, the code that emitted null constants
was introduced in the initial check-in of the pass in 2003, before
'undef' values even existed in LLVM.
This fixes PR23260.
Reviewers: dblaikie, aprantl, vsk, djtodoro
Reviewed By: aprantl
Subscribers: llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D55513
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348837
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Ranjeet Singh [Tue, 11 Dec 2018 09:32:49 +0000 (09:32 +0000)]
Cleanup test case by removing unused attribute dso_local
Attribute 'dso_local' generated in bitcode from compiling
original C file but isn't needed.
Differential Revision: https://reviews.llvm.org/D55521
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348835
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Craig Topper [Tue, 11 Dec 2018 07:41:06 +0000 (07:41 +0000)]
[X86] Switch the 64-bit mulx schedule test to use inline assembly.
I'm not sure we should always prefer MULX over MUL. So making the MULX guaranteed with inline assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348833
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Martell Malone [Tue, 11 Dec 2018 03:14:56 +0000 (03:14 +0000)]
[PPC][NFC] store operands are dst not src
Differential Revision: https://reviews.llvm.org/D55502
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348826
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Nico Weber [Tue, 11 Dec 2018 02:09:32 +0000 (02:09 +0000)]
[gn build] Add build files for AsmParser, MIRParser, IRReader, MCDisassembler, Vectorize
These are all remaining build dependencies of llc, except for Target/X86 which
is in a separate patch at https://reviews.llvm.org/D55524
Differential Revision: https://reviews.llvm.org/D55518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348823
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Heejin Ahn [Tue, 11 Dec 2018 01:11:04 +0000 (01:11 +0000)]
[WebAssembly] Add '.eventtype' directive support
Summary:
This patch supports `.eventtype` directive printing and parsing in the
same syntax with `.functype`.
Reviewers: aardappel, sbc100
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D55353
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348818
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Armando Montanez [Tue, 11 Dec 2018 01:00:16 +0000 (01:00 +0000)]
[TextAPI][elfabi] Make SoName optional
This change makes DT_SONAME treated as an optional trait for ELF TextAPI
stubs. This change accounts for the fact that shared objects aren't
guaranteed to have a DT_SONAME entry. Tests have been updated to check
for correct behavior of an optional soname.
Differential Revision: https://reviews.llvm.org/D55533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348817
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Heejin Ahn [Tue, 11 Dec 2018 00:53:59 +0000 (00:53 +0000)]
[WebAssembly] TargetStreamer cleanup (NFC)
Summary:
- Unify mixed argument names (`Symbol` and `Sym`) to `Sym`
- Changed `MCSymbolWasm*` argument of `emit***` functions to `const
MCSymbolWasm*`. It seems not very intuitive that emit function in the
streamer modifies symbol contents.
- Moved empty function bodies to the header
- clang-format
Reviewers: aardappel, dschuff, sbc100
Subscribers: jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D55347
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348816
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