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Matt Arsenault [Mon, 2 May 2016 20:13:51 +0000 (20:13 +0000)]
AMDGPU: Custom lower v2i32 loads and stores
This will allow us to split up 64-bit private accesses when
necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268296
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Tom Stellard [Mon, 2 May 2016 20:11:44 +0000 (20:11 +0000)]
AMDGPU/SI: Use v_readfirstlane_b32 when restoring SGPRs spilled to scratch
We were using v_readlane_b32 with the lane set to zero, but this won't
work if thread 0 is not active.
Differential Revision: http://reviews.llvm.org/D19745
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268295
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Matt Arsenault [Mon, 2 May 2016 20:07:26 +0000 (20:07 +0000)]
AMDGPU: Make i64 loads/stores promote to v2i32
Now that unaligned access expansion should not attempt
to produce i64 accesses, we can remove the hack in
PreprocessISelDAG where this is done.
This allows splitting i64 private accesses while
allowing the new add nodes indexing the vector components
can be folded with the base pointer arithmetic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268293
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John Regehr [Mon, 2 May 2016 19:58:00 +0000 (19:58 +0000)]
[LVI] Add an API to LazyValueInfo so that it can export ConstantRanges
that it computes. Currently this is used for testing and precision
tuning, but it might be used by optimizations later.
Differential Revision: http://reviews.llvm.org/D19179
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268291
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Simon Pilgrim [Mon, 2 May 2016 19:46:58 +0000 (19:46 +0000)]
[X86][AVX2] Added 128-bit wide shuffle test
Demonstrate missing 128-bit wide shuffle combine support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268290
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Reid Kleckner [Mon, 2 May 2016 19:45:10 +0000 (19:45 +0000)]
Fix instance of -Winconsistent-missing-override in AMDGPU code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268289
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Reid Kleckner [Mon, 2 May 2016 19:43:22 +0000 (19:43 +0000)]
Revert "[SimplifyCFG] Extend TryToSimplifyUncondBranchFromEmptyBlock for empty block including lifetime intrinsics"
This reverts commit r268254.
This change causes assertion failures while building Chromium. Reduced
test case coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268288
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Tom Stellard [Mon, 2 May 2016 19:37:56 +0000 (19:37 +0000)]
AMDGPU/SI: Set the kill flag on temp VGPRs used to restore SGPRs from scratch
Summary:
When we restore an SGPR value from scratch, we first load it into a
temporary VGPR and then use v_readlane_b32 to copy the value from the
VGPR back into an SGPR.
We weren't setting the kill flag on the VGPR in the v_readlane_b32
instruction, so the register scavenger wasn't able to re-use this
temp value later.
I wasn't able to create a lit test for this.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19744
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268287
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Piotr Padlewski [Mon, 2 May 2016 19:06:51 +0000 (19:06 +0000)]
Fix typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268281
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Chad Rosier [Mon, 2 May 2016 19:06:04 +0000 (19:06 +0000)]
Typo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268280
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Chad Rosier [Mon, 2 May 2016 19:06:02 +0000 (19:06 +0000)]
Use false rather than 0 for a boolean value. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268279
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Zachary Turner [Mon, 2 May 2016 18:36:58 +0000 (18:36 +0000)]
Fix build breakage due to implicit conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268277
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Tim Northover [Mon, 2 May 2016 18:30:08 +0000 (18:30 +0000)]
ARM: fix handling of SUB immediates in peephole opt.
We were negating an immediate that was going to be used in a SUBri form
unnecessarily. Since ADD/SUB are very similar we *can* do that, but we have to
change the SUB to an ADD at the same time. This also applies to ADD, and allows
us to handle a slightly larger range of immediates for those two operations.
rdar://
25992245
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268276
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Justin Holewinski [Mon, 2 May 2016 18:12:02 +0000 (18:12 +0000)]
[NVPTX] Fix sign/zero-extending ldg/ldu instruction selection
Summary:
We don't have sign-/zero-extending ldg/ldu instructions defined,
so we need to emulate them with explicit CVTs. We were originally
handling the i8 case, but not any other cases.
Fixes PR26185
Reviewers: jingyue, jlebar
Subscribers: jholewinski
Differential Revision: http://reviews.llvm.org/D19615
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268272
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Reid Kleckner [Mon, 2 May 2016 18:10:00 +0000 (18:10 +0000)]
[codeview] Don't dump type stream bytes unless asked to
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268271
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Zachary Turner [Mon, 2 May 2016 18:09:21 +0000 (18:09 +0000)]
PDB - Instead of hardcoding stream numbers, use an enum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268270
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George Burgess IV [Mon, 2 May 2016 18:09:19 +0000 (18:09 +0000)]
[CFLAA] Fix a use-of-invalid-pointer bug.
As shown in the diff, we used to add to CFLAA's cache by doing
`Cache[Fn] = buildSetsFrom(Fn)`. `buildSetsFrom(Fn)` may cause `Cache`
to reallocate its underlying storage, if this happens and `Cache[Fn]`
was evaluated prior to `buildSetsFrom(Fn)`, then we'll store the result
to a bad address.
Patch by Jia Chen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268269
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Zachary Turner [Mon, 2 May 2016 18:09:14 +0000 (18:09 +0000)]
Parse PDB Name Hash Table
PDB has a lot of similar data structures. We already have code
for parsing a Name Map, but PDB seems to have a different but
very similar structure that is a hash table. This is the
beginning of code needed in order to parse the name hash table,
but it is not yet complete. It parses the basic metadata of
the hash table, the bucket array, and the names buffer, but
doesn't use any of these fields yet as the data structure
requires a non-trivial amount of work to understand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268268
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Tom Stellard [Mon, 2 May 2016 18:05:17 +0000 (18:05 +0000)]
AMDGPU: Move R600 specific code out of AMDGPUISelLowering.cpp
Reviewers: arsenm
Subscribers: jvesely, arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19736
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268267
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Mehdi Amini [Mon, 2 May 2016 18:03:33 +0000 (18:03 +0000)]
ReversePostOrderFunctionAttrs is not modifying the call graph, let's preserve it.
When running cc1 with -flto=thin, it is followed by GlobalOpt, which
requires the callgraph. This saves rebuilding one.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268266
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Tom Stellard [Mon, 2 May 2016 18:02:24 +0000 (18:02 +0000)]
AMDGPU/SI: Fix bug in SIInstrInfo::insertWaitStates() uncovered by r268260
We can't use MI->getDebugLoc() when MI is an iterator that could be
MBB.end().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268265
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Tom Stellard [Mon, 2 May 2016 17:39:06 +0000 (17:39 +0000)]
AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses
Summary:
Add support for detecting hazards in SMEM soft clauses, so that we only
break the clauses when necessary, either by adding s_nop or re-ordering
other alu instructions.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18870
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268260
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Nicolai Haehnle [Mon, 2 May 2016 17:37:01 +0000 (17:37 +0000)]
AMDGPU: llvm.SI.fs.constant is a source of divergence
Summary:
This intrinsic is used to get flat-shaded fragment shader inputs. Those are
uniform across a primitive, but a fragment shader wave may process pixels from
multiple primitives (as indicated by the prim_mask), and so that's where
divergence can arise.
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19747
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268259
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NAKAMURA Takumi [Mon, 2 May 2016 17:29:55 +0000 (17:29 +0000)]
ScheduleDAGInstrs.cpp: Don't peel the iterator when it points the end. This will fix the crash in r268143.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268257
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Derek Schuff [Mon, 2 May 2016 17:25:22 +0000 (17:25 +0000)]
[WebAssembly] Rename memory_size intrinsic to current_memory
This follows the recent renaming in the wasm spec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268255
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Hans Wennborg [Mon, 2 May 2016 17:22:54 +0000 (17:22 +0000)]
[SimplifyCFG] Extend TryToSimplifyUncondBranchFromEmptyBlock for empty block including lifetime intrinsics
Make it possible that TryToSimplifyUncondBranchFromEmptyBlock merges empty
basic block including lifetime intrinsics as well as phi nodes and
unconditional branch into its successor or predecessor(s).
If successor of empty block has single predecessor, all contents including
lifetime intrinsics are sinked into the successor. Otherwise, they are
hoisted into its predecessor(s) and then merged into the predecessor(s).
Patch by Josh Yoon <josh.yoon@samsung.com>!
Differential Revision: http://reviews.llvm.org/D19257
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268254
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Mehdi Amini [Mon, 2 May 2016 16:53:16 +0000 (16:53 +0000)]
Move createReversePostOrderFunctionAttrsPass right after the inliner is done
This is where it was originally, until LoopVersioningLICM was
inserted before in r259986, I don't believe it was on purpose.
Differential Revision: http://reviews.llvm.org/D19809
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268252
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Adam Nemet [Mon, 2 May 2016 16:52:00 +0000 (16:52 +0000)]
[LLE] Fix typo from r263058
This was meant to check unit stride for both the load and the store.
Thanks to Roman Shirokiy for noticing this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268251
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Pete Cooper [Mon, 2 May 2016 16:51:26 +0000 (16:51 +0000)]
Add llvm-pdbdump to the tool substitutions list in lit. NFC.
This adds llvm-pdbdump to the list of tools which get printed with
the full path in verbose mode. This makes it easier to take the
whole run line from verbose output and run it again without prepending
with the builds bin directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268250
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Simon Pilgrim [Mon, 2 May 2016 16:45:02 +0000 (16:45 +0000)]
Fixed signed/unsigned comparison warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268249
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Chad Rosier [Mon, 2 May 2016 16:45:00 +0000 (16:45 +0000)]
Remove extra whitespace. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268248
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Tom Stellard [Mon, 2 May 2016 16:23:09 +0000 (16:23 +0000)]
AMDGPU/SI: Use hazard recognizer to detect DPP hazards
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18603
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268247
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Sanjay Patel [Mon, 2 May 2016 15:49:09 +0000 (15:49 +0000)]
remove blank lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268246
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Sanjay Patel [Mon, 2 May 2016 15:32:10 +0000 (15:32 +0000)]
[InstCombine] regenerate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268245
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Sanjay Patel [Mon, 2 May 2016 15:25:49 +0000 (15:25 +0000)]
[InstCombine] regenerate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268244
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Sanjay Patel [Mon, 2 May 2016 15:21:41 +0000 (15:21 +0000)]
[InstCombine] regenerate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268242
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Sanjay Patel [Mon, 2 May 2016 15:18:13 +0000 (15:18 +0000)]
[InstCombine] regenerate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268241
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Sanjay Patel [Mon, 2 May 2016 15:06:55 +0000 (15:06 +0000)]
[InstCombine] regenerate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268239
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Simon Pilgrim [Mon, 2 May 2016 14:58:22 +0000 (14:58 +0000)]
[X86][SSE] Dropped X86ISD::FGETSIGNx86 and use MOVMSK instead for FGETSIGN lowering
movmsk.ll tests are unchanged.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268237
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Chad Rosier [Mon, 2 May 2016 14:56:21 +0000 (14:56 +0000)]
Cleanup comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268236
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Chad Rosier [Mon, 2 May 2016 14:50:30 +0000 (14:50 +0000)]
Cleanup comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268235
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Aaron Ballman [Mon, 2 May 2016 14:48:03 +0000 (14:48 +0000)]
Silence unused variable warnings; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268234
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Chad Rosier [Mon, 2 May 2016 14:32:17 +0000 (14:32 +0000)]
Cleanup comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268233
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Sanjay Patel [Mon, 2 May 2016 14:21:55 +0000 (14:21 +0000)]
[InstCombine] regenerate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268232
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David L Kreitzer [Mon, 2 May 2016 13:45:25 +0000 (13:45 +0000)]
Enable the X86 call frame optimization for the 64-bit targets that allow it.
Fixes PR27241.
Differential Revision: http://reviews.llvm.org/D19688
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268227
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Rafael Espindola [Mon, 2 May 2016 13:45:06 +0000 (13:45 +0000)]
Expose a getFullName for thin archive members.
It will be used in lld.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268226
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Jonas Paulsson [Mon, 2 May 2016 10:42:47 +0000 (10:42 +0000)]
[SystemZ] Temporarily disable codegen test int-add-12.ll.
This checks for AGSI transformation, which is temporarily disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268219
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Jonas Paulsson [Mon, 2 May 2016 09:37:44 +0000 (09:37 +0000)]
[SystemZ] Fix in restoreCalleeSavedRegisters()
Only add operands for GRs to the LMG.
Reviewed by Ulrich Weigand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268216
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Jonas Paulsson [Mon, 2 May 2016 09:37:40 +0000 (09:37 +0000)]
[SystemZ] Mark CC defs as dead whenever possible.
Marking implicit CC defs as dead everywhere except when CC is actually
defined and used explicitly, is important since the post-ra scheduler
will otherwise insert edges between instructions unnecessarily.
Also temporarily disable LA(Y)-> AGSI optimization in
foldMemoryOperandImpl(), since this inroduces a def of the CC reg,
which is illegal unless it is known to be dead.
Reviewed by Ulrich Weigand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268215
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Craig Topper [Mon, 2 May 2016 05:44:21 +0000 (05:44 +0000)]
[X86] Fix a bug in LOCK arithmetic operation pattern matching where the wrong immediate predicate check was being used for 64-bit instructions with 8-bit immediates.
This didn't cause a bug because the order of the patterns ensured that the 64-bit instructions with 32-bit immediates were selected first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268212
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Eric Christopher [Mon, 2 May 2016 05:30:26 +0000 (05:30 +0000)]
Fix grammar and correct comment - the debug information wasn't incorrect, rather suboptimal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268211
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Davide Italiano [Mon, 2 May 2016 02:30:18 +0000 (02:30 +0000)]
[llvm-readobj] Dump hash as part of -version-info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268210
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Craig Topper [Mon, 2 May 2016 01:53:30 +0000 (01:53 +0000)]
[CodeGen] Add OPC_MoveChild0-OPC_MoveChild7 opcodes to isel matching tables to optimize table size. Shaves about 12K off the X86 matcher table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268209
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Davide Italiano [Sun, 1 May 2016 22:51:14 +0000 (22:51 +0000)]
[GlobalDCE] Modernize. Use FileCheck instead of grep.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268207
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Simon Pilgrim [Sun, 1 May 2016 20:43:02 +0000 (20:43 +0000)]
[InstCombine][SSE] Added support to VPERMD/VPERMPS to shuffle combine to accept UNDEF elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268206
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Simon Pilgrim [Sun, 1 May 2016 20:33:25 +0000 (20:33 +0000)]
Dropped FIXME comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268205
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Simon Pilgrim [Sun, 1 May 2016 20:22:42 +0000 (20:22 +0000)]
[InstCombine][SSE] Added support to VPERMILVAR to shuffle combine to accept UNDEF elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268204
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Simon Pilgrim [Sun, 1 May 2016 20:06:47 +0000 (20:06 +0000)]
[InstCombine][AVX] Fixed PERMILVAR identity tests and added additional decode tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268203
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Simon Pilgrim [Sun, 1 May 2016 19:26:21 +0000 (19:26 +0000)]
[InstCombine][SSE] Added support to PSHUFB to shuffle combine to accept UNDEF elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268202
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Simon Pilgrim [Sun, 1 May 2016 18:28:45 +0000 (18:28 +0000)]
[InstCombine][SSE] Regenerate MOVSX/MOVZX tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268201
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Craig Topper [Sun, 1 May 2016 17:38:32 +0000 (17:38 +0000)]
[AVX512] VPACKUSWB/VPACKSSWB should not be encoded with EVEX.W=1. While there fix the execution domain for VPACKSSDW/VPACKUSDW.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268200
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Simon Pilgrim [Sun, 1 May 2016 16:41:22 +0000 (16:41 +0000)]
[InstCombine][AVX2] Combine VPERMD/VPERMPS intrinsics with constant masks to shufflevector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268199
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Simon Pilgrim [Sun, 1 May 2016 15:52:31 +0000 (15:52 +0000)]
Fixed MSVC 'not all control paths return a value' warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268198
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Simon Pilgrim [Sun, 1 May 2016 15:27:47 +0000 (15:27 +0000)]
Document the LLVM_ENABLE_EXPENSIVE_CHECKS cmake option introduced in r268050
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268197
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Igor Breger [Sun, 1 May 2016 13:29:12 +0000 (13:29 +0000)]
getelementptr instruction, support index vector of EVT.
Differential Revision: http://reviews.llvm.org/D19775
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268195
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Igor Breger [Sun, 1 May 2016 08:40:00 +0000 (08:40 +0000)]
Change AVX512 braodcastsd/ss patterns interaction with spilling . New implementation take a scalar register and generate a vector without COPY_TO_REGCLASS (turn it into a VR128 register ) .The issue is that during register allocation we may spill a scalar value using 128-bit loads and stores, wasting cache bandwidth.
Differential Revision: http://reviews.llvm.org/D19579
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268190
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Craig Topper [Sun, 1 May 2016 06:52:19 +0000 (06:52 +0000)]
[AVX512] Prefer AVX512 VPACK instructions over AVX/AVX2 instructions when VLX and BWI are supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268189
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Craig Topper [Sun, 1 May 2016 06:24:57 +0000 (06:24 +0000)]
[AVX512] Add HasVLX to the 128/256-bit versions of VPACKSSDW/USDW/SSWB/USWB and VPMADDUBSW/VPMADDWD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268188
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Craig Topper [Sun, 1 May 2016 05:57:06 +0000 (05:57 +0000)]
[AVX512] Make sure 128/256-bit DQI versions of VAND/VANDN/VOR/VXOR are also marked as requiring VLX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268186
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Craig Topper [Sun, 1 May 2016 05:22:15 +0000 (05:22 +0000)]
[X86] Add an AddedComplexity to another pattern to put it near similar in the output file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268184
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Craig Topper [Sun, 1 May 2016 05:22:13 +0000 (05:22 +0000)]
[X86] Remove a seemlingly unused pattern. The same pattern appears elsewhere with an AddedComplexity that made this unreachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268183
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Craig Topper [Sun, 1 May 2016 04:59:49 +0000 (04:59 +0000)]
[X86] Add AddedComplexity to keep some similar patterns near each other in the output file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268181
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Craig Topper [Sun, 1 May 2016 04:59:46 +0000 (04:59 +0000)]
[X86] Remove some redundant selection patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268180
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Craig Topper [Sun, 1 May 2016 04:59:44 +0000 (04:59 +0000)]
[AVX512] Replace vector_extract with extractelt in some patterns. They mean the same thing but vector_extract is deprecated. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268179
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Sanjoy Das [Sun, 1 May 2016 04:51:05 +0000 (04:51 +0000)]
[SCEV] When printing via -analysis, dump loop disposition
There are currently some bugs in tree around SCEV caching an incorrect
loop disposition. Printing out loop dispositions will let us write
whitebox tests as those are fixed.
The dispositions are printed as a list in "inside out" order,
i.e. innermost loop first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268177
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Amaury Sechet [Sun, 1 May 2016 02:23:14 +0000 (02:23 +0000)]
Properly name LLVMSetIsInBounds's argument. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268176
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Amaury Sechet [Sun, 1 May 2016 01:42:34 +0000 (01:42 +0000)]
Capitalize align argument in the C API as per convention. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268175
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Craig Topper [Sun, 1 May 2016 01:03:56 +0000 (01:03 +0000)]
[AVX512] Add hasSideEffects/mayLoad/mayStore flags to some instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268174
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Lang Hames [Sun, 1 May 2016 00:14:45 +0000 (00:14 +0000)]
[ORC] Save AArch64 NEON state in the JIT reentry block.
The earlier version of the resolver code did not save NEON state, so it would
have broken any callees that used floating point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268173
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Rui Ueyama [Sat, 30 Apr 2016 21:32:12 +0000 (21:32 +0000)]
[lit] Add %:[STpst] to represent paths without colons on Windows.
Summary:
We need these variables to concatenate two absolute paths to construct
a valid path. Currently, %t\%t is, for example, expanded to C:\foo\C:\foo,
which is not a valid path because ":" is not a valid path character
on Windows. With this patch, %t will be expanded to C\foo.
Differential Revision: http://reviews.llvm.org/D19757
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268168
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Simon Pilgrim [Sat, 30 Apr 2016 20:41:52 +0000 (20:41 +0000)]
[InstCombine][AVX2] Added VPERMD/VPERMPS shuffle combining placeholder tests.
For future support for VPERMD/VPERMPS to generic shuffles combines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268166
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Saleem Abdulrasool [Sat, 30 Apr 2016 18:15:34 +0000 (18:15 +0000)]
CodeGen: convert to range based loops
Convert to using some range based loops, avoid unnecessary variables for
unchecked casts. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268165
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Craig Topper [Sat, 30 Apr 2016 17:59:49 +0000 (17:59 +0000)]
[X86] Reduce memory usage of MemOp2RegOp and RegOp2MemOp folding maps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268164
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Rafael Espindola [Sat, 30 Apr 2016 15:18:21 +0000 (15:18 +0000)]
Add missing override.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268163
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Marcin Koscielnicki [Sat, 30 Apr 2016 09:57:34 +0000 (09:57 +0000)]
[ASan] Add shadow offset for SystemZ.
SystemZ on Linux currently has 53-bit address space. In theory, the hardware
could support a full 64-bit address space, but that's not supported due to
kernel limitations (it'd require 5-level page tables), and there are no plans
for that. The default process layout stays within first 4TB of address space
(to avoid creating 4-level page tables), so any offset >= (1 << 42) is fine.
Let's use 1 << 52 here, ie. exactly half the address space.
I've originally used 7 << 50 (uses top 1/8th of the address space), but ASan
runtime assumes there's some space after the shadow area. While this is
fixable, it's simpler to avoid the issue entirely.
Also, I've originally wanted to have the shadow aligned to 1/8th the address
space, so that we can use OR like X86 to assemble the offset. I no longer
think it's a good idea, since using ADD enables us to load the constant just
once and use it with register + register indexed addressing.
Differential Revision: http://reviews.llvm.org/D19650
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268161
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Simon Pilgrim [Sat, 30 Apr 2016 07:32:19 +0000 (07:32 +0000)]
[InstCombine][AVX] Split off VPERMILVAR tests and added additional tests for UNDEF mask elements
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268159
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Simon Pilgrim [Sat, 30 Apr 2016 07:23:30 +0000 (07:23 +0000)]
[InstCombine][AVX] VPERMILVAR to shuffle combine to use general aggregate elements. NFCI.
Make use of Constant::getAggregateElement instead of checking constant types - first step towards adding support for UNDEF mask elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268158
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Sriraman Tallam [Sat, 30 Apr 2016 04:18:52 +0000 (04:18 +0000)]
Differential Revision: reviews.llvm.org/D19753
Delete Target Option PositionIndependentExecutable as PIE is now part of module flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268155
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Tom Stellard [Sat, 30 Apr 2016 04:04:48 +0000 (04:04 +0000)]
AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits
This was supposed to be part of r268143.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268154
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Hal Finkel [Sat, 30 Apr 2016 01:59:28 +0000 (01:59 +0000)]
[PowerPC/QPX] Fix the load/splat peephole with overlapping reads
If, in between the splat and the load (which does an implicit splat), there is
a read of the splat register, then that register must have another earlier
definition. In that case, we can't replace the load's destination register with
the splat's destination register.
Unfortunately, I don't have a small or non-fragile test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268152
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Amjad Aboud [Sat, 30 Apr 2016 01:44:07 +0000 (01:44 +0000)]
Reverting 268054 & 268063 as they caused PR27579.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268150
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Sanjoy Das [Sat, 30 Apr 2016 00:55:59 +0000 (00:55 +0000)]
[LowerGuardIntrinsics] Keep track of !make.implicit metadata
If a guard call being lowered by LowerGuardIntrinsics has the
`!make.implicit` metadata attached, then reattach the metadata to the
branch in the resulting expanded form of the intrinsic. This allows us
to implement null checks as guards and still get the benefit of implicit
null checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268148
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Lawrence Hu [Sat, 30 Apr 2016 00:51:22 +0000 (00:51 +0000)]
Reroll loops with multiple IV and negative step part 3
support multiple induction variables
This patch enable loop reroll for the following case:
for(int i=0; i<N; i += 2) {
S += *a++;
S += *a++;
};
Differential Revision: http://reviews.llvm.org/D16550
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268147
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Lang Hames [Sat, 30 Apr 2016 00:50:26 +0000 (00:50 +0000)]
[Orc] Fix the AArch64 resolver size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268146
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Vedant Kumar [Sat, 30 Apr 2016 00:32:54 +0000 (00:32 +0000)]
Fix a typo (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268144
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Tom Stellard [Sat, 30 Apr 2016 00:23:06 +0000 (00:23 +0000)]
AMDGPU/SI: Enable the post-ra scheduler
Summary:
This includes a hazard recognizer implementation to replace some of
the hazard handling we had during frame index elimination.
Reviewers: arsenm
Subscribers: qcolombet, arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18602
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268143
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Sanjoy Das [Sat, 30 Apr 2016 00:17:47 +0000 (00:17 +0000)]
[LowerGuardIntrinsics] Preserve calling conv when lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268142
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Sanjay Patel [Sat, 30 Apr 2016 00:12:54 +0000 (00:12 +0000)]
add minimal test to show dropped metadata
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268141
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Sanjay Patel [Sat, 30 Apr 2016 00:02:36 +0000 (00:02 +0000)]
remove the metadata added with r267827
We can demonstrate the 'select' bug and fix with a simpler test case.
The merged weight values are already tested in another test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268139
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Xinliang David Li [Fri, 29 Apr 2016 22:59:36 +0000 (22:59 +0000)]
Reapply r268107 after fixing a bug breaks debug build.
Makes the new method to set data needed by debug dump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268130
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