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Philippe Mathieu-Daudé [Mon, 19 Dec 2022 11:14:46 +0000 (12:14 +0100)]
target/mips: Restrict 'qapi-commands-machine.h' to system emulation
Since commit
a0e61807a3 ("qapi: Remove QMP events and commands from
user-mode builds") we don't generate the "qapi-commands-machine.h"
header in a user-emulation-only build.
Extract the QMP functions from cpu.c (which is always compiled) to
the new 'sysemu/mips-qmp-cmds.c' unit (which is only compiled when
system emulation is selected).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221219211034.70491-4-philmd@linaro.org>
Daniel Henrique Barboza [Wed, 11 Jan 2023 17:21:33 +0000 (14:21 -0300)]
hw/mips/boston: Rename MachineState 'mc' pointer to 'ms'
Follow the QEMU convention of naming MachineState pointers as 'ms' by
renaming the instance in create_fdt() where we're calling it 'mc'.
Cc: Paul Burton <paulburton@kernel.org>
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <
20230111172133.334735-1-dbarboza@ventanamicro.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Philippe Mathieu-Daudé [Thu, 5 Jan 2023 12:48:08 +0000 (13:48 +0100)]
hw/pci-host/bonito: Declare TYPE_BONITO_PCI_HOST_BRIDGE in header
Declare the TYPE_BONITO_PCI_HOST_BRIDGE QOM type in a
header to be able to access it from board code.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230105130710.49264-8-philmd@linaro.org>
Philippe Mathieu-Daudé [Thu, 5 Jan 2023 10:48:34 +0000 (11:48 +0100)]
hw/pci-host/bonito: Use 'bonito_pci' for PCI function #0 code
To make it easier to differentiate between the Host Bridge
object and its PCI function #0, rename bonito* as bonito_pci*.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230105130710.49264-4-philmd@linaro.org>
Philippe Mathieu-Daudé [Thu, 5 Jan 2023 10:47:04 +0000 (11:47 +0100)]
hw/pci-host/bonito: Use 'bonito_host' for PCI host bridge code
To make it easier to differentiate between the Host Bridge
object and its PCI function #0, rename bonito_pcihost* as
bonito_host*.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230105130710.49264-3-philmd@linaro.org>
Philippe Mathieu-Daudé [Thu, 26 Sep 2019 13:42:11 +0000 (15:42 +0200)]
hw/pci-host/bonito: Convert to 3-phase reset
Convert the TYPE_PCI_BONITO class to use 3-phase reset.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230105130710.49264-2-philmd@linaro.org>
Thomas Huth [Tue, 10 Jan 2023 09:53:51 +0000 (10:53 +0100)]
softmmu/rtc: Emit warning when using driftfix=slew on systems without mc146818
The 'slew' lost tick policy is only available on systems with a mc146818
RTC. On other systems, "-rtc driftfix=slew" is currently silently ignored.
Let's emit at least a warning in this case to make the users aware that
there is something wrong in their command line settings.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <
20230110095351.611724-5-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Thomas Huth [Tue, 10 Jan 2023 09:53:50 +0000 (10:53 +0100)]
hw/rtc/mc146818rtc: Make the mc146818 RTC device target independent
The only reason for this code being target dependent was the IRQ-counting
related code in rtc_policy_slew_deliver_irq(). Since these functions have
been moved into a new, separate file (kvm_irqcount.c) which is now always
compiled and linked if necessary, we can get rid of the #ifdef TARGET_I386
switches in mc146818rtc.c and declare it in the softmmu_ss instead of
specific_ss, so that the code only gets compiled once for all targets.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <
20230110095351.611724-4-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Thomas Huth [Tue, 10 Jan 2023 09:53:49 +0000 (10:53 +0100)]
hw/core/qdev-properties-system: Allow the 'slew' policy only on x86
The 'slew' tick policy is currently enforced to be only available on
x86 via some "#ifdef TARGET_I386" statements in mc146818rtc.c. We
want to get rid of those #ifdefs, so we need a different way of
checking whether the policy is allowed or not. Using the setter
function in hw/core/qdev-properties-system.c seems to be a good
place, so let's add a check here.
Suggested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <
20230110095351.611724-3-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Thomas Huth [Tue, 10 Jan 2023 09:53:48 +0000 (10:53 +0100)]
hw/intc: Extract the IRQ counting functions into a separate file
These IRQ counting functions will soon be required in binaries that
do not include the APIC code, too, so let's extract them into a
separate file that can be linked independently of the APIC code.
While we're at it, change the apic_* prefix into kvm_* since the
functions are used from the i8259 PIC (i.e. not the APIC), too.
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <
20230110095351.611724-2-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Mon, 9 Jan 2023 17:23:22 +0000 (18:23 +0100)]
hw/intc/i8259: Make using the isa_pic singleton more type-safe
This even spares some casts in hot code paths along the way.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20230109172347.1830-10-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Mon, 9 Jan 2023 17:23:21 +0000 (18:23 +0100)]
hw/usb/hcd-uhci: Introduce TYPE_ defines for device models
Suggested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <
20221204190553.3274-7-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Mon, 9 Jan 2023 17:23:20 +0000 (18:23 +0100)]
hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig
Tracking dependencies via Kconfig seems much cleaner.
Note that PIIX4 already depends on ACPI_PIIX4.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <
20230109172347.1830-8-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Mon, 9 Jan 2023 17:23:19 +0000 (18:23 +0100)]
hw/isa/piix4: Decouple INTx-to-LNKx routing which is board-specific
pci_map_irq_fn's in general seem to be board-specific, and PIIX4's
pci_slot_get_pirq() in particular seems very Malta-specific. So move the
latter to malta.c to 1/ keep the board logic in one place and 2/ avoid
PIIX4 to make assumptions about its board.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20230109172347.1830-7-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Mon, 9 Jan 2023 17:23:18 +0000 (18:23 +0100)]
hw/isa/piix3: Decouple INTx-to-LNKx routing which is board-specific
pci_map_irq_fn's in general seem to be board-specific. So move PIIX3's
pci_slot_get_pirq() to board code to not have PIIX3 make assuptions
about its board.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20230109172347.1830-6-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Mon, 9 Jan 2023 17:23:17 +0000 (18:23 +0100)]
hw/pci/pci: Factor out pci_bus_map_irqs() from pci_bus_irqs()
pci_bus_irqs() coupled together the assignment of pci_set_irq_fn and
pci_map_irq_fn to a PCI bus. This coupling gets in the way when the
pci_map_irq_fn is board-specific while the pci_set_irq_fn is device-
specific.
For example, both of QEMU's PIIX south bridge models have different
pci_map_irq_fn implementations which are board-specific rather than
device-specific. These implementations should therefore reside in board
code. The pci_set_irq_fn's, however, should stay in the device models
because they access memory internal to the model.
Factoring out pci_bus_map_irqs() from pci_bus_irqs() allows the
assignments to be decoupled, resolving the problem described above.
Note also how pci_vpb_realize() which gets touched in this commit
assigns different pci_map_irq_fn's depending on the board.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20230109172347.1830-5-shentey@gmail.com>
[PMD: Factor out in vfu_object_set_bus_irq()]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Philippe Mathieu-Daudé [Wed, 4 Jan 2023 11:13:00 +0000 (12:13 +0100)]
hw/pci/pci_host: Trace config accesses on unexisting functions
Currently we only emit trace events for existing PCI functions.
In order to ease debugging PCI enumeration process, also emit
for unexisting functions:
$ qemu-system-foo -trace pci_cfg_\*
...
pci_cfg_read empty 00:0a.4 @0x0 -> 0xffffffff
pci_cfg_read empty 00:0a.5 @0x0 -> 0xffffffff
pci_cfg_read empty 00:0a.6 @0x0 -> 0xffffffff
pci_cfg_read empty 00:0a.7 @0x0 -> 0xffffffff
pci_cfg_read pcnet 00:0b.0 @0x0 -> 0x20001022
pci_cfg_read empty 00:0c.0 @0x0 -> 0xffffffff
pci_cfg_read empty 00:0d.0 @0x0 -> 0xffffffff
pci_cfg_read empty 00:0e.0 @0x0 -> 0xffffffff
pci_cfg_read empty 00:0f.0 @0x0 -> 0xffffffff
pci_cfg_read empty 00:10.0 @0x0 -> 0xffffffff
pci_cfg_read empty 00:11.0 @0x0 -> 0xffffffff
pci_cfg_read cirrus-vga 00:12.0 @0x0 -> 0xb81013
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230104133935.4639-2-philmd@linaro.org>
Paolo Bonzini [Tue, 10 Jan 2023 08:49:42 +0000 (09:49 +0100)]
mips: Always include nanomips disassembler
Since the nanomips disassembler is not C++ code anymore, it need not
depend on link_language == cpp. Always include it and remove the
CONFIG_NANOMIPS_DIS symbol.
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <
20230110084942.299460-1-pbonzini@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Paolo Bonzini [Sun, 18 Dec 2022 00:06:45 +0000 (01:06 +0100)]
mips: Remove support for trap and emulate KVM
This support was limited to the Malta board, drop it.
I do not have a machine that can run VZ KVM, so I am assuming
that it works for -M malta as well.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221221091718.71844-1-philmd@linaro.org>
Philippe Mathieu-Daudé [Wed, 26 Oct 2022 19:06:36 +0000 (21:06 +0200)]
hw/isa/piix4: Correct IRQRC[A:D] reset values
IRQRC[A:D] registers reset value is 0x80. We were forcing
the MIPS Malta machine routing to be able to boot a Linux
kernel without any bootloader.
We now have these registers initialized in the Malta machine
write_bootloader(), so we can use the correct reset values.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <
20221027204720.33611-4-philmd@linaro.org>
Philippe Mathieu-Daudé [Tue, 25 Oct 2022 23:54:46 +0000 (01:54 +0200)]
hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader
Linux kernel expects the northbridge & southbridge chipsets
configured by the BIOS firmware. We emulate that by writing
a tiny bootloader code in write_bootloader().
Upon introduction in commit
5c2b87e34d ("PIIX4 support"),
the PIIX4 configuration space included values specific to
the Malta board.
Set the Malta-specific IRQ routing values in the embedded
bootloader, so the next commit can remove the Malta specific
bits from the PIIX4 PCI-ISA bridge and make it generic
(matching the real hardware).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <
20221027204720.33611-3-philmd@linaro.org>
Philippe Mathieu-Daudé [Tue, 25 Oct 2022 23:53:53 +0000 (01:53 +0200)]
hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition
The PIIX4 PCI-ISA bridge function is always located at 10:0.
Since we want to re-use its address, add the PIIX4_PCI_DEVFN
definition.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <
20221027204720.33611-2-philmd@linaro.org>
Philippe Mathieu-Daudé [Sun, 11 Dec 2022 20:25:48 +0000 (21:25 +0100)]
hw/mips/malta: Merge common BL code as bl_setup_gt64120_jump_kernel()
Merge common code shared between write_bootloader() and
write_bootloader_nanomips() into bl_setup_gt64120_jump_kernel().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221211204533.85359-12-philmd@linaro.org>
Philippe Mathieu-Daudé [Sun, 11 Dec 2022 18:08:50 +0000 (19:08 +0100)]
hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (5/5)
Part 5/5: Convert jumping to kernel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221211204533.85359-11-philmd@linaro.org>
Philippe Mathieu-Daudé [Sun, 11 Dec 2022 17:47:21 +0000 (18:47 +0100)]
hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (4/5)
Part 4/5: Convert GT64120 ISD base address setup
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221211204533.85359-10-philmd@linaro.org>
Philippe Mathieu-Daudé [Sun, 11 Dec 2022 17:54:49 +0000 (18:54 +0100)]
hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (3/5)
Part 3/5: Convert PCI0 I/O BAR setup
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221211204533.85359-9-philmd@linaro.org>
Philippe Mathieu-Daudé [Sun, 11 Dec 2022 17:49:13 +0000 (18:49 +0100)]
hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (2/5)
Part 2/5: Convert PCI0 MEM0 BAR setup
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221211204533.85359-8-philmd@linaro.org>
Philippe Mathieu-Daudé [Sun, 11 Dec 2022 17:42:23 +0000 (18:42 +0100)]
hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (1/5)
Similarly to how commit
0c8427baf0 ("hw/mips/malta: Use bootloader
helper to set BAR registers") converted write_bootloader(), convert
the equivalent write_bootloader_nanomips(), allowing us to modify
the bootloader code more easily in the future.
Part 1/5: Convert PCI0 MEM1 BAR setup
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221211204533.85359-7-philmd@linaro.org>
Philippe Mathieu-Daudé [Sun, 11 Dec 2022 18:55:41 +0000 (19:55 +0100)]
hw/mips/bootloader: Implement nanoMIPS JALRc opcode generator
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221211204533.85359-6-philmd@linaro.org>
Philippe Mathieu-Daudé [Sun, 11 Dec 2022 17:34:09 +0000 (18:34 +0100)]
hw/mips/bootloader: Implement nanoMIPS LI (LUI+ORI) opcode generator
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221211204533.85359-5-philmd@linaro.org>
Philippe Mathieu-Daudé [Sun, 11 Dec 2022 17:33:52 +0000 (18:33 +0100)]
hw/mips/bootloader: Implement nanoMIPS SW opcode generator
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221211204533.85359-4-philmd@linaro.org>
Philippe Mathieu-Daudé [Wed, 2 Nov 2022 15:25:46 +0000 (16:25 +0100)]
hw/mips/bootloader: Implement nanoMIPS NOP opcode generator
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20221211204533.85359-3-philmd@linaro.org>
Philippe Mathieu-Daudé [Wed, 2 Nov 2022 15:24:39 +0000 (16:24 +0100)]
hw/mips/bootloader: Handle buffers as opaque arrays
It is irrelevant to the API what the buffers to fill are made of.
In particular, some MIPS ISA have 16-bit wide instructions.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20221211204533.85359-2-philmd@linaro.org>
Philippe Mathieu-Daudé [Fri, 30 Dec 2022 20:53:42 +0000 (21:53 +0100)]
tests/avocado: Add tests booting YAMON ROM on MIPS Malta machines
Add quick tests booting YAMON:
$ avocado --show=app,console run -t machine:malta tests/avocado/machine_mips_malta.py
(1/2) tests/avocado/machine_mips_malta.py:MaltaMachine.test_mipsel_malta_yamon:
console: YAMON ROM Monitor, Revision 02.22.
console: Copyright (c) 1999-2007 MIPS Technologies, Inc. - All Rights Reserved.
console: For a list of available commands, type 'help'.
console: Compilation time = May 24 2013 12:16:34 (pburton)
console: Board type/revision = 0x02 (Malta) / 0x00
console: Core board type/revision = 0x01 (CoreLV) / 0x00
console: System controller/revision = Galileo / GT_64120A-B-0
console: FPGA revision = 0x0000
console: MAC address = ff.ff.ff.ff.ff.ff
console: Board S/N =
0123456789
console: PCI bus frequency = 33.33 MHz
console: Processor Company ID/options = 0x01 (MIPS Technologies, Inc.) / 0x00
console: Processor ID/revision = 0x93 (MIPS 24Kf) / 0x00
console: Endianness = Little
console: CPU/Bus frequency = 333 MHz / 419 MHz
console: Coherency = None
console: Flash memory size = 4 MByte
console: SDRAM size = 128 MByte
console: First free SDRAM address = 0x800c32f0
console: WARNING: Environment variable flash area is invalid!
console: HINT : Perform "erase -e"
console: YAMON>
PASS (1.88 s)
(2/2) tests/avocado/machine_mips_malta.py:MaltaMachine.test_mips64el_malta_yamon:
...
console: System controller/revision = Galileo / GT_64120A-B-0
console: Processor Company ID/options = 0x01 (MIPS Technologies, Inc.) / 0x00
console: Processor ID/revision = 0x82 (MIPS 20Kc) / 0xa0
...
console: YAMON>
PASS (1.89 s)
RESULTS : PASS 2 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0
JOB TIME : 4.57 s
YAMON does some endian-swapped acceses on the ISD<->PCI CFG/DATA
registers. These tests are useful to debug cross-endianness issues,
in particular on big-endian host.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230104133935.4639-7-philmd@linaro.org>
Philippe Mathieu-Daudé [Fri, 13 Jan 2023 08:20:12 +0000 (09:20 +0100)]
hw/mips/gt64xxx_pci: Move it to hw/pci-host/
The GT-64120 is a north-bridge, and it is not MIPS specific.
Move it with the other north-bridge devices.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20221209151533.69516-8-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Philippe Mathieu-Daudé [Fri, 21 May 2021 13:41:49 +0000 (15:41 +0200)]
hw/mips/meson: Make gt64xxx_pci.c endian-agnostic
The single machine using this device explicitly sets its
endianness. We don't need to set a default. This allow us
to remove the target specificity from the build system.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <
20221209151533.69516-7-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Philippe Mathieu-Daudé [Tue, 25 Oct 2022 23:54:06 +0000 (01:54 +0200)]
hw/mips/malta: Explicit GT64120 endianness upon device creation
Propagate the controller endianess from the machine, setting
the "cpu-little-endian" property.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20221209151533.69516-6-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Philippe Mathieu-Daudé [Mon, 24 Jun 2019 15:06:24 +0000 (17:06 +0200)]
hw/mips/gt64xxx_pci: Add a 'cpu-little-endian' qdev property
This device does not have to be TARGET-dependent.
Add a 'cpu_big_endian' property which sets the byte-swapping
options if required.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20221220113436.14299-5-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Philippe Mathieu-Daudé [Wed, 26 Oct 2022 00:00:42 +0000 (02:00 +0200)]
hw/mips/gt64xxx_pci: Manage endian bits with the RegisterFields API
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20221220113436.14299-4-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Philippe Mathieu-Daudé [Tue, 2 Mar 2021 22:42:56 +0000 (23:42 +0100)]
hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole
Per the comment in the Malta board, the [0x0000.0000-0x2000.0000]
range is decoded by the GT64120, so move the "empty_slot" there.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20221209151533.69516-3-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Philippe Mathieu-Daudé [Sun, 10 Mar 2019 01:25:07 +0000 (02:25 +0100)]
hw/mips/Kconfig: Introduce CONFIG_GT64120 to select gt64xxx_pci.c
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <
20221209151533.69516-2-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Philippe Mathieu-Daudé [Wed, 4 Jan 2023 09:03:14 +0000 (10:03 +0100)]
hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps
GT64120's PCI endianness swapping works on little-endian hosts,
but doesn't on big-endian ones. Instead of complicating how
CFGADDR/CFGDATA registers deal with endianness, use the existing
MemoryRegionOps from hw/pci/pci_host.c. Doing so also reduce the
access to internal PCI_HOST_BRIDGE fields.
Map the PCI_HOST_BRIDGE MemoryRegionOps into the corresponding
CFGADDR/CFGDATA regions in the ISD MMIO and remove the unused
code in the current ISD read/write handlers.
Update the mapping when PCI0_CMD register is accessed (in case
the endianness is changed).
This allows using the GT64120 on a big-endian host (and boot
the MIPS Malta machine in little-endian).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230104133935.4639-6-philmd@linaro.org>
Philippe Mathieu-Daudé [Wed, 4 Jan 2023 08:35:22 +0000 (09:35 +0100)]
hw/mips/gt64xxx_pci: Accumulate address space changes
Single registers access in ISD can produce multiple changes
in the address spaces. To reduce computational effort,
accumulate these as a single memory transaction.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230104133935.4639-5-philmd@linaro.org>
Philippe Mathieu-Daudé [Fri, 30 Dec 2022 14:35:24 +0000 (15:35 +0100)]
hw/mips/malta: Trace FPGA LEDs/ASCII display updates
The FPGA LEDs/ASCII display is mostly used by the bootloader
to show very low-level debug info. QEMU connects its output
to a character device backend, which is not very practical
to correlate with ASM instruction executed, interrupts or
MMIO accesses. Also, the display discard the previous states.
To ease bootloader debugging experience, add a pair of trace
events. Such events can be analyzed over time or diff-ed
between different runs.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230104133935.4639-4-philmd@linaro.org>
Philippe Mathieu-Daudé [Fri, 30 Dec 2022 14:35:24 +0000 (15:35 +0100)]
hw/mips/malta: Split FPGA LEDs/ASCII display updates
No need to refresh the ASCII bar when a LED is toggled
(and vice versa).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230104133935.4639-3-philmd@linaro.org>
Peter Maydell [Thu, 12 Jan 2023 13:51:36 +0000 (13:51 +0000)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* Atomic memslot updates for KVM (Emanuele, David)
* libvhost-user/libvduse warnings fixes (Marcel)
* i386 TCG fixes (Joe, myself)
* Remove compilation errors when -Werror=maybe-uninitialized (Eric)
* fix GLIB_VERSION for cross-compilation (Paolo)
# -----BEGIN PGP SIGNATURE-----
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# =0b+g
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 11 Jan 2023 09:45:42 GMT
# gpg: using RSA key
F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (29 commits)
configure: remove backwards-compatibility code
target/i386: fix operand size of unary SSE operations
libvduse: Add extra compiler warnings
libvhost-user: Add extra compiler warnings
libvhost-user: Fix assignment in vring_set_avail_event
libvduse: Fix assignment in vring_set_avail_event
libvduse: Switch to unsigned int for inuse field in struct VduseVirtq
libvduse: Provide _GNU_SOURCE when compiling outside of QEMU
libvhost-user: Change dev->postcopy_ufd assignment to make it C90 compliant
libvhost-user: Declare uffdio_register early to make it C90 compliant
libvhost-user: Use unsigned int i for some for-loop iterations
libvhost-user: Cast rc variable to avoid compiler warning
libvhost-user: Replace typeof with __typeof__
libvhost-user: Provide _GNU_SOURCE when compiling outside of QEMU
hw/display: avoid creating empty loadable modules
enforce use of G_GNUC_PRINTF attributes
tests: add G_GNUC_PRINTF for various functions
util/error: add G_GNUC_PRINTF for various functions
tools/virtiofsd: add G_GNUC_PRINTF for logging functions
hw/xen: use G_GNUC_PRINTF/SCANF for various functions
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 11 Jan 2023 16:41:13 +0000 (16:41 +0000)]
Merge tag 'nvme-next-pull-request' of https://gitlab.com/birkelund/qemu into staging
hw/nvme updates
# -----BEGIN PGP SIGNATURE-----
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# gpg: Signature made Wed 11 Jan 2023 07:51:17 GMT
# gpg: using RSA key
522833AA75E2DCE6A24766C04DE1AF316D4F0DE9
# gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [full]
# gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [full]
# Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838
# Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9
* tag 'nvme-next-pull-request' of https://gitlab.com/birkelund/qemu:
hw/nvme: cleanup error reporting in nvme_init_pci()
hw/nvme: clean up confusing use of errp/local_err
hw/nvme: fix missing cq eventidx update
hw/nvme: fix missing endian conversions for doorbell buffers
hw/nvme: rename shadow doorbell related trace events
hw/nvme: use QOM accessors
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Paolo Bonzini [Thu, 14 Jul 2022 12:58:55 +0000 (14:58 +0200)]
configure: remove backwards-compatibility code
The cmd_line.txt mangling is only needed when rebuilding from very old
trees and is kept mostly as an example of how to extend it. However,
Meson 0.63 introduces a deprecation mechanism for meson_options.txt
that can be used instead, so get rid of our home-grown hack.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Sat, 7 Jan 2023 17:14:20 +0000 (18:14 +0100)]
target/i386: fix operand size of unary SSE operations
VRCPSS, VRSQRTSS and VCVTSx2Sx have a 32-bit or 64-bit memory operand,
which is represented in the decoding tables by X86_VEX_REPScalar. Add it
to the tables, and make validate_vex() handle the case of an instruction
that is in exception type 4 without the REP prefix and exception type 5
with it; this is the cas of VRCP and VRSQRT.
Reported-by: yongwoo <https://gitlab.com/yongwoo36>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1377
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:51 +0000 (21:36 +0100)]
libvduse: Add extra compiler warnings
In case libvhost-user is used externally, that projects compiler
warnings might be more strict. Enforce an extra set of compiler warnings
to catch issues early on.
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
08daa1896ad8824e17d57d6a970bc0b4bee73ece.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:50 +0000 (21:36 +0100)]
libvhost-user: Add extra compiler warnings
In case libvhost-user is used externally, that projects compiler
warnings might be more strict. Enforce an extra set of compiler warnings
to catch issues early on.
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
737ebf2e697f8640558e6f73d96a692711f548f6.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:49 +0000 (21:36 +0100)]
libvhost-user: Fix assignment in vring_set_avail_event
Since it was proposed to change the code in libvduse.c to use memcpy
instead of an assignment, the code in libvhost-user.c should also be
changed to use memcpy.
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
502b22723264db064e4b05008233a9c1f2f8aaaa.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:48 +0000 (21:36 +0100)]
libvduse: Fix assignment in vring_set_avail_event
Since the assignment is causing a compiler warning, fix it by using
memcpy instead.
CC libvduse.o
libvduse.c: In function ‘vring_set_avail_event’:
libvduse.c:603:7: error: dereferencing type-punned pointer will break strict-aliasing rules [-Werror=strict-aliasin]
603 | *((uint16_t *)&vq->vring.used->ring[vq->vring.num]) = htole16(val);
| ~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Suggested-by: Xie Yongji <xieyongji@bytedance.com>
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
4a0fe2a6436464473119fdbf0bc4076b36fbb37f.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:47 +0000 (21:36 +0100)]
libvduse: Switch to unsigned int for inuse field in struct VduseVirtq
It seems there is no need to keep the inuse field signed and end up with
compiler warnings for sign-compare.
CC libvduse.o
libvduse.c: In function ‘vduse_queue_pop’:
libvduse.c:789:19: error: comparison of integer expressions of different signedness: ‘int’ and ‘unsigned int’ [-Werror=sign-compare]
789 | if (vq->inuse >= vq->vring.num) {
| ^~
Instead of casting the comparison to unsigned int, just make the inuse
field unsigned int in the fist place.
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Reviewed-by: Xie Yongji <xieyongji@bytedance.com>
Message-Id: <
9fe3fd8b042e048bd04d506ca6e43d738b5c45b7.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:46 +0000 (21:36 +0100)]
libvduse: Provide _GNU_SOURCE when compiling outside of QEMU
When the libvduse sources are used by another project, it can not be
guaranteed that _GNU_SOURCE is set by the build system. If it is for
example not set, errors like this show up.
CC libvduse.o
libvduse.c: In function ‘vduse_log_get’:
libvduse.c:172:9: error: implicit declaration of function ‘ftruncate’; did you mean ‘strncat’? [-Werror=implicit-function-declaration]
172 | if (ftruncate(fd, size) == -1) {
| ^~~~~~~~~
| strncat
The simplest way to allow external complication of libvduse.[ch] by
setting _GNU_SOURCE if it is not already set by the build system.
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Message-Id: <
407f3665f0605df936e5bfe60831d180edfb8cca.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:45 +0000 (21:36 +0100)]
libvhost-user: Change dev->postcopy_ufd assignment to make it C90 compliant
The assignment of dev->postcopy_ufd can be moved into an else clause and
then the code becomes C90 compliant.
CC libvhost-user.o
libvhost-user.c: In function ‘vu_set_postcopy_advise’:
libvhost-user.c:1625:5: error: ISO C90 forbids mixed declarations and code [-Werror=declaration-after-statement]
1625 | struct uffdio_api api_struct;
| ^~~~~~
Understandable, it might be desired to avoid else clauses, but in this
case it seems clear enough and frankly the dev->postcopy_ufd is only
assigned once.
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
74db52afb1203c4580ffc7fa462b4b2ba260a353.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:44 +0000 (21:36 +0100)]
libvhost-user: Declare uffdio_register early to make it C90 compliant
When using libvhost-user source in an external project that wants to
comply with the C90 standard, it is best to declare variables before
code.
CC libvhost-user.o
libvhost-user.c: In function ‘generate_faults’:
libvhost-user.c:683:9: error: ISO C90 forbids mixed declarations and code [-Werror=declaration-after-statement]
683 | struct uffdio_register reg_struct;
| ^~~~~~
In this case, it is also simple enough and doesn't cause any extra
ifdef additions.
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
556c2d00c01fa134d13c0371d4014c90694c2943.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:43 +0000 (21:36 +0100)]
libvhost-user: Use unsigned int i for some for-loop iterations
The sign-compare warning also hits some of the for-loops, but it easy
fixed by just making the iterator variable unsigned int.
CC libvhost-user.o
libvhost-user.c: In function ‘vu_gpa_to_va’:
libvhost-user.c:223:19: error: comparison of integer expressions of different signedness: ‘int’ and ‘uint32_t’ {aka ‘unsigned int’} [-Werror=sign-compare]
223 | for (i = 0; i < dev->nregions; i++) {
| ^
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Message-Id: <
decb925e1a6fb9538738d2570bda2804f888fa15.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:42 +0000 (21:36 +0100)]
libvhost-user: Cast rc variable to avoid compiler warning
The assert from recvmsg() return value against an uint32_t size field
from a protocol struct throws a compiler warning.
CC libvhost-user.o
In file included from libvhost-user.c:27:
libvhost-user.c: In function ‘vu_message_read_default’:
libvhost-user.c:363:19: error: comparison of integer expressions of different signedness: ‘int’ and ‘uint32_t’ {aka ‘unsigned int’} [-Werror=sign-compare]
363 | assert(rc == vmsg->size);
| ^~
This is not critical, but annoying when the libvhost-user source are
used in an external project that has this compiler warning switched on.
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Message-Id: <
7a791e27b7bd3e0a8b8cc8fbb15090a870d226d5.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:41 +0000 (21:36 +0100)]
libvhost-user: Replace typeof with __typeof__
Strictly speaking only -std=gnu99 support the usage of typeof and for
easier inclusion in external projects, it is better to use __typeof__.
CC libvhost-user.o
libvhost-user.c: In function ‘vu_log_queue_fill’:
libvhost-user.c:86:13: error: implicit declaration of function ‘typeof’ [-Werror=implicit-function-declaration]
86 | typeof(x) _min1 = (x); \
| ^~~~~~
Changing these two users of typeof makes the compiler happy and no extra
flags or pragmas need to be provided.
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
981aa822bcaaa2b8d74f245339a99a85c25b346f.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Marcel Holtmann [Thu, 22 Dec 2022 20:36:40 +0000 (21:36 +0100)]
libvhost-user: Provide _GNU_SOURCE when compiling outside of QEMU
Then the libvhost-user sources are used by another project, it can not
be guaranteed that _GNU_SOURCE is set by the build system. If it is for
example not set, errors like this show up.
CC libvhost-user.o
libvhost-user.c: In function ‘vu_panic’:
libvhost-user.c:195:9: error: implicit declaration of function ‘vasprintf’; did you mean ‘vsprintf’? [-Werror=implicit-function-declaration]
195 | if (vasprintf(&buf, msg, ap) < 0) {
| ^~~~~~~~~
| vsprintf
The simplest way to allow external complication of libvhost-user.[ch] is
by setting _GNU_SOURCE if it is not already set by the build system.
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Message-Id: <
be27dcc747a6b5cc6f8ae3f79e0b79171382bcef.
1671741278.git.marcel@holtmann.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Daniel P. Berrangé [Mon, 19 Dec 2022 12:58:30 +0000 (12:58 +0000)]
hw/display: avoid creating empty loadable modules
When using --disable-virglrenderer, QEMU still creates
hw-display-virtio-gpu-gl.so
hw-display-virtio-vga-gl.so
hw-display-virtio-gpu-pci-gl.so
but when these are loaded, they provide no functionality as the code
which registers types is not compiled in. Funtionally this is
relatively harmless, because QEMU is fine loading a module with no
types.
This is rather confusing for users and OS distro maintainers though,
as they think they have the GL functionality built, but in fact the
module they are looking at provides nothing of value.
The root cause is the use of 'when/if_true' rules when adding sources
to the module source set. If all the rules evaluate to false, then we
have declared the module, but not added anything to it. We need to
put declaration of the entire module inside a condition based on
existance of the 3rd party library deps that are mandatory.
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1352
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <
20221219125830.
2369169-1-berrange@redhat.com>
[Do not check for pixman. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Daniel P. Berrangé [Mon, 19 Dec 2022 13:02:05 +0000 (08:02 -0500)]
enforce use of G_GNUC_PRINTF attributes
We've been very gradually adding G_GNUC_PRINTF annotations
to functions over years. This has been useful in detecting
certain malformed printf strings, or cases where we pass
user data as the printf format which is a potential security
flaw.
Given the inherant memory corruption danger in use of format
strings vs mis-matched variadic arguments, it is worth applying
G_GNUC_PRINTF to all functions using printf, even if we know
they are safe.
The compilers can reasonably reliably identify such places
with the -Wsuggest-attribute=format / -Wmissing-format-attribute
flags.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <
20221219130205.687815-7-berrange@redhat.com>
[-Wsuggest-attribute=format and -Wmissing-format-attribute are
synonyms, only include one; disable it for testfloat. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Daniel P. Berrangé [Mon, 19 Dec 2022 13:02:04 +0000 (08:02 -0500)]
tests: add G_GNUC_PRINTF for various functions
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <
20221219130205.687815-6-berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Daniel P. Berrangé [Mon, 19 Dec 2022 13:02:03 +0000 (08:02 -0500)]
util/error: add G_GNUC_PRINTF for various functions
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20221219130205.687815-5-berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Daniel P. Berrangé [Mon, 19 Dec 2022 13:02:02 +0000 (08:02 -0500)]
tools/virtiofsd: add G_GNUC_PRINTF for logging functions
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <
20221219130205.687815-4-berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Daniel P. Berrangé [Mon, 19 Dec 2022 13:02:01 +0000 (08:02 -0500)]
hw/xen: use G_GNUC_PRINTF/SCANF for various functions
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Acked-by: Anthony PERARD <anthony.perard@citrix.com>
Message-Id: <
20221219130205.687815-3-berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Daniel P. Berrangé [Mon, 19 Dec 2022 13:02:00 +0000 (08:02 -0500)]
disas: add G_GNUC_PRINTF to gstring_printf
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <
20221219130205.687815-2-berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Daniel P. Berrangé [Thu, 3 Nov 2022 17:30:43 +0000 (13:30 -0400)]
gitlab: remove redundant setting of PKG_CONFIG_PATH
The PKG_CONFIG_PATH variable is not defined in GitLab CI
envs and even if it was, we don't need to set it to its
existing value.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <
20221103173044.
3969425-2-berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Mon, 19 Dec 2022 09:17:09 +0000 (10:17 +0100)]
chardev: clean up chardev-parallel.c
Replace HAVE_CHARDEV_PARPORT with a Meson conditional, remove unnecessary
defines, and close the file descriptor on FreeBSD/DragonFly.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eric Auger [Thu, 22 Dec 2022 14:01:58 +0000 (15:01 +0100)]
target/i386: Remove compilation errors when -Werror=maybe-uninitialized
To avoid compilation errors when -Werror=maybe-uninitialized is used,
add a default case with g_assert_not_reached().
Otherwise with GCC 11.3.1 "cc (GCC) 11.3.1
20220421 (Red Hat 11.3.1-2)"
we get:
../target/i386/ops_sse.h: In function ‘helper_vpermdq_ymm’:
../target/i386/ops_sse.h:2495:13: error: ‘r3’ may be used
uninitialized in this function [-Werror=maybe-uninitialized]
2495 | d->Q(3) = r3;
| ~~~~~~~~^~~~
../target/i386/ops_sse.h:2494:13: error: ‘r2’ may be used
uninitialized in this function [-Werror=maybe-uninitialized]
2494 | d->Q(2) = r2;
| ~~~~~~~~^~~~
../target/i386/ops_sse.h:2493:13: error: ‘r1’ may be used
uninitialized in this function [-Werror=maybe-uninitialized]
2493 | d->Q(1) = r1;
| ~~~~~~~~^~~~
../target/i386/ops_sse.h:2492:13: error: ‘r0’ may be used
uninitialized in this function [-Werror=maybe-uninitialized]
2492 | d->Q(0) = r0;
| ~~~~~~~~^~~~
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Message-Id: <
20221222140158.
1260748-1-eric.auger@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
David Hildenbrand [Fri, 11 Nov 2022 15:47:58 +0000 (10:47 -0500)]
kvm: Atomic memslot updates
If we update an existing memslot (e.g., resize, split), we temporarily
remove the memslot to re-add it immediately afterwards. These updates
are not atomic, especially not for KVM VCPU threads, such that we can
get spurious faults.
Let's inhibit most KVM ioctls while performing relevant updates, such
that we can perform the update just as if it would happen atomically
without additional kernel support.
We capture the add/del changes and apply them in the notifier commit
stage instead. There, we can check for overlaps and perform the ioctl
inhibiting only if really required (-> overlap).
To keep things simple we don't perform additional checks that wouldn't
actually result in an overlap -- such as !RAM memory regions in some
cases (see kvm_set_phys_mem()).
To minimize cache-line bouncing, use a separate indicator
(in_ioctl_lock) per CPU. Also, make sure to hold the kvm_slots_lock
while performing both actions (removing+re-adding).
We have to wait until all IOCTLs were exited and block new ones from
getting executed.
This approach cannot result in a deadlock as long as the inhibitor does
not hold any locks that might hinder an IOCTL from getting finished and
exited - something fairly unusual. The inhibitor will always hold the BQL.
AFAIKs, one possible candidate would be userfaultfd. If a page cannot be
placed (e.g., during postcopy), because we're waiting for a lock, or if the
userfaultfd thread cannot process a fault, because it is waiting for a
lock, there could be a deadlock. However, the BQL is not applicable here,
because any other guest memory access while holding the BQL would already
result in a deadlock.
Nothing else in the kernel should block forever and wait for userspace
intervention.
Note: pause_all_vcpus()/resume_all_vcpus() or
start_exclusive()/end_exclusive() cannot be used, as they either drop
the BQL or require to be called without the BQL - something inhibitors
cannot handle. We need a low-level locking mechanism that is
deadlock-free even when not releasing the BQL.
Signed-off-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com>
Tested-by: Emanuele Giuseppe Esposito <eesposit@redhat.com>
Message-Id: <
20221111154758.
1372674-4-eesposit@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Emanuele Giuseppe Esposito [Fri, 11 Nov 2022 15:47:57 +0000 (10:47 -0500)]
KVM: keep track of running ioctls
Using the new accel-blocker API, mark where ioctls are being called
in KVM. Next, we will implement the critical section that will take
care of performing memslots modifications atomically, therefore
preventing any new ioctl from running and allowing the running ones
to finish.
Signed-off-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com>
Message-Id: <
20221111154758.
1372674-3-eesposit@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Emanuele Giuseppe Esposito [Fri, 11 Nov 2022 15:47:56 +0000 (10:47 -0500)]
accel: introduce accelerator blocker API
This API allows the accelerators to prevent vcpus from issuing
new ioctls while execting a critical section marked with the
accel_ioctl_inhibit_begin/end functions.
Note that all functions submitting ioctls must mark where the
ioctl is being called with accel_{cpu_}ioctl_begin/end().
This API requires the caller to always hold the BQL.
API documentation is in sysemu/accel-blocker.h
Internally, it uses a QemuLockCnt together with a per-CPU QemuLockCnt
(to minimize cache line bouncing) to keep avoid that new ioctls
run when the critical section starts, and a QemuEvent to wait
that all running ioctls finish.
Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20221111154758.
1372674-2-eesposit@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Joe Richey [Sun, 25 Dec 2022 00:16:04 +0000 (16:16 -0800)]
i386: Emit correct error code for 64-bit IDT entry
When in 64-bit mode, IDT entiries are 16 bytes, so `intno * 16` is used
for base/limit/offset calculations. However, even in 64-bit mode, the
exception error code still uses bits [3,16) for the invlaid interrupt
index.
This means the error code should still be `intno * 8 + 2` even in 64-bit
mode.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1382
Signed-off-by: Joe Richey <joerichey@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Sat, 7 Jan 2023 13:32:41 +0000 (14:32 +0100)]
configure: fix GLIB_VERSION for cross-compilation
configure uses "pkg-config" directly so that GLIB_VERSION is always based
on host glib version. To correctly handle cross-compilation it should use
"$pkg_config" and take GLIB_VERSION from the cross-compiled glib.
Reported-by: Валентин <val15032008@mail.ru>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1414
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Klaus Jensen [Wed, 9 Nov 2022 10:40:16 +0000 (11:40 +0100)]
hw/nvme: cleanup error reporting in nvme_init_pci()
Replace the local Error variable with errp and ERRP_GUARD() and change
the return value to bool.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Klaus Jensen [Wed, 9 Nov 2022 10:40:11 +0000 (11:40 +0100)]
hw/nvme: clean up confusing use of errp/local_err
Remove an unnecessary local Error value in nvme_realize(). In the
process, change nvme_check_constraints() to return a bool.
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Peter Maydell [Mon, 9 Jan 2023 15:54:31 +0000 (15:54 +0000)]
Merge tag 'pull-request-2023-01-09' of https://gitlab.com/thuth/qemu into staging
* s390x header clean-ups from Philippe
* Rework and improvements of the EINTR handling by Nikita
* Deprecate the -no-hpet command line option
* Disable the qtests in the 32-bit Windows CI job again
* Some other misc fixes here and there
# gpg: Signature made Mon 09 Jan 2023 14:21:19 GMT
# gpg: using RSA key
27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2023-01-09' of https://gitlab.com/thuth/qemu:
.gitlab-ci.d/windows: Do not run the qtests in the msys2-32bit job
error handling: Use RETRY_ON_EINTR() macro where applicable
Refactoring: refactor TFR() macro to RETRY_ON_EINTR()
docs/interop: Change the vnc-ledstate-Pseudo-encoding doc into .rst
i386: Deprecate the -no-hpet QEMU command line option
tests/qtest/bios-tables-test: Replace -no-hpet with hpet=off machine parameter
tests/readconfig: spice doesn't support unix socket on windows yet
target/s390x: Restrict sysemu/reset.h to system emulation
target/s390x/tcg/excp_helper: Restrict system headers to sysemu
target/s390x/tcg/misc_helper: Remove unused "memory.h" include
hw/s390x/pv: Restrict Protected Virtualization to sysemu
exec/memory: Expose memory_region_access_valid()
MAINTAINERS: Add MIPS-related docs and configs to the MIPS architecture section
tests/vm: Update get_default_jobs() to work on non-x86_64 non-KVM hosts
qemu-iotests/stream-under-throttle: do not shutdown QEMU
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Thomas Huth [Thu, 5 Jan 2023 19:30:58 +0000 (20:30 +0100)]
.gitlab-ci.d/windows: Do not run the qtests in the msys2-32bit job
The qtests are not stable in the msys2-32bit job yet - especially
the test-hmp and the qom-test are failing randomly. Until this is
fixed, let's better disable the qtests here again to avoid failing
CI tests.
Message-Id: <
20230105204819.26992-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Nikita Ivanov [Sun, 23 Oct 2022 09:04:22 +0000 (12:04 +0300)]
error handling: Use RETRY_ON_EINTR() macro where applicable
There is a defined RETRY_ON_EINTR() macro in qemu/osdep.h
which handles the same while loop.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/415
Signed-off-by: Nikita Ivanov <nivanov@cloudlinux.com>
Message-Id: <
20221023090422.242617-3-nivanov@cloudlinux.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
[thuth: Dropped the hunk that changed socket_accept() in libqtest.c]
Signed-off-by: Thomas Huth <thuth@redhat.com>
Nikita Ivanov [Sun, 23 Oct 2022 09:04:21 +0000 (12:04 +0300)]
Refactoring: refactor TFR() macro to RETRY_ON_EINTR()
Rename macro name to more transparent one and refactor
it to expression.
Signed-off-by: Nikita Ivanov <nivanov@cloudlinux.com>
Message-Id: <
20221023090422.242617-2-nivanov@cloudlinux.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 13 Dec 2022 10:18:06 +0000 (11:18 +0100)]
docs/interop: Change the vnc-ledstate-Pseudo-encoding doc into .rst
The file seems to contain perfectly valid rst syntax already, so
rename it to .rst and wire it up in the index.
Message-Id: <
20221213101806.46640-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Thu, 29 Dec 2022 11:49:13 +0000 (12:49 +0100)]
i386: Deprecate the -no-hpet QEMU command line option
The HPET setting has been turned into a machine property a while ago
already, so we should finally do the next step and deprecate the
legacy CLI option, too.
Message-Id: <
20221229114913.260400-1-thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Mon, 9 Jan 2023 08:08:23 +0000 (09:08 +0100)]
tests/qtest/bios-tables-test: Replace -no-hpet with hpet=off machine parameter
We are going to deprecate (and finally remove later) the -no-hpet command
line option. Prepare the bios-tables-test by using the replacement hpet=off
machine parameter instead.
Message-Id: <
20230109081205.116369-1-thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Marc-André Lureau [Tue, 3 Jan 2023 11:08:09 +0000 (15:08 +0400)]
tests/readconfig: spice doesn't support unix socket on windows yet
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230103110814.
3726795-6-marcandre.lureau@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Philippe Mathieu-Daudé [Tue, 20 Dec 2022 14:56:24 +0000 (15:56 +0100)]
target/s390x: Restrict sysemu/reset.h to system emulation
In user emulation, threads -- implemented as CPU -- are
created/destroyed, but never reset. There is no point in
allowing the user emulation access the sysemu/reset API.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20221220145625.26392-5-philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Philippe Mathieu-Daudé [Sat, 17 Dec 2022 15:24:54 +0000 (16:24 +0100)]
target/s390x/tcg/excp_helper: Restrict system headers to sysemu
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20221217152454.96388-6-philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Philippe Mathieu-Daudé [Sat, 17 Dec 2022 15:24:53 +0000 (16:24 +0100)]
target/s390x/tcg/misc_helper: Remove unused "memory.h" include
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20221217152454.96388-5-philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Philippe Mathieu-Daudé [Sat, 17 Dec 2022 15:24:52 +0000 (16:24 +0100)]
hw/s390x/pv: Restrict Protected Virtualization to sysemu
Protected Virtualization is irrelevant in user emulation.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20221217152454.96388-4-philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Philippe Mathieu-Daudé [Sat, 17 Dec 2022 15:24:50 +0000 (16:24 +0100)]
exec/memory: Expose memory_region_access_valid()
Instead of having hardware device poking into memory
internal API, expose memory_region_access_valid().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20221217152454.96388-2-philmd@linaro.org>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Mon, 12 Dec 2022 17:12:52 +0000 (18:12 +0100)]
MAINTAINERS: Add MIPS-related docs and configs to the MIPS architecture section
docs/system/target-mips.rst and configs/targets/mips* are not covered
in our MAINTAINERS file yet, so let's add them now.
Message-Id: <
20221212171252.194864-1-thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Philippe Mathieu-Daudé [Fri, 9 Dec 2022 16:47:43 +0000 (17:47 +0100)]
tests/vm: Update get_default_jobs() to work on non-x86_64 non-KVM hosts
On non-x86_64 host, if KVM is not available we get:
Traceback (most recent call last):
File "tests/vm/basevm.py", line 634, in main
vm = vmcls(args, config=config)
File "tests/vm/basevm.py", line 104, in __init__
mem = max(4, args.jobs)
TypeError: '>' not supported between instances of 'NoneType' and 'int'
Fix by always returning a -- not ideal but safe -- '1' value.
Fixes:
b09539444a ("tests/vm: allow us to take advantage of MTTCG")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20221209164743.70836-1-philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Christian Borntraeger [Wed, 7 Dec 2022 13:14:52 +0000 (14:14 +0100)]
qemu-iotests/stream-under-throttle: do not shutdown QEMU
Without a kernel or boot disk a QEMU on s390 will exit (usually with a
disabled wait state). This breaks the stream-under-throttle test case.
Do not exit qemu if on s390.
Signed-off-by: Christian Borntraeger <borntraeger@linux.ibm.com>
Message-Id: <
20221207131452.8455-1-borntraeger@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Peter Maydell [Mon, 9 Jan 2023 10:07:11 +0000 (10:07 +0000)]
Merge tag 'for_upstream' of https://git./virt/kvm/mst/qemu into staging
virtio,pc,pci: features, cleanups, fixes
mostly vhost-vdpa:
guest announce feature emulation when using shadow virtqueue
support for configure interrupt
startup speed ups
an acpi change to only generate cluster node in PPTT when specified for arm
misc fixes, cleanups
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Sun 08 Jan 2023 08:01:39 GMT
# gpg: using RSA key
5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg: issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (50 commits)
vhost-scsi: fix memleak of vsc->inflight
acpi: cpuhp: fix guest-visible maximum access size to the legacy reg block
tests: acpi: aarch64: Add *.topology tables
tests: acpi: aarch64: Add topology test for aarch64
tests: acpi: Add and whitelist *.topology blobs
tests: virt: Update expected ACPI tables for virt test
hw/acpi/aml-build: Only generate cluster node in PPTT when specified
tests: virt: Allow changes to PPTT test table
virtio-pci: fix proxy->vector_irqfd leak in virtio_pci_set_guest_notifiers
vdpa: commit all host notifier MRs in a single MR transaction
vhost: configure all host notifiers in a single MR transaction
vhost: simplify vhost_dev_enable_notifiers
vdpa: harden the error path if get_iova_range failed
vdpa-dev: get iova range explicitly
docs/devel: Rules on #include in headers
include: Include headers where needed
include/hw/virtio: Break inclusion loop
include/hw/cxl: Break inclusion loop cxl_pci.h and cxl_cdat_h
include/hw/pci: Include hw/pci/pci.h where needed
include/hw/pci: Split pci_device.h off pci.h
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Klaus Jensen [Thu, 8 Dec 2022 08:12:45 +0000 (09:12 +0100)]
hw/nvme: fix missing cq eventidx update
Prior to reading the shadow doorbell cq head, we have to update the
eventidx. Otherwise, we risk that the driver will skip an mmio doorbell
write. This happens on riscv64, as reported by Guenter.
Adding the missing update to the cq eventidx fixes the issue.
Fixes:
3f7fe8de3d49 ("hw/nvme: Implement shadow doorbell buffer support")
Cc: qemu-stable@nongnu.org
Cc: qemu-riscv@nongnu.org
Reported-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Klaus Jensen [Mon, 12 Dec 2022 10:30:52 +0000 (11:30 +0100)]
hw/nvme: fix missing endian conversions for doorbell buffers
The eventidx and doorbell value are not handling endianness correctly.
Fix this.
Fixes:
3f7fe8de3d49 ("hw/nvme: Implement shadow doorbell buffer support")
Cc: qemu-stable@nongnu.org
Reported-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Klaus Jensen [Thu, 8 Dec 2022 11:49:04 +0000 (12:49 +0100)]
hw/nvme: rename shadow doorbell related trace events
Rename the trace events related to writing the event index and reading
the doorbell value to make it more clear that the event is associated
with an actual update (write or read respectively).
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Klaus Jensen [Thu, 8 Dec 2022 11:43:18 +0000 (12:43 +0100)]
hw/nvme: use QOM accessors
Replace various ->parent_obj use with the equivalent QOM accessors.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Peter Maydell [Sun, 8 Jan 2023 14:27:40 +0000 (14:27 +0000)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* Atomic memslot updates for KVM (Emanuele, David)
* Always send errors to logfile when daemonized (Greg)
* Add support for IDE CompactFlash card (Lubomir)
* First round of build system cleanups (myself)
* First round of feature removals (myself)
* Reduce "qemu/accel.h" inclusion (Philippe)
# gpg: Signature made Thu 05 Jan 2023 23:51:09 GMT
# gpg: using RSA key
F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (24 commits)
i386: SGX: remove deprecated member of SGXInfo
target/i386: Add SGX aex-notify and EDECCSSA support
util: remove support -chardev tty and -chardev parport
util: remove support for hex numbers with a scaling suffix
KVM: remove support for kernel-irqchip=off
docs: do not talk about past removal as happening in the future
meson: accept relative symlinks in "meson introspect --installed" data
meson: cleanup compiler detection
meson: support meson 0.64 -Doptimization=plain
configure: test all warnings
tests/qapi-schema: remove Meson workaround
meson: cleanup dummy-cpus.c rules
meson: tweak hardening options for Windows
configure: remove backwards-compatibility and obsolete options
configure: preserve qemu-ga variables
configure: cleanup $cpu tests
configure: remove dead function
configure: remove useless write_c_skeleton
ide: Add "ide-cf" driver, a CompactFlash card
ide: Add 8-bit data mode
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>