[AliasSetTracker] Cleanup addPointer interface. [NFCI]

Summary:
Attempting to simplify the addPointer interface.
Currently there's code decomposing a MemoryLocation into (Ptr, Size, AAMDNodes) only to recreate the MemoryLocation inside the call.

Reviewers: reames, mkazantsev

Subscribers: sanjoy, jlebar, llvm-commits

Differential Revision: https://reviews.llvm.org/D53836

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345548 91177308-0d34-0410-b5e6-96231b3b80d8

[DWARF][NFC] Refactor range list extraction and dumping

The purpose of this patch is twofold:
- Fold pre-DWARF v5 functionality into v5 to eliminate the need for 2 different
  versions of range list handling. We get rid of DWARFDebugRangelist{.cpp,.h}.
- Templatize the handling of range list tables so that location list handling
  can take advantage of it as well. Location list and range list tables have the
  same basic layout.

A non-NFC version of this patch was previously submitted with r342218, but it caused
errors with some TSan tests. This patch has no functional changes. The difference to
the non-NFC patch is that there are no changes to rangelist dumping in this patch.

Differential Revision: https://reviews.llvm.org/D53545

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345546 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-objcopy] Move elf-specific code into subfolder

In this diff the elf-specific code is moved into the subfolder ELF
(and factored out from llvm-objcopy.cpp).

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D53790

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345544 91177308-0d34-0410-b5e6-96231b3b80d8

Add parens to fix incorrect assert check.

&& has higher priority than ||, so this assert works really oddly. Add
parens to match the programmer's intent.

Change-Id: I3abe1361ee0694462190c5015779db664012f3d4

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345543 91177308-0d34-0410-b5e6-96231b3b80d8

AMDGPU: Enable code object v3 by default

Differential Revision: https://reviews.llvm.org/D53525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345542 91177308-0d34-0410-b5e6-96231b3b80d8

[InstSimplify] add tests for abs/nabs+icmp folding; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345541 91177308-0d34-0410-b5e6-96231b3b80d8

[LoopUnroll] NFC. Factor out runtime-loop.ll common test behavior.

Adding COMMON prefix to get common part handled there.
Needed to simplify test changes for D53440.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345538 91177308-0d34-0410-b5e6-96231b3b80d8

[MachineOutliner] Inherit target features from parent function

If a function has target features, it may contain instructions that aren't
represented in the default set of instructions. If the outliner pulls out one
of these instructions, and the function doesn't have the right attributes
attached, we'll run into an LLVM error explaining that the target doesn't
support the necessary feature for the instruction.

This makes outlined functions inherit target features from their parents.

It also updates the machine-outliner.ll test to check that we're properly
inheriting target features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345535 91177308-0d34-0410-b5e6-96231b3b80d8

Relax fast register allocator related test cases; NFC

- Relex hard coded registers and stack frame sizes
- Some test cleanups
- Change phi-dbg.ll to match on mir output after phi elimination instead
  of going through the whole codegen pipeline.

This is in preparation for https://reviews.llvm.org/D52010
I'm committing all the test changes upfront that work before and after
independently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345532 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Set isMachineVerifierClean() back to false (PR27481)

Put back the isMachineVerifierClean() override removed at rL345513 to fix Windows ThinLTO tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345528 91177308-0d34-0410-b5e6-96231b3b80d8

[HotColdSplitting] Allow outlining single-block cold regions

It can be profitable to outline single-block cold regions because they
may be large.

Allow outlining single-block regions if they have over some threshold of
non-debug, non-terminator instructions. I chose 3 as the threshold after
experimenting with several internal frameworks.

In practice, reducing the threshold further did not give much
improvement, whereas increasing it resulted in substantial regressions.

Differential Revision: https://reviews.llvm.org/D53824

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345524 91177308-0d34-0410-b5e6-96231b3b80d8

[WebAssembly] Lower away condition truncations for scalar selects

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53676

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345521 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] getFauxShuffleMask - Fix shuffle mask adjustment for multiple inserted subvectors

Part of the issue discovered in PR39483, although its not fully exposed until I reapply rL345395 (by reverting rL345451)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345520 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add AES to KNL CPUs to match clang.

I believe this was lost from KNL when AES was pushed from Westmere to Skylake recently. KNL used to inherit from IVB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345519 91177308-0d34-0410-b5e6-96231b3b80d8

[AMDGPU] Fixed return value causing warning and regression

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345518 91177308-0d34-0410-b5e6-96231b3b80d8

[AArch64] Rename FP16FML instruction format (NFC)

Rename SIMDThreeSameMult (etc.) to SIMDThreeSameVectorFML (etc.) to follow
usual naming convention, and add some comments in the .td files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345515 91177308-0d34-0410-b5e6-96231b3b80d8

[AMDGPU] Match v_swap_b32

Differential Revision: https://reviews.llvm.org/D52677

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345514 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Enable the MachineVerifier by default

The machine verifier was disabled for x86 by default. There are now only
9 tests failing, compared to what previously was between 20 and 30.

This is a good opportunity to file bugs for all the remaining issues,
then explicitly disable the failing tests and enabling the machine
verifier by default.

This allows us to avoid adding new tests that break the verifier.

PR27481

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345513 91177308-0d34-0410-b5e6-96231b3b80d8

[Intrinsic] Signed and Unsigned Saturation Subtraction Intirnsics

Add an intrinsic that takes 2 integers and perform saturation subtraction on
them.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D53783

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345512 91177308-0d34-0410-b5e6-96231b3b80d8

[AArch64] Return address signing B key support

- Add support to generate AUTIBSP, PACIBSP, RETAB instructions for return
  address signing
- The key used to sign the function is controlled by the function attribute
  "sign-return-address-key"

Differential Revision: https://reviews.llvm.org/D51427

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345511 91177308-0d34-0410-b5e6-96231b3b80d8

[LLVM-C] Add Builder Bindings to Common Memory Intrinsics

Summary: Add IRBuilder bindings for memmove, memcpy, and memset.

Reviewers: whitequark, deadalnix

Reviewed By: whitequark

Subscribers: harlanhaskins, llvm-commits

Differential Revision: https://reviews.llvm.org/D53555

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345508 91177308-0d34-0410-b5e6-96231b3b80d8

[git/svn] Ignore Visual Studio's CMakeSettings.json.

When using Visual Studio's built-in support for CMake, the CMakeSettings.json contains the build configurations (build dir, generator, toolchain, cmake variables, etc). It is specific to the build machine, therefore should not be versioned.

Differential Revision: https://reviews.llvm.org/D53775

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345504 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-objdump] Don't crash when using `-a` on non-archives

This fixes PR39402. The crash was caused when dereferencing nullptr in
DumpObject and printArchiveChild.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D53690

Patch by Xing GUO

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345503 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Remove outdated test

This test breaks the X86 MachineVerifier. It looks like the MIR part is
completely useless.

The original author suggests that it can be removed.

Differential Revision: https://reviews.llvm.org/D53767

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345501 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-mca] Lower to mca::Instructon before the pipeline is run.

Before this change, the lowering of instructions from llvm::MCInst to
mca::Instruction was done as part of the first stage of the pipeline (i.e. the
FetchStage).  In particular, FetchStage was responsible for picking the next
instruction from the source sequence, and lower it to an mca::Instruction with
the help of an object of class InstrBuilder.

The dependency on InstrBuilder was problematic for a number of reasons. Class
InstrBuilder only knows how to lower from llvm::MCInst to mca::Instruction.
That means, it is hard to support a different scenario where instructions
in input are not instances of class llvm::MCInst. Even if we managed to
specialize InstrBuilder, and generalize most of its internal logic, the
dependency on InstrBuilder in FetchStage would have caused more troubles (other
than complicating the pipeline logic).

With this patch, the lowering step is done before the pipeline is run. The
pipeline is no longer responsible for lowering from MCInst to mca::Instruction.
As a consequence of this, the FetchStage no longer needs to interact with an
InstrBuilder. The mca::SourceMgr class now simply wraps a reference to a
sequence of mca::Instruction objects.
This simplifies the logic of FetchStage, and increases the usability of it.  As
a result, on a debug build, we see a 7-9% speedup; on a release build, the
speedup is around 3-4%.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345500 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-mca][UpdateTestChecks] Don't try to align blocks that have already been subject to alignment in update_mca_test_checks.py

This fixes PR39466.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345499 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-objdump] Add '--full-contents' as alias for '-s'

This fixes PR39404.

Reviewed By: jhenderson

Patch by Xing Guo

Differential Revision: https://reviews.llvm.org/D53576

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345495 91177308-0d34-0410-b5e6-96231b3b80d8

[ARM][NFC] Fix test inlineasm-X-allocation.ll

Differential Revision: https://reviews.llvm.org/D53748

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345491 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.

When the floating point constants are whole numbers they have no decimal point so look like integers, but mean something very different in something like an 'and' instruction.

Ideally we would just print a decimal point and a 0, but I couldn't see how to make APFloat::toString do that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345488 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Recognize constant splats in LowerFCOPYSIGN.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345484 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add test case to show failure to handle splat vectors in the constant check in LowerFCOPYSIGN.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345483 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "Revert "DebugInfo: reduce DIE range verification on object files""

This reverts commit 836c763dadbd9478fa35b1a291a38bf17aa206ba.  Default
initialize the values that MSAN caught.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345482 91177308-0d34-0410-b5e6-96231b3b80d8

[SelectionDAG] Fix bad indentation. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345481 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-exegesis] Fix SNB counter definition and handling.

Summary: SNB is the only one that has P23 as a single proc res.

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53766

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345480 91177308-0d34-0410-b5e6-96231b3b80d8

[TargetLowering] Move i64/vXi64 to f32/vXf32 UINT_TO_FP handling to TargetLowering::expandUINT_TO_FP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345478 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][NFC] sse42-schedule.ll: disable XOP for BdVer2 tests

Else we are clearly testing the wrong instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345476 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][NFC] sse41-schedule.ll: disable XOP for BdVer2 tests

Else we are clearly testing the wrong instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345475 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][NFC] sse2-schedule.ll: disable XOP for BdVer2 tests

Else we are clearly testing the wrong instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345474 91177308-0d34-0410-b5e6-96231b3b80d8

[VectorLegalizer] Enable TargetLowering::expandFP_TO_UINT support.

Add vector support to TargetLowering::expandFP_TO_UINT.

This exposes an issue in X86TargetLowering::LowerVSELECT which was assuming that the select mask was the same width as the LHS/RHS ops - as long as the result is a sign splat we can easily sext/trunk this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345473 91177308-0d34-0410-b5e6-96231b3b80d8

[DAGCombiner] Better constant vector support for FCOPYSIGN.

Enable constant folding when both operands are vectors of constants.

Turn into FNEG/FABS when the RHS is a splat constant vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345469 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add test cases showing missed opportunities for optimizing vector fcopysign when the RHS is a splat constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345468 91177308-0d34-0410-b5e6-96231b3b80d8

[utils] collect_and_build_with_pgo.py: revert part already fixed in rL345461

The change was inadvertently included in my last commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345467 91177308-0d34-0410-b5e6-96231b3b80d8

[utils] Fix _run_benchmark in collect_and_build_with_pgo.py

Summary: Also fix a FIXME in _build_stage1_clang: clang llvm-profdata profile are sufficient

Reviewers: george.burgess.iv

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D53795

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345466 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r344172: [LV] Add a new reduction pattern match

This patch has caused fast-math issues in the reduction pattern.

Will re-work and land again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345465 91177308-0d34-0410-b5e6-96231b3b80d8

AMD BdVer2 (Piledriver) Initial Scheduler model

Summary:
# Overview
This is somewhat partial.
* Latencies are good {F7371125}
  * All of these remaining inconsistencies //appear// to be noise/noisy/flaky.
* NumMicroOps are somewhat good {F7371158}
  * Most of the remaining inconsistencies are from `Ld` / `Ld_ReadAfterLd` classes
* Actual unit occupation (pipes, `ResourceCycles`) are undiscovered lands, i did not really look there.
  They are basically verbatum copy from `btver2`
* Many `InstRW`. And there are still inconsistencies left...

To be noted:
I think this is the first new schedule profile produced with the new next-gen tools like llvm-exegesis!

# Benchmark
I realize that isn't what was suggested, but i'll start with some "internal" public real-world benchmark i understand - [[ https://github.com/darktable-org/rawspeed | RawSpeed raw image decoding library ]].
Diff (the exact clang from trunk without/with this patch):
```
Comparing /home/lebedevri/rawspeed/build-old/src/utilities/rsbench/rsbench to /home/lebedevri/rawspeed/build-new/src/utilities/rsbench/rsbench
Benchmark                                                                                        Time             CPU      Time Old      Time New       CPU Old       CPU New
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Canon/EOS 5D Mark II/09.canon.sraw1.cr2/threads:8/real_time_pvalue                             0.0000          0.0000      U Test, Repetitions: 25 vs 25
Canon/EOS 5D Mark II/09.canon.sraw1.cr2/threads:8/real_time_mean                              -0.0607         -0.0604           234           219           233           219
Canon/EOS 5D Mark II/09.canon.sraw1.cr2/threads:8/real_time_median                            -0.0630         -0.0626           233           219           233           219
Canon/EOS 5D Mark II/09.canon.sraw1.cr2/threads:8/real_time_stddev                            +0.2581         +0.2587             1             2             1             2
Canon/EOS 5D Mark II/10.canon.sraw2.cr2/threads:8/real_time_pvalue                             0.0000          0.0000      U Test, Repetitions: 25 vs 25
Canon/EOS 5D Mark II/10.canon.sraw2.cr2/threads:8/real_time_mean                              -0.0770         -0.0767           144           133           144           133
Canon/EOS 5D Mark II/10.canon.sraw2.cr2/threads:8/real_time_median                            -0.0767         -0.0763           144           133           144           133
Canon/EOS 5D Mark II/10.canon.sraw2.cr2/threads:8/real_time_stddev                            -0.4170         -0.4156             1             0             1             0
Canon/EOS 5DS/2K4A9927.CR2/threads:8/real_time_pvalue                                          0.0000          0.0000      U Test, Repetitions: 25 vs 25
Canon/EOS 5DS/2K4A9927.CR2/threads:8/real_time_mean                                           -0.0271         -0.0270           463           450           463           450
Canon/EOS 5DS/2K4A9927.CR2/threads:8/real_time_median                                         -0.0093         -0.0093           453           449           453           449
Canon/EOS 5DS/2K4A9927.CR2/threads:8/real_time_stddev                                         -0.7280         -0.7280            13             4            13             4
Canon/EOS 5DS/2K4A9928.CR2/threads:8/real_time_pvalue                                          0.0004          0.0004      U Test, Repetitions: 25 vs 25
Canon/EOS 5DS/2K4A9928.CR2/threads:8/real_time_mean                                           -0.0065         -0.0065           569           565           569           565
Canon/EOS 5DS/2K4A9928.CR2/threads:8/real_time_median                                         -0.0077         -0.0077           569           564           569           564
Canon/EOS 5DS/2K4A9928.CR2/threads:8/real_time_stddev                                         +1.0077         +1.0068             2             5             2             5
Canon/EOS 5DS/2K4A9929.CR2/threads:8/real_time_pvalue                                          0.0220          0.0199      U Test, Repetitions: 25 vs 25
Canon/EOS 5DS/2K4A9929.CR2/threads:8/real_time_mean                                           +0.0006         +0.0007           312           312           312           312
Canon/EOS 5DS/2K4A9929.CR2/threads:8/real_time_median                                         +0.0031         +0.0032           311           312           311           312
Canon/EOS 5DS/2K4A9929.CR2/threads:8/real_time_stddev                                         -0.7069         -0.7072             4             1             4             1
Canon/EOS 10D/CRW_7673.CRW/threads:8/real_time_pvalue                                          0.0004          0.0004      U Test, Repetitions: 25 vs 25
Canon/EOS 10D/CRW_7673.CRW/threads:8/real_time_mean                                           -0.0015         -0.0015           141           141           141           141
Canon/EOS 10D/CRW_7673.CRW/threads:8/real_time_median                                         -0.0010         -0.0011           141           141           141           141
Canon/EOS 10D/CRW_7673.CRW/threads:8/real_time_stddev                                         -0.1486         -0.1456             0             0             0             0
Canon/EOS 40D/_MG_0154.CR2/threads:8/real_time_pvalue                                          0.6139          0.8766      U Test, Repetitions: 25 vs 25
Canon/EOS 40D/_MG_0154.CR2/threads:8/real_time_mean                                           -0.0008         -0.0005            60            60            60            60
Canon/EOS 40D/_MG_0154.CR2/threads:8/real_time_median                                         -0.0006         -0.0002            60            60            60            60
Canon/EOS 40D/_MG_0154.CR2/threads:8/real_time_stddev                                         -0.1467         -0.1390             0             0             0             0
Canon/EOS 77D/IMG_4049.CR2/threads:8/real_time_pvalue                                          0.0137          0.0137      U Test, Repetitions: 25 vs 25
Canon/EOS 77D/IMG_4049.CR2/threads:8/real_time_mean                                           +0.0002         +0.0002           275           275           275           275
Canon/EOS 77D/IMG_4049.CR2/threads:8/real_time_median                                         -0.0015         -0.0014           275           275           275           275
Canon/EOS 77D/IMG_4049.CR2/threads:8/real_time_stddev                                         +3.3687         +3.3587             0             2             0             2
Canon/PowerShot G1/crw_1693.crw/threads:8/real_time_pvalue                                     0.4041          0.3933      U Test, Repetitions: 25 vs 25
Canon/PowerShot G1/crw_1693.crw/threads:8/real_time_mean                                      +0.0004         +0.0004            67            67            67            67
Canon/PowerShot G1/crw_1693.crw/threads:8/real_time_median                                    -0.0000         -0.0000            67            67            67            67
Canon/PowerShot G1/crw_1693.crw/threads:8/real_time_stddev                                    +0.1947         +0.1995             0             0             0             0
Fujifilm/GFX 50S/20170525_0037TEST.RAF/threads:8/real_time_pvalue                              0.0074          0.0001      U Test, Repetitions: 25 vs 25
Fujifilm/GFX 50S/20170525_0037TEST.RAF/threads:8/real_time_mean                               -0.0092         +0.0074           547           542            25            25
Fujifilm/GFX 50S/20170525_0037TEST.RAF/threads:8/real_time_median                             -0.0054         +0.0115           544           541            25            25
Fujifilm/GFX 50S/20170525_0037TEST.RAF/threads:8/real_time_stddev                             -0.4086         -0.3486             8             5             0             0
Fujifilm/X-Pro2/_DSF3051.RAF/threads:8/real_time_pvalue                                        0.3320          0.0000      U Test, Repetitions: 25 vs 25
Fujifilm/X-Pro2/_DSF3051.RAF/threads:8/real_time_mean                                         +0.0015         +0.0204           218           218            12            12
Fujifilm/X-Pro2/_DSF3051.RAF/threads:8/real_time_median                                       +0.0001         +0.0203           218           218            12            12
Fujifilm/X-Pro2/_DSF3051.RAF/threads:8/real_time_stddev                                       +0.2259         +0.2023             1             1             0             0
GoPro/HERO6 Black/GOPR9172.GPR/threads:8/real_time_pvalue                                      0.0000          0.0001      U Test, Repetitions: 25 vs 25
GoPro/HERO6 Black/GOPR9172.GPR/threads:8/real_time_mean                                       -0.0209         -0.0179            96            94            90            88
GoPro/HERO6 Black/GOPR9172.GPR/threads:8/real_time_median                                     -0.0182         -0.0155            95            93            90            88
GoPro/HERO6 Black/GOPR9172.GPR/threads:8/real_time_stddev                                     -0.6164         -0.2703             2             1             2             1
Kodak/DCS Pro 14nx/D7465857.DCR/threads:8/real_time_pvalue                                     0.0000          0.0000      U Test, Repetitions: 25 vs 25
Kodak/DCS Pro 14nx/D7465857.DCR/threads:8/real_time_mean                                      -0.0098         -0.0098           176           175           176           175
Kodak/DCS Pro 14nx/D7465857.DCR/threads:8/real_time_median                                    -0.0126         -0.0126           176           174           176           174
Kodak/DCS Pro 14nx/D7465857.DCR/threads:8/real_time_stddev                                    +6.9789         +6.9157             0             2             0             2
Nikon/D850/Nikon-D850-14bit-lossless-compressed.NEF/threads:8/real_time_pvalue                 0.0000          0.0000      U Test, Repetitions: 25 vs 25
Nikon/D850/Nikon-D850-14bit-lossless-compressed.NEF/threads:8/real_time_mean                  -0.0237         -0.0238           474           463           474           463
Nikon/D850/Nikon-D850-14bit-lossless-compressed.NEF/threads:8/real_time_median                -0.0267         -0.0267           473           461           473           461
Nikon/D850/Nikon-D850-14bit-lossless-compressed.NEF/threads:8/real_time_stddev                +0.7179         +0.7178             3             5             3             5
Olympus/E-M1MarkII/Olympus_EM1mk2__HIRES_50MP.ORF/threads:8/real_time_pvalue                   0.6837          0.6554      U Test, Repetitions: 25 vs 25
Olympus/E-M1MarkII/Olympus_EM1mk2__HIRES_50MP.ORF/threads:8/real_time_mean                    -0.0014         -0.0013          1375          1373          1375          1373
Olympus/E-M1MarkII/Olympus_EM1mk2__HIRES_50MP.ORF/threads:8/real_time_median                  +0.0018         +0.0019          1371          1374          1371          1374
Olympus/E-M1MarkII/Olympus_EM1mk2__HIRES_50MP.ORF/threads:8/real_time_stddev                  -0.7457         -0.7382            11             3            10             3
Panasonic/DC-G9/P1000476.RW2/threads:8/real_time_pvalue                                        0.0000          0.0000      U Test, Repetitions: 25 vs 25
Panasonic/DC-G9/P1000476.RW2/threads:8/real_time_mean                                         -0.0080         -0.0289            22            22            10            10
Panasonic/DC-G9/P1000476.RW2/threads:8/real_time_median                                       -0.0070         -0.0287            22            22            10            10
Panasonic/DC-G9/P1000476.RW2/threads:8/real_time_stddev                                       +1.0977         +0.6614             0             0             0             0
Panasonic/DC-GH5/_T012014.RW2/threads:8/real_time_pvalue                                       0.0000          0.0000      U Test, Repetitions: 25 vs 25
Panasonic/DC-GH5/_T012014.RW2/threads:8/real_time_mean                                        +0.0132         +0.0967            35            36            10            11
Panasonic/DC-GH5/_T012014.RW2/threads:8/real_time_median                                      +0.0132         +0.0956            35            36            10            11
Panasonic/DC-GH5/_T012014.RW2/threads:8/real_time_stddev                                      -0.0407         -0.1695             0             0             0             0
Panasonic/DC-GH5S/P1022085.RW2/threads:8/real_time_pvalue                                      0.0000          0.0000      U Test, Repetitions: 25 vs 25
Panasonic/DC-GH5S/P1022085.RW2/threads:8/real_time_mean                                       +0.0331         +0.1307            13            13             6             6
Panasonic/DC-GH5S/P1022085.RW2/threads:8/real_time_median                                     +0.0430         +0.1373            12            13             6             6
Panasonic/DC-GH5S/P1022085.RW2/threads:8/real_time_stddev                                     -0.9006         -0.8847             1             0             0             0
Pentax/645Z/IMGP2837.PEF/threads:8/real_time_pvalue                                            0.0016          0.0010      U Test, Repetitions: 25 vs 25
Pentax/645Z/IMGP2837.PEF/threads:8/real_time_mean                                             -0.0023         -0.0024           395           394           395           394
Pentax/645Z/IMGP2837.PEF/threads:8/real_time_median                                           -0.0029         -0.0030           395           394           395           393
Pentax/645Z/IMGP2837.PEF/threads:8/real_time_stddev                                           -0.0275         -0.0375             1             1             1             1
Phase One/P65/CF027310.IIQ/threads:8/real_time_pvalue                                          0.0232          0.0000      U Test, Repetitions: 25 vs 25
Phase One/P65/CF027310.IIQ/threads:8/real_time_mean                                           -0.0047         +0.0039           114           113            28            28
Phase One/P65/CF027310.IIQ/threads:8/real_time_median                                         -0.0050         +0.0037           114           113            28            28
Phase One/P65/CF027310.IIQ/threads:8/real_time_stddev                                         -0.0599         -0.2683             1             1             0             0
Samsung/NX1/2016-07-23-142101_sam_9364.srw/threads:8/real_time_pvalue                          0.0000          0.0000      U Test, Repetitions: 25 vs 25
Samsung/NX1/2016-07-23-142101_sam_9364.srw/threads:8/real_time_mean                           +0.0206         +0.0207           405           414           405           414
Samsung/NX1/2016-07-23-142101_sam_9364.srw/threads:8/real_time_median                         +0.0204         +0.0205           405           414           405           414
Samsung/NX1/2016-07-23-142101_sam_9364.srw/threads:8/real_time_stddev                         +0.2155         +0.2212             1             1             1             1
Samsung/NX30/2015-03-07-163604_sam_7204.srw/threads:8/real_time_pvalue                         0.0000          0.0000      U Test, Repetitions: 25 vs 25
Samsung/NX30/2015-03-07-163604_sam_7204.srw/threads:8/real_time_mean                          -0.0109         -0.0108           147           145           147           145
Samsung/NX30/2015-03-07-163604_sam_7204.srw/threads:8/real_time_median                        -0.0104         -0.0103           147           145           147           145
Samsung/NX30/2015-03-07-163604_sam_7204.srw/threads:8/real_time_stddev                        -0.4919         -0.4800             0             0             0             0
Samsung/NX3000/_3184416.SRW/threads:8/real_time_pvalue                                         0.0000          0.0000      U Test, Repetitions: 25 vs 25
Samsung/NX3000/_3184416.SRW/threads:8/real_time_mean                                          -0.0149         -0.0147           220           217           220           217
Samsung/NX3000/_3184416.SRW/threads:8/real_time_median                                        -0.0173         -0.0169           221           217           220           217
Samsung/NX3000/_3184416.SRW/threads:8/real_time_stddev                                        +1.0337         +1.0341             1             3             1             3
Sony/DSLR-A350/DSC05472.ARW/threads:8/real_time_pvalue                                         0.0001          0.0001      U Test, Repetitions: 25 vs 25
Sony/DSLR-A350/DSC05472.ARW/threads:8/real_time_mean                                          -0.0019         -0.0019           194           193           194           193
Sony/DSLR-A350/DSC05472.ARW/threads:8/real_time_median                                        -0.0021         -0.0021           194           193           194           193
Sony/DSLR-A350/DSC05472.ARW/threads:8/real_time_stddev                                        -0.4441         -0.4282             0             0             0             0
Sony/ILCE-7RM2/14-bit-compressed.ARW/threads:8/real_time_pvalue                                0.0000          0.4263      U Test, Repetitions: 25 vs 25
Sony/ILCE-7RM2/14-bit-compressed.ARW/threads:8/real_time_mean                                 +0.0258         -0.0006            81            83            19            19
Sony/ILCE-7RM2/14-bit-compressed.ARW/threads:8/real_time_median                               +0.0235         -0.0011            81            82            19            19
Sony/ILCE-7RM2/14-bit-compressed.ARW/threads:8/real_time_stddev                               +0.1634         +0.1070             1             1             0             0
```
{F7443905}
If we look at the `_mean`s, the time column, the biggest win is `-7.7%` (`Canon/EOS 5D Mark II/10.canon.sraw2.cr2`),
and the biggest loose is `+3.3%` (`Panasonic/DC-GH5S/P1022085.RW2`);
Overall: mean `-0.7436%`, median `-0.23%`, `cbrt(sum(time^3))` = `-8.73%`
Looks good so far i'd say.

llvm-exegesis details:
{F7371117} {F7371125}
{F7371128} {F7371144} {F7371158}

Reviewers: craig.topper, RKSimon, andreadb, courbet, avt77, spatel, GGanesh

Reviewed By: andreadb

Subscribers: javed.absar, gbedwell, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D52779

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345463 91177308-0d34-0410-b5e6-96231b3b80d8

[NFC][X86] Baseline tests for AMD BdVer2 (Piledriver) Scheduler model

Adding the baseline tests in a preparatory NFC commit,
so that the actual commit shows the *diff*.

Yes, i'm aware that a few of these codegen-based sched tests
are testing wrong instructions, i will fix that afterwards.

For https://reviews.llvm.org/D52779

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345462 91177308-0d34-0410-b5e6-96231b3b80d8

[utils] Run tests in the proper directory.

The intent here was to run check-llvm/check-clang in the instrumented
clang's build directory, not the maybe-not-yet-created uninstrumented
clang's. Oops. :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345461 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] LowerVSELECT - pull out repeated getOperand(). NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345458 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "DebugInfo: reduce DIE range verification on object files"

This reverts commits r345441 and r345444, they were causing msan
buildbot failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345457 91177308-0d34-0410-b5e6-96231b3b80d8

[Local] Keep K's range if K does not move when combining metadata.

As K has to dominate I, IIUC I's range metadata must be a subset of
K's. After Eli's recent clarification to the LangRef, loading a value
outside of the range is undefined behavior.
Therefore if I's range contains elements outside of K's range and we would load
one such value, K would cause undefined behavior.

In cases like hoisting/sinking, we still want the most generic range
over all code paths to/from the hoist/sink point. As suggested in the
patches related to D47339, I will refactor the handling of those
scenarios and try to decouple it from this function as follow up, once
we switched to a similar handling of metadata in most of
combineMetadata.

I updated some tests checking mostly the merging of metadata to keep the
metadata of to dominating load. The most interesting one is probably test8 in
test/Transforms/JumpThreading/thread-loads.ll. It contained a comment
about the alias metadata preventing us to eliminate the branch, but it
seem like the actual problem currently is that we merge the ranges of
both loads and cannot eliminate the icmp afterwards. With this patch, we
manage to eliminate the icmp, as the range of the first load excludes 8.

Reviewers: efriedma, nlopes, davide

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D51629

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345456 91177308-0d34-0410-b5e6-96231b3b80d8

[x86] make test immune to improved extraction in D53784; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345455 91177308-0d34-0410-b5e6-96231b3b80d8

Fix -Wdocumentation warning. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345454 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate FP_TO_INT tests.

Precursor to fix for PR17686

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345453 91177308-0d34-0410-b5e6-96231b3b80d8

[TargetLowering] Move LegalizeDAG FP_TO_UINT handling to TargetLowering::expandFP_TO_UINT. NFCI.

First step towards fixing PR17686 and adding vector support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345452 91177308-0d34-0410-b5e6-96231b3b80d8

Revert rL345395: [X86][SSE] Move 2-input limit up from getFauxShuffleMask to resolveTargetShuffleInputs
Makes no difference to actual shuffle decoding yet, but merges all the existing limits in one place for when proper support is fixed.
........
Its been reported that this is causing out of trunk failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345451 91177308-0d34-0410-b5e6-96231b3b80d8

[ARM64][Windows] MCLayer support for exception handling

Add ARM64 unwind codes to MCLayer, as well SEH directives that will be emitted
by the frame lowering patch to follow.  We only emit unwind codes into object
object files for now.

Differential Revision: https://reviews.llvm.org/D50166

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345450 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add some isel patterns for scalar_to_vector/extract_vector_element that use the avx512 extended register classes when they are available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345448 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r345169 [along with its llvm counterpart r345170] as it makes Halide builds timeout.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345447 91177308-0d34-0410-b5e6-96231b3b80d8

test: add missing -triple

Ensure that the test builds for x86_64 as it is an assembly test.  This
should repair the buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345444 91177308-0d34-0410-b5e6-96231b3b80d8

[Hexagon] Add missing assignment to Itinerary in Call_nr

The class definition for Call_nr has the itinerary as a
parameter, but the value is never assigned to the Itinerary
field for the instruction. This means the compiler is unable
to schedule and packetize the instruction correctly because
these instrution will not have any resource descritions.
I don't have a specific test case, but the ps_call_nr.ll
test failed with a proposed patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345442 91177308-0d34-0410-b5e6-96231b3b80d8

DebugInfo: reduce DIE range verification on object files

Relocatable content may have overlapping ranges until the sections are
finalized.  This reduces the amount of verification that is done on an object
file so that invalid errors are not raised.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345441 91177308-0d34-0410-b5e6-96231b3b80d8

Further split cpus test

On GreenDragon, CodeGen/X86/cpus-no-x86_64.ll was still timing out even
after breaking up the original test. I further split off the intel and
AMD cpus which hopefully resolves this.

http://green.lab.llvm.org/green/job/clang-stage2-cmake-RgSan/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345438 91177308-0d34-0410-b5e6-96231b3b80d8

[x86] adjust tests to preserve behavior; NFC

I'm planning a binop optimization that would subvert the
domain forcing ops in these tests, so turning them into
zexts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345437 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-readobj] Fix bugs with unrecognized types in switch statements

Summary:
Add missing breaks. Several functions used nested switch statements,
where the outer switch branches based on the architecture, and the inner
switch handles architecture-specific types. If the type isn't
architecture-specific, break out to the generic types rather than fall
through.

getElfPtType: For GNU-style output, llvm-readobj prints
"<unknown>: 0xnnnnnnnn" for an unrecognized segment type, unless the
architecture is EM_ARM, EM_MIPS, or EM_MIPS_RS3_LE, in which case it
prints "". This behavior appears accidental, so instead, always print
the "<unknown>: 0xnnnnnnnn" string.

Reviewers: pcc, grimar

Reviewed By: grimar

Subscribers: sdardis, javed.absar, arichardson, kristof.beyls, atanasyan, llvm-commits

Differential Revision: https://reviews.llvm.org/D53730

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345436 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "[PassManager/Sanitizer] Enable usage of ported AddressSanitizer passes with -fsanitize=address"

This reverts commit 8d6af840396f2da2e4ed6aab669214ae25443204 and commit
b78d19c287b6e4a9abc9fb0545de9a3106d38d3d which causes slower build times
by initializing the AddressSanitizer on every function run.

The corresponding revisions are https://reviews.llvm.org/D52814 and
https://reviews.llvm.org/D52739.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345433 91177308-0d34-0410-b5e6-96231b3b80d8

[VFS] Add property 'fallthrough' that controls fallback to real file system.

Default property value 'true' preserves current behavior. Value 'false' can be
used to create VFS "root", file system that gives better control over which
files compiler can use during compilation as there are no unpredictable
accesses to real file system.

Non-fallthrough use case changes how we treat multiple VFS overlay
files. Instead of all of them being at the same level just above a real
file system, now they are nested and subsequent overlays can refer to
files in previous overlays.

rdar://problem/39465552

Reviewers: bruno, benlangmuir

Reviewed By: bruno

Subscribers: dexonsmith, cfe-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D50539

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345431 91177308-0d34-0410-b5e6-96231b3b80d8

[DAGCombiner] rearrange code in narrowExtractedVectorBinOp(); NFC

We can extend this code to handle many more cases
if an extract is cheap, so prepping for that change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345430 91177308-0d34-0410-b5e6-96231b3b80d8

[ValueTracking] peek through shuffles in ComputeNumSignBits (PR37549)

The motivating case is from PR37549:
https://bugs.llvm.org/show_bug.cgi?id=37549

The analysis improvement allows us to form a vector 'select' out of
bitwise logic (the use of ComputeNumSignBits was added at rL345149).

The smaller test shows another InstCombine improvement - we use
ComputeNumSignBits to add 'nsw' to shift-left. But the negative
test shows an example where we must not add 'nsw' - when the shuffle
mask contains undef elements.

Differential Revision: https://reviews.llvm.org/D53659

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345429 91177308-0d34-0410-b5e6-96231b3b80d8

[LegalizeTypes] Stop DAGTypeLegalizer::getSETCCWidenedResultTy from creating illegal setccs. Add checks for valid setccs

The DAGTypeLegalizer::getSETCCWidenedResultTy was widening the MaskVT, but the code in convertMask called after getSETCCWidenedResultTy had no idea this widening had occurred. So none of the operands were widened when convertMask created new setccs with the widened VT.

This patch removes the widening and adds some asserts to getNode to validate the types of setccs to prevent issues like this in the future.

Differential Revision: https://reviews.llvm.org/D53743

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345428 91177308-0d34-0410-b5e6-96231b3b80d8

Add docs+a script for building clang/LLVM with PGO

Depending on who you ask, PGO grants a 15%-25% improvement in build
times when using clang. Sadly, hooking everything up properly to
generate a profile and apply it to clang isn't always straightforward.
This script (and the accompanying docs) aim to make this process easier;
ideally, a single invocation of the given script.

In terms of testing, I've got a cronjob on my Debian box that's meant to
run this a few times per week, and I tried manually running it on a puny
Gentoo box I have (four whole Atom cores!). Nothing obviously broke.
¯\_(ツ)_/¯

I don't know if we have a Python style guide, so I just shoved this
through yapf with all the defaults on.

Finally, though the focus is clang at the moment, the hope is that this
is easily applicable to other LLVM-y tools with minimal effort (e.g.
lld, opt, ...). Hence, this lives in llvm/utils and tries to be somewhat
ambiguous about naming.

Differential Revision: https://reviews.llvm.org/D53598

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345427 91177308-0d34-0410-b5e6-96231b3b80d8

[Spectre] Fix MIR verifier errors in retpoline thunks

Summary:
The main challenge here is that X86InstrInfo::AnalyzeBranch doesn't
understand the way we're using a CALL instruction as a branch, so we
can't list the CallTarget MBB as a successor of the entry block. If we
don't list it as a successor, then the AsmPrinter doesn't print a label
for the MBB.

Fix the issue by inserting our own label at the beginning of the call
target block. We can rely on the AsmPrinter to always emit it, even
though the block appears to be unreachable, but address-taken.

Fixes PR38391.

Reviewers: thegameg, chandlerc, echristo

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D53653

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345426 91177308-0d34-0410-b5e6-96231b3b80d8

[ARM] Make InstrEmitter mark CPSR defs dead for Thumb1.

The "dead" markings allow existing target-independent optimizations,
like MachineSink, to trigger more frequently. The CPSR defs would have
eventually been marked dead by LiveVariables, so this only affects
optimizations before regalloc.

The ARMBaseInstrInfo.cpp change is fixing a bug which is only visible
with this change: the transform adds a use to an otherwise dead def
of CPSR. This is covered by existing regression tests.

thumb2-tbh.ll breaks for Thumb1 due to MachineLICM changing the
generated code; I'll fix it in D53452.

Differential Revision: https://reviews.llvm.org/D53453

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345420 91177308-0d34-0410-b5e6-96231b3b80d8

[XRay] Use std::errc::invalid_argument instead of std::errc::bad_message

This change should appease the mingw32 builds.

Similar to r293725.

Differential Revision: https://reviews.llvm.org/D53742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345416 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Improve BUILD_VECTOR of 4 i32s

Currently, for this node:
  vector int test(int a, int b, int c, int d) {
    return (vector int) { a, b, c, d };
  }

we get this on Power9:
  mtvsrdd 34, 5, 3
  mtvsrdd 35, 6, 4
  vmrgow 2, 3, 2

and this on Power8:
  mtvsrwz 0, 3
  mtvsrwz 1, 5
  mtvsrwz 2, 4
  mtvsrwz 3, 6
  xxmrghd 34, 1, 0
  xxmrghd 35, 3, 2
  vmrgow 2, 3, 2

This can be improved to this on LE Power9:
  rldimi 3, 4, 32, 0
  rldimi 5, 6, 32, 0
  mtvsrdd 34, 5, 3

and this on LE Power8
  rldimi 3, 4, 32, 0
  rldimi 5, 6, 32, 0
  mtvsrd 34, 3
  mtvsrd 35, 5
  xxpermdi 34, 35, 34, 0

This patch updates the TD pattern to generate the optimized sequence for both
Power8 and Power9 on LE and BE.

Differential Revision: https://reviews.llvm.org/D53494

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345414 91177308-0d34-0410-b5e6-96231b3b80d8

Pointer types were treated as zero-size by MergeICmps

Summary:
The visitICmp analysis function would record compares of pointer types, as size 0. This causes the resulting memcmp() call to have the wrong total size.
Found with "self-build" of clang/LLVM on Windows.

Reviewers: christylee, trentxintong, courbet

Reviewed By: courbet

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D53536

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345413 91177308-0d34-0410-b5e6-96231b3b80d8

[ADT] Use explicit constructors for DenseMapPair to work around compiler issues.

Inheriting constructors from std::pair caused clang-3.8 to treat some DenseMap
initializer_list constructor calls as ambiguous, which broke several bots. This
commit explicitly defines DenseMapPair's constructos to work around the issue.

https://reviews.llvm.org/D53726

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345411 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-ar] Strip trailing \r and format

Reviewers: mstorsjo, rupprecht, gbreynoo

Reviewed By: rupprecht

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D53769

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345410 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Stop promoting vector and/or/xor/andn to vXi64.

These promotions add additional bitcasts to the SelectionDAG that can pessimize computeKnownBits/computeNumSignBits. It also seems to interfere with broadcast formation.

This patch removes the promotion and adds isel patterns instead.

The increased table size is more than I would like, but hopefully we can find some canonicalizations or other tricks to start pruning out patterns going forward.

Differential Revision: https://reviews.llvm.org/D53268

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345408 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add -LABEL to some FileCheck checks. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345407 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-ar] Add a dependency to BinaryFormat after rL345383

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345405 91177308-0d34-0410-b5e6-96231b3b80d8

[DWARF][NFC] cleanup (mostly leftovers from the implementation of string offsets tables)
Majority of the patch by David Blaikie.

Differential Revision: https://reviews.llvm.org/D53741

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345404 91177308-0d34-0410-b5e6-96231b3b80d8

[tblgen] Improve comments in TargetInstrPredicate.td. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345399 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "UBSan blacklist workaround for bot timeouts"

This reverts commit r335525. This workaround is no longer necessary
because PR37929 has been fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345397 91177308-0d34-0410-b5e6-96231b3b80d8

[MIR] Simplify and move MIR test

Also fixes a Machine Verifier issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345396 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Move 2-input limit up from getFauxShuffleMask to resolveTargetShuffleInputs

Makes no difference to actual shuffle decoding yet, but merges all the existing limits in one place for when proper support is fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345395 91177308-0d34-0410-b5e6-96231b3b80d8

[x86] commute blendvb with constant condition op to allow load folding

This is a narrow fix for 1 of the problems mentioned in PR27780:
https://bugs.llvm.org/show_bug.cgi?id=27780

I looked at more general solutions, but it's a mess. We canonicalize shuffle masks
based on the number of elements accessed from each operand, and that's not optional.
If you remove that, we'll crash because we fail to match isel patterns. So I'm
waiting until we're sure that we have blendvb with constant condition and then
commuting based on the load potential. Other cases like blend-with-immediate are
already handled elsewhere, so this is probably not a common problem anyway.

I didn't use "MayFoldLoad" because that checks for one-use and in these cases, we've
screwed that up by creating a temporary PSHUFB using these operands that we're counting
on to be killed later. Undoing that didn't look like a simple task because it's
intertwined with determining if we actually use both operands of the shuffle or not.a

Differential Revision: https://reviews.llvm.org/D53737

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345390 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Use existing pulled out VT variables. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345388 91177308-0d34-0410-b5e6-96231b3b80d8

[SimpleLoopUnswitch] Unswitch by experimental.guard intrinsics

This patch adds support of `llvm.experimental.guard` intrinsics to non-trivial
simple loop unswitching. These intrinsics represent implicit control flow which
has pretty much the same semantics as usual conditional branches. The
algorithm of dealing with them is following:

- Consider guards as unswitching candidates;
- If a guard is considered the best candidate, turn it into a branch;
- Apply normal unswitching algorithm on this branch.

The patch has no compile time effect on code that does not contain any guards.

Differential Revision: https://reviews.llvm.org/D53744
Reviewed By: chandlerc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345387 91177308-0d34-0410-b5e6-96231b3b80d8

[ARM] Fix ARMCodeGenPrepare test cases

While working on FileCheck producing better diagnostics in D53710, I noticed
that our test case is broken in a few different ways. The test was running, but
results were not checked as prefix CHECK-COMMON wasn't defined (which is what
FileCheck should warn about). Also, the output was different in 2 cases because
of recent changes in ARMCodeGenPrepare.

Differential Revision: https://reviews.llvm.org/D53746

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345386 91177308-0d34-0410-b5e6-96231b3b80d8

[CodeGen] Remove out operands from PATCHABLE_OP

The current model requires 1 out operand, but it is not used nor created.

This fixed an x86 machine verifier issue.

Part of PR27481.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345384 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-ar] Access ADDLIB in llvm-ar via command line

ADDLIB is called to add the contents of an archive to another archive.
Previously this was only accessible through the use of an MRI script.

With the use of a new "L" modifier, archive files can treated in the
manner above when using quick append.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345383 91177308-0d34-0410-b5e6-96231b3b80d8

[AMDGPU] Add a pass to promote bitcast calls

AMDGPU currently only supports direct calls, but at lower optimisation levels it
fails to lower statically direct calls which appear indirect due to a bitcast.

Add a pass to visit all CallSites and use CallPromotionUtils to "devirtualize"
calls.

Differential Revision: https://reviews.llvm.org/D52741

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345382 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345379 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-mca] Fix -wreorder and -Wunused-private-field after r345376. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345378 91177308-0d34-0410-b5e6-96231b3b80d8

[Codegen] - Implement basic .debug_loclists section emission (DWARF5).

.debug_loclists is the DWARF 5 version of the .debug_loc.
With that patch, it will be emitted when DWARF 5 is used.

Differential revision: https://reviews.llvm.org/D53365

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345377 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-mca] Removed dependency on mca::SourcMgr in some Views. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345376 91177308-0d34-0410-b5e6-96231b3b80d8

[SimpleLoopUnswitch] Make all checks before actual non-trivial unswitch

We should be able to make all relevant checks before we actually start the non-trivial
unswitching, so that we could guarantee that once we have started the transform,
it will always succeed.

Reviewed By: chandlerc
Differential Revision: https://reviews.llvm.org/D53747

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345375 91177308-0d34-0410-b5e6-96231b3b80d8

[SystemZ] Fix -Wcovered-switch-default as coding standard regulates

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345369 91177308-0d34-0410-b5e6-96231b3b80d8

[NFC] Add periods to CREDITS.txt (testing git-llvm)

NFC commit to test git-llvm bridge for current GitHub monorepo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345368 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-nm] Simplify. NFC

Change a \t to spaces
Change some zero-filling memcpy to aggregate initialization
Delete redundant ArchiveName.clear() after declaration

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345367 91177308-0d34-0410-b5e6-96231b3b80d8