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8 years agoMC: Don't access the filesystem in MCContext's constructor
Justin Bogner [Tue, 22 Mar 2016 22:24:29 +0000 (22:24 +0000)]
MC: Don't access the filesystem in MCContext's constructor

MCContext shouldn't be accessing the filesystem - that's a gross
layering violation and makes it awkward to use as a library or in a
daemon where it may not even be allowed filesystem access.

The CWD lookup here is normally redundant anyway, since the calling
context either also looks up the CWD or sets this to something more
specific. Here, we fix up the one caller that doesn't already set up a
debug compilation dir and make it clear that the responsibility for
such set up is in the users of MCContext.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264109 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[NVVM] Remove noduplicate attribute from synchronizing intrinsics.
Justin Lebar [Tue, 22 Mar 2016 22:08:01 +0000 (22:08 +0000)]
[NVVM] Remove noduplicate attribute from synchronizing intrinsics.

Summary:
I've completed my audit of all the code that looks at noduplicate and
added handling of convergent where appropriate, so we no longer need
noduplicate on these intrinsics.

Reviewers: jholewinski

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D18168

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264107 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDrop comdats from the dst module if they are not selected.
Rafael Espindola [Tue, 22 Mar 2016 21:35:47 +0000 (21:35 +0000)]
Drop comdats from the dst module if they are not selected.

A really unfortunate design of llvm-link and related libraries is that
they operate one module at a time.

This means they can copy a GV to the destination module that should not
be there in the final result because a later bitcode file takes
precedence.

We already handled cases like a strong GV replacing a weak for example.

One case that is not currently handled is a comdat replacing another.
This doesn't happen in ELF, but with COFF largest selection kind it is
possible.

In "llvm-link a.ll b.ll" if the selected comdat was from a.ll,
everything will work and we will not copy the comdat from b.ll.

But if we run "llvm-link b.ll a.ll", we fail to delete the already
copied comdat from b.ll. This patch fixes that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264103 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoKeep CodeGenPrepare from preserving the domtree.
George Burgess IV [Tue, 22 Mar 2016 21:25:08 +0000 (21:25 +0000)]
Keep CodeGenPrepare from preserving the domtree.

CGP modifies the domtree in some cases, so saying that it preserves the
domtree is a lie. We'll be able to selectively preserve it with the new
pass manager.

Differential Revision: http://reviews.llvm.org/D16893

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264099 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "Support arbitrary addrspace pointers in masked load/store intrinsics"
Matthias Braun [Tue, 22 Mar 2016 20:24:34 +0000 (20:24 +0000)]
Revert "Support arbitrary addrspace pointers in masked load/store intrinsics"

This commit broke LTO builds. Reverting it to unbreak the bots while the
issue is investigated. See also:

http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160321/341002.html

This reverts r263158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264088 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][AVX] Added AVX1 tests for 256-bit vector idiv-by-constant
Simon Pilgrim [Tue, 22 Mar 2016 20:10:49 +0000 (20:10 +0000)]
[X86][AVX] Added AVX1 tests for 256-bit vector idiv-by-constant

Prep work based on feedback for D18307

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264086 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SelectionDAG] Ensure constant folded legalized vector element types are compatible...
Simon Pilgrim [Tue, 22 Mar 2016 19:59:53 +0000 (19:59 +0000)]
[SelectionDAG] Ensure constant folded legalized vector element types are compatible with the BUILD_VECTOR type

Found during fuzz testing - 32-bit x86 targets were legalizing a <2 x i1> compare result to <2 x i32> when <2 x i64> was expected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264085 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: check return types match when emitting tail call to builtin.
Tim Northover [Tue, 22 Mar 2016 19:14:38 +0000 (19:14 +0000)]
CodeGen: check return types match when emitting tail call to builtin.

We were just completely ignoring the types when determining whether we could
safely emit a libcall as a tail call. This is clearly wrong.

Theoretically, we could dig deeper looking for incidental matches (much like
the generic code in Analysis.cpp does), but it's probably not worth it for the
few libcalls that exist.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264084 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove unnecessary branch from test
Sanjoy Das [Tue, 22 Mar 2016 18:45:41 +0000 (18:45 +0000)]
Remove unnecessary branch from test

(Addresses post commit review by Reid Kleckner)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264083 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LoopVersioning] Relax an assert for LCSSA PHIs
Adam Nemet [Tue, 22 Mar 2016 18:38:15 +0000 (18:38 +0000)]
[LoopVersioning] Relax an assert for LCSSA PHIs

When you have multiple LCSSA (single-operand) PHIs that are converted
into two-operand PHIs due to versioning, only assert that the PHI
currently being converted has a single operand.  I.e. we don't want to
check PHIs that were converted earlier in the loop.

Fixes PR27023.

Thanks to Karl-Johan Karlsson for the minimized testcase!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264081 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAllow lowering call sites with both funclets and deopt state
Sanjoy Das [Tue, 22 Mar 2016 18:10:39 +0000 (18:10 +0000)]
Allow lowering call sites with both funclets and deopt state

Lowering funclets is a no-op, so we can just go ahead and lower the
deopt state.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264078 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Implement the rotate instructions.
Dan Gohman [Tue, 22 Mar 2016 18:01:49 +0000 (18:01 +0000)]
[WebAssembly] Implement the rotate instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264076 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd a hasOperandBundlesOtherThan helper, and use it; NFC
Sanjoy Das [Tue, 22 Mar 2016 17:51:25 +0000 (17:51 +0000)]
Add a hasOperandBundlesOtherThan helper, and use it; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264072 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][SSE] Reapplied: Simplify vector LOAD + EXTEND on pre-SSE41 hardware
Simon Pilgrim [Tue, 22 Mar 2016 16:22:08 +0000 (16:22 +0000)]
[X86][SSE] Reapplied: Simplify vector LOAD + EXTEND on pre-SSE41 hardware

Improve vector extension of vectors on hardware without dedicated VSEXT/VZEXT instructions.

We already convert these to SIGN_EXTEND_VECTOR_INREG/ZERO_EXTEND_VECTOR_INREG but can further improve this by using the legalizer instead of prematurely splitting into legal vectors in the combine as this only properly helps for lowering to VSEXT/VZEXT.

Removes a lot of unnecessary any_extend + mask pattern - (Fix for PR25718).

Reapplied with a fix for PR26953 (missing vector widening legalization).

Differential Revision: http://reviews.llvm.org/D17932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264062 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[unittests] clang-format a line, NFC
Vedant Kumar [Tue, 22 Mar 2016 15:14:18 +0000 (15:14 +0000)]
[unittests] clang-format a line, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264059 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips] Make simm6 consistent with the rest. NFC.
Daniel Sanders [Tue, 22 Mar 2016 14:50:22 +0000 (14:50 +0000)]
[mips] Make simm6 consistent with the rest. NFC.

Summary:

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18147

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264057 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips] Range check simm7.
Daniel Sanders [Tue, 22 Mar 2016 14:40:00 +0000 (14:40 +0000)]
[mips] Range check simm7.

Summary:
Also renamed li_simm7 to li16_imm since it's not a simm7 and has an unusual
encoding (it's a uimm7 except that 0x7f represents -1).

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18145

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264056 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips] Range check simm5.
Daniel Sanders [Tue, 22 Mar 2016 14:29:53 +0000 (14:29 +0000)]
[mips] Range check simm5.

Summary:
We can't check the error message for this one because there's another lw/sw
available that covers a larger range. We therefore check the transition
between the two sizes.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D18144

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264054 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips] Range check vsplat_uimm[1234568].
Daniel Sanders [Tue, 22 Mar 2016 14:17:41 +0000 (14:17 +0000)]
[mips] Range check vsplat_uimm[1234568].

Summary:

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18143

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264053 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips] Range check uimm4_ptr, remove uimm6_ptr, and use correctly sized immediates...
Daniel Sanders [Tue, 22 Mar 2016 13:58:53 +0000 (13:58 +0000)]
[mips] Range check uimm4_ptr, remove uimm6_ptr, and use correctly sized immediates in MSA copy/insert.

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18142

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264052 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PATCH] Force LoopReroll to reset the loop trip count value after reroll.
Zinovy Nis [Tue, 22 Mar 2016 13:50:57 +0000 (13:50 +0000)]
[PATCH] Force LoopReroll to reset the loop trip count value after reroll.

It's a bug fix.
For rerolled loops SE trip count remains unchanged. It leads to incorrect work of the next passes.
My patch just resets SE info for rerolled loop forcing SE to re-evaluate it next time it requested.
I also added a verifier call in the exisitng test to be sure no invalid SE data remain. Without my fix this test would fail with -verify-scev.

Differential Revision: http://reviews.llvm.org/D18316

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264051 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ELF][gcc compatibility]: support section names with special characters (e.g. "/")
Marina Yatsina [Tue, 22 Mar 2016 11:23:15 +0000 (11:23 +0000)]
[ELF][gcc compatibility]: support section names with special characters (e.g. "/")

Adding support for section names with special characters in them (e.g. "/").
GCC successfully compiles such section names.
This also fixes PR24520.

Differential Revision: http://reviews.llvm.org/D15678

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264038 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix unittests: resize() -> reserve()
Mehdi Amini [Tue, 22 Mar 2016 07:35:51 +0000 (07:35 +0000)]
Fix unittests: resize() -> reserve()

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264029 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRename DenseMap::resize() into DenseMap::reserve() (NFC)
Mehdi Amini [Tue, 22 Mar 2016 07:20:00 +0000 (07:20 +0000)]
Rename DenseMap::resize() into DenseMap::reserve() (NFC)

This is more coherent with usual containers.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264026 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMinor code cleanup. NFC.
Junmo Park [Tue, 22 Mar 2016 04:37:32 +0000 (04:37 +0000)]
Minor code cleanup. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264024 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAppease the windows buildbots
Sanjoy Das [Tue, 22 Mar 2016 02:11:57 +0000 (02:11 +0000)]
Appease the windows buildbots

The guess is that the stdout/stderr ordering may differ between windows
/ unix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264019 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd "first class" lowering for deopt operand bundles
Sanjoy Das [Tue, 22 Mar 2016 00:59:13 +0000 (00:59 +0000)]
Add "first class" lowering for deopt operand bundles

Summary:
After this change, deopt operand bundles can be lowered directly by
SelectionDAG into STATEPOINT instructions (which are then lowered to a
call or sequence of nop, with an associated __llvm_stackmaps entry0.
This obviates the need to round-trip deoptimization state through
gc.statepoint via RewriteStatepointsForGC.

Reviewers: reames, atrick, majnemer, JosephTremoulet, pgavlin

Subscribers: sanjoy, mcrosier, majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D18257

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264015 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[sancov] do not instrument nodes that are full pre-dominators
Mike Aizatsky [Mon, 21 Mar 2016 23:08:16 +0000 (23:08 +0000)]
[sancov] do not instrument nodes that are full pre-dominators

Summary:
Without tree pruning clang has 2,667,552 points.
Wiht only dominators pruning: 1,515,586.
With both dominators & predominators pruning: 1,340,534.

Resubmit of r262103.

Differential Revision: http://reviews.llvm.org/D18341

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264003 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CUDA] Add documentation explaining how to detect clang vs nvcc.
Justin Lebar [Mon, 21 Mar 2016 23:05:15 +0000 (23:05 +0000)]
[CUDA] Add documentation explaining how to detect clang vs nvcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264002 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Fix dangling references introduced by r263982
Nicolai Haehnle [Mon, 21 Mar 2016 22:54:02 +0000 (22:54 +0000)]
AMDGPU: Fix dangling references introduced by r263982

Fixes Valgrind errors on the test cases that were reported as failing
by buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264000 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[InstCombine] Ensure all undef operands are handled before binary instruction constan...
Simon Pilgrim [Mon, 21 Mar 2016 22:15:50 +0000 (22:15 +0000)]
[InstCombine] Ensure all undef operands are handled before binary instruction constant folding

As noted in PR18355, this patch makes it clear that all cases with undef operands have been handled before further constant folding is attempted.

Differential Revision: http://reviews.llvm.org/D18305

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263994 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix -Wdocumentation warnings from r263853
Duncan P. N. Exon Smith [Mon, 21 Mar 2016 22:13:44 +0000 (22:13 +0000)]
Fix -Wdocumentation warnings from r263853

Thanks to chapuni for catching this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263993 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[MemorySSA] Consider def-only BBs for live-in calculations.
George Burgess IV [Mon, 21 Mar 2016 21:25:39 +0000 (21:25 +0000)]
[MemorySSA] Consider def-only BBs for live-in calculations.

If we have a BB with only MemoryDefs, live-in calculations will ignore
it. This means we get results like this:

define void @foo(i8* %p) {
  ; 1 = MemoryDef(liveOnEntry)
  store i8 0, i8* %p
  br i1 undef, label %if.then, label %if.end

if.then:
  ; 2 = MemoryDef(1)
  store i8 1, i8* %p
  br label %if.end

if.end:
  ; 3 = MemoryDef(1)
  store i8 2, i8* %p
  ret void
}

...When there should be a MemoryPhi in the `if.end` BB.

This patch fixes that behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263991 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove leftover options from multiline.ll
Krzysztof Parzyszek [Mon, 21 Mar 2016 21:25:01 +0000 (21:25 +0000)]
Remove leftover options from multiline.ll

I added -march=hexagon to force using Hexagon target when testing
locally, and I forgot to take it out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263990 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd a testcase that would have found the bug in r263971.
Rafael Espindola [Mon, 21 Mar 2016 21:09:38 +0000 (21:09 +0000)]
Add a testcase that would have found the bug in r263971.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263988 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "[llvm-objdump] Printing relocations in executable and shared object files...
Rafael Espindola [Mon, 21 Mar 2016 20:59:15 +0000 (20:59 +0000)]
Revert "[llvm-objdump] Printing relocations in executable and shared object files.  This partially reverts r215844 by removing test objdump-reloc-shared.test which stated GNU objdump doesn't print relocations, it does."

This reverts commit r263971.
It produces the wrong results for .rela.dyn. I will add a test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263987 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUnxfail test/DebugInfo/Generic/multiline.ll on Hexagon
Krzysztof Parzyszek [Mon, 21 Mar 2016 20:55:59 +0000 (20:55 +0000)]
Unxfail test/DebugInfo/Generic/multiline.ll on Hexagon

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263986 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Coding style fixes
Nicolai Haehnle [Mon, 21 Mar 2016 20:39:24 +0000 (20:39 +0000)]
AMDGPU: Coding style fixes

I meant to add these before committing r263982 as per the review,
but I forgot to squash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263983 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Add SIWholeQuadMode pass
Nicolai Haehnle [Mon, 21 Mar 2016 20:28:33 +0000 (20:28 +0000)]
AMDGPU: Add SIWholeQuadMode pass

Summary:
Whole quad mode is already enabled for pixel shaders that compute
derivatives, but it must be suspended for instructions that cause a
shader to have side effects (i.e. stores and atomics).

This pass addresses the issue by storing the real (initial) live mask
in a register, masking EXEC before instructions that require exact
execution and (re-)enabling WQM where required.

This pass is run before register coalescing so that we can use
machine SSA for analysis.

The changes in this patch expose a problem with the second machine
scheduling pass: target independent instructions like COPY implicitly
use EXEC when they operate on VGPRs, but this fact is not encoded in
the MIR. This can lead to miscompilation because instructions are
moved past changes to EXEC.

This patch fixes the problem by adding use-implicit operands to
target independent instructions. Some general codegen passes are
relaxed to work with such implicit use operands.

Reviewers: arsenm, tstellarAMD, mareko

Subscribers: MatzeB, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18162

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263982 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Hexagon] Add handling fixups and instruction relaxation
Krzysztof Parzyszek [Mon, 21 Mar 2016 20:27:17 +0000 (20:27 +0000)]
[Hexagon] Add handling fixups and instruction relaxation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263981 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Hexagon] Properly encode registers in duplex instructions
Krzysztof Parzyszek [Mon, 21 Mar 2016 20:13:33 +0000 (20:13 +0000)]
[Hexagon] Properly encode registers in duplex instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263980 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Hexagon] Fix reserving emergency spill slots for register scavenger
Krzysztof Parzyszek [Mon, 21 Mar 2016 19:57:08 +0000 (19:57 +0000)]
[Hexagon] Fix reserving emergency spill slots for register scavenger

- R10 and R11 are not reserved registers.
- Check for reserved registers when finding unused caller-saved registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263977 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Implement the eqz instructions.
Dan Gohman [Mon, 21 Mar 2016 19:54:41 +0000 (19:54 +0000)]
[WebAssembly] Implement the eqz instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263976 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SLP] Remove unnecessary member variables by using container APIs.
Chad Rosier [Mon, 21 Mar 2016 19:47:44 +0000 (19:47 +0000)]
[SLP] Remove unnecessary member variables by using container APIs.

This changes the debug output, but still retains its usefulness.
Differential Revision: http://reviews.llvm.org/D18324

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263975 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-objdump] Printing relocations in executable and shared object files. This...
Colin LeMahieu [Mon, 21 Mar 2016 19:14:50 +0000 (19:14 +0000)]
[llvm-objdump] Printing relocations in executable and shared object files.  This partially reverts r215844 by removing test objdump-reloc-shared.test which stated GNU objdump doesn't print relocations, it does.

In executable and shared object ELF files, relocations in the file contain the final virtual address rather than section offset so this is adjusted to display section offset.

Differential revision: http://reviews.llvm.org/D15965

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263971 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/SI: Fix threshold calculation for branching when exec is zero
Tom Stellard [Mon, 21 Mar 2016 18:56:58 +0000 (18:56 +0000)]
AMDGPU/SI: Fix threshold calculation for branching when exec is zero

Summary:
When control flow is implemented using the exec mask, the compiler will
insert branch instructions to skip over the masked section when exec is
zero if the section contains more than a certain number of instructions.

The previous code would only count instructions in successor blocks,
and this patch modifies the code to start counting instructions in all
blocks between the start and end of the branch.

Reviewers: nhaehnle, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18282

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263969 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Add a helpful assert. NFC.
Chad Rosier [Mon, 21 Mar 2016 18:04:10 +0000 (18:04 +0000)]
[AArch64] Add a helpful assert. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263965 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Remove SignBitIsZero for mubuf scratch offsets
Matt Arsenault [Mon, 21 Mar 2016 18:02:18 +0000 (18:02 +0000)]
AMDGPU: Remove SignBitIsZero for mubuf scratch offsets

These instructions do not have the same negative base
address problem that DS instructions do on SI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263964 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoARM: Better codegen for 64-bit compares.
Peter Collingbourne [Mon, 21 Mar 2016 18:00:02 +0000 (18:00 +0000)]
ARM: Better codegen for 64-bit compares.

This introduces a custom lowering for ISD::SETCCE (introduced in r253572)
that allows us to emit a short code sequence for 64-bit compares.

Before:

push {r7, lr}
cmp r0, r2
mov.w r0, #0
mov.w r12, #0
it hs
movhs r0, #1
cmp r1, r3
it ge
movge.w r12, #1
it eq
moveq r12, r0
cmp.w r12, #0
bne .LBB1_2
@ BB#1:                                 @ %bb1
bl f
pop {r7, pc}
.LBB1_2:                                @ %bb2
bl g
pop {r7, pc}

After:

push {r7, lr}
subs r0, r0, r2
sbcs.w r0, r1, r3
bge .LBB1_2
@ BB#1:                                 @ %bb1
bl f
pop {r7, pc}
.LBB1_2:                                @ %bb2
bl g
pop {r7, pc}

Saves around 80KB in Chromium's libchrome.so.

Some notes on this patch:

- I don't much like the ARMISD::BRCOND and ARMISD::CMOV combines I
  introduced (nothing else needs them). However, they are necessary in
  order to avoid poor codegen, and they seem similar to existing combines
  in other backends (e.g. X86 combines (brcond (cmp (setcc Compare))) to
  (brcond Compare)).

- No support for Thumb-1. This is in principle possible, but we'd need
  to implement ARMISD::SUBE for Thumb-1.

Differential Revision: http://reviews.llvm.org/D15256

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263962 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Add Cortex-A32 support
Renato Golin [Mon, 21 Mar 2016 17:29:01 +0000 (17:29 +0000)]
[ARM] Add Cortex-A32 support

Adding Cortex-A32 as an available target in the ARM backend.

Patch by Sam Parker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263956 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-readobj] Impl GNU style symbols printing
Hemant Kulkarni [Mon, 21 Mar 2016 17:18:23 +0000 (17:18 +0000)]
[llvm-readobj] Impl GNU style symbols printing

Implements "readelf -sW and readelf -DsW"

Differential Revision: http://reviews.llvm.org/D18224

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263952 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Orc] Switch RPC Procedure to take a function type, rather than an arg list.
Lang Hames [Mon, 21 Mar 2016 16:56:25 +0000 (16:56 +0000)]
[Orc] Switch RPC Procedure to take a function type, rather than an arg list.

No functional change, just a little more readable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263951 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAPFloat: Add frexp
Matt Arsenault [Mon, 21 Mar 2016 16:49:16 +0000 (16:49 +0000)]
APFloat: Add frexp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263950 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Add frexp_mant intrinsic
Matt Arsenault [Mon, 21 Mar 2016 16:11:05 +0000 (16:11 +0000)]
AMDGPU: Add frexp_mant intrinsic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263948 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoImplement constant folding for bitreverse
Matt Arsenault [Mon, 21 Mar 2016 15:00:35 +0000 (15:00 +0000)]
Implement constant folding for bitreverse

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263945 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Fix a -Wdocumentation warning. NFC.
Chad Rosier [Mon, 21 Mar 2016 13:43:58 +0000 (13:43 +0000)]
[AArch64] Fix a -Wdocumentation warning. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263942 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IndVars] Fix PR26974: make sure replaceCongruentIVs doesn't break LCSSA
Silviu Baranga [Mon, 21 Mar 2016 12:44:29 +0000 (12:44 +0000)]
[IndVars] Fix PR26974: make sure replaceCongruentIVs doesn't break LCSSA

Summary:
replaceCongruentIVs can break LCSSA when trying to replace IV increments
since it tries to replace all uses of a phi node with another phi node
while both of the phi nodes are not necessarily in the processed loop.
This will cause an assert in IndVars.

To fix this, we add a check to make sure that the replacement maintains
LCSSA.

Reviewers: sanjoy

Subscribers: mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D18266

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263941 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAGCombine] Catch the case where extract_vector_elt can cause an any_ext while proce...
Silviu Baranga [Mon, 21 Mar 2016 11:43:46 +0000 (11:43 +0000)]
[DAGCombine] Catch the case where extract_vector_elt can cause an any_ext while processing AND SDNodes

Summary:
extract_vector_elt can cause an implicit any_ext if the types don't
match. When processing the following pattern:

  (and (extract_vector_elt (load ([non_ext|any_ext|zero_ext] V))), c)

DAGCombine was ignoring the possible extend, and sometimes removing
the AND even though it was required to maintain some of the bits
in the result to 0, resulting in a miscompile.

This change fixes the issue by limiting the transformation only to
cases where the extract_vector_elt doesn't perform the implicit
extend.

Reviewers: t.p.northover, jmolloy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18247

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263935 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFixed -mcpu flag
Elena Demikhovsky [Mon, 21 Mar 2016 11:06:20 +0000 (11:06 +0000)]
Fixed -mcpu flag
"core-avx" does not exist; I changed to "nehalem"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263932 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][SSE] Add vector integer division by constant tests
Simon Pilgrim [Sun, 20 Mar 2016 21:46:58 +0000 (21:46 +0000)]
[X86][SSE] Add vector integer division by constant tests

Expanded tests and split into sdiv/srem and udiv/urem cases for 128 and 256 bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263917 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[NVPTX] Adds a new address space inference pass.
Jingyue Wu [Sun, 20 Mar 2016 20:59:20 +0000 (20:59 +0000)]
[NVPTX] Adds a new address space inference pass.

Summary:
The old address space inference pass (NVPTXFavorNonGenericAddrSpaces) is unable
to convert the address space of a pointer induction variable. This patch adds a
new pass called NVPTXInferAddressSpaces that overcomes that limitation using a
fixed-point data-flow analysis (see the file header comments for details).

The new pass is experimental and not enabled by default. Users can turn
it on by setting the -nvptx-use-infer-addrspace flag of llc.

Reviewers: jholewinski, tra, jlebar

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D17965

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263916 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[gold] Emit a diagnostic in case we fail to remove a file.
Davide Italiano [Sun, 20 Mar 2016 20:12:33 +0000 (20:12 +0000)]
[gold] Emit a diagnostic in case we fail to remove a file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263914 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][SSE] Tidyup setTargetShuffleZeroElements to match computeZeroableShuffleElements
Simon Pilgrim [Sun, 20 Mar 2016 17:43:07 +0000 (17:43 +0000)]
[X86][SSE] Tidyup setTargetShuffleZeroElements to match computeZeroableShuffleElements

Based on feedback for D14261

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263911 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][SSE] Detect zeroable shuffle elements from different value types
Simon Pilgrim [Sun, 20 Mar 2016 15:45:42 +0000 (15:45 +0000)]
[X86][SSE] Detect zeroable shuffle elements from different value types

Improve computeZeroableShuffleElements to be able to peek through bitcasts to extract zero/undef values from BUILD_VECTOR nodes of different element sizes to the shuffle mask.

Differential Revision: http://reviews.llvm.org/D14261

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263906 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAVX512BW: Enable v32i1/v64i1 BUILD_VECTOR
Igor Breger [Sun, 20 Mar 2016 13:09:43 +0000 (13:09 +0000)]
AVX512BW: Enable v32i1/v64i1 BUILD_VECTOR

Differential Revision: http://reviews.llvm.org/D18211

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263898 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ELF] Update x86_64 relocations to 0.99.8 ABI
George Rimar [Sun, 20 Mar 2016 09:45:08 +0000 (09:45 +0000)]
[ELF] Update x86_64 relocations to 0.99.8 ABI

Added: R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263894 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSuppress a -Wunused-variable warning in release builds.
Craig Topper [Sun, 20 Mar 2016 01:17:54 +0000 (01:17 +0000)]
Suppress a -Wunused-variable warning in release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263892 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUse a range-based for loop. NFC.
Michael Kuperstein [Sun, 20 Mar 2016 00:16:13 +0000 (00:16 +0000)]
Use a range-based for loop. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263889 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoExpose IRBuilder::CreateAtomicCmpXchg as LLVMBuildAtomicCmpXchg in the C API.
Mehdi Amini [Sat, 19 Mar 2016 21:28:28 +0000 (21:28 +0000)]
Expose IRBuilder::CreateAtomicCmpXchg as LLVMBuildAtomicCmpXchg in the C API.

Summary: Also expose getters and setters in the C API, so that the change can be tested.

Reviewers: nhaehnle, axw, joker.eph

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18260

From: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263886 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoConst-correctness in libLTO
Mehdi Amini [Sat, 19 Mar 2016 21:28:18 +0000 (21:28 +0000)]
Const-correctness in libLTO

Looks like I was sloppy when bridging to C.
Thanks D. Blaikie for noticing!

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263885 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: use range based for loop
Saleem Abdulrasool [Sat, 19 Mar 2016 16:35:32 +0000 (16:35 +0000)]
CodeGen: use range based for loop

Convert a loop to use a range based style loop.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263884 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SimplifyLibCalls] Only consider sinpi/cospi functions within the same function
David Majnemer [Sat, 19 Mar 2016 04:53:02 +0000 (04:53 +0000)]
[SimplifyLibCalls] Only consider sinpi/cospi functions within the same function

The sinpi/cospi can be replaced with sincospi to remove unnecessary
computations.  However, we need to make sure that the calls are within
the same function!

This fixes PR26993.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263875 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[InstCombine] Don't insert instructions before a catch switch
David Majnemer [Sat, 19 Mar 2016 04:39:52 +0000 (04:39 +0000)]
[InstCombine] Don't insert instructions before a catch switch

CatchSwitches are not splittable, we cannot insert casts, etc. before
them.

This fixes PR26992.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263874 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd a dependency from llvm-link to TransformUtils following r263860
Mehdi Amini [Sat, 19 Mar 2016 03:12:54 +0000 (03:12 +0000)]
Add a dependency from llvm-link to TransformUtils following r263860

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263873 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[gold] Use early return to simplify.
Davide Italiano [Sat, 19 Mar 2016 02:34:33 +0000 (02:34 +0000)]
[gold] Use early return to simplify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263872 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemoved trailing whitespace
Simon Pilgrim [Sat, 19 Mar 2016 02:05:33 +0000 (02:05 +0000)]
Removed trailing whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263871 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix a const_cast related warning in GCC in the C API for libLTO
Mehdi Amini [Sat, 19 Mar 2016 01:24:23 +0000 (01:24 +0000)]
Fix a const_cast related warning in GCC in the C API for libLTO

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263870 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd a comment on partial hashing of Metadata
Mehdi Amini [Sat, 19 Mar 2016 01:06:24 +0000 (01:06 +0000)]
Add a comment on partial hashing of Metadata

Following r263866, on D. Blaikie suggestion.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263869 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[libFuzzer] one more trophie
Kostya Serebryany [Sat, 19 Mar 2016 01:05:33 +0000 (01:05 +0000)]
[libFuzzer] one more trophie

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263868 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoHash Metadata using pointer for MDString argument instead of value (NFC)
Mehdi Amini [Sat, 19 Mar 2016 01:02:34 +0000 (01:02 +0000)]
Hash Metadata using pointer for MDString argument instead of value (NFC)

MDString are uniqued in the Context on creation, hashing the
pointer is less expensive than hashing the String itself.

Reviewers: dexonsmith
Differential Revision: http://reviews.llvm.org/D16560

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263867 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCompute some Debug Info Metadata hash key partially (NFC)
Mehdi Amini [Sat, 19 Mar 2016 00:59:26 +0000 (00:59 +0000)]
Compute some Debug Info Metadata hash key partially (NFC)

Summary:
This patch changes the computation of the hash key for DISubprogram to
be computed on a small subset of the fields. The hash is computed a
lot faster, but there might be more collision in the table.
However by carefully selecting the fields, colisions should be rare.

Using `opt` to load the IR for FastISelEmitter.cpp.o, with this patch:
 - DISubprogram::getImpl() goes from 28ms to 15ms.
 - DICompositeType::getImpl() goes from 6ms to 2ms
 - DIDerivedType::getImpl() goes from 18 to 12ms

Reviewers: dexonsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16571

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263866 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRework linkInModule(), making it oblivious to ThinLTO
Mehdi Amini [Sat, 19 Mar 2016 00:40:31 +0000 (00:40 +0000)]
Rework linkInModule(), making it oblivious to ThinLTO

Summary:
ThinLTO is relying on linkInModule to import selected function.
However a lot of "magic" was hidden in linkInModule and the IRMover,
who would rename and promote global variables on the fly.

This is moving to an approach where the steps are decoupled and the
client is reponsible to specify the list of globals to import.
As a consequence some test are changed because they were relying on
the previous behavior which was importing the definition of *every*
single global without control on the client side.
Now the burden is on the client to decide if a global has to be imported
or not.

Reviewers: tejohnson

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D18122

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263863 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd a test for r263577: "Add missing error handling in llvm-lto"
Mehdi Amini [Sat, 19 Mar 2016 00:17:32 +0000 (00:17 +0000)]
Add a test for r263577: "Add missing error handling in llvm-lto"

On Rafael's suggestion!
(also fix a discrepancy between this error message format and the others)

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263860 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CXX_FAST_TLS] Fix issues in ARM.
Manman Ren [Fri, 18 Mar 2016 23:44:37 +0000 (23:44 +0000)]
[CXX_FAST_TLS] Fix issues in ARM.

We need to be careful on which registers can be explicitly handled
via copies. Prologue, Epilogue use physical registers and if one belongs
to the set of CSRsViaCopy, it will no longer be CSRed, since PEI overwrites
it after the explicit copies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263857 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CXX_FAST_TLS] Disable tail call when calling conventions are mismatched.
Manman Ren [Fri, 18 Mar 2016 23:41:51 +0000 (23:41 +0000)]
[CXX_FAST_TLS] Disable tail call when calling conventions are mismatched.

Since CXX_FAST_TLS has a bigger set of CSRs, we don't tail call when caller
and callee have mismatched calling conventions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263856 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CXX_FAST_TLS] fix issues with O0 on ARM, AArch64 and X86.
Manman Ren [Fri, 18 Mar 2016 23:38:49 +0000 (23:38 +0000)]
[CXX_FAST_TLS] fix issues with O0 on ARM, AArch64 and X86.

Since at O0, explicit copies via SplitCSR may not be removed even if
they are unnecessary, we choose not to use SplitCSR at O0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263855 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAArch64: Don't modify other modules in AArch64PromoteConstant
Duncan P. N. Exon Smith [Fri, 18 Mar 2016 23:30:54 +0000 (23:30 +0000)]
AArch64: Don't modify other modules in AArch64PromoteConstant

Avoid modifying other modules in `AArch64PromoteConstant` when the
constant is `ConstantData` (a horrible accident, I'm sure, caught by an
experimental follow-up to r261464).

Previously, this walked through all the users of a constant, but that
reaches into other modules when the constant doesn't depend transitively
on a `GlobalValue`!  Since we're walking instructions anyway, just
modify the instructions we actually see.

As a drive-by, instead of storing `Use` and getting the instructions
again via `Use::getUser()` (which is not a constantant time lookup),
store `std::pair<Instruction, unsigned>`.  Besides being cheaper, this
makes it easier to drop use-lists form `ConstantData` in the future.
(I threw this in because I was touching all the code anyway.)

Because the patch completely changes the traversal logic, it looks
like a rewrite of the pass, but the core logic is all the same (or
should be, minus the out-of-module changes).  In other words, there
should be NFC as long as the LLVMContext only has a single Module.

I didn't think of a good way to test this, but I hope to submit a patch
eventually that makes walking these use-lists illegal/impossible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263853 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[sancov] clang-formatting SanitizerCoverage.cpp and fully pleasing clang-tidy.
Mike Aizatsky [Fri, 18 Mar 2016 23:29:29 +0000 (23:29 +0000)]
[sancov] clang-formatting SanitizerCoverage.cpp and fully pleasing clang-tidy.

Differential Revision: http://reviews.llvm.org/D18288

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263852 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoHave DataLayout::isLegalInteger() accept uint64_t
Michael Kuperstein [Fri, 18 Mar 2016 23:19:29 +0000 (23:19 +0000)]
Have DataLayout::isLegalInteger() accept uint64_t

While not strictly necessary, since we don't support large integer
types, this avoids bugs due to silent truncation from uint64_t to a
32-bit unsigned (e.g. DL.isLegalInteger(DL.getTypeSizeInBits(Ty) )

This fixes PR26972.

Differential Revision: http://reviews.llvm.org/D18258

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263850 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[sancov] typo fix
Mike Aizatsky [Fri, 18 Mar 2016 22:46:10 +0000 (22:46 +0000)]
[sancov] typo fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263849 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Support] Update comment to match actual behavior.
Lang Hames [Fri, 18 Mar 2016 22:44:16 +0000 (22:44 +0000)]
[Support] Update comment to match actual behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263848 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "Revert "[sancov] specifying sanitizer coverage dependencies.""
Chandler Carruth [Fri, 18 Mar 2016 22:43:42 +0000 (22:43 +0000)]
Revert "Revert "[sancov] specifying sanitizer coverage dependencies.""

This reverts commit r263825, re-instating r263797.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263847 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[sancov] reformat & 1 clang-tidy warning.
Mike Aizatsky [Fri, 18 Mar 2016 22:40:52 +0000 (22:40 +0000)]
[sancov] reformat & 1 clang-tidy warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263846 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[sancov] Fix the sancov pass to initialize itself inside its
Chandler Carruth [Fri, 18 Mar 2016 22:35:58 +0000 (22:35 +0000)]
[sancov] Fix the sancov pass to initialize itself inside its
constructor. This should fix the recent crashes on certain
architectures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263845 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFixing autocorrect changing cmake->make
Chris Bieneman [Fri, 18 Mar 2016 22:11:51 +0000 (22:11 +0000)]
Fixing autocorrect changing cmake->make

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263843 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoBPF: emit an error message for unsupported signed division operation
Alexei Starovoitov [Fri, 18 Mar 2016 22:02:47 +0000 (22:02 +0000)]
BPF: emit an error message for unsupported signed division operation

Signed-off-by: Yonghong Song <yhs@plumgrid.com>
Signed-off-by: Alexei Starovoitov <ast@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263842 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMissed a few non-ascii characters
Chris Bieneman [Fri, 18 Mar 2016 21:59:33 +0000 (21:59 +0000)]
Missed a few non-ascii characters

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263841 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUpdates based on post-commit review of r263834
Chris Bieneman [Fri, 18 Mar 2016 21:57:51 +0000 (21:57 +0000)]
Updates based on post-commit review of r263834

* Renamed to be camel case, consistent with other docs.
* Fixed non-ascii characters (this is what I get for writing docs on an iPad).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263840 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[obj2yaml, COFF] Assert that the alignment is not bogus
David Majnemer [Fri, 18 Mar 2016 21:51:14 +0000 (21:51 +0000)]
[obj2yaml, COFF] Assert that the alignment is not bogus

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263839 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoInterface to get/set profile summary metadata to module
Easwaran Raman [Fri, 18 Mar 2016 21:29:30 +0000 (21:29 +0000)]
Interface to get/set profile summary metadata to module

Differential Revision: http://reviews.llvm.org/D17894

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263835 91177308-0d34-0410-b5e6-96231b3b80d8