OSDN Git Service
Justin Bogner [Mon, 9 May 2016 23:54:23 +0000 (23:54 +0000)]
SDAG: Stop relying on Select's return value in SystemZ's splitLargeImmediate. NFC
The call to Select on Upper here happens in an unusual order in order
to defeat the constant folding that getNode() does. Add a comment
explaining why we can't just move the Select to later to avoid a
Handle, and wrap the call to SelectCode in a handle so we don't need
its return value.
This is part of the work to have Select return void instead of an
SDNode *, which is in turn part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268990
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Eugene Zelenko [Mon, 9 May 2016 23:11:38 +0000 (23:11 +0000)]
Fix some Clang-tidy modernize-deprecated-headers and Include What You Use warnings; other minor fixes.
Differential revision: http://reviews.llvm.org/D20042
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268989
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Adam Nemet [Mon, 9 May 2016 23:03:44 +0000 (23:03 +0000)]
[LV] Hint at the new loop distribution pragma in optimization remark
When we encounter unsafe memory dependencies, loop distribution could
help.
Even though, the diagnostics is in LAA, it's only currently emitted in
the vectorizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268987
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Adam Nemet [Mon, 9 May 2016 23:03:06 +0000 (23:03 +0000)]
[IndirectCallPromotion] Remove duplicate comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268986
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Adrian Prantl [Mon, 9 May 2016 22:59:55 +0000 (22:59 +0000)]
Disable this unit test on MSVC, which crashes while compiling it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268985
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Rong Xu [Mon, 9 May 2016 22:45:47 +0000 (22:45 +0000)]
Fix buildbot failure from r268968.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268984
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Quentin Colombet [Mon, 9 May 2016 22:37:05 +0000 (22:37 +0000)]
[X86] Fix the AllRegs AVX calling convention.
We used to list registers that were not in the AVX space. In other
words, we were pushing registers that the ISA cannot encode
(YMM16-YMM31).
This is part of llvm.org/PR27481.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268983
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Sanjay Patel [Mon, 9 May 2016 21:51:53 +0000 (21:51 +0000)]
[Inliner] don't assume that a Constant alloca size is a ConstantInt (PR27277)
Differential Revision: http://reviews.llvm.org/D20077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268980
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Rong Xu [Mon, 9 May 2016 21:51:50 +0000 (21:51 +0000)]
Fix buildbot failure from r268968.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268979
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Chad Rosier [Mon, 9 May 2016 21:37:43 +0000 (21:37 +0000)]
Typo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268975
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Xinliang David Li [Mon, 9 May 2016 21:37:12 +0000 (21:37 +0000)]
Cleanup followup of r268710 - [PM] port IR based PGO prof-gen pass to new pass manager
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268974
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Quentin Colombet [Mon, 9 May 2016 21:24:31 +0000 (21:24 +0000)]
[X86] Strengthen the setting of inline asm constraints for fp regclasses.
This is similar to r268953, but for floating point and vector register
classes.
Explanations:
The setting of the inline asm constraints was implicitly relying on the
order of the register classes in the file generated by tablegen.
Since, we do not have any control on that order, make sure we do not
depend on it anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268973
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Simon Pilgrim [Mon, 9 May 2016 21:14:38 +0000 (21:14 +0000)]
[X86][SSE] Improve cost model for i64 vector comparisons on pre-SSE42 targets
As discussed on PR24888, until SSE42 we don't have access to PCMPGTQ for v2i64 comparisons, but the cost models don't reflect this, resulting in over-optimistic vectorizaton.
This patch adds SSE2 'base level' costs that match what a typical target is capable of and only reduces the v2i64 costs at SSE42.
Technically SSE41 provides a PCMPEQQ v2i64 equality test, but as getCmpSelInstrCost doesn't give us a way to discriminate between comparison test types we can't easily make use of this, otherwise we could split the cost of integer equality and greater-than tests to give better costings of each.
Differential Revision: http://reviews.llvm.org/D20057
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268972
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Rong Xu [Mon, 9 May 2016 21:03:06 +0000 (21:03 +0000)]
[PGO] Fix __llvm_profile_raw_version linkage in MACHO
IR instrumentation generates a COMDAT symbol __llvm_profile_raw_version to
overwrite the same symbol in profile run-time to distinguish IR profiles from
Clang generated profiles. In MACHO, LinkOnceODR linkage is used due to the
lack of COMDAT support.
But LinkOnceODR linkage might have .weak_def_can_be_hidden assembly directive,
while the weak variable in run-time has a .weak_definition directive. Linker
will not merge these two symbols even they have the same name. The end result
is IR profiles are not properly flagged in MACHO.
This patch changes the linkage for __llvm_profile_raw_version in each module to
LinkOnceAny so that it has same .weak_definition directive as in the run-time.
Differential Revision: http://reviews.llvm.org/D20078
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268969
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Kostya Serebryany [Mon, 9 May 2016 21:02:36 +0000 (21:02 +0000)]
[libFuzzer] add a test for libFuzzer+ubsan, extend the docs on using libFuzzer+ubsan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268968
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Marcin Koscielnicki [Mon, 9 May 2016 20:57:36 +0000 (20:57 +0000)]
[MSan] [AArch64] Fix vararg helper for >1 or non-int fixed arguments.
This fixes http://llvm.org/PR27646 on AArch64.
There are three issues here:
- The GR save area is 7 words in size, instead of 8. This is not enough
if none of the fixed arguments is passed in GRs (they're all floats or
aggregates).
- The first argument is ignored (which counteracts the above if it's passed
in GR).
- Like x86_64, fixed arguments landing in the overflow area are wrongly
counted towards the overflow offset.
Differential Revision: http://reviews.llvm.org/D20023
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268967
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Adrian Prantl [Mon, 9 May 2016 19:57:29 +0000 (19:57 +0000)]
Separate the Verifier into an analysis and a transformation pass and
allow the transformation to strip invalid debug info.
This patch separates the Verifier into an analysis and a transformation
pass, with the transformation pass optionally stripping malformed
debug info.
The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info. We want
to be able to make the verifier stricter without having to worry about
breaking bitcode compatibility with existing producers. For example, we
don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.
http://reviews.llvm.org/D19988
rdar://problem/
25818489
This reapplies r268937 without modifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268966
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Adrian Prantl [Mon, 9 May 2016 19:57:15 +0000 (19:57 +0000)]
Allow the LTO code generator to strip invalid debug info from the input.
This patch introduces a new option -lto-strip-invalid-debug-info, which
drops malformed debug info from the input.
The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info. We want
to be able to make the verifier stricter without having to worry about
breaking bitcode compatibility with existing producers. For example, we
don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.
rdar://problem/
25818489
http://reviews.llvm.org/D19987
This reapplies 268936 with a test case fix for Linux (-exported-symbol foo)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268965
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Quentin Colombet [Mon, 9 May 2016 19:50:30 +0000 (19:50 +0000)]
[X86] Drop the 64-bit alignment for LOW32_ADDR_ACCESS register class.
The only 64-bit register in that register class is RIP and it will not
get spilled in the current ABIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268963
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Kostya Serebryany [Mon, 9 May 2016 19:32:10 +0000 (19:32 +0000)]
[libFuzzer] reshuffle docs more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268961
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Chad Rosier [Mon, 9 May 2016 19:30:20 +0000 (19:30 +0000)]
[InstCombine] Fold icmp eq/ne (udiv i32 A, B), 0 -> icmp ugt/ule B, A.
Differential Revision: http://reviews.llvm.org/D20036
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268960
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Kostya Serebryany [Mon, 9 May 2016 19:29:53 +0000 (19:29 +0000)]
[libFuzzer] reshuffle docs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268959
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Kostya Serebryany [Mon, 9 May 2016 19:23:28 +0000 (19:23 +0000)]
[libFuzzer] better document the -merge=1 flag, part 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268958
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Kostya Serebryany [Mon, 9 May 2016 19:11:36 +0000 (19:11 +0000)]
[libFuzzer] better document the -merge=1 flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268957
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Quentin Colombet [Mon, 9 May 2016 19:01:46 +0000 (19:01 +0000)]
Reapply [X86] Add a new LOW32_ADDR_ACCESS_RBP register class.
This reapplies commit r268796, with a fix for the setting of the inline asm
constraints. I.e., "mark" LOW32_ADDR_ACCESS_RBP as a GR variant, so that the
regular processing of the GR operands (setting of the subregisters) happens.
Original commit log:
[X86] Add a new LOW32_ADDR_ACCESS_RBP register class.
ABIs like NaCl uses 32-bit addresses but have 64-bit frame.
The new register class reflects those constraints when choosing a
register class for a address access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268955
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Quentin Colombet [Mon, 9 May 2016 19:01:42 +0000 (19:01 +0000)]
[X86] Update a regexp in a test case to resist register allocation
changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268954
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Quentin Colombet [Mon, 9 May 2016 19:01:35 +0000 (19:01 +0000)]
[X86] Strengthen the setting of inline asm constraints.
The setting of the inline asm constraints was implicitly relying on the
order of the register classes in the file generated by tablegen.
Since, we do not have any control on that order, make sure we do not
depend on it anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268953
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Nemanja Ivanovic [Mon, 9 May 2016 18:54:58 +0000 (18:54 +0000)]
[Power9] Add support for -mcpu=pwr9 in the back end
This patch corresponds to review:
http://reviews.llvm.org/D19683
Simply adds the bits for being able to specify -mcpu=pwr9 to the back end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268950
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Sanjay Patel [Mon, 9 May 2016 18:54:14 +0000 (18:54 +0000)]
clean up; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268949
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Zachary Turner [Mon, 9 May 2016 18:45:21 +0000 (18:45 +0000)]
Fix build error with ambiguity of size_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268948
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Krzysztof Parzyszek [Mon, 9 May 2016 18:22:07 +0000 (18:22 +0000)]
[Hexagon] Treat all conditional branches as predicted (not-taken by default)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268946
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Konstantin Zhuravlyov [Mon, 9 May 2016 18:05:42 +0000 (18:05 +0000)]
[AMDGPU] Clean up debugger tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268944
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Benjamin Kramer [Mon, 9 May 2016 18:05:28 +0000 (18:05 +0000)]
Unbreak the non-windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268943
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Zachary Turner [Mon, 9 May 2016 17:45:21 +0000 (17:45 +0000)]
[pdb] Parse the module info stream for each module.
Differential Revision: http://reviews.llvm.org/D20026
Reviewed By: rnk
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268942
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Zachary Turner [Mon, 9 May 2016 17:44:58 +0000 (17:44 +0000)]
Make TypeIterator generic so it can iterate symbols too.
Reviewed By: amccarth
Differential Revision: http://reviews.llvm.org/D20038
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268941
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Adrian Prantl [Mon, 9 May 2016 17:43:30 +0000 (17:43 +0000)]
Revert "Allow the LTO code generator to strip invalid debug info from the input."
This reverts commit 268936 while investigating buildbot breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268940
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Adrian Prantl [Mon, 9 May 2016 17:43:24 +0000 (17:43 +0000)]
Revert "Separate the Verifier into an analysis and a transformation pass and"
This reverts commit 268937 while investigating build bot breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268939
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Daniel Sanders [Mon, 9 May 2016 17:42:04 +0000 (17:42 +0000)]
[mips] Fix a partially initialized member variable that was introduced in r268896.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268938
91177308-0d34-0410-b5e6-
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Adrian Prantl [Mon, 9 May 2016 17:37:42 +0000 (17:37 +0000)]
Separate the Verifier into an analysis and a transformation pass and
allow the transformation to strip invalid debug info.
This patch separates the Verifier into an analysis and a transformation
pass, with the transformation pass optionally stripping malformed
debug info.
The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info. We want
to be able to make the verifier stricter without having to worry about
breaking bitcode compatibility with existing producers. For example, we
don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.
http://reviews.llvm.org/D19988
rdar://problem/
25818489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268937
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Mon, 9 May 2016 17:37:33 +0000 (17:37 +0000)]
Allow the LTO code generator to strip invalid debug info from the input.
This patch introduces a new option -lto-strip-invalid-debug-info, which
drops malformed debug info from the input.
The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info. We want
to be able to make the verifier stricter without having to worry about
breaking bitcode compatibility with existing producers. For example, we
don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.
rdar://problem/
25818489
http://reviews.llvm.org/D19987
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268936
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Sanjay Patel [Mon, 9 May 2016 17:31:55 +0000 (17:31 +0000)]
[CGP] avoid crashing from weightlessness
It's possible that we have branch weights with 0 values.
In that case, don't try to create an impossible BranchProbability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268935
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Matt Arsenault [Mon, 9 May 2016 16:57:08 +0000 (16:57 +0000)]
DivergenceAnalysis: Fix crash with no return blocks
The post dominator tree does not have a root node in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268933
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Sanjay Patel [Mon, 9 May 2016 16:42:50 +0000 (16:42 +0000)]
[TargetLowering] make helper function for SetCC + and optimizations (NFC)
After looking at D19087 again, it occurred to me that we can do better. If we consolidate
the valueHasExactlyOneBitSet() transforms, we won't incur extra overhead from calling it a
2nd time, and we can shrink SimplifySetCC() a bit. No functional change intended.
Differential Revision: http://reviews.llvm.org/D20050
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268932
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Simon Pilgrim [Mon, 9 May 2016 16:42:23 +0000 (16:42 +0000)]
Fixed unused but set variable warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268931
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Matt Arsenault [Mon, 9 May 2016 16:29:50 +0000 (16:29 +0000)]
AMDGPU: Fold shift into cvt_f32_ubyteN
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268930
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Sanjay Patel [Mon, 9 May 2016 16:07:45 +0000 (16:07 +0000)]
fix spelling; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268929
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Daniel Sanders [Mon, 9 May 2016 15:50:15 +0000 (15:50 +0000)]
[mips] Try to fix 'truncation from FindBestPredicateResult to bool' reported by MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268928
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Daniel Sanders [Mon, 9 May 2016 15:37:52 +0000 (15:37 +0000)]
[mips][ias] Attempt to fix 'not all control paths return a value' reported by MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268927
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Frederic Riss [Mon, 9 May 2016 14:44:14 +0000 (14:44 +0000)]
[dsymutil] Prevent use-after-free
The BinaryHolder would query the archive member MemoryBuffer name
to check if the current open archive also contains the next requested
objectfile. This comparison was using a StringRef to a temporary
buffer. It only happened with fat archives. This commit adds long-lived
storage along with the MemoryBuffers for the fat archive filename.
The added test would fail during an ASAN build without the fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268924
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Joerg Sonnenberger [Mon, 9 May 2016 14:36:16 +0000 (14:36 +0000)]
Optimize a printf with a double procent to putchar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268922
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James Molloy [Mon, 9 May 2016 14:32:30 +0000 (14:32 +0000)]
[VectorUtils] Query number of sign bits to allow more truncations
When deciding if a vector calculation can be done in a smaller bitwidth, use sign bit information from ValueTracking to add more information and allow more truncations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268921
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Daniel Sanders [Mon, 9 May 2016 13:38:25 +0000 (13:38 +0000)]
[mips][micromips] Make getPointerRegClass() result depend on the instruction.
Summary:
Previously, it returned the GPR16MMRegClass for all instructions which was
incorrect for instructions like lwsp/lwgp and unnecesarily restricted the
permitted registers for instructions like lw32.
This fixes quite a few of the -verify-machineinstrs errors reported in PR27458.
I've only added -verify-machineinstrs to one test in this change since I
understand there is a plan to enable the verifier by default.
Reviewers: hvarga, zbuljan, zoran.jovanovic, sdardis
Subscribers: dsanders, llvm-commits, sdardis
Differential Revision: http://reviews.llvm.org/D19873
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268918
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Rafael Espindola [Mon, 9 May 2016 13:31:11 +0000 (13:31 +0000)]
Fix bug where temporary file would be left behind every time an archive was updated.
When updating an existing archive, llvm-ar opens the old archive into a
`MemoryBuffer`, does its thing, and writes the results to a temporary
file. That file is then renamed to the original archive filename, thus
replacing it with the updated contents. However, on Windows at least,
what would happen is that the `MemoryBuffer` for the old archive would
actually be an mmap'ed view of the file, so when it came time to do the
rename via Win32's `ReplaceFile`, it would succeed but would be unable
to fully replace the file since there would still be a handle open on
it; instead, the old version got renamed to a random temporary name and
left behind.
Patch by Cameron!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268916
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Simon Pilgrim [Mon, 9 May 2016 13:30:16 +0000 (13:30 +0000)]
[X86][SSE] Added TODO comment to add support for AVX512 mask registers to shuffle comments
This came up in discussion on D19198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268915
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Daniel Sanders [Mon, 9 May 2016 13:10:57 +0000 (13:10 +0000)]
[mips] Fix use after free and an unnecessary copy introduced in r268896.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268913
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Strahinja Petrovic [Mon, 9 May 2016 12:27:39 +0000 (12:27 +0000)]
[PowerPC] fix register alignment for long double type
This patch fixes register alignment for long double type in
soft float mode. Before this patch alignment was 8 and this
patch changes it to 4.
Differential Revision: http://reviews.llvm.org/D18034
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268909
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Chris Dewhurst [Mon, 9 May 2016 11:55:15 +0000 (11:55 +0000)]
[Sparc][LEON] Add UMAC and SMAC instruction support for Sparc LEON subtargets
This change adds SMAC (signed multiply-accumulate) and UMAC (unsigned multiply-accumulate) for LEON subtargets of the Sparc processor.
The new files LeonFeatures.td and leon-instructions.ll will both be expanded in future, so I want to leave them separate as small files for this review, to be expanded in future check-ins.
Note: The functions are provided only for inline-assembly provision. No DAG selection is provided.
Differential Revision: http://reviews.llvm.org/D19911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268908
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Silviu Baranga [Mon, 9 May 2016 11:10:44 +0000 (11:10 +0000)]
[AArch64] Implement lowering of the X constraint on AArch64
Summary:
This implements the lowering of the X constraint on
AArch64.
The default behaviour of the X constraint lowering is to
restrict it to "f". This is a problem because the "f"
constraint is not implemented on AArch64 and would be too
restrictive anyway. Therefore, the AArch64 hook will
lower this to "w" (if the operand is a floating point or
vector) or "r" otherwise.
The implementation is similar with the one added for
ARM (r267411).
This is the AArch64 side of the fix for http://llvm.org/PR26493
Reviewers: rengolin
Subscribers: aemerson, rengolin, llvm-commits, t.p.northover
Differential Revision: http://reviews.llvm.org/D19967
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268907
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Simon Pilgrim [Mon, 9 May 2016 10:43:13 +0000 (10:43 +0000)]
[X86][AVX512] Added masked version of combine tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268904
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Benjamin Kramer [Mon, 9 May 2016 10:31:17 +0000 (10:31 +0000)]
Revert "[Mips] Fix use after free."
Fixes use after free but breaks tests.
This reverts commit r268901.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268902
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Benjamin Kramer [Mon, 9 May 2016 10:21:56 +0000 (10:21 +0000)]
[Mips] Fix use after free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268901
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Daniel Sanders [Mon, 9 May 2016 10:21:14 +0000 (10:21 +0000)]
[mips][ias] R_MIPS_(GOT|HI|LO|PC)16 and R_MIPS_GPREL32 do not need symbols.
Summary:
In theory, care must be taken to ensure that pairs of R_MIPS_(GOT|HI|LO)16
make the same decision on both relocs in the reloc pair but in practice
this isn't as hard as it sounds and only limits the complexity of the
predicate used. We handle all three with the same code to ensure their
decisions always agree with each other.
Reviewers: sdardis
Subscribers: rafael, dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D19016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268900
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Zlatko Buljan [Mon, 9 May 2016 08:07:28 +0000 (08:07 +0000)]
[mips][microMIPS] Implement LWP and SWP instructions
Differential Revision: http://reviews.llvm.org/D10640
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268896
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Frederic Riss [Mon, 9 May 2016 06:01:12 +0000 (06:01 +0000)]
[dsymutil] Fix -arch option for thumb variants.
r267249 removed the dual ARM/Thumb interface from MachOObjectFile,
simplifying llvm-dsymutil's code. This unfortunately also regressed
llvm-dsymutil's ability to select thumb slices, because the simplified
code was also dealing with the discrepency between the slice arch
(eg. armv7m) and the triple arch name (eg. thumbv7m).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268894
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Craig Topper [Mon, 9 May 2016 05:34:14 +0000 (05:34 +0000)]
[X86] Strengthen some type contraints for floating point round and extend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268892
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Craig Topper [Mon, 9 May 2016 05:34:12 +0000 (05:34 +0000)]
[AVX512] Fix up types for arguments of int_x86_avx512_mask_cvtsd2ss_round and int_x86_avx512_mask_cvtss2sd_round. Only the argument being converted should be a different type. The other 2 argument should have the same type as the result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268891
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Mehdi Amini [Mon, 9 May 2016 05:16:30 +0000 (05:16 +0000)]
ThinLTOCodeGenerator: ignore 0 values for the cache settings.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268890
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Craig Topper [Sun, 8 May 2016 23:43:17 +0000 (23:43 +0000)]
[AVX512] Add non-temporal store patterns for v16i32/v32i16/v64i8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268889
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Junmo Park [Sun, 8 May 2016 23:22:58 +0000 (23:22 +0000)]
Minor code cleanups. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268888
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Craig Topper [Sun, 8 May 2016 23:08:45 +0000 (23:08 +0000)]
[AVX512] Add missing patterns for non-temporal stores of 128/256-bit vXi8/vXi16/vXi32 when VLX is enabled. The equivalent AVX1/2 patterns are disabled by VLX.
This caused regular stores to be emitted instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268886
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Craig Topper [Sun, 8 May 2016 23:08:40 +0000 (23:08 +0000)]
[AVX512] Change predicates on some vXi16/vXi8 AVX store patterns so they stay enabled unless VLX and BWI instructions are supported."
Without this we could fail instruction selection if VLX was enabled, but BWI wasn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268885
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Craig Topper [Sun, 8 May 2016 21:33:53 +0000 (21:33 +0000)]
[AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268884
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Craig Topper [Sun, 8 May 2016 21:33:47 +0000 (21:33 +0000)]
[X86] Re-generate tests using update_llc_test_checks.py to prepare for a future commit. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268883
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Craig Topper [Sun, 8 May 2016 21:33:44 +0000 (21:33 +0000)]
Remove Windows line endings in some tests to prepare for a future commit. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268882
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Bruno Cardoso Lopes [Sun, 8 May 2016 21:27:39 +0000 (21:27 +0000)]
[Bitcode] Fix an unsigned integer overflow while parsing bitcode wrapper header
Specially crafted bitcode wrapper headers can cause unsigned interger
overflow and lead to crashes when wrapping around. Fix the offset check
and avoid such scenarios.
Writing a testcase for this would involve editing the binary to generate
values that trigger the overflow, since this would never happen while
generating the bitcode in regular compilation flows, so there's
currently no feasible way add one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268881
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Craig Topper [Sun, 8 May 2016 20:10:20 +0000 (20:10 +0000)]
[X86] Remove extra patterns that check for BUILD_VECTOR of all 0s. These are always canonicalized to v4i32/v8i32/v16i32 except for in SSE1 only when only v4f32 is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268880
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Simon Pilgrim [Sun, 8 May 2016 15:24:53 +0000 (15:24 +0000)]
[CostModel][X86] Extended comparison instruction cost model tests to include SSE2/SSE3/SSSE3/SSE41/SSE42 targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268877
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David Majnemer [Sun, 8 May 2016 08:15:50 +0000 (08:15 +0000)]
[X86] Promote several single precision FP libcalls on Windows
A number of libcalls don't exist in any particular lib but are, instead,
defined in math.h as inline functions (even in C mode!). Don't rely on
their existence when lowering @llvm.{cos,sin,floor,..}.f32, promote them
instead.
N.B. We had logic to handle FREM but were missing out on a number of
others. This change generalizes the FREM handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268875
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Craig Topper [Sun, 8 May 2016 07:10:54 +0000 (07:10 +0000)]
[X86] Lower 256-bit vector all-zero constants to v8i32 even with AVX1 only. Either way a 256-bit VXORPS will be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268873
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Craig Topper [Sun, 8 May 2016 07:10:50 +0000 (07:10 +0000)]
[X86] Add patterns for 256-bit non-temporal stores when only AVX1 is supported. While there, add a predicate to the SSE2 patterns to avoid an ordering dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268872
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Craig Topper [Sun, 8 May 2016 07:10:47 +0000 (07:10 +0000)]
[X86] No need to avoid selecting AVX_SET0 for 256-bit integer types when only AVX1 is supported. AVX_SET0 just expands to 256-bit VXORPS which is legal in AVX1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268871
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Weiming Zhao [Sun, 8 May 2016 05:11:54 +0000 (05:11 +0000)]
[ARM] Fix Scavenger assert due to underestimated stack size
(re-apply r268810 as it exposed an uninitialized variable in ARM MFI.
Patch 268868 should fix that.)
Summary:
Currently, when checking if a stack is "BigStack" or not, it doesn't count into spills and arguments. Therefore, LLVM won't reserve spill slot for this actually "BigStack". This may cause scavenger failure.
Reviewers: rengolin
Subscribers: vitalybuka, aemerson, rengolin, tberghammer, danalbert, srhines, llvm-commits
Differential Revision: http://reviews.llvm.org/D19896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268869
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Weiming Zhao [Sun, 8 May 2016 05:04:47 +0000 (05:04 +0000)]
Fix use-of-uninitialized-value of ARMMachineFunctionInfo
Summary: Explicitly initialize ArgumentStackSize to prevent the msan failure.
Reviewers: rengolin
Subscribers: aemerson, rengolin, llvm-commits
Differential Revision: http://reviews.llvm.org/D20051
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268868
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Simon Pilgrim [Sat, 7 May 2016 20:19:59 +0000 (20:19 +0000)]
Fix unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268867
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Simon Pilgrim [Sat, 7 May 2016 20:12:36 +0000 (20:12 +0000)]
[SelectionDAG] Added bitreverse(bitreverse(v)) --> v
Added bitreverse creation testing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268865
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Craig Topper [Sat, 7 May 2016 19:25:56 +0000 (19:25 +0000)]
[X86] Fix InstAliases to not allow FARCALL32i/FARCALL16i/FARJMP32i/FARJMP16i in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268863
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Simon Pilgrim [Sat, 7 May 2016 19:04:00 +0000 (19:04 +0000)]
[X86] Added BITREVERSE constant folding and identity tests
Identity tests are currently failing - this will be fixed soon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268862
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Simon Pilgrim [Sat, 7 May 2016 18:04:24 +0000 (18:04 +0000)]
[X86] Pulled out duplicate mask width calculation. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268861
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Simon Pilgrim [Sat, 7 May 2016 16:34:16 +0000 (16:34 +0000)]
[CostModel][X86] Split BSWAP/BITREVERSE cost tests from CTPOP/CTLZ/CTTZ 'bit count' cost tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268859
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Sanjay Patel [Sat, 7 May 2016 15:03:40 +0000 (15:03 +0000)]
[x86, BMI] add TLI hook for 'andn' and use it to simplify comparisons
For the sake of minimalism, this patch is x86 only, but I think that at least
PPC, ARM, AArch64, and Sparc probably want to do this too.
We might want to generalize the hook and pattern recognition for a target like
PPC that has a full assortment of negated logic ops (orc, nand).
Note that http://reviews.llvm.org/D18842 will cause this transform to trigger
more often.
For reference, this relates to:
https://llvm.org/bugs/show_bug.cgi?id=27105
https://llvm.org/bugs/show_bug.cgi?id=27202
https://llvm.org/bugs/show_bug.cgi?id=27203
https://llvm.org/bugs/show_bug.cgi?id=27328
Differential Revision: http://reviews.llvm.org/D19087
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268858
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NAKAMURA Takumi [Sat, 7 May 2016 08:43:11 +0000 (08:43 +0000)]
ErrorInfoBase::message(): Don't use raw_string_ostream's buffer, Msg, before closing. Use raw_string_ostream::str() to flush the buffer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268856
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Xinliang David Li [Sat, 7 May 2016 05:39:12 +0000 (05:39 +0000)]
[PM] code refactoring -- preparation for new PM porting /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268851
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Mehdi Amini [Sat, 7 May 2016 05:07:47 +0000 (05:07 +0000)]
Fix stripDebugInfo: was modifying "DebugLoc" attached to the intrinsic after deleting it.
Fix MSAN build.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268849
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NAKAMURA Takumi [Sat, 7 May 2016 04:51:51 +0000 (04:51 +0000)]
MipsELFObjectWriter.cpp: Activate debug printer just for +Asserts. [-Wunused-function]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268848
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Mehdi Amini [Sat, 7 May 2016 04:10:52 +0000 (04:10 +0000)]
Refactor stripDebugInfo(Function) to handle intrinsic
This moves the code that handles stripping debug info intrinsic from
StripDebugInfo(Module) to StripDebugInfo(Function). The latter is
already walking every instructions so it makes sense to do it at the
same time.
This makes also stripDebugInfo(Function) as an API more useful: it
is really dropping every debug info in the Function.
Finally the existing code is trigerring an assertion when the Module
is not fully materialized.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268847
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Lang Hames [Sat, 7 May 2016 03:48:56 +0000 (03:48 +0000)]
[Orc] Fix missing rename from r268845.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268846
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Lang Hames [Sat, 7 May 2016 03:36:38 +0000 (03:36 +0000)]
[Orc] Rename OrcArchitectureSupport to OrcABISupport and add Win32 ABI support.
This enables lazy JITing on Windows x86-64.
Patch by David. Thanks David!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268845
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Vitaly Buka [Sat, 7 May 2016 02:10:59 +0000 (02:10 +0000)]
Revert r268832 "Refactor stripDebugInfo(Function) to handle intrinsic"
It breaks many bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268837
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Sanjoy Das [Sat, 7 May 2016 02:08:24 +0000 (02:08 +0000)]
[ValueTracking] Hoist some computation out of a loop; NFC
There is no need to match the comparison instruction repeatedly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268836
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Sanjoy Das [Sat, 7 May 2016 02:08:22 +0000 (02:08 +0000)]
Clean up comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268835
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