OSDN Git Service
Richard Smith [Thu, 22 Dec 2011 01:03:35 +0000 (01:03 +0000)]
Unbreak cmake build after r147115.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147117
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Rafael Espindola [Thu, 22 Dec 2011 00:37:50 +0000 (00:37 +0000)]
Move the ARM specific parts of the ELF writer to Target/ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147115
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Rafael Espindola [Thu, 22 Dec 2011 00:21:50 +0000 (00:21 +0000)]
getEFlags is const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147114
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Lang Hames [Thu, 22 Dec 2011 00:12:51 +0000 (00:12 +0000)]
Fixed typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147113
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Jim Grosbach [Wed, 21 Dec 2011 23:52:37 +0000 (23:52 +0000)]
ARM NEON mnemonic aliase for vrecpeq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147109
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Jim Grosbach [Wed, 21 Dec 2011 23:24:15 +0000 (23:24 +0000)]
ARM VFP optional data type on VMOV GPR<-->SPR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147104
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Jim Grosbach [Wed, 21 Dec 2011 23:09:28 +0000 (23:09 +0000)]
ARM NEON optional data type on VSWP instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147103
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Jim Grosbach [Wed, 21 Dec 2011 23:04:33 +0000 (23:04 +0000)]
ARM NEON mnemonic aliases for vzipq and vswpq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147102
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Jakub Staszak [Wed, 21 Dec 2011 23:02:08 +0000 (23:02 +0000)]
Revert patch from 147090. There is not point to make code less readable if we
don't get any serious benefit there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147101
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Jim Grosbach [Wed, 21 Dec 2011 22:30:16 +0000 (22:30 +0000)]
ARM asm parser should be more lenient w/ .thumb_func directive.
Rather than require the symbol to be explicitly an argument of the directive,
allow it to look ahead and grab the symbol from the next non-whitespace
line.
rdar://
10611140
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147100
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Dan Gohman [Wed, 21 Dec 2011 21:43:50 +0000 (21:43 +0000)]
Fix a copy+pasto. No testcase, because the symptoms of dereferencing
an invalid iterator aren't reproducible. rdar://
10614085.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147098
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Jim Grosbach [Wed, 21 Dec 2011 21:04:19 +0000 (21:04 +0000)]
Thumb2 assembly parsing of 'mov rd, rn, rrx'.
Maps to the RRX instruction. Missed this case earlier.
rdar://
10615373
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147096
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Chad Rosier [Wed, 21 Dec 2011 20:59:09 +0000 (20:59 +0000)]
Fix 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147095
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Jim Grosbach [Wed, 21 Dec 2011 20:54:00 +0000 (20:54 +0000)]
Thumb2 assembly parsing of 'mov(register shifted register)' aliases.
These map to the ASR, LSR, LSL, ROR instruction definitions.
rdar://
10615373
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147094
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Nick Lewycky [Wed, 21 Dec 2011 20:26:03 +0000 (20:26 +0000)]
Continue counting intrinsics as instructions (except when they aren't, such as
debug info) and for being vector operations. Fixes regression from r147037.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147093
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Nick Lewycky [Wed, 21 Dec 2011 20:21:55 +0000 (20:21 +0000)]
Fix typo and spacing, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147092
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Jakub Staszak [Wed, 21 Dec 2011 20:18:54 +0000 (20:18 +0000)]
- Change a few operator[] to lookup which is cheaper.
- Add some constantness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147090
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Lang Hames [Wed, 21 Dec 2011 20:16:11 +0000 (20:16 +0000)]
Oops - LiveIntervalUnion.cpp file does use std::find. Moving STL header include to LiveIntervalUnion.cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147089
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Lang Hames [Wed, 21 Dec 2011 20:12:54 +0000 (20:12 +0000)]
Remove disused STL header include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147088
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Rafael Espindola [Wed, 21 Dec 2011 20:09:46 +0000 (20:09 +0000)]
Switch from WriteEFlags to getEFlags in preparation for moving it
to Target/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147087
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Jakob Stoklund Olesen [Wed, 21 Dec 2011 19:50:05 +0000 (19:50 +0000)]
Move common code into an MRI function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147071
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Jim Grosbach [Wed, 21 Dec 2011 19:40:55 +0000 (19:40 +0000)]
ARM NEON assmebly parsing for VLD2 to all lanes instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147069
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Chad Rosier [Wed, 21 Dec 2011 19:14:52 +0000 (19:14 +0000)]
No case stmt for BUILD_VECTOR in PerformDAGCombine(), so I assume this isn't
necessary. Please chime in if I'm mistaken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147065
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Chad Rosier [Wed, 21 Dec 2011 18:56:22 +0000 (18:56 +0000)]
Fix a couple of copy-n-paste bugs. Noticed by George Russell!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147064
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Manuel Klimek [Wed, 21 Dec 2011 18:16:39 +0000 (18:16 +0000)]
Changes the JSON parser to use the SourceMgr.
Diagnostics are now emitted via the SourceMgr and we use MemoryBuffer
for buffer management. Switched the code to make use of the trailing
'0' that MemoryBuffer guarantees where it makes sense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147063
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Rafael Espindola [Wed, 21 Dec 2011 17:30:17 +0000 (17:30 +0000)]
Move the X86 specific bits of the ELF writer to the Target/X86 directory.
Other targets will follow shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147060
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Rafael Espindola [Wed, 21 Dec 2011 17:00:36 +0000 (17:00 +0000)]
Reduce the exposure of Triple::OSType in the ELF object writer. This will
avoid including ADT/Triple.h in many places when the target specific bits are
moved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147059
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Rafael Espindola [Wed, 21 Dec 2011 14:48:04 +0000 (14:48 +0000)]
Add const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147054
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Rafael Espindola [Wed, 21 Dec 2011 14:26:29 +0000 (14:26 +0000)]
Small refactoring so that RelocNeedsGOT can stay in the target independent
side when the target specific bits are moved to the Target directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147053
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Manuel Klimek [Wed, 21 Dec 2011 10:02:45 +0000 (10:02 +0000)]
Removes unused field TheError from LLLexer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147049
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Craig Topper [Wed, 21 Dec 2011 08:06:52 +0000 (08:06 +0000)]
Remove mode specific disassembler classes and just call X86GenericDisassembler constructor with appropriate argument in the creation functions. This removes a few tables that needed to be anchored.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147046
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Craig Topper [Wed, 21 Dec 2011 06:30:53 +0000 (06:30 +0000)]
Fix typo in a couple comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147045
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Nick Lewycky [Wed, 21 Dec 2011 06:06:30 +0000 (06:06 +0000)]
A call to a function marked 'noinline' is not an inline candidate. The sole
call site of an intrinsic is also not an inline candidate. While here, make it
more obvious that this code ignores all intrinsics. Noticed by inspection!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147037
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Nick Lewycky [Wed, 21 Dec 2011 05:52:02 +0000 (05:52 +0000)]
Make some intrinsics safe to speculatively execute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147036
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Evan Cheng [Wed, 21 Dec 2011 03:04:10 +0000 (03:04 +0000)]
Fix a couple of copy-n-paste bugs. Noticed by George Russell.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147032
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Jim Grosbach [Wed, 21 Dec 2011 01:19:23 +0000 (01:19 +0000)]
ARM assembly parsing allows constant expressions for lane indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147028
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Eric Christopher [Wed, 21 Dec 2011 00:52:44 +0000 (00:52 +0000)]
Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147027
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Jim Grosbach [Wed, 21 Dec 2011 00:38:54 +0000 (00:38 +0000)]
ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147025
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Akira Hatanaka [Wed, 21 Dec 2011 00:31:10 +0000 (00:31 +0000)]
Fix bug in zero-store peephole pattern reported in pr11615.
The patch and test case were originally written by Mans Rullgard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147024
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Akira Hatanaka [Wed, 21 Dec 2011 00:20:27 +0000 (00:20 +0000)]
Expand 64-bit CTLZ nodes if target architecture does not support it. Add test
case for DCLO and DCLZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147022
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Akira Hatanaka [Wed, 21 Dec 2011 00:14:05 +0000 (00:14 +0000)]
Expand 64-bit CTPOP and CTTZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147021
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Akira Hatanaka [Wed, 21 Dec 2011 00:02:58 +0000 (00:02 +0000)]
Expand 64-bit atomic load and store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147019
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Akira Hatanaka [Tue, 20 Dec 2011 23:58:36 +0000 (23:58 +0000)]
Test case for r147017.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147018
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Akira Hatanaka [Tue, 20 Dec 2011 23:56:43 +0000 (23:56 +0000)]
Add definition of DSBH (Double Swap Bytes within Halfwords) and
DSHD (Double Swap Halfwords within Doublewords). Add a pattern which replaces
64-bit bswap with a DSBH and DSHD pair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147017
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Akira Hatanaka [Tue, 20 Dec 2011 23:47:44 +0000 (23:47 +0000)]
Add definition of WSBH (Word Swap Bytes within Halfwords), which is an
instruction supported by mips32r2, and add a pattern which replaces bswap with
a ROTR and WSBH pair.
WSBW is removed since it is not an instruction the current architectures
support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147015
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Akira Hatanaka [Tue, 20 Dec 2011 23:40:56 +0000 (23:40 +0000)]
64-bit uint-fp conversion nodes are expanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147014
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Akira Hatanaka [Tue, 20 Dec 2011 23:35:46 +0000 (23:35 +0000)]
Enable custom lowering DYNAMIC_STACKALLOC nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147013
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Akira Hatanaka [Tue, 20 Dec 2011 23:28:36 +0000 (23:28 +0000)]
Set the correct stack pointer register that should be saved or restored.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147012
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Jim Grosbach [Tue, 20 Dec 2011 23:20:00 +0000 (23:20 +0000)]
Enable and fix a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147011
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Chris Lattner [Tue, 20 Dec 2011 23:14:57 +0000 (23:14 +0000)]
Fix a nasty bug in the type remapping stuff that I added that is breaking kc++ on
the build bot in some cases. The basic issue happens when a source module contains
both a "%foo" type and a "%foo.42" type. It will see the later one, check to see if
the destination module contains a "%foo" type, and it will return true... because
both the source and destination modules are in the same LLVMContext. We don't want
to map source types to other source types, so don't do the remapping if the mapped
type came from the source module.
Unfortunately, I've been unable to reduce a decent testcase for this, kc++ is
pretty great that way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147010
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Jim Grosbach [Tue, 20 Dec 2011 23:11:00 +0000 (23:11 +0000)]
ARM .req register name aliases are case insensitive, just like regnames.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147009
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Akira Hatanaka [Tue, 20 Dec 2011 23:10:57 +0000 (23:10 +0000)]
Add function MipsDAGToDAGISel::SelectMULT and factor out code that generates
nodes needed for multiplication. Add code for selecting 64-bit MULHS and MULHU
nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147008
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Akira Hatanaka [Tue, 20 Dec 2011 22:58:01 +0000 (22:58 +0000)]
Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147007
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Akira Hatanaka [Tue, 20 Dec 2011 22:52:19 +0000 (22:52 +0000)]
64-bit data directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147005
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Akira Hatanaka [Tue, 20 Dec 2011 22:40:40 +0000 (22:40 +0000)]
32-to-64-bit sext_inreg pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147004
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Akira Hatanaka [Tue, 20 Dec 2011 22:36:08 +0000 (22:36 +0000)]
Add 64-bit extload patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147003
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Akira Hatanaka [Tue, 20 Dec 2011 22:33:53 +0000 (22:33 +0000)]
Add patterns for matching extloads with 64-bit address. The patterns are enabled
only when the target ABI is N64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147001
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Jim Grosbach [Tue, 20 Dec 2011 22:26:38 +0000 (22:26 +0000)]
Move comment to appropriate place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147000
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Akira Hatanaka [Tue, 20 Dec 2011 22:25:50 +0000 (22:25 +0000)]
Add code in MipsDAGToDAGISel for selecting constant +0.0.
MIPS64 can generate constant +0.0 with a single DMTC1 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146999
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Jakob Stoklund Olesen [Tue, 20 Dec 2011 22:15:04 +0000 (22:15 +0000)]
Heed spill slot alignment on ARM.
Use the spill slot alignment as well as the local variable alignment to
determine when the stack needs to be realigned. This works now that the
ARM target can always realign the stack by using a base pointer.
Still respect the ARMBaseRegisterInfo::canRealignStack() function
vetoing a realigned stack. Don't use aligned spill code in that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146997
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Akira Hatanaka [Tue, 20 Dec 2011 22:09:36 +0000 (22:09 +0000)]
Revert part of r146995 that was accidentally commmitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146996
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Akira Hatanaka [Tue, 20 Dec 2011 22:06:20 +0000 (22:06 +0000)]
32-to-64-bit sign extension pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146995
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Akira Hatanaka [Tue, 20 Dec 2011 21:50:49 +0000 (21:50 +0000)]
Add a pattern for matching zero-store with 64-bit address. The pattern is enabled
only when the target ABI is N64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146992
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Jim Grosbach [Tue, 20 Dec 2011 20:46:29 +0000 (20:46 +0000)]
ARM assembly parsing and encoding for VST2 single-element, double spaced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146990
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Lang Hames [Tue, 20 Dec 2011 20:23:40 +0000 (20:23 +0000)]
Fix assert condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146987
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Jakub Staszak [Tue, 20 Dec 2011 20:03:10 +0000 (20:03 +0000)]
Add some constantness to BranchProbabilityInfo and BlockFrequnencyInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146986
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Jim Grosbach [Tue, 20 Dec 2011 20:03:00 +0000 (20:03 +0000)]
ARM enable a few more tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146985
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Devang Patel [Tue, 20 Dec 2011 19:29:36 +0000 (19:29 +0000)]
Add support to add named metadata operand.
Patch by Andrew Wilkins!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146984
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Jim Grosbach [Tue, 20 Dec 2011 19:21:26 +0000 (19:21 +0000)]
ARM assembly parsing and encoding for VLD2 single-element, double spaced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146983
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Evan Cheng [Tue, 20 Dec 2011 18:26:50 +0000 (18:26 +0000)]
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146981
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Jason W Kim [Tue, 20 Dec 2011 17:38:12 +0000 (17:38 +0000)]
First steps in ARM AsmParser support for .eabi_attribute and .arch
(Both used for Linux gnueabi)
No behavioral change yet (no tests need so far)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146977
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Elena Demikhovsky [Tue, 20 Dec 2011 13:34:28 +0000 (13:34 +0000)]
This is the second fix related to VZEXT_MOVL node.
The failure that I see in the current version is:
LLVM ERROR: Cannot select: 0x18b8f70: v4i64 = X86ISD::VZEXT_MOVL 0x18beee0 [ID=14]
0x18beee0: v4i64 = insert_subvector 0x18b8c70, 0x18b9170, 0x18b9570 [ID=13]
0x18b8c70: v4i64 = insert_subvector 0x18b9870, 0x18bf4e0, 0x18b9970 [ID=12]
0x18b9870: v4i64 = undef [ID=4]
0x18bf4e0: v2i64 = bitcast 0x18bf3e0 [ID=10]
0x18bf3e0: v4i32 = BUILD_VECTOR 0x18b9770, 0x18b9770, 0x18b9770, 0x18b9770 [ID=8]
0x18b9770: i32 = TargetConstant<0> [ID=6]
0x18b9770: i32 = TargetConstant<0> [ID=6]
0x18b9770: i32 = TargetConstant<0> [ID=6]
0x18b9770: i32 = TargetConstant<0> [ID=6]
0x18b9970: i32 = Constant<0> [ID=3]
0x18b9170: v2i64 = undef [ORD=1] [ID=1]
0x18b9570: i32 = Constant<2> [ID=5]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146975
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Chandler Carruth [Tue, 20 Dec 2011 11:19:37 +0000 (11:19 +0000)]
Begin teaching the X86 target how to efficiently codegen patterns that
use the zero-undefined variants of CTTZ and CTLZ. These are just simple
patterns for now, there is more to be done to make real world code using
these constructs be optimized and codegen'ed properly on X86.
The existing tests are spiffed up to check that we no longer generate
unnecessary cmov instructions, and that we generate the very important
'xor' to transform bsr which counts the index of the most significant
one bit to the number of leading (most significant) zero bits. Also they
now check that when the variant with defined zero result is used, the
cmov is still produced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146974
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Manuel Klimek [Tue, 20 Dec 2011 11:04:23 +0000 (11:04 +0000)]
Fixes a potential compilation error.
Pulling the template implementation into the header to guarantee
that it's visible to all possible instantiations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146973
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Manuel Klimek [Tue, 20 Dec 2011 10:42:52 +0000 (10:42 +0000)]
Pulls the implementation of skip() into JSONParser.
This is the first step towards migrating more of the parser
implementation into the parser class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146971
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Manuel Klimek [Tue, 20 Dec 2011 10:34:29 +0000 (10:34 +0000)]
Fixing option for JSON benchmark broken since the change to size_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146970
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Manuel Klimek [Tue, 20 Dec 2011 09:26:26 +0000 (09:26 +0000)]
Addressing style issues in JSON parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146968
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Chandler Carruth [Tue, 20 Dec 2011 08:42:11 +0000 (08:42 +0000)]
Fix up the CMake build for the new files added in r146960, they're
likely to stay either way that discussion ends up resolving itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146966
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David Blaikie [Tue, 20 Dec 2011 08:22:49 +0000 (08:22 +0000)]
Revert pragma clang suppressions that confuse GCC. (I'll worry about how to suppress/fix these problems properly when we figure out how to keep LLVM -Wweak-vtables clean)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146965
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Nadav Rotem [Tue, 20 Dec 2011 08:02:50 +0000 (08:02 +0000)]
Add a few lines to the release notes:
1. pointer-vector
2. type legalizer changes and vector-select
3. X86 ISA changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146964
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David Blaikie [Tue, 20 Dec 2011 02:50:00 +0000 (02:50 +0000)]
Unweaken vtables as per llvm.org/docs/CodingStandards.html#ll_virtual_anch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960
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Andrew Trick [Tue, 20 Dec 2011 01:43:20 +0000 (01:43 +0000)]
Unit test for r146950: LSR postinc expansion, PR11571.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146951
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Andrew Trick [Tue, 20 Dec 2011 01:42:24 +0000 (01:42 +0000)]
LSR: Fix another corner case in expansion of postinc users.
Fixes PR11571: Instruction does not dominate all uses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146950
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Bob Wilson [Tue, 20 Dec 2011 01:29:27 +0000 (01:29 +0000)]
Mark ARM eh_sjlj_dispatchsetup as clobbering all registers. Radar
10567930.
We used to rely on the *eh_sjlj_setjmp instructions to mark that a function
with setjmp/longjmp exception handling clobbers all the registers. But with
the recent reorganization of ARM EH, those eh_sjlj_setjmp instructions are
expanded away earlier, before PEI can see them to determine what registers to
save and restore. Mark the dispatchsetup instruction in the same way, since
that instruction cannot be expanded early. This also more accurately reflects
when the registers are clobbered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146949
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Chris Lattner [Tue, 20 Dec 2011 01:11:37 +0000 (01:11 +0000)]
fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146940
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Dan Gohman [Tue, 20 Dec 2011 01:10:56 +0000 (01:10 +0000)]
Add a line to ReleaseNotes for half float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146939
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Jim Grosbach [Tue, 20 Dec 2011 00:59:38 +0000 (00:59 +0000)]
ARM assembly shifts by zero should be plain 'mov' instructions.
"mov r1, r2, lsl #0" should assemble as "mov r1, r2" even though it's
not strictly legal UAL syntax. It's a common extension and the friendly
thing to do.
rdar://
10604663
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146937
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Chris Lattner [Tue, 20 Dec 2011 00:12:26 +0000 (00:12 +0000)]
Now that PR11464 is fixed, reapply the patch to fix PR11464,
merging types by name when we can. We still don't guarantee type name linkage
but we do it when obviously the right thing to do. This makes LTO type names
easier to read, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146932
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Chris Lattner [Tue, 20 Dec 2011 00:03:52 +0000 (00:03 +0000)]
fix PR11464 by preventing the linker from mapping two different struct types from the source module onto the same opaque destination type. An opaque type can only be resolved to one thing or another after all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146929
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Chris Lattner [Tue, 20 Dec 2011 00:03:41 +0000 (00:03 +0000)]
add a method to improve compatibility with SmallVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146928
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Dan Gohman [Tue, 20 Dec 2011 00:02:33 +0000 (00:02 +0000)]
Add basic generic CodeGen support for half.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146927
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Jim Grosbach [Mon, 19 Dec 2011 23:51:07 +0000 (23:51 +0000)]
ARM NEON assembly aliases for VMOV<-->VMVN for i32 immediates.
e.g., "vmov.i32 d4, #-118" can be assembled as "vmvn.i32 d4, #117"
rdar://
10603913
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146925
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Evan Cheng [Mon, 19 Dec 2011 23:26:44 +0000 (23:26 +0000)]
Move tests to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146923
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Jim Grosbach [Mon, 19 Dec 2011 23:06:24 +0000 (23:06 +0000)]
ARM assembly parsing and encoding support for LDRD(label).
rdar://
9932658
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146921
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Evan Cheng [Mon, 19 Dec 2011 22:01:30 +0000 (22:01 +0000)]
Add a if-conversion optimization that allows 'true' side of a diamond to be
unpredicated. That is, turn
subeq r0, r1, #1
addne r0, r1, #1
into
sub r0, r1, #1
addne r0, r1, #1
For targets where conditional instructions are always executed, this may be
beneficial. It may remove pseudo anti-dependency in out-of-order execution
CPUs. e.g.
op r1, ...
str r1, [r10] ; end-of-life of r1 as div result
cmp r0, #65
movne r1, #44 ; raw dependency on previous r1
moveq r1, #12
If movne is unpredicated, then
op r1, ...
str r1, [r10]
cmp r0, #65
mov r1, #44 ; r1 written unconditionally
moveq r1, #12
Both mov and moveq are no longer depdendent on the first instruction. This gives
the out-of-order execution engine more freedom to reorder them.
This has passed entire LLVM test suite. But it has not been enabled for any ARM
variant pending more performance evaluation.
rdar://
8951196
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146914
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Eli Friedman [Mon, 19 Dec 2011 21:53:12 +0000 (21:53 +0000)]
Add "using" to silence warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146913
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Akira Hatanaka [Mon, 19 Dec 2011 20:24:28 +0000 (20:24 +0000)]
Add a test case for r146900.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146901
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Akira Hatanaka [Mon, 19 Dec 2011 20:21:18 +0000 (20:21 +0000)]
Add patterns for matching immediates whose lower 16-bit is cleared. These
patterns emit a single LUi instruction instead of a pair of LUi and ORi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146900
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Eli Friedman [Mon, 19 Dec 2011 20:06:03 +0000 (20:06 +0000)]
Attempt to fix PR11607 by shuffling around which class defines which methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146897
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Akira Hatanaka [Mon, 19 Dec 2011 19:52:25 +0000 (19:52 +0000)]
Tidy up. Simplify logic. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146896
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