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Arnd Bergmann [Fri, 28 Nov 2014 21:25:11 +0000 (22:25 +0100)]
Merge tag 'mvebu-soc-3.19' of git://git.infradead.org/linux-mvebu into next/soc
Pull "mvebu SoC changes for v3.19" from Jason Cooper:
- Armada 38x
- Implement CPU hotplug support
- Armada 375
- Remove Z1 stepping support (limited dist. of SoC)
* tag 'mvebu-soc-3.19' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Implement the CPU hotplug support for the Armada 38x SoCs
ARM: mvebu: Fix the secondary startup for Cortex A9 SoC
ARM: mvebu: Move SCU power up in a function
ARM: mvebu: Clean-up the Armada XP support
ARM: mvebu: update comments in coherency.c
ARM: mvebu: remove Armada 375 Z1 workaround for I/O coherency
ARM: mvebu: remove unused register offset definition
ARM: mvebu: disable I/O coherency on non-SMP situations on Armada 370/375/38x/XP
ARM: mvebu: make the coherency_ll.S functions work with no coherency fabric
ARM: mvebu: Remove thermal quirk for A375 Z1 revision
ARM: mvebu: add missing of_node_put() call in coherency.c
ARM: orion: Fix for certain sequence of request_irq can cause irq storm
ARM: mvebu: armada xp: Generalize use of i2c quirk
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Oleksij Rempel [Mon, 24 Nov 2014 11:08:28 +0000 (12:08 +0100)]
ARM: add lolevel debug support for asm9260
Since there is no public documentation, this patch also provide register
offsets for different UART units on this SoC.
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Oleksij Rempel [Mon, 24 Nov 2014 11:08:27 +0000 (12:08 +0100)]
ARM: add mach-asm9260
it is low cost (?) SoC targeted for market in China and India which
trying to compete with AT91SAM9G25.
Here is some info:
http://www.alphascale.com/index.asp?ics/615.html
One of products:
http://www.aliexpress.com/store/product/2014-hot-sales-FREE-SHIPPING-new-Purple-core-ARM9-development-board-ASM9260T-SDRAM-power-line/433637_1931495721.html
In some cases this SoC looks similar to iMX23/iMX28. But currently it makes no
sense to merge mach code of this devices. Especially because most differences
are already collected mach-mxs folder.
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 28 Nov 2014 13:59:53 +0000 (14:59 +0100)]
Merge tag 'imx-soc-3.19' of git://git./linux/kernel/git/shawnguo/linux into next/soc
Pull "The i.MX SoC update for 3.19" from Shawn Guo
- Update i.MX6 suspend code to check DDR instead of CPU type, as the
difference we need to handle is between LPDDR2 and DDR3, not SoCs.
- Set anatop properly for LPDDR2 in DSM mode
- Add support for new SoC LS1021A which integrates dual Cortex-A7
- Add ENET initialization for i.MX6SX platform
- Add cpufreq support for i.MX53 platform
- Add a SNVS based poweroff driver for i.MX6 platforms
- Use ARM Global Timer as clocksource on VF610
Note: the change set is built on top of tag imx-fixes-3.18-2 to resolve
a conflict on file arch/arm/mach-imx/clk-vf610.c.
* tag 'imx-soc-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
power: reset: imx-snvs-poweroff: add power off driver for i.mx6
ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
ARM: imx: clk-vf610: get input clocks from assigned clocks
ARM: imx: Add Freescale LS1021A SMP support
ARM: imx: Add initial support for Freescale LS1021A
ARM: imx53: add cpufreq support
ARM: imx53: clk: add ARM clock
ARM: imx: add CPU clock type
ARM: imx5: add step clock, used when reprogramming PLL1
ARM: imx: add enet init for i.mx6sx
ARM: imx6sx: add imx6sx iomux-gpr field define
ARM: vf610: Add ARM Global Timer clocksource option
ARM: imx: add anatop settings for LPDDR2 when enter DSM mode
ARM: imx: replace cpu type check with ddr type check
ARM: imx: Fix the removal of CONFIG_SPI option
ARM: imx: clk-vf610: define PLL's clock tree
Signed-off-by; Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 28 Nov 2014 13:50:13 +0000 (14:50 +0100)]
Merge (part of) tag 'omap-for-v3.19/hwmod-and-defconfig' of git://git./linux/kernel/git/tmlind/linux-omap into next/soc
SoC related changes for omaps including hwmod clean-up for
DSS, and hwmod data for more UARTs and ADC. Also few defconfig
changes to enable devices found on am335x and am437x.
[arnd: I removed the defconfig changes from the branch in order
to cherry-pick them onto the next/defconfig branch, but I did
not change the other commits]
* commit '
29c4ce17bcad':
ARM: dts: cm-t3x30: add keypad support
ARM: OMAP2+: hwmod: AM43x: add hwmod support for ADC on AM43xx
ARM: DRA7: hwmod data: Add missing UART hwmod data
ARM: dts: omap4.dtsi: remove dss_fck
ARM: OMAP4: fix RFBI iclk
ARM: OMAP4: hwmod: use MODULEMODE properly
ARM: OMAP4: hwmod: set DSS submodule parent hwmods
ARM: OMAP5: hwmod: set DSS submodule parent hwmods
ARM: OMAP2+: hwmod: add parent_hwmod support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 28 Nov 2014 12:21:28 +0000 (13:21 +0100)]
Merge tag 'samsung-pm-3' of git://git./linux/kernel/git/kgene/linux-samsung into next/soc
Pull "Samsung PM 3rd updates for v3.19" from Kukjin Kim:
- exynos3250
: add PMU support
- PMU refactoring
: move restart code into PMU driver
: move restart code for exynos440 into clk driver
- use u8 for val[] in struct exynos_pmu_conf
Note that this branch is based on tags/samsung-exynos-v3.19
* tag 'samsung-pm-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
ARM: EXYNOS: move restart code into pmu driver
clk: exynos5440: move restart code into clock driver
ARM: EXYNOS: add exynos3250 PMU support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 28 Nov 2014 12:18:59 +0000 (13:18 +0100)]
Merge tag 'samsung-exynos-v3.19' of git://git./linux/kernel/git/kgene/linux-samsung into next/soc
Pull "Samsung exynos updates in arch/arm/mach-exynos/ for v3.19" from Kukjin Kim:
- add SOC_EXYNOS4415 config to be used in audio driver
- add support platform driver for exynos PMU
- move PMU specific definitions from common.h to exynos-pmu.h
- for exynos5420, add support PMU and Suspend-to-RAM
use MCPM call backs and call regulator core suspend prepare
and finish functions
NOTE:
including v3.19-next/non-critical-fixes, v3.19-next/cleanup-samsung
and v3.19-next/pm-samsung-2 branches
* tag 'samsung-exynos-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Call regulator core suspend prepare and finish functions
ARM: EXYNOS: Use MCPM call-backs to support S2R on exynos5420
ARM: EXYNOS: Add Suspend-to-RAM support for exynos5420
ARM: EXYNOS: Add PMU support for exynos5420
ARM: EXYNOS: Move PMU specific definitions from common.h
ARM: EXYNOS: Add platform driver support for Exynos PMU
ARM: EXYNOS: Add support for exynos4415 SoC
ARM: EXYNOS: fix typo in static struct name "exynos5_list_diable_wfi_wfe"
ARM: EXYNOS: Fix CPU idle clock down after CPU off
ARM: EXYNOS: Remove unneeded __ref annotation for cpu_die function
ARM: EXYNOS: Move code from hotplug.c to platsmp.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Bartlomiej Zolnierkiewicz [Wed, 26 Nov 2014 17:47:05 +0000 (02:47 +0900)]
ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
Values stored in val[] are never bigger than a byte.
text data bss dec hex filename
7716 3692 8 11416 2c98 arch/arm/mach-exynos/pmu.o.before
5436 1908 8 7352 1cb8 arch/arm/mach-exynos/pmu.o.after
Cc: Pankaj Dubey <pankaj.dubey@samsung.com>
Cc: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Robin Gong [Wed, 12 Nov 2014 08:20:38 +0000 (16:20 +0800)]
power: reset: imx-snvs-poweroff: add power off driver for i.mx6
This driver register pm_power_off with snvs power off function. If
your boards NOT use PMIC_ON_REQ to turn on/off external pmic, or use
other pin to do, please disable the driver in dts, otherwise, your
pm_power_off maybe overwrote by this driver.
Signed-off-by: Robin Gong <b38343@freescale.com>
Acked-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Arnd Bergmann [Tue, 11 Nov 2014 16:03:25 +0000 (17:03 +0100)]
ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
The newly introduced LS1021A SoC selects CONFIG_SOC_FSL, which
is originally symbol used for the PowerPC based platforms
and guards lots of code that does not build on ARM.
This breaks allmodconfig, so let's remove it for now, until
either all those drivers are fixed or they use a dependency
on IMX instead.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Stefan Agner [Sun, 2 Nov 2014 20:36:45 +0000 (21:36 +0100)]
ARM: imx: clk-vf610: get input clocks from assigned clocks
With the clock assignment device tree changes, the clocks get
initialized properly but the search for those clocks fails with
errors:
[ 0.000000] i.MX clk 4: register failed with -17
[ 0.000000] i.MX clk 5: register failed with -17
This is because the module can't find those clocks anymore, and
tries to initialize fixed clocks with the same name.
Get the clock modules input clocks from the assigned clocks by
default by using of_clk_get_by_name(). If this function returns
not a valid clock, fall back to the old behaviour and search the
input clock from the device tree's /clocks/$name node.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Jingchang Lu [Fri, 31 Oct 2014 09:01:13 +0000 (17:01 +0800)]
ARM: imx: Add Freescale LS1021A SMP support
Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Jingchang Lu [Fri, 31 Oct 2014 09:01:12 +0000 (17:01 +0800)]
ARM: imx: Add initial support for Freescale LS1021A
The LS1021A SoC is a dual-core Cortex-A7 based processor,
this adds the initial support for it.
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Lucas Stach [Fri, 26 Sep 2014 13:41:04 +0000 (15:41 +0200)]
ARM: imx53: add cpufreq support
Instanciate device for the generic cpufreq-dt driver.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Lucas Stach [Fri, 26 Sep 2014 13:41:02 +0000 (15:41 +0200)]
ARM: imx53: clk: add ARM clock
The ARM clock is a virtual clock feeding the ARM partition of
the SoC. It controls multiple other clocks to ensure the right
sequencing when cpufreq changes the CPU clock rate.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Lucas Stach [Fri, 26 Sep 2014 13:41:01 +0000 (15:41 +0200)]
ARM: imx: add CPU clock type
This implements a virtual clock used to abstract away
all the steps needed in order to change the ARM clock,
so we don't have to push all this clock handling into
the cpufreq driver.
While it will be used for i.MX53 at first it is generic
enough to be used on i.MX6 later on.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Lucas Stach [Fri, 26 Sep 2014 13:41:00 +0000 (15:41 +0200)]
ARM: imx5: add step clock, used when reprogramming PLL1
This is the bypass clock used to feed the ARM partition
while we reprogram PLL1 to another rate.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Fugang Duan [Wed, 24 Sep 2014 02:11:19 +0000 (10:11 +0800)]
ARM: imx: add enet init for i.mx6sx
Add enet init for i.mx6sx:
- Add phy ar8031 fixup
- Set enet clock source from internal PLL
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Fugang Duan [Wed, 24 Sep 2014 02:11:18 +0000 (10:11 +0800)]
ARM: imx6sx: add imx6sx iomux-gpr field define
Add imx6sx iomux-gpr register field define in "imx6q-iomuxc-gpr.h" header
file, which is not fully define all iomux-gpr registers and fields, only
align with freescale internal tree related GPR macro define.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Stefan Agner [Wed, 24 Sep 2014 16:20:10 +0000 (18:20 +0200)]
ARM: vf610: Add ARM Global Timer clocksource option
Add the ARM Global Timer as clocksource/scheduler clock option and
use it as default scheduler clock. This leaves the PIT timer for
other users e.g. the secondary Cortex-M4 core. Also, the Global Timer
has double the precission (running at pheripheral clock compared to
IPG clock) and a 64-bit incrementing counter register. We still keep
the PIT timer as an secondary option in case the ARM Global Timer is
not available.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Anson Huang [Wed, 17 Sep 2014 03:11:46 +0000 (11:11 +0800)]
ARM: imx: add anatop settings for LPDDR2 when enter DSM mode
For LPDDR2 platform, no need to enable weak2P5 in DSM mode,
it can be pulled down to save power(~0.65mW).
And per design team's recommendation, we should disconnect
VDDHIGH and SNVS in DSM mode on i.MX6SL.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Anson Huang [Wed, 17 Sep 2014 03:11:45 +0000 (11:11 +0800)]
ARM: imx: replace cpu type check with ddr type check
As the DDR/IO and MMDC setting are different on LPDDR2 and DDR3,
we used cpu type to decide how to do these settings in suspend
before which is NOT flexible, take i.MX6SL for example, although
it has LPDDR2 on EVK board, but users can also use DDR3 on other
boards, so it is better to read the DDR type from MMDC then decide
how to do related settings.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Shawn Guo [Sun, 23 Nov 2014 06:55:14 +0000 (14:55 +0800)]
Merge tag 'imx-fixes-3.18-2' into imx/soc
The i.MX fixes for 3.18, 2nd round:
- Fix a regression on Vybrid platform which is caused by commit
dc4805c2e78b (ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3
driver), and results in a missing configuration on PLL clocks.
- Fix a regression with i.MX defconfig files where CONFIG_SPI option
gets lost accidentally.
Pankaj Dubey [Sat, 22 Nov 2014 14:10:23 +0000 (23:10 +0900)]
ARM: EXYNOS: move restart code into pmu driver
Let's register restart handler from PMU driver for restart
functionality. So that we can remove restart hooks from
machine specific file, and thus moving ahead when PMU moved
to driver folder, this functionality can be reused for ARM64
based Exynos SoC's.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pankaj Dubey [Sat, 22 Nov 2014 14:07:21 +0000 (23:07 +0900)]
clk: exynos5440: move restart code into clock driver
Let's register restart handler for Exynos5440 from it's clock driver
for restart functionality. So that we can cleanup restart hooks from
machine specific file.
CC: Sylwester Nawrocki <s.nawrocki@samsung.com>
CC: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Bartlomiej Zolnierkiewicz [Sat, 22 Nov 2014 14:03:40 +0000 (23:03 +0900)]
ARM: EXYNOS: add exynos3250 PMU support
This patch prepares the PMU code for the future:
- suspend/resume (S2R) support
- cpuidle AFTR/W-AFTR modes support
on Exynos3250.
Cc: Vikas Sajjan <vikas.sajjan@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
[kgene.kim@samsung.com: fixed coding style]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Gregory CLEMENT [Thu, 30 Oct 2014 11:39:44 +0000 (12:39 +0100)]
ARM: mvebu: Implement the CPU hotplug support for the Armada 38x SoCs
This commit implements the CPU hotplug support for the Marvell Armada
38x platform. Similarly to what was done for the Armada XP, this
commit:
* Implements the ->cpu_die() function of SMP operations by calling
armada_38x_do_cpu_suspend() to enter the deep idle state for
CPUs going offline.
* Implements a dummy ->cpu_kill() function, simply needed for the
kernel to know we have CPU hotplug support.
* The mvebu_cortex_a9_boot_secondary() function makes sure to wake up
the CPU if waiting in deep idle state by sending an IPI before
deasserting the CPUs from reset. This is because
mvebu_cortex_a9_boot_secondary() is now used in two different
situations: for the initial boot of secondary CPUs (where CPU reset
deassert is used to wake up CPUs) and for CPU hotplug (where an IPI
is used to take CPU out of deep idle).
* At boot time, we exit from the idle state in the
->smp_secondary_init() hook.
This commit has been tested using CPU hotplug through sysfs
(/sys/devices/system/cpu/cpuX/online) and using kexec.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1414669184-16785-5-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Gregory CLEMENT [Thu, 30 Oct 2014 11:39:43 +0000 (12:39 +0100)]
ARM: mvebu: Fix the secondary startup for Cortex A9 SoC
During the secondary startup the SCU was assumed to be in normal
mode. It is not always the case, and especially after a kexec. This
commit adds the needed sequence to put the SCU in normal mode.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1414669184-16785-4-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Gregory CLEMENT [Thu, 30 Oct 2014 11:39:42 +0000 (12:39 +0100)]
ARM: mvebu: Move SCU power up in a function
This will allow reusing the same function in the secondary_startup
for the Cortex A9 SoC.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1414669184-16785-3-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Gregory CLEMENT [Thu, 30 Oct 2014 11:39:41 +0000 (12:39 +0100)]
ARM: mvebu: Clean-up the Armada XP support
This patch removes the unneeded include of the armada-370-xp.h header.
It also moves some declarations from this file into more accurate
places.
Finally, it also adds a comment explaining that we can't remove yet the
smp field in the dt machine struct due to backward compatibly of the
device tree.
In a few releases, when the old device tree will be obsolete, we will be
able to remove the smp field and then the armada-370-xp.h header.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1414669184-16785-2-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Thomas Petazzoni [Thu, 13 Nov 2014 09:39:00 +0000 (10:39 +0100)]
ARM: mvebu: update comments in coherency.c
The coherency.c top-level comment mentions that it supports the
coherency fabric for Armada 370 and XP, but it also supports the
coherency fabric on Armada 375 and 38x, so this commit updates the
comment accordingly.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1415871540-20302-6-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Thomas Petazzoni [Thu, 13 Nov 2014 09:38:59 +0000 (10:38 +0100)]
ARM: mvebu: remove Armada 375 Z1 workaround for I/O coherency
This reverts commit
5ab5afd8ba83 ("ARM: mvebu: implement Armada 375
coherency workaround"), since we are removing the support for the very
early Z1 revision of the Armada 375 SoC.
This commit is an exact revert, with two exceptions:
- minor adaptations needed due to other changes that have taken place
in coherency.c since the original commit
- keep the definition of pr_fmt. This shouldn't originally have been
part of the Armada 375 Z1 workaround commit since it had nothing to
do with it.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1415871540-20302-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Thomas Petazzoni [Thu, 13 Nov 2014 09:38:58 +0000 (10:38 +0100)]
ARM: mvebu: remove unused register offset definition
Since commit
b21dcafea36d ("arm: mvebu: remove dependency of SMP init
on static I/O mapping"), the COHERENCY_FABRIC_CFG_OFFSET register
offset definition is no longer used, so this commit removes it.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1415871540-20302-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Thomas Petazzoni [Thu, 13 Nov 2014 09:38:57 +0000 (10:38 +0100)]
ARM: mvebu: disable I/O coherency on non-SMP situations on Armada 370/375/38x/XP
Enabling the hardware I/O coherency on Armada 370, Armada 375, Armada
38x and Armada XP requires a certain number of conditions:
- On Armada 370, the cache policy must be set to write-allocate.
- On Armada 375, 38x and XP, the cache policy must be set to
write-allocate, the pages must be mapped with the shareable
attribute, and the SMP bit must be set
Currently, on Armada XP, when CONFIG_SMP is enabled, those conditions
are met. However, when Armada XP is used in a !CONFIG_SMP kernel, none
of these conditions are met. With Armada 370, the situation is worse:
since the processor is single core, regardless of whether CONFIG_SMP
or !CONFIG_SMP is used, the cache policy will be set to write-back by
the kernel and not write-allocate.
Since solving this problem turns out to be quite complicated, and we
don't want to let users with a mainline kernel known to have
infrequent but existing data corruptions, this commit proposes to
simply disable hardware I/O coherency in situations where it is known
not to work.
And basically, the is_smp() function of the kernel tells us whether it
is OK to enable hardware I/O coherency or not, so this commit slightly
refactors the coherency_type() function to return
COHERENCY_FABRIC_TYPE_NONE when is_smp() is false, or the appropriate
type of the coherency fabric in the other case.
Thanks to this, the I/O coherency fabric will no longer be used at all
in !CONFIG_SMP configurations. It will continue to be used in
CONFIG_SMP configurations on Armada XP, Armada 375 and Armada 38x
(which are multiple cores processors), but will no longer be used on
Armada 370 (which is a single core processor).
In the process, it simplifies the implementation of the
coherency_type() function, and adds a missing call to of_node_put().
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Fixes:
e60304f8cb7bb545e79fe62d9b9762460c254ec2 ("arm: mvebu: Add hardware I/O Coherency support")
Cc: <stable@vger.kernel.org> # v3.8+
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1415871540-20302-3-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Thomas Petazzoni [Thu, 13 Nov 2014 09:38:56 +0000 (10:38 +0100)]
ARM: mvebu: make the coherency_ll.S functions work with no coherency fabric
The ll_add_cpu_to_smp_group(), ll_enable_coherency() and
ll_disable_coherency() are used on Armada XP to control the coherency
fabric. However, they make the assumption that the coherency fabric is
always available, which is currently a correct assumption but will no
longer be true with a followup commit that disables the usage of the
coherency fabric when the conditions are not met to use it.
Therefore, this commit modifies those functions so that they check the
return value of ll_get_coherency_base(), and if the return value is 0,
they simply return without configuring anything in the coherency
fabric.
The ll_get_coherency_base() function is also modified to properly
return 0 when the function is called with the MMU disabled. In this
case, it normally returns the physical address of the coherency
fabric, but we now check if the virtual address is 0, and if that's
case, return a physical address of 0 to indicate that the coherency
fabric is not enabled.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.8+
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1415871540-20302-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Jason Cooper [Sat, 22 Nov 2014 01:48:20 +0000 (01:48 +0000)]
Merge branch 'mvebu/fixes' into mvebu/soc
Dmitry Lifshitz [Tue, 18 Nov 2014 09:13:24 +0000 (11:13 +0200)]
ARM: dts: cm-t3x30: add keypad support
Add twl4030 matrtix keypad support.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Fri, 21 Nov 2014 23:22:24 +0000 (15:22 -0800)]
Merge tag 'for-v3.19/omap-b2' of git://git./linux/kernel/git/pjw/omap-pending into omap-for-v3.19/soc
Several more OMAP patches targeted for v3.19. They include:
- OMAP4/5: DSS hwmod cleanup patches from Tomi Valkeinen.
- DRA7xx: hwmod data support for UARTs 7 through 10.
- AM43xx: hwmod data support for the onboard ADC.
Basic build, boot, and PM test reports are here:
http://www.pwsan.com/omap/testlogs/omap-b-for-v3.19/
20141121110550/
Note that I cannot test the DRA7xx or AM43xx patches, since I do not have
these boards.
Paul Walmsley [Fri, 21 Nov 2014 18:05:05 +0000 (11:05 -0700)]
Merge branch 'adc-support-v3.19' into omap-b-for-v3.19
Vignesh R [Fri, 21 Nov 2014 10:14:21 +0000 (15:44 +0530)]
ARM: OMAP2+: hwmod: AM43x: add hwmod support for ADC on AM43xx
This patch adds hwmod support for ADC on AM43xx. Since clockdomain
and offsets of adc_tsc are different from AM33xx, ADC data has been
directly added to AM43xx hwmod file.
Signed-off-by: Vignesh R <vigneshr@ti.com>
[paul@pwsan.com: fixed spelling of "Anolog"; converted spaces to tabs]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Javier Martinez Canillas [Thu, 13 Nov 2014 02:14:40 +0000 (11:14 +0900)]
ARM: EXYNOS: Call regulator core suspend prepare and finish functions
The regulator framework has a set of helpers functions to be used when
the system is entering and leaving from suspend but these are not called
on Exynos platforms. This means that the .set_suspend_* function handlers
defined by regulator drivers are not called when the system is suspended.
Suggested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Abhilash Kesavan [Fri, 7 Nov 2014 00:20:16 +0000 (09:20 +0900)]
ARM: EXYNOS: Use MCPM call-backs to support S2R on exynos5420
Use the MCPM layer to handle core suspend/resume on Exynos5420.
Also, restore the entry address setup code post-resume.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Vikas Sajjan [Fri, 7 Nov 2014 00:17:36 +0000 (09:17 +0900)]
ARM: EXYNOS: Add Suspend-to-RAM support for exynos5420
Adds Suspend-to-RAM support for EXYNOS5420
Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Abhilash Kesavan [Fri, 7 Nov 2014 00:27:33 +0000 (09:27 +0900)]
ARM: EXYNOS: Add PMU support for exynos5420
Adds initial PMU settings for exynos5420. This is required for
future S2R and Switching support.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pankaj Dubey [Fri, 7 Nov 2014 00:26:47 +0000 (09:26 +0900)]
ARM: EXYNOS: Move PMU specific definitions from common.h
This patch moves PMU specific definitions into a new file
as exynos-pmu.h.
This will help in reducing dependency of common.h in pmu.c.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pankaj Dubey [Fri, 7 Nov 2014 00:26:40 +0000 (09:26 +0900)]
ARM: EXYNOS: Add platform driver support for Exynos PMU
This patch modifies Exynos Power Management Unit (PMU) initialization
implementation in following way:
- Added platform driver support for Exynos PMU IP.
- Added platform struct exynos_pmu_data to hold platform specific data.
- For each SoC's PMU support now we can add platform data and statically
bind PMU configuration and SoC specific initialization function.
- Separate each SoC's PMU initialization function and make it as part of
platform data.
- It also removes uses of soc_is_exynosXYZ().
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Chanwoo Choi [Thu, 6 Nov 2014 23:20:09 +0000 (08:20 +0900)]
ARM: EXYNOS: Add support for exynos4415 SoC
This patch adds support for Exynos4415 SoC. Exynos4415 is based on
the 32-bit RISC processor for Smartphone. Exynos4415 has Cortex A9
quad-cores and has a target speed of 1.6GHz and provides 8.5GB/s
memory bandwidth.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Kukjin Kim [Fri, 21 Nov 2014 13:49:27 +0000 (22:49 +0900)]
Merge branch 'v3.19-next/non-critical-fixes' into v3.19-next/mach-exynos
Kukjin Kim [Fri, 21 Nov 2014 12:40:23 +0000 (21:40 +0900)]
Merge branch 'v3.19-next/cleanup-samsung' into v3.19-next/mach-exynos
Arnd Bergmann [Fri, 21 Nov 2014 12:04:06 +0000 (13:04 +0100)]
Merge tag 'renesas-soc4-for-v3.19' of git://git./linux/kernel/git/horms/renesas into next/soc
Pull "Fourth Round of Renesas ARM Based SoC Updates for v3.19" from Simon Horman:
* Add early debugging support using SCIF(A)
* tag 'renesas-soc4-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Add early debugging support using SCIF(A)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 21 Nov 2014 11:59:18 +0000 (12:59 +0100)]
Merge tag 'berlin-soc-3.19-2' of git://git.infradead.org/users/hesselba/linux-berlin into next/soc
Pull "Berlin SoC changes for v3.19 (round 2)" from Sebastian Hesselbarth:
- Do not select RESET_CONTROLLER as it is user selectable
* tag 'berlin-soc-3.19-2' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: berlin: do not select RESET_CONTROLLER
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Hauke Mehrtens [Sun, 14 Sep 2014 19:43:40 +0000 (21:43 +0200)]
ARM: BCM5301X: fix early serial console
This device actually has a 8250 serial with a shift of 0.
Tested this on a BCM4708.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 20 Nov 2014 16:23:57 +0000 (17:23 +0100)]
Merge tag 'sunxi-core-for-3.19' of git://git./linux/kernel/git/mripard/linux into next/soc
Pull "Allwinner Core Additions for 3.19" from Maxime Ripard:
This has mostly been about introducing A80 support
* tag 'sunxi-core-for-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: make sun6i SMP ops static
ARM: sunxi: Select ARCH_HAS_RESET_CONTROLLER and RESET_CONTROLLER for sun9i
Documentation: sunxi: Add A80 datasheet link
devicetree: bindings: Document supported Allwinner sunxi SoCs
ARM: sunxi: Introduce Allwinner A80 support
devicetree: bindings: Add vendor prefix for Merrii Technology Co., Ltd.
ARM: sunxi: Add debug uart used by sun9i (Allwinner A80)
Documentation: sunxi: Update Allwinner SoC documentation (A31/A31s/A23)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 20 Nov 2014 16:20:59 +0000 (17:20 +0100)]
Merge tag 'v3.19-meson-soc' of https://github.com/carlocaione/linux-meson into next/soc
Pull "ARM: meson: SOC related changes" from Carlo Caione:
This is the pull request for the SoC related changes for the 3.19.
The support for Meson8 is added together with L2 cache management.
* tag 'v3.19-meson-soc' of https://github.com/carlocaione/linux-meson:
clocksource: meson6: Select CLKSRC_MMIO
ARM: meson: enable L2 cache
ARM: meson: document meson8 compatible properties
ARM: meson: add meson8 support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 20 Nov 2014 16:18:43 +0000 (17:18 +0100)]
Merge tag 'v3.19-rockchip-soc2' of git://git./linux/kernel/git/mmind/linux-rockchip into next/soc
Pull "code part of the rk3288 smp support" from Heiko Stübner:
here is the second batch of soc related changes, consisting only
of the smp support for rk3288.
Due to the slight misheap of the v3.18 cpuclk pull being merge, it is based
on exactly this merge commit from Olof to next/soc.
* tag 'v3.19-rockchip-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: add basic smp support for rk3288
ARM: rockchip: add option to access the pmu via a phandle in smp_operations
ARM: rockchip: convert to regmap and use pmu syscon if available
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 20 Nov 2014 16:13:55 +0000 (17:13 +0100)]
Merge tag 'integrator-v3.19-arm-soc-2' of git://git./linux/kernel/git/linusw/linux-integrator into next/soc
Pull "ARM SoC Integrator updates for v3.19" from Linus Walleij:
Integrator updates for the v3.19 merge cycle on
top of the multiplatform patches, this moves out
some drivers and reduced the amount of code carried
in arch/arm/mach-integrator.
- Move the Integrator/AP timer to drivers/clocksource
- Move the restart functionality to the device tree,
patches to enable restart for the Integrator have
been merged to the reset tree (orthogonal)
- Move debug LEDs to device tree (using the syscon
LED driver merged for v3.18)
- Move core module LEDs to device tree (using the
syscon LED driver merged for v3.18)
- Move the SoC driver (chip ID etc) to
drivers/soc/versatile/soc-integrator.c
* tag 'integrator-v3.19-arm-soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
soc: move SoC driver for the ARM Integrator
ARM: integrator: move core module LED to device tree
ARM: integrator: move debug LEDs to syscon LED driver
ARM: integrator: move restart to the device tree
ARM: integrator: move AP timer to clocksource
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Alan Tull [Tue, 14 Oct 2014 19:33:38 +0000 (19:33 +0000)]
socfpga: hotplug: put cpu1 in wfi
Use WFI when putting CPU1 to sleep. Don't hold CPU1 in reset
since that results in increased power consumption.
Reset CPU1 briefly during CPU1 bootup.
This has been tested for hotplug and suspend/resume and results
in no increased power consumption.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 20 Nov 2014 12:47:35 +0000 (13:47 +0100)]
Merge tag 'v3.19-next-soc' of https://github.com/mbgg/linux-mediatek into next/soc
Pull "Add earlyprintk to mt8127 and mt8135 and update Kconfig entry for
Mediatek SoCs" from Matthias Brugger:
Here comes the pull request which add earlyprintk support for mt8127 and mt8135.
Apart from that the Kconfig entry for the Mediatek architecture was fixed.
* tag 'v3.19-next-soc' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: Fix description for mediatek SoCs
ARM: mediatek: Add earlyprintk support for mt8127 & mt8135
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 20 Nov 2014 12:06:30 +0000 (13:06 +0100)]
Merge tag 'arm-soc/for-3.19/cygnus-defconfig-v2' of github.com/brcm/linux into next/soc
Pull "Broadcom Cygnus SoC defconfig" from Florian Fainelli:
This pull requests removes one level in menuconfig for the BCM SoCs for the
bcm_defconfig file.
* tag 'arm-soc/for-3.19/cygnus-defconfig-v2' of http://github.com/brcm/linux:
ARM: bcm_defconfig: remove one level of menu from Kconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 20 Nov 2014 12:05:39 +0000 (13:05 +0100)]
Merge tag 'arm-soc/for-3.19/cygnus-platform-v2' of github.com/brcm/linux into next/soc
Pull "Broadcom Cygnus SoC platform support" from Florian Fainelli:
This pull request contains the platform code to support the Broadcom Cygnus SoC
using the iProc architecture:
- add support for the Broadcom Cygnus SoC
- consolidate the BCM5301X Kconfig options under the iProc menuconfig entry
- remove one level of menu in menuconfig
* tag 'arm-soc/for-3.19/cygnus-platform-v2' of http://github.com/brcm/linux:
ARM: mach-bcm: ARCH_BCM_MOBILE: remove one level of menu from Kconfig
ARM: mach-bcm: Consolidate currently supported IPROC SoCs
ARM: cygnus: Initial support for Broadcom Cygnus SoC
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Dmitry Eremin-Solenikov [Thu, 6 Nov 2014 07:20:23 +0000 (10:20 +0300)]
ARM: debug: move StrongARM debug include to arch/arm/include/debug
StrongARM debug-macro.S is quite standalone thing, depending only on
register mappings. Move it to proper place and add Kconfig entry.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 20 Nov 2014 11:06:19 +0000 (12:06 +0100)]
Merge tag 'omap-for-v3.19/prcm-cleanup' of git://git./linux/kernel/git/tmlind/linux-omap into next/soc
Pull "omap prcm clean-up for v3.19" from Tony Lindgren:
Clean-up series for omap PRCM (Power Reset Clock Module) from
Tero Kristo to move things a bit closer to becoming a proper
device driver.
* tag 'omap-for-v3.19/prcm-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (26 commits)
ARM: OMAP2+: PRM: provide generic API for system reset
ARM: OMAP3+: PRM: add generic API for reconfiguring I/O chain
ARM: OMAP4: PRM: make PRCM interrupt handler related functions static
ARM: OMAP3: PRM: make PRCM interrupt handler related functions static
ARM: OMAP4: PRM: make omap4_prm_read/write_inst_reg calls static
ARM: AM33xx: PRM: make direct register access functions static
ARM: AM33xx: PRM: move global warm reset implementation to driver
ARM: OMAP4+: CM: remove omap4_cm1/cm2_* functions
ARM: OMAP4: CM: make cminst direct register access functions static
ARM: OMAP4: CM: move public definitions from cminst44xx.h to cm44xx.h
ARM: OMAP2+: PRM: add generic API for checking hardreset status
ARM: OMAP2+: PRM: add generic API for deasserting hardware reset
ARM: OMAP2+: PRM: add generic API for asserting hardware reset
ARM: AM33xx: PRM: add support for prm_init
ARM: AM43xx: hwmod: use OMAP4 hardreset ops instead of the AM33xx version
ARM: AM33xx: hwmod: remove am33xx specific module SoC opts
ARM: OMAP2/3: CM: make cm_split_idlest_reg SoC calls static
ARM: OMAP2+: CM: add common APIs for cm_module_enable/disable
ARM: OMAP2+: CM: make clkdm_hwsup operations static
ARM: OMAP4+/AM33xx: CM: add common API for cm_wait_module_idle
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 20 Nov 2014 10:39:58 +0000 (11:39 +0100)]
Merge tag 'omap-for-v3.19/clocks-and-pm' of git://git./linux/kernel/git/tmlind/linux-omap into next/soc
Pull "omap soc changes for v3.19" from Tony Lindgren:
SoC related changes for omaps. Mostly to make PM easier to use for
omap4 and later, and to fix clock DPLL fixes by adding determine_rate
and set_rate_and_parent.
* tag 'omap-for-v3.19/clocks-and-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: hwmod: drop unnecessary list initialization
ARM: OMAP3+: DPLL: use determine_rate() and set_rate_and_parent()
ARM: OMAP3: clock: add support for dpll4_set_rate_and_parent
ARM: OMAP4: clock: add support for determine_rate for omap4 regm4xen DPLL
ARM: OMAP3: clock: add new rate changing logic support for noncore DPLLs
ARM: OMAP3: clock: use clk_features flags for omap3 DPLL4 checks
ARM: OMAP4+: PM: Program CPU logic power state
ARM: OMAP4+: PM: Centralize static dependency mapping table
ARM: OMAP4: PM: Only do static dependency configuration in omap4_init_static_deps
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 20 Nov 2014 09:15:38 +0000 (10:15 +0100)]
Merge tag 'pxa-for-3.19' of https://github.com/rjarzmik/linux into next/soc
Pull "arm: pxa: pxa for v3.19" from Robert Jarzmik:
This is a very quiet release, featuring a small cleanup, a tosa change
on its charger driver, and support for pxa device-tree based pxa27x
boards.
The device-tree part will only be fully activated once clocks support
is fully operation in the common clock framework.
* tag 'pxa-for-3.19' of https://github.com/rjarzmik/linux:
arm: pxa: add pxa27x device-tree support
arm: pxa: remove unnecessary includes from pxa-dt
arm: pxa: move init functions into generic.h
arm: pxa: add device-tree irq init for pxa27x
ARM: pxa: tosa: switch to gpio-charger
arm: mach-pxa: Convert pr_warning to pr_warn
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Paul Walmsley [Thu, 20 Nov 2014 08:50:32 +0000 (01:50 -0700)]
Merge branch 'dra7xx-uart-hwmod-v3.19' into omap-b-for-v3.19
Ambresh K [Tue, 21 Oct 2014 16:17:51 +0000 (11:17 -0500)]
ARM: DRA7: hwmod data: Add missing UART hwmod data
We had constrainted hwmod entries to entries in dts which were present
only for default mapped interrupts, the ones such as UARTs > 6 which
needed IRQ crossbar configured were never added to hwmod database.
Add them now that IRQ crossbar is functional
Without this, enabling UARTs7 to 10 in dts results in the following crash:
[ 1.893829] omap_uart
48420000.serial: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
[ 1.903381] Unhandled fault: imprecise external abort (0x1406) at 0x00000000
[ 1.903381] ------------[ cut here ]------------
[ 1.903381] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x2ac/0x32c()
[ 1.903411]
44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access
[ 1.903411] Modules linked in:
[ 1.903411] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.18.0-rc1-dirty #3
[ 1.903442] [<
c0015270>] (unwind_backtrace) from [<
c00119b4>] (show_stack+0x10/0x14)
[ 1.903442] [<
c00119b4>] (show_stack) from [<
c05e4afc>] (dump_stack+0x78/0x94)
[ 1.903472] [<
c05e4afc>] (dump_stack) from [<
c003fed0>] (warn_slowpath_common+0x6c/0x8c)
[ 1.903472] [<
c003fed0>] (warn_slowpath_common) from [<
c003ff84>] (warn_slowpath_fmt+0x30/0x40)
[ 1.903472] [<
c003ff84>] (warn_slowpath_fmt) from [<
c0333bfc>] (l3_interrupt_handler+0x2ac/0x32c)
[ 1.903503] [<
c0333bfc>] (l3_interrupt_handler) from [<
c008d6f8>] (handle_irq_event_percpu+0x60/0x230)
[ 1.903503] [<
c008d6f8>] (handle_irq_event_percpu) from [<
c008d904>] (handle_irq_event+0x3c/0x5c)
[ 1.903503] [<
c008d904>] (handle_irq_event) from [<
c00903b0>] (handle_fasteoi_irq+0xc4/0x190)
[ 1.903503] [<
c00903b0>] (handle_fasteoi_irq) from [<
c008d01c>] (generic_handle_irq+0x20/0x30)
[ 1.903533] [<
c008d01c>] (generic_handle_irq) from [<
c008d114>] (__handle_domain_irq+0x64/0xb8)
[ 1.903533] [<
c008d114>] (__handle_domain_irq) from [<
c00086e4>] (gic_handle_irq+0x20/0x60)
[ 1.903533] [<
c00086e4>] (gic_handle_irq) from [<
c05eb124>] (__irq_svc+0x44/0x5c)
[ 1.903533] Exception stack(0xc08d1f60 to 0xc08d1fa8)
[ 1.903564] 1f60:
00000001 00000001 00000000 c08dc930 c08d0000 00000000 00000000 00000000
[ 1.903564] 1f80:
ffffffed c0978028 c08d89dc c08d8978 00000000 c08d1fa8 c0083fc0 c000f160
[ 1.903564] 1fa0:
20000013 ffffffff
[ 1.903564] [<
c05eb124>] (__irq_svc) from [<
c000f160>] (arch_cpu_idle+0x20/0x3c)
[ 1.903594] [<
c000f160>] (arch_cpu_idle) from [<
c0077c54>] (cpu_startup_entry+0x198/0x338)
[ 1.903594] [<
c0077c54>] (cpu_startup_entry) from [<
c0869be0>] (start_kernel+0x358/0x3c4)
[ 1.903594] [<
c0869be0>] (start_kernel) from [<
80008074>] (0x80008074)
[ 1.903594] ---[ end trace
293fc95d463cff71 ]---
[ 2.117553] Internal error: : 1406 [#1] SMP ARM
[ 2.122314] Modules linked in:
[ 2.125518] CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W 3.18.0-rc1-dirty #3
[ 2.133850] task:
ed868b80 ti:
ed86a000 task.ti:
ed86a000
[ 2.139526] PC is at serial_omap_probe+0x2fc/0x514
[ 2.144561] LR is at trace_hardirqs_on_caller+0xec/0x1c4
[ 2.150146] pc : [<
c038f0f0>] lr : [<
c0083fc0>] psr:
40000013
[ 2.150146] sp :
ed86be18 ip :
ed9bb57c fp :
f005e000
[ 2.162231] r10:
0000012a r9 :
ed9b4f80 r8 :
edc5bdcd
[ 2.167724] r7 :
edc58810 r6 :
ed9bb400 r5 :
ed9bb410 r4 :
edc5bc10
[ 2.174560] r3 :
00000000 r2 :
00000000 r1 :
00000014 r0 :
ffffffed
[ 2.181427] Flags: nZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
[ 2.189117] Control:
10c5387d Table:
8000406a DAC:
00000015
[ 2.195159] Process swapper/0 (pid: 1, stack limit = 0xed86a248)
[ 2.201477] Stack: (0xed86be18 to 0xed86c000)
[ 2.206054] be00:
ed9ba2d0 00000000
[ 2.214660] be20:
edc50150 00000001 c08cba58 00000000 00000000 ed9bb410 ffffffed c09481d8
[ 2.223236] be40:
00000000 c09481d8 c08cba58 00000000 00000000 c039bcfc c1170958 ed9bb410
[ 2.231842] be60:
ed9bb444 c039a6f4 00000000 ed9bb410 c09481d8 ed9bb444 00000000 c08dc698
[ 2.240447] be80:
edc4a100 c039a8b0 c09481d8 c039a81c 00000000 c0399060 ed8afaa8 ed92c110
[ 2.249053] bea0:
c09481d8 edc482c0 c0949308 c0399ee0 c077f80c c09481d8 ed86a000 c09481d8
[ 2.257659] bec0:
ed86a000 c08dc698 00000000 c039b088 00000000 00000000 ed86a000 c08a1924
[ 2.266235] bee0:
c08a1904 c00089c4 00000000 00000000 00000000 00000000 60000093 00000000
[ 2.274841] bf00:
00000004 00000000 ed868b80 00000004 00000000 60000053 00000000 00000001
[ 2.283447] bf20:
00000000 c0083ea8 00000001 ed86a000 c08334bc ef7fc307 000000b2 c0059358
[ 2.292053] bf40:
c07e176c c083299c 00000006 00000006 c08cb588 c08b69cc 00000006 c08b69ac
[ 2.300659] bf60:
c097a280 000000b2 c08cba58 c0869588 00000000 c0869e04 00000006 00000006
[ 2.309234] bf80:
c0869588 00000000 00000000 c05dfd7c 00000000 00000000 00000000 00000000
[ 2.317840] bfa0:
00000000 c05dfd84 00000000 c000e668 00000000 00000000 00000000 00000000
[ 2.326446] bfc0:
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 2.335052] bfe0:
00000000 00000000 00000000 00000000 00000013 00000000 020405d0 00090c40
[ 2.343658] [<
c038f0f0>] (serial_omap_probe) from [<
c039bcfc>] (platform_drv_probe+0x48/0x98)
[ 2.352630] [<
c039bcfc>] (platform_drv_probe) from [<
c039a6f4>] (driver_probe_device+0x10c/0x234)
[ 2.361968] [<
c039a6f4>] (driver_probe_device) from [<
c039a8b0>] (__driver_attach+0x94/0x98)
[ 2.370819] [<
c039a8b0>] (__driver_attach) from [<
c0399060>] (bus_for_each_dev+0x54/0x88)
[ 2.379425] [<
c0399060>] (bus_for_each_dev) from [<
c0399ee0>] (bus_add_driver+0xdc/0x1d4)
[ 2.388031] [<
c0399ee0>] (bus_add_driver) from [<
c039b088>] (driver_register+0x78/0xf4)
[ 2.396453] [<
c039b088>] (driver_register) from [<
c08a1924>] (serial_omap_init+0x20/0x40)
[ 2.405059] [<
c08a1924>] (serial_omap_init) from [<
c00089c4>] (do_one_initcall+0x80/0x1cc)
[ 2.413757] [<
c00089c4>] (do_one_initcall) from [<
c0869e04>] (kernel_init_freeable+0x1b8/0x28c)
[ 2.422912] [<
c0869e04>] (kernel_init_freeable) from [<
c05dfd84>] (kernel_init+0x8/0xe4)
[ 2.431396] [<
c05dfd84>] (kernel_init) from [<
c000e668>] (ret_from_fork+0x14/0x2c)
[ 2.439361] Code:
e1b02f23 020320f0 0203300f 01a02222 (
0a000021)
[ 2.445770] ---[ end trace
293fc95d463cff72 ]---
[ 2.450683] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
[ 2.450683]
[ 2.460296] CPU0: stopping
[ 2.463134] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G D W 3.18.0-rc1-dirty #3
[ 2.471405] [<
c0015270>] (unwind_backtrace) from [<
c00119b4>] (show_stack+0x10/0x14)
[ 2.479522] [<
c00119b4>] (show_stack) from [<
c05e4afc>] (dump_stack+0x78/0x94)
[ 2.487060] [<
c05e4afc>] (dump_stack) from [<
c001394c>] (handle_IPI+0x190/0x264)
[ 2.494781] [<
c001394c>] (handle_IPI) from [<
c000871c>] (gic_handle_irq+0x58/0x60)
[ 2.502716] [<
c000871c>] (gic_handle_irq) from [<
c05eb124>] (__irq_svc+0x44/0x5c)
[ 2.510528] Exception stack(0xc08d1f60 to 0xc08d1fa8)
[ 2.515808] 1f60:
c000f15c 00000000 00000000 00000000 c08d0000 00000000 00000000 00000000
[ 2.524353] 1f80:
ffffffed c0978028 c08d89dc c08d8978 00000000 c08d1fa8 c000f15c c000f160
[ 2.532897] 1fa0:
60000013 ffffffff
[ 2.536529] [<
c05eb124>] (__irq_svc) from [<
c000f160>] (arch_cpu_idle+0x20/0x3c)
[ 2.544281] [<
c000f160>] (arch_cpu_idle) from [<
c0077c54>] (cpu_startup_entry+0x198/0x338)
[ 2.552917] [<
c0077c54>] (cpu_startup_entry) from [<
c0869be0>] (start_kernel+0x358/0x3c4)
[ 2.561462] [<
c0869be0>] (start_kernel) from [<
80008074>] (0x80008074)
[ 2.568298] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
[
Reported-by: Franklin Cooper Jr. <fcooper@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tomi Valkeinen [Thu, 9 Oct 2014 14:03:19 +0000 (17:03 +0300)]
ARM: dts: omap4.dtsi: remove dss_fck
"dss_fck" is a hacky clock, used to work around problems with MODULEMODE
bit handling in DSS hwmods.
These problems have now been solved, so we can remove the dss_fck clock.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tomi Valkeinen [Thu, 9 Oct 2014 14:03:18 +0000 (17:03 +0300)]
ARM: OMAP4: fix RFBI iclk
RFBI iclk was set to point to hacky "dss_fck", which will be removed.
Instead use "l3_div_ck", which is the proper clock for this. "l3_div_ck"
is the parent of "dss_fck", so the clock rate is the same as previously.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tomi Valkeinen [Thu, 9 Oct 2014 14:03:17 +0000 (17:03 +0300)]
ARM: OMAP4: hwmod: use MODULEMODE properly
Instead of using a hacky "dss_fck" clock (which toggles the MODULEMODE
bit) as DSS L3 interface clock, set the .modulemode field in the
omap44xx_dss_hwmod. This works now that the DSS core hwmod is enabled
during DSS submodule resets.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tomi Valkeinen [Thu, 9 Oct 2014 14:03:16 +0000 (17:03 +0300)]
ARM: OMAP4: hwmod: set DSS submodule parent hwmods
Set DSS core hwmod as the parent for all the DSS submodules.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tomi Valkeinen [Thu, 9 Oct 2014 14:03:15 +0000 (17:03 +0300)]
ARM: OMAP5: hwmod: set DSS submodule parent hwmods
Set DSS core hwmod as the parent for all the DSS submodules.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Robert Jarzmik [Sun, 28 Sep 2014 12:13:21 +0000 (14:13 +0200)]
arm: pxa: add pxa27x device-tree support
Add a device-tree machine entry (DT_MACHINE_START) for pxa27x based
platforms.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Robert Jarzmik [Sun, 28 Sep 2014 12:10:54 +0000 (14:10 +0200)]
arm: pxa: remove unnecessary includes from pxa-dt
As the init functions necessary for machine init have moved to
generic.h, remove the unnecessary includes and prototypes definitions
from pxa-dt.c.
This removes the include of mach/pxaXXX-regs.h, and make pxa-dt generic
enough to accept other pxa variants.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Robert Jarzmik [Sun, 28 Sep 2014 11:59:41 +0000 (13:59 +0200)]
arm: pxa: move init functions into generic.h
In order to have a unique .c file for all pxa variants device-tree
definitions, all the initialization functions for MACHINE_START and
DT_MACHINE_START have been put together into generic.h.
The alternative would have been one pxaXXX-dt.c file per variant.
The move is necessary because each include/mach/pxaXXX.h includes the
variant register descriptions which intersects and conflicts one with
each other.
The change is a preparation for pxa-dt.c to support multiple pxa,
ie. pxa3xx and pxa27x.
The machine files including mach/pxaXXX.h all include generic.h, which
guarantees no regression should be introduced.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Robert Jarzmik [Sun, 28 Sep 2014 13:20:06 +0000 (15:20 +0200)]
arm: pxa: add device-tree irq init for pxa27x
Add the initializer for irqs in a device-tree machine on a pxa27x.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Dmitry Eremin-Solenikov [Fri, 24 Oct 2014 17:14:22 +0000 (21:14 +0400)]
ARM: pxa: tosa: switch to gpio-charger
Switch to simpler gpio-charger module. PDA power requires additional
setup in platform file and is more suited for boards with separate AC
and USB charging inputs. Tosa has a unified input, so it's better suited
for gpio-charger.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Joe Perches [Sat, 13 Sep 2014 18:31:18 +0000 (11:31 -0700)]
arm: mach-pxa: Convert pr_warning to pr_warn
Use the more common pr_warn.
Other miscellanea:
o Coalesce formats
o Realign arguments
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Arnd Bergmann [Wed, 19 Nov 2014 22:01:50 +0000 (23:01 +0100)]
Merge tag 'renesas-boards-for-v3.19' of git://git./linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Boards Updates for v3.19" from Simon Horman:
* Add restart callback to kzm9g
* tag 'renesas-boards-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: kzm9g-reference: Add restart callback
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tomi Valkeinen [Thu, 9 Oct 2014 14:03:14 +0000 (17:03 +0300)]
ARM: OMAP2+: hwmod: add parent_hwmod support
Add parent_hwmod pointer to omap_hwmod. This can be set to point to a
"parent" hwmod that needs to be enabled for the "child" hwmod to work.
This is used at hwmod setup time: when doing the initial setup and
reset, first enable the parent hwmod, and after setup and reset is done,
restore the parent hwmod to postsetup_state.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
[paul@pwsan.com: add kerneldoc documentation for parent_hwmod; note that it
is a temporary workaround]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Arnd Bergmann [Wed, 19 Nov 2014 21:11:03 +0000 (22:11 +0100)]
Merge tag 'renesas-soc3-for-v3.19' of git://git./linux/kernel/git/horms/renesas into next/soc
Pull "Third Round of Renesas ARM Based Soc Updates for v3.19" from Simon Horman:
* Always build rcar setup for armv7
- Fixes allmodconfig build fauilre caused by
"ARM: shmobile: always build rcar setup for armv7"
* Add restart callback to sh73a0
* tag 'renesas-soc3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: always build rcar setup for armv7
ARM: shmobile: sh73a0: Add restart callback
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 19 Nov 2014 21:09:18 +0000 (22:09 +0100)]
Merge tag 'renesas-soc2-for-v3.19' of git://git./linux/kernel/git/horms/renesas into next/soc
Pull "Second Round of Renesas ARM Based SoC Soc Updates for v3.19" from Simon Horman:
* Enable PCI domains for R-Car Gen2 devices
* Make APMU resource code SoC-specific
* tag 'renesas-soc2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Enable PCI domains for R-Car Gen2 devices
ARM: shmobile: r8a7791: Correct number of CPU cores
ARM: shmobile: Separate APMU resource data into CPU dependant part
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 19 Nov 2014 21:02:48 +0000 (22:02 +0100)]
Merge tag 'renesas-soc-for-v3.19' of git://git./linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Soc Updates for v3.19" from Simon Horman:
* Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabled
* Add CA7 arch_timer initialization for r8a7794
* Handle CA7 arch timer delay
* Add shmobile_init_late() to sh7372
- This is consistent with other shmobile SoCs
* tag 'renesas-soc-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabled
ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794
ARM: shmobile: sh7372: Add shmobile_init_late()
ARM: shmobile: Handle CA7 arch timer delay
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 19 Nov 2014 21:01:24 +0000 (22:01 +0100)]
Merge tag 'renesas-runtime-pm-for-v3.19' of git://git./linux/kernel/git/horms/renesas into next/soc
Merge "Renesas ARM Based SoC Runtime PM Updates for v3.19"
* 8a7740/armadillo800eva legacy PM domain support
* tag 'renesas-runtime-pm-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7740: Add A3SM pm domain support
ARM: shmobile: r8a7740: Add A4SU pm domain support
ARM: shmobile: r8a7740/armadillo legacy: Add A4R pm domain support
ARM: shmobile: r8a7740: Add D4 pm domain support
ARM: shmobile: r8a7740/armadillo legacy: Add A4MP pm domain support
ARM: shmobile: r8a7740: Add A3SG pm domain support
ARM: shmobile: r8a7740: Add A3RV pm domain support
ARM: shmobile: armadillo800eva legacy: Add missing A4S pm domain devices
ARM: shmobile: armadillo800eva legacy: Add missing A3SP pm domain devices
ARM: shmobile: r8a7740: Add missing A4S pm domain devices
ARM: shmobile: r8a7740: Add missing A3SP pm domain devices
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Antoine Tenart [Mon, 17 Nov 2014 13:33:12 +0000 (14:33 +0100)]
ARM: berlin: do not select RESET_CONTROLLER
RESET_CONTROLLER is meant to be user-selectable. To respect that,
do not select it automatically when using ARCH_BERLIN.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Beniamino Galvani [Tue, 18 Nov 2014 15:41:20 +0000 (16:41 +0100)]
clocksource: meson6: Select CLKSRC_MMIO
Select CLKSRC_MMIO when the meson6_timer driver is enabled since it
depends on clocksource MMIO functions.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@caione.org>
Beniamino Galvani [Tue, 18 Nov 2014 14:25:41 +0000 (15:25 +0100)]
ARM: meson: enable L2 cache
This enables the L2 cache controller available in Amlogic SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
Beniamino Galvani [Sun, 5 Oct 2014 21:59:18 +0000 (23:59 +0200)]
ARM: meson: document meson8 compatible properties
Add device tree bindings documentation for Amlogic Meson8 SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
Beniamino Galvani [Sun, 5 Oct 2014 21:59:13 +0000 (23:59 +0200)]
ARM: meson: add meson8 support
Add a MACH_MESON8 symbol and add "amlogic,meson8" to the list of
compatible strings for the Meson DT machine to support devices based
on the Meson8 family of SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
Geert Uytterhoeven [Fri, 14 Nov 2014 15:49:47 +0000 (16:49 +0100)]
ARM: shmobile: Add early debugging support using SCIF(A)
Add serial port debug macros for the SCIF(A) serial ports.
This includes all supported shmobile SoCs, except for EMEV2.
The configuration logic (both Kconfig and #ifdef) is more complicated than
one would expect, for several reasons:
1. Not all SoCs have the same serial devices, and they're not always
at the same addresses.
2. There are two different types: SCIF and SCIFA. Fortunately they can
easily be distinguished by physical address.
3. Not all boards use the same serial port for the console.
The defaults correspond to the boards that are supported in
mainline. If you want to use a different serial port, just change
the value of CONFIG_DEBUG_UART_PHYS, and the rest will auto-adapt.
4. debug_ll_io_init() maps the SCIF(A) registers to a fixed virtual
address. 0xfdxxxxxx was chosen, as it should lie below VMALLOC_END
= 0xff000000, and must not conflict with the 2 MiB reserved region
at PCI_IO_VIRT_BASE = 0xfee00000.
- On SoCs not using the legacy machine_desc.map_io(),
debug_ll_io_init() is called by the ARM core code.
- On SoCs using the legacy machine_desc.map_io(),
debug_ll_io_init() must be called explicitly. Calls are added
for r8a7740, r8a7779, sh7372, and sh73a0.
This was derived from the r8a7790 version by Laurent Pinchart.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Emilio López [Sat, 15 Nov 2014 23:53:38 +0000 (20:53 -0300)]
ARM: sunxi: make sun6i SMP ops static
The sun6i SMP ops are currently not marked as static, as reported by
sparse. Let's mark it as such.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tony Lindgren [Fri, 14 Nov 2014 18:25:12 +0000 (10:25 -0800)]
Merge tag 'for-v3.19/omap-a' of git://git./linux/kernel/git/pjw/omap-pending into omap-for-v3.19/soc
Some OMAP clock/hwmod patches for v3.19.
Most of the patches are clock-related. The DPLL implementation is
changed to better align to the common clock framework.
There is also a patch that removes a few lines from the hwmod code -
this patch should have no functional effect.
Basic build, boot, and PM test logs for these patches can be found here:
http://www.pwsan.com/omap/testlogs/omap-a-for-v3.19/
20141113094101/
Joe.C [Tue, 4 Nov 2014 07:30:55 +0000 (15:30 +0800)]
ARM: mediatek: Fix description for mediatek SoCs
We support more MediaTek SoCs now, update the description.
Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Joe.C [Tue, 4 Nov 2014 07:30:54 +0000 (15:30 +0800)]
ARM: mediatek: Add earlyprintk support for mt8127 & mt8135
Enable low-level debug for Mediatek mt8127 & mt8135 SoC.
Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Felipe Balbi [Thu, 13 Nov 2014 16:36:55 +0000 (09:36 -0700)]
ARM: OMAP2+: hwmod: drop unnecessary list initialization
ml->node and sl->node are currently initialized
by means of INIT_LIST_HEAD(). That initialiation
is followed by a list_add() call.
Looking at what both these functions do we will have:
ml->node.next = &ml->node;
ml->node.prev = &ml->node;
oi->master->master_ports.next.prev = &ml->node;
ml->node.next = &oi->master->master_ports.next;
ml->node.prev = &oi->master->master_ports;
oi->master->master_ports.next = &ml->node;
from this, it's clear that both INIT_LIST_HEAD() calls
are unnecessary and can be safely removed.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tero Kristo [Fri, 3 Oct 2014 13:57:14 +0000 (16:57 +0300)]
ARM: OMAP3+: DPLL: use determine_rate() and set_rate_and_parent()
Currently, DPLLs are hiding the gory details of switching parent
within set_rate, which confuses the common clock code and is wrong.
Fixed by applying the new determine_rate() and set_rate_and_parent()
functionality to any clock-ops previously using the broken approach.
This patch also removes the broken legacy code.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tero Kristo [Fri, 3 Oct 2014 13:57:13 +0000 (16:57 +0300)]
ARM: OMAP3: clock: add support for dpll4_set_rate_and_parent
Expand the support of omap4 per-dpll to provide set_rate_and_parent.
This is required for proper behavior of clk_change_rate with
determine_rate support.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tero Kristo [Fri, 3 Oct 2014 13:57:12 +0000 (16:57 +0300)]
ARM: OMAP4: clock: add support for determine_rate for omap4 regm4xen DPLL
Similarly to OMAP3 noncore DPLL, the implementation of this DPLL clock
type is wrong. This patch adds basic functionality for determine_rate
for this clock type which will be taken into use in the patches following
later.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tero Kristo [Fri, 3 Oct 2014 13:57:11 +0000 (16:57 +0300)]
ARM: OMAP3: clock: add new rate changing logic support for noncore DPLLs
Currently, DPLL code hides the re-parenting within its internals, which
is wrong. This needs to be exposed to the common clock code via
determine_rate and set_rate_and_parent APIs. This patch adds support
for these, which will be taken into use in the following patches.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tero Kristo [Fri, 3 Oct 2014 13:57:10 +0000 (16:57 +0300)]
ARM: OMAP3: clock: use clk_features flags for omap3 DPLL4 checks
DPLL4 can't be reprogrammed on OMAP3430 ES1.0 due to hardware limitation.
Currently, the code does runtime omap_rev() check to see the chip it is
being executed on, instead, change this to use clk_features flags.
This avoids need for runtime omap_rev() checks.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Linus Walleij [Fri, 24 Oct 2014 10:51:20 +0000 (12:51 +0200)]
soc: move SoC driver for the ARM Integrator
This creates a new SoC bus driver for the ARM Integrator
family core modules to register the SoC bus and provide
sysfs info for the core module. We delete the corresponding
code from the Integrator machine and select this driver to
get a clean result.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>