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4 years agoAdd, and infer, a nofree function attribute
Brian Homerding [Mon, 8 Jul 2019 15:57:56 +0000 (15:57 +0000)]
Add, and infer, a nofree function attribute

This patch adds a function attribute, nofree, to indicate that a function does
not, directly or indirectly, call a memory-deallocation function (e.g., free,
C++'s operator delete).

Reviewers: jdoerfert

Differential Revision: https://reviews.llvm.org/D49165

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365336 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[docs][llvm-readobj][llvm-readelf] Improve wording
James Henderson [Mon, 8 Jul 2019 15:46:26 +0000 (15:46 +0000)]
[docs][llvm-readobj][llvm-readelf] Improve wording

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365335 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[InstCombine] fix typo in test; NFC
Sanjay Patel [Mon, 8 Jul 2019 15:38:03 +0000 (15:38 +0000)]
[InstCombine] fix typo in test; NFC

I added this test in rL365325, but didn't mean to create an undef insert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365333 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[PowerPC][NFC]Update testcases using script.
Jinsong Ji [Mon, 8 Jul 2019 15:24:32 +0000 (15:24 +0000)]
[PowerPC][NFC]Update testcases using script.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365330 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] ISD::INSERT_SUBVECTOR - use uint64_t index. NFCI.
Simon Pilgrim [Mon, 8 Jul 2019 14:52:56 +0000 (14:52 +0000)]
[X86] ISD::INSERT_SUBVECTOR - use uint64_t index. NFCI.

Keep the uint64_t type from getConstantOperandVal to stop truncation/extension overflow warnings in MSVC in subvector index math.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365328 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[Triple] Add isRISCV function
Alex Bradbury [Mon, 8 Jul 2019 14:52:36 +0000 (14:52 +0000)]
[Triple] Add isRISCV function

This matches isARM, isThumb, isAArch64 and similar helpers. Future commits
which clean-up code that currently checks for Triple::riscv32 ||
Triple::riscv64.

Differential Revision: https://reviews.llvm.org/D54215
Patch by Simon Cook.
Test case added by Alex Bradbury.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365327 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[InstCombine] add tests for splat shuffles; NFC
Sanjay Patel [Mon, 8 Jul 2019 14:49:21 +0000 (14:49 +0000)]
[InstCombine] add tests for splat shuffles; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365325 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[Float2Int] Add support for unary FNeg to Float2Int
Cameron McInally [Mon, 8 Jul 2019 14:46:07 +0000 (14:46 +0000)]
[Float2Int] Add support for unary FNeg to Float2Int

Differential Revision: https://reviews.llvm.org/D63941

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365324 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[MIPS GlobalISel] Register bank select for G_LOAD. Select i64 load
Petar Avramovic [Mon, 8 Jul 2019 14:45:52 +0000 (14:45 +0000)]
[MIPS GlobalISel] Register bank select for G_LOAD. Select i64 load

Select gprb or fprb when loaded value is used by either:
 copy to physical register or
 instruction with only one mapping available for that use operand.

Load of integer s64 is handled with narrowScalar when mapping is applied,
produced artifacts are combined away. Manually set gprb to all register
operands of instructions created during narrowScalar.

Differential Revision: https://reviews.llvm.org/D64269

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365323 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[MIPS GlobalISel] Register bank select for G_STORE. Select i64 store
Petar Avramovic [Mon, 8 Jul 2019 14:36:36 +0000 (14:36 +0000)]
[MIPS GlobalISel] Register bank select for G_STORE. Select i64 store

Select gprb or fprb when stored value is defined by either:
 copy from physical register or
 instruction with only one mapping available for that def operand.

Store of integer s64 is handled with narrowScalar when mapping is applied,
produced artifacts are combined away. Manually set gprb to all register
operands of instructions created during narrowScalar.

Differential Revision: https://reviews.llvm.org/D64268

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365322 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[AMDGPU][MC] Corrected parsing of FLAT offset modifier
Dmitry Preobrazhensky [Mon, 8 Jul 2019 14:27:37 +0000 (14:27 +0000)]
[AMDGPU][MC] Corrected parsing of FLAT offset modifier

Summary of changes:

- simplified handling of FLAT offset: offset_s13 and offset_u12 have been replaced with flat_offset;
- provided information about error position for pre-gfx9 targets;
- improved errors handling.

Reviewers: artem.tamazov, arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D64244

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365321 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoGlobalISel: widenScalar for G_BUILD_VECTOR
Matt Arsenault [Mon, 8 Jul 2019 13:48:06 +0000 (13:48 +0000)]
GlobalISel: widenScalar for G_BUILD_VECTOR

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365320 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoGlobalISel: Check address space when looking up iPTR size
Matt Arsenault [Mon, 8 Jul 2019 13:48:04 +0000 (13:48 +0000)]
GlobalISel: Check address space when looking up iPTR size

Fixes AMDGPU patterns for 32-bit address spaces always failing. Tests
will be included in future patches when additional issues are solved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365319 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoReapply [llvm-ar][test] Increase llvm-ar test coverage
Owen Reynolds [Mon, 8 Jul 2019 13:41:52 +0000 (13:41 +0000)]
Reapply [llvm-ar][test] Increase llvm-ar test coverage

This change adds tests to cover existing llvm-ar functionality.

Differential Revision: https://reviews.llvm.org/D63935

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365318 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoRevert [llvm-ar][test] Increase llvm-ar test coverage
Owen Reynolds [Mon, 8 Jul 2019 13:08:25 +0000 (13:08 +0000)]
Revert [llvm-ar][test] Increase llvm-ar test coverage

Reverted due to test failures

Differential Revision: https://reviews.llvm.org/D63935

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365317 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[llvm-ar][test] Increase llvm-ar test coverage
Owen Reynolds [Mon, 8 Jul 2019 12:54:24 +0000 (12:54 +0000)]
[llvm-ar][test] Increase llvm-ar test coverage

This change adds tests to cover existing llvm-ar functionality.

Differential Revision: https://reviews.llvm.org/D63935

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365316 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[lit] Parse command-line options from LIT_OPTS
Joel E. Denny [Mon, 8 Jul 2019 12:18:40 +0000 (12:18 +0000)]
[lit] Parse command-line options from LIT_OPTS

Similar to `FILECHECK_OPTS` for FileCheck, `LIT_OPTS` makes it easy to
adjust lit behavior when running the test suite via ninja.  For
example:

```
$ LIT_OPTS='--time-tests -vv --filter=threadprivate' \
  ninja check-clang-openmp
```

Reviewed By: probinson

Differential Revision: https://reviews.llvm.org/D64135

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365313 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[docs][llvm-objcopy] Add description of binary input/output to doc
James Henderson [Mon, 8 Jul 2019 11:41:54 +0000 (11:41 +0000)]
[docs][llvm-objcopy] Add description of binary input/output to doc

We briefly referred to being able to specify --target=binary without
explaining what binary input/output meant. This change adds a section on
this.

Reviewed by: MaskRay, abrachet

Differential Revision: https://reviews.llvm.org/D64245

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365312 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[TargetLowering] SimplifyDemandedBits - just call computeKnownBits for BUILD_VECTOR...
Simon Pilgrim [Mon, 8 Jul 2019 11:00:39 +0000 (11:00 +0000)]
[TargetLowering] SimplifyDemandedBits - just call computeKnownBits for BUILD_VECTOR cases.

Don't do this locally, computeKnownBits does this better (and can handle non-constant cases as well).

A next step would be to actually simplify non-constant elements - building on what we already do in SimplifyDemandedVectorElts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365309 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] Relax constraints on operands of VQxDMLxDH instructions
Mikhail Maltsev [Mon, 8 Jul 2019 09:44:52 +0000 (09:44 +0000)]
[ARM] Relax constraints on operands of VQxDMLxDH instructions

Summary:
According to a recently updated Armv8-M spec
(https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf) the
32-bit width versions of the following instructions:
* VQDMLADH
* VQDMLADHX
* VQRDMLADH
* VQRDMLADHX
* VQDMLSDH
* VQDMLSDHX
* VQRDMLSDH
* VQRDMLSDHX
are no longer unpredictable when their output register is the same as
one of the input registers.

This patch updates the assembler parser and the corresponding tests
and also removes @earlyclobber from the instruction constraints.

Reviewers: simon_tatham, ostannard, dmgreen, SjoerdMeijer, samparker

Reviewed By: simon_tatham

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64250

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365306 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[RISCV] Specify registers used in DWARF exception handling
Alex Bradbury [Mon, 8 Jul 2019 09:16:47 +0000 (09:16 +0000)]
[RISCV] Specify registers used in DWARF exception handling

Defines RISCV registers for getExceptionPointerRegister() and
getExceptionSelectorRegister().

Differential Revision: https://reviews.llvm.org/D63411
Patch by Edward Jones.
Modified by Alex Bradbury to add CHECK lines to exception-pointer-register.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365301 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] Fix null pointer dereference in CodeGen/ARM/Windows/stack-protector-msvc.ll...
Fangrui Song [Mon, 8 Jul 2019 08:43:31 +0000 (08:43 +0000)]
[ARM] Fix null pointer dereference in CodeGen/ARM/Windows/stack-protector-msvc.ll.test after D64292/r365283

CLI.CS may not be set.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365299 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[UpdateTestChecks] Skip over .Lfunc_begin for RISC-V
Alex Bradbury [Mon, 8 Jul 2019 08:34:16 +0000 (08:34 +0000)]
[UpdateTestChecks] Skip over .Lfunc_begin for RISC-V

This mirrors the change made for X86 in rL336987. Without this patch,
update_llc_test_checks will completely skip functions with personality
functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365297 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[AMDGPU] Use a named predicate instead of a magic number.
Jay Foad [Mon, 8 Jul 2019 07:04:58 +0000 (07:04 +0000)]
[AMDGPU] Use a named predicate instead of a magic number.

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365294 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
Craig Topper [Mon, 8 Jul 2019 06:52:49 +0000 (06:52 +0000)]
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.

This can help with code size on SSE targets where SHUFPD requires
a 0x66 prefix and SHUFPS doesn't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365293 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Make movsd commutable to shufpd with a 0x02 immediate on pre-SSE4.1 targets.
Craig Topper [Mon, 8 Jul 2019 06:52:43 +0000 (06:52 +0000)]
[X86] Make movsd commutable to shufpd with a 0x02 immediate on pre-SSE4.1 targets.

This can help avoid a copy or enable load folding.

On SSE4.1 targets we can commute it to blendi instead.

I had to make shufpd with a 0x02 immediate commutable as well
since we expect commuting to be reversible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365292 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[RISCV] Support z and i operand modifiers
Alex Bradbury [Mon, 8 Jul 2019 05:00:26 +0000 (05:00 +0000)]
[RISCV] Support z and i operand modifiers

Differential Revision: https://reviews.llvm.org/D57792
Patch by James Clarke.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365291 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Add MOVSDrr->MOVLPDrm entry to load folding table. Add custom handling to turn...
Craig Topper [Mon, 8 Jul 2019 02:10:20 +0000 (02:10 +0000)]
[X86] Add MOVSDrr->MOVLPDrm entry to load folding table. Add custom handling to turn UNPCKLPDrr->MOVHPDrm when load is under aligned.

If the load is aligned we can turn UNPCKLPDrr into UNPCKLPDrm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365287 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[llvm-bcanalyzer] Refactor and move to libLLVMBitReader
Francis Visoiu Mistrih [Mon, 8 Jul 2019 02:06:34 +0000 (02:06 +0000)]
[llvm-bcanalyzer] Refactor and move to libLLVMBitReader

This allows us to use the analyzer from unit tests.

* Refactor the interface to use proper error handling for most functions
  after JF's work.
* Move everything into a BitstreamAnalyzer class.
* Move that to Bitcode/BitcodeAnalyzer.h.

Differential Revision: https://reviews.llvm.org/D64116

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365286 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[NFC][PowerPC] Add the test add_cmp.ll
Kang Zhang [Mon, 8 Jul 2019 01:51:29 +0000 (01:51 +0000)]
[NFC][PowerPC] Add the test add_cmp.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365285 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoRevert "[IRBuilder] Fold consistently for or/and whether constant is LHS or RHS"
Petr Hosek [Sun, 7 Jul 2019 22:12:01 +0000 (22:12 +0000)]
Revert "[IRBuilder] Fold consistently for or/and whether constant is LHS or RHS"

This reverts commit r365260 which broke the following tests:

    Clang :: CodeGenCXX/cfi-mfcall.cpp
    Clang :: CodeGenObjC/ubsan-nullability.m
    LLVM :: Transforms/LoopVectorize/AArch64/pr36032.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365284 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] Add support for MSVC stack cookie checking
Martin Storsjo [Sun, 7 Jul 2019 18:57:31 +0000 (18:57 +0000)]
[ARM] Add support for MSVC stack cookie checking

Heavily based on the same for AArch64, from SVN r346469.

Differential Revision: https://reviews.llvm.org/D64292

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365283 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Merge r355546
Nico Weber [Sun, 7 Jul 2019 16:49:44 +0000 (16:49 +0000)]
gn build: Merge r355546

Found by inspection; the sync script doesn't sync .ipp files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365280 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Merge r365273
Nico Weber [Sun, 7 Jul 2019 16:44:07 +0000 (16:44 +0000)]
gn build: Merge r365273

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365279 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Sort sync script output
Nico Weber [Sun, 7 Jul 2019 16:40:29 +0000 (16:40 +0000)]
gn build: Sort sync script output

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365278 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Sort cxx_sources in libcxx build file
Nico Weber [Sun, 7 Jul 2019 16:36:11 +0000 (16:36 +0000)]
gn build: Sort cxx_sources in libcxx build file

Since these are in a custom list, `gn format` doesn't automatically sort
them.

Now their order matches the CMake build.

No additions or deletions, this just sorts the files that are there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365277 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Merge r365258 and follow-ups r365263, r365264
Nico Weber [Sun, 7 Jul 2019 15:43:32 +0000 (15:43 +0000)]
gn build: Merge r365258 and follow-ups r365263, r365264

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365276 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Make sure load isn't volatile before shrinking it in MOVDDUP isel patterns.
Craig Topper [Sun, 7 Jul 2019 05:33:20 +0000 (05:33 +0000)]
[X86] Make sure load isn't volatile before shrinking it in MOVDDUP isel patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365275 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[CodeGen] Add larger vector types for i32 and f32
David Majnemer [Sun, 7 Jul 2019 04:47:37 +0000 (04:47 +0000)]
[CodeGen] Add larger vector types for i32 and f32

Some out of tree backend require larger vector type. Since maintaining the changes out of tree is difficult due to the many manual changes needed when adding a new type we are adding it even if no backend currently use it.

Differential Revision: https://reviews.llvm.org/D64141

Patch by Thomas Raoux!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365274 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] SimplifyDemandedVectorEltsForTargetNode - fix shadow variable warning. NFCI.
Simon Pilgrim [Sat, 6 Jul 2019 18:46:09 +0000 (18:46 +0000)]
[X86] SimplifyDemandedVectorEltsForTargetNode - fix shadow variable warning. NFCI.

Fixes cppcheck warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365271 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] LowerBuildVectorv16i8 - pull out repeated getOperand() call. NFCI.
Simon Pilgrim [Sat, 6 Jul 2019 18:33:29 +0000 (18:33 +0000)]
[X86] LowerBuildVectorv16i8 - pull out repeated getOperand() call. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365270 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[DAGCombine] convertBuildVecZextToZext - remove duplicate getOpcode() call. NFCI.
Simon Pilgrim [Sat, 6 Jul 2019 18:32:15 +0000 (18:32 +0000)]
[DAGCombine] convertBuildVecZextToZext - remove duplicate getOpcode() call. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365269 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH...
Craig Topper [Sat, 6 Jul 2019 17:59:57 +0000 (17:59 +0000)]
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.

These instructions don't have an integer domain equivalent, but
we can at least change between the two floating point domains.

This allows a smaller encoding on SSE targets if we can turn
PD into PS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365268 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
Craig Topper [Sat, 6 Jul 2019 17:59:51 +0000 (17:59 +0000)]
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.

These patterns are the same as the MOVLPDmr and MOVHPDmr patterns,
but with a bitcast at the end. We can just select the PD instruction
and let execution domain fixing switch to PS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365267 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Add patterns to select MOVLPDrm from MOVSD+load and MOVHPD from UNPCKL+load.
Craig Topper [Sat, 6 Jul 2019 17:59:45 +0000 (17:59 +0000)]
[X86] Add patterns to select MOVLPDrm from MOVSD+load and MOVHPD from UNPCKL+load.

These narrow the load so we can only do it if the load isn't
volatile.

There also tests in vector-shuffle-128-v4.ll that this should
support, but we don't seem to fold bitcast+load on pre-sse4.2
targets due to the slow unaligned mem 16 flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365266 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Copy some test cases from vector-shuffle-sse1.ll to vector-shuffle-128-v4.ll...
Craig Topper [Sat, 6 Jul 2019 17:59:41 +0000 (17:59 +0000)]
[X86] Copy some test cases from vector-shuffle-sse1.ll to vector-shuffle-128-v4.ll and v8 where sse1 did better load folding. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365265 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[LFTR] Regenerate test checks; NFC
Nikita Popov [Sat, 6 Jul 2019 08:54:15 +0000 (08:54 +0000)]
[LFTR] Regenerate test checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365262 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[IRBuilder] Fold consistently for or/and whether constant is LHS or RHS
Philip Reames [Sat, 6 Jul 2019 04:28:00 +0000 (04:28 +0000)]
[IRBuilder] Fold consistently for or/and whether constant is LHS or RHS

Without this, we have the unfortunate property that tests are dependent on the order of operads passed the CreateOr and CreateAnd functions.  In actual usage, we'd promptly optimize them away, but it made tests slightly more verbose than they should have been.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365260 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[IRBuilder] Introduce helpers for and/or of multiple values at once
Philip Reames [Sat, 6 Jul 2019 03:46:18 +0000 (03:46 +0000)]
[IRBuilder] Introduce helpers for and/or of multiple values at once

We had versions of this code scattered around, so consolidate into one location.

Not strictly NFC since the order of intermediate results may change in some places, but since these operations are associatives, should not change results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365259 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[RegisterCoalescer] Fix an overzealous assert
Quentin Colombet [Sat, 6 Jul 2019 00:34:54 +0000 (00:34 +0000)]
[RegisterCoalescer] Fix an overzealous assert

Although removeCopyByCommutingDef deals with full copies, it is still
possible to copy undef lanes and thus, we wouldn't have any a value
number for these lanes.

This fixes PR40215.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365256 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoRegUsageInfoCollector: Skip AMDGPU entry point functions
Matt Arsenault [Fri, 5 Jul 2019 23:33:43 +0000 (23:33 +0000)]
RegUsageInfoCollector: Skip AMDGPU entry point functions

I'm not sure if it's worth it or not to add a hook to disable the pass
for an arbitrary function.

This pass is taking up to 5% of compile time in tiny programs by
iterating through all of the physical registers in every register
class. This pass should be rewritten in terms of regunits. For now,
skip doing anything for entry point functions. The vast majority of
functions in the real world aren't callable, so just not running this
will give the majority of the benefit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365255 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoRevert "[FileCheck] Simplify numeric variable interface"
Michael Liao [Fri, 5 Jul 2019 22:23:27 +0000 (22:23 +0000)]
Revert "[FileCheck] Simplify numeric variable interface"

This reverts commit 096600a4b073dd94a366cc8e57bff93c34ff6966.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365251 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[FileCheck] Simplify numeric variable interface
Thomas Preud'homme [Fri, 5 Jul 2019 21:49:59 +0000 (21:49 +0000)]
[FileCheck] Simplify numeric variable interface

Summary:
This patch simplifies 2 aspects in the FileCheckNumericVariable code.

First, setValue() method is turned into a void function since being
called only on undefined variable is an invariant and is now asserted
rather than returned. This remove the assert from the callers.

Second, clearValue() method is also turned into a void function since
the only caller does not check its return value since it may be trying
to clear the value of variable that is already cleared without this
being noteworthy.

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64231

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365249 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoAMDGPU: Fix assert in clang test
Matt Arsenault [Fri, 5 Jul 2019 21:09:53 +0000 (21:09 +0000)]
AMDGPU: Fix assert in clang test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365245 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[SystemZ] Fix addcarry of usubo (PR42512)
Nikita Popov [Fri, 5 Jul 2019 20:35:11 +0000 (20:35 +0000)]
[SystemZ] Fix addcarry of usubo (PR42512)

Only custom lower uaddo+addcarry or usubo+subcarry chains and leave
mixtures like usubo+addcarry or uaddo+subcarry to the generic
legalizer. Otherwise we run into issues because SystemZ uses
different CC values for carries and borrows.

Fixes https://bugs.llvm.org/show_bug.cgi?id=42512.

Differential Revision: https://reviews.llvm.org/D64213

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365242 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoAMDGPU: Make AMDGPUPerfHintAnalysis an SCC pass
Matt Arsenault [Fri, 5 Jul 2019 20:26:13 +0000 (20:26 +0000)]
AMDGPU: Make AMDGPUPerfHintAnalysis an SCC pass

Add a string attribute instead of directly setting
MachineFunctionInfo. This avoids trying to get the analysis in the
MachineFunctionInfo in a way that doesn't work with the new pass
manager.

This will also avoid re-visiting the call graph for every single
function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365241 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[CodeGen] Enhance `MachineInstrSpan` to allow the end of MBB to be used.
Michael Liao [Fri, 5 Jul 2019 20:23:59 +0000 (20:23 +0000)]
[CodeGen] Enhance `MachineInstrSpan` to allow the end of MBB to be used.

Summary:
- Explicitly specify the parent MBB to allow the end iterator to be
  used.

Reviewers: aprantl, MatzeB, craig.topper, qcolombet

Subscribers: arsenm, jvesely, nhaehnle, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64261

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365240 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[PowerPC] Fold another unused variable into assertion. NFC.
Benjamin Kramer [Fri, 5 Jul 2019 19:58:39 +0000 (19:58 +0000)]
[PowerPC] Fold another unused variable into assertion. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365237 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[PowerPC] Fold variable into assert. NFC.
Benjamin Kramer [Fri, 5 Jul 2019 19:46:48 +0000 (19:46 +0000)]
[PowerPC] Fold variable into assert. NFC.

Avoids a warning in Release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365236 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[PowerPC] Remove unused variable. NFC.
Benjamin Kramer [Fri, 5 Jul 2019 19:28:02 +0000 (19:28 +0000)]
[PowerPC] Remove unused variable. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365235 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Correct the size check in foldMemoryOperandCustom.
Craig Topper [Fri, 5 Jul 2019 18:54:00 +0000 (18:54 +0000)]
[X86] Correct the size check in foldMemoryOperandCustom.

The Size either needs to be 0 meaning we aren't folding
a stack reload. Or the stack slot needs to be at least
16 bytes. I've also added a paranoia check ensure the
RCSize is at leat 16 bytes as well. This avoids any
FR32/FR64 surprises, but I think we already filtered
those earlier.

All of our test case have Size as either 0 or 16 and
RCSize == 16. So the Size <= 16 check worked for those
cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365234 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[PowerPC] Move TOC save to prologue when profitable
Nemanja Ivanovic [Fri, 5 Jul 2019 18:38:09 +0000 (18:38 +0000)]
[PowerPC] Move TOC save to prologue when profitable

The indirect call sequence on PPC requires that the TOC base register be saved
prior to the indirect call and restored after the call since the indirect call
may branch to a global entry point in another DSO which will update the TOC
base. Over the last couple of years, we have improved this to:

- be able to hoist TOC saves from loops (with changes to MachineLICM)
- avoid multiple saves when one dominates the other[s]

However, it is still possible to have multiple TOC saves dynamically in the
execution path if there is no dominance relationship between them.

This patch moves the TOC save to the prologue when one of the TOC saves is in a
block that post-dominates entry (i.e. it cannot be avoided) or if it is in a
block that is hotter than entry.

Differential revision: https://reviews.llvm.org/D63803

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365232 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoAdd lldb-mi deprecation to the release notes
Jonas Devlieghere [Fri, 5 Jul 2019 18:23:52 +0000 (18:23 +0000)]
Add lldb-mi deprecation to the release notes

Differential revision: https://reviews.llvm.org/D64254

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365231 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoAdd LLDB section to the release notes
Jonas Devlieghere [Fri, 5 Jul 2019 17:58:30 +0000 (17:58 +0000)]
Add LLDB section to the release notes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365228 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[InferFunctionAttrs] add tests for 'dereferenceable' argument attribute; NFC
Sanjay Patel [Fri, 5 Jul 2019 17:49:53 +0000 (17:49 +0000)]
[InferFunctionAttrs] add tests for 'dereferenceable' argument attribute; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365227 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Update SSE1 MOVLPSrm and MOVHPSrm isel patterns to ensure loads are non-volatil...
Craig Topper [Fri, 5 Jul 2019 17:31:29 +0000 (17:31 +0000)]
[X86] Update SSE1 MOVLPSrm and MOVHPSrm isel patterns to ensure loads are non-volatile before folding.

These patterns use 128-bit loads, but the instructions only load
64-bits. We shouldn't narrow the load if its volatile.

Fixes another variant of PR42079

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365225 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Remove unnecessary isel pattern for MOVLPSmr.
Craig Topper [Fri, 5 Jul 2019 17:31:25 +0000 (17:31 +0000)]
[X86] Remove unnecessary isel pattern for MOVLPSmr.

This was identical to a pattern for MOVPQI2QImr with a bitcast
as an input. But we should be able to turn MOVPQI2QImr into
MOVLPSmr in the execution domain fixup pass so we shouldn't
need this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365224 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[NFC] A test commit to check the access permission. Removed a blank line.
Christudasan Devadasan [Fri, 5 Jul 2019 17:07:42 +0000 (17:07 +0000)]
[NFC] A test commit to check the access permission. Removed a blank line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365223 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[docs][llvm-readobj] Add a note to options that do nothing in GNU output
James Henderson [Fri, 5 Jul 2019 16:38:52 +0000 (16:38 +0000)]
[docs][llvm-readobj] Add a note to options that do nothing in GNU output

--section-data, --section-relocations and --section-symbols have no
effect for GNU style ouput. This patch changes the docs to point this
out, as it has caught me out on a couple of occasions.

See also https://bugs.llvm.org/show_bug.cgi?id=42522.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365221 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[FileCheck] Share variable instance among uses
Thomas Preud'homme [Fri, 5 Jul 2019 16:25:46 +0000 (16:25 +0000)]
[FileCheck] Share variable instance among uses

Summary:
This patch changes expression support to use one instance of
FileCheckNumericVariable per numeric variable rather than one per
variable and per definition. The current system was only necessary for
the last patch of the numeric expression support patch series in order
to handle a line using a variable defined earlier on the same line from
the input text. However this can be dealt more efficiently.

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64229

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365220 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[FileCheck] Don't diagnose undef vars at parse time
Thomas Preud'homme [Fri, 5 Jul 2019 16:25:33 +0000 (16:25 +0000)]
[FileCheck] Don't diagnose undef vars at parse time

Summary:
Diagnosing use of undefined variables takes place in
parseNumericVariableUse() and printSubstitutions() for numeric variables
but only takes place in printSubstitutions() for string variables. The
reason for the split location of diagnostics is that parsing is not
aware of the clearing of variables due to --enable-var-scope and thus
use of variables cleared in this way can only be catched by
printSubstitutions().

Beyond the code level inconsistency, there is also a user facing
inconsistency since diagnostics look different between the two
functions. While the diagnostic in printSubstitutions is more verbose,
doing the diagnostic there allows to diagnose all undefined variables
rather than just the first one and error out.

This patch create dummy variable definition when encountering a use of
undefined variable so that parsing can proceed and be diagnosed by
printSubstitutions() later. Tests that were testing whether parsing
fails in such case are thus modified accordingly.

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64228

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365219 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[AMDGPU] Added a new metadata for multi grid sync implicit argument
Yaxun Liu [Fri, 5 Jul 2019 16:05:17 +0000 (16:05 +0000)]
[AMDGPU] Added a new metadata for multi grid sync implicit argument

Patch by Christudasan Devadasan.

Differential Revision: https://reviews.llvm.org/D63886

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365217 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoScheduleDAG: Fix incorrectly killing registers in bundles
Matt Arsenault [Fri, 5 Jul 2019 15:32:28 +0000 (15:32 +0000)]
ScheduleDAG: Fix incorrectly killing registers in bundles

When looking for uses/defs to add kill flags, the iterator was double
incremented, skipping the first instruction in the bundle. The use
register in the first bundle instruction was then incorrectly killed.
The "First" instruction should be the BUNDLE itself as the proper
reverse iterator endpoint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365216 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ThinLTO] Attempt to recommit r365188 after alignment fix
Eugene Leviant [Fri, 5 Jul 2019 15:25:05 +0000 (15:25 +0000)]
[ThinLTO] Attempt to recommit r365188 after alignment fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365215 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] MVE patterns for VMVN, VORR and VBIC
David Green [Fri, 5 Jul 2019 15:21:29 +0000 (15:21 +0000)]
[ARM] MVE patterns for VMVN, VORR and VBIC

This add simple Q register forms of bitwise not instructions.

Differential Revision: https://reviews.llvm.org/D63983

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365214 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Merge r365203
Nico Weber [Fri, 5 Jul 2019 15:14:06 +0000 (15:14 +0000)]
gn build: Merge r365203

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365213 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[AMDGPU] DPP combiner: recognize identities for more opcodes
Jay Foad [Fri, 5 Jul 2019 14:52:48 +0000 (14:52 +0000)]
[AMDGPU] DPP combiner: recognize identities for more opcodes

Summary:
This allows the DPP combiner to kick in more often. For example the
exclusive scan generated by the atomic optimizer for a divergent atomic
add used to look like this:

        v_mov_b32_e32 v3, v1
        v_mov_b32_e32 v5, v1
        v_mov_b32_e32 v6, v1
        v_mov_b32_dpp v3, v2  wave_shr:1 row_mask:0xf bank_mask:0xf
        s_nop 1
        v_add_u32_dpp v4, v3, v3  row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:0
        v_mov_b32_dpp v5, v3  row_shr:2 row_mask:0xf bank_mask:0xf
        v_mov_b32_dpp v6, v3  row_shr:3 row_mask:0xf bank_mask:0xf
        v_add3_u32 v3, v4, v5, v6
        v_mov_b32_e32 v4, v1
        s_nop 1
        v_mov_b32_dpp v4, v3  row_shr:4 row_mask:0xf bank_mask:0xe
        v_add_u32_e32 v3, v3, v4
        v_mov_b32_e32 v4, v1
        s_nop 1
        v_mov_b32_dpp v4, v3  row_shr:8 row_mask:0xf bank_mask:0xc
        v_add_u32_e32 v3, v3, v4
        v_mov_b32_e32 v4, v1
        s_nop 1
        v_mov_b32_dpp v4, v3  row_bcast:15 row_mask:0xa bank_mask:0xf
        v_add_u32_e32 v3, v3, v4
        s_nop 1
        v_mov_b32_dpp v1, v3  row_bcast:31 row_mask:0xc bank_mask:0xf
        v_add_u32_e32 v1, v3, v1
        v_add_u32_e32 v1, v2, v1
        v_readlane_b32 s0, v1, 63

But now most of the dpp movs are combined into adds:

        v_mov_b32_e32 v3, v1
        v_mov_b32_e32 v5, v1
        s_nop 0
        v_mov_b32_dpp v3, v2  wave_shr:1 row_mask:0xf bank_mask:0xf
        s_nop 1
        v_add_u32_dpp v4, v3, v3  row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:0
        v_mov_b32_dpp v5, v3  row_shr:2 row_mask:0xf bank_mask:0xf
        v_mov_b32_dpp v1, v3  row_shr:3 row_mask:0xf bank_mask:0xf
        v_add3_u32 v1, v4, v5, v1
        s_nop 1
        v_add_u32_dpp v1, v1, v1  row_shr:4 row_mask:0xf bank_mask:0xe
        s_nop 1
        v_add_u32_dpp v1, v1, v1  row_shr:8 row_mask:0xf bank_mask:0xc
        s_nop 1
        v_add_u32_dpp v1, v1, v1  row_bcast:15 row_mask:0xa bank_mask:0xf
        s_nop 1
        v_add_u32_dpp v1, v1, v1  row_bcast:31 row_mask:0xc bank_mask:0xf
        v_add_u32_e32 v1, v2, v1
        v_readlane_b32 s0, v1, 63

Reviewers: arsenm, vpykhtin

Subscribers: kzhuravl, nemanjai, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kbarton, MaskRay, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64207

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365211 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoReverted r365188 due to alignment problems on i686-android
Eugene Leviant [Fri, 5 Jul 2019 13:26:05 +0000 (13:26 +0000)]
Reverted r365188 due to alignment problems on i686-android

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365206 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoScalable Vector IR Type with further LTO fixes
Graham Hunter [Fri, 5 Jul 2019 12:48:16 +0000 (12:48 +0000)]
Scalable Vector IR Type with further LTO fixes

Reintroduces the scalable vector IR type from D32530, after it was reverted
a couple of times due to increasing chromium LTO build times. This latest
incarnation removes the walk over aggregate types from the verifier entirely,
in favor of rejecting scalable vectors in the isValidElementType methods in
ArrayType and StructType. This removes the 70% degradation observed with
the second repro tarball from PR42210.

Reviewers: thakis, hans, rengolin, sdesmalen

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D64079

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365203 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoThis reverts r365061 and r365062 (test update)
Robert Lougher [Fri, 5 Jul 2019 12:42:06 +0000 (12:42 +0000)]
This reverts r365061 and r365062 (test update)

Revision r365061 changed a skip of debug instructions for a skip
of meta instructions. This is not safe, as IMPLICIT_DEF is classed
as a meta instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365202 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[RISCV] Support @llvm.readcyclecounter() Intrinsic
Sam Elliott [Fri, 5 Jul 2019 12:35:21 +0000 (12:35 +0000)]
[RISCV] Support @llvm.readcyclecounter() Intrinsic

On RISC-V, the `cycle` CSR holds a 64-bit count of the number of clock
cycles executed by the core, from an arbitrary point in the past. This
matches the intended semantics of `@llvm.readcyclecounter()`, which we
currently leave to the default lowering (to the constant 0).

With this patch, we will now correctly lower this intrinsic to the
intended semantics, using the user-space instruction `rdcycle`. On
64-bit targets, we can directly lower to this instruction.

On 32-bit targets, we need to do more, as `rdcycle` only returns the low
32-bits of the `cycle` CSR. In this case, we perform a custom lowering,
based on the PowerPC lowering, using `rdcycleh` to obtain the high
32-bits of the `cycle` CSR. This custom lowering inserts a new basic
block which detects overflow in the high 32-bits of the `cycle` CSR
during reading (because multiple instructions are required to read). The
emitted assembly matches the suggested assembly in the RISC-V
specification.

Differential Revision: https://reviews.llvm.org/D64125

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365201 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agolld, llvm-dlltool, llvm-lib: Use getAsString() instead of getSpelling() for printing...
Nico Weber [Fri, 5 Jul 2019 12:31:32 +0000 (12:31 +0000)]
lld, llvm-dlltool, llvm-lib: Use getAsString() instead of getSpelling() for printing unknown args

Since OPT_UNKNOWN args never have any values and consist only of
spelling (and are never aliased), this doesn't make any difference in
practice, but it's more consistent with Arg's guidance to use
getAsString() for diagnostics, and it matches what clang does.

Also tweak two tests to use an unknown option that contains '=' for
additional coverage while here. (The new tests pass fine with the old
code too though.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365200 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoRevert r365198 as this accidentally commited something that
Robert Lougher [Fri, 5 Jul 2019 12:30:45 +0000 (12:30 +0000)]
Revert r365198 as this accidentally commited something that
should not have been added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365199 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoThis reverts r365061 and r365062 (test update)
Robert Lougher [Fri, 5 Jul 2019 12:20:21 +0000 (12:20 +0000)]
This reverts r365061 and r365062 (test update)

Revision r365061 changed a skip of debug instructions for a skip
of meta instructions. This is not safe, as IMPLICIT_DEF is classed
as a meta instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365198 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[RISCV][NFC] Replace hard-coded CSR duplication with symbolic references
Sam Elliott [Fri, 5 Jul 2019 12:16:40 +0000 (12:16 +0000)]
[RISCV][NFC] Replace hard-coded CSR duplication with symbolic references

Reviewers: asb, lenary

Reviewed By: asb, lenary

Subscribers: MaskRay, hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64139

Patch by James Clarke (jrtc27)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365195 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoFix MSVC/cppcheck Use::Next isn't initialized warning. NFCI.
Simon Pilgrim [Fri, 5 Jul 2019 12:12:23 +0000 (12:12 +0000)]
Fix MSVC/cppcheck Use::Next isn't initialized warning. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365194 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[llvm-objcopy] Allow strip symtab from executables and DSOs
Eugene Leviant [Fri, 5 Jul 2019 12:10:44 +0000 (12:10 +0000)]
[llvm-objcopy] Allow strip symtab from executables and DSOs

Differential revision: https://reviews.llvm.org/D61672

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365193 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[FileCheck] Fix comment in parseNumericVariableUse
Thomas Preud'homme [Fri, 5 Jul 2019 12:01:12 +0000 (12:01 +0000)]
[FileCheck] Fix comment in parseNumericVariableUse

Summary:
Comment explaining the interaction between parsing of numeric variable
definition and uses in parseNumericVariableUse is stale since it
suggests both use and definition parsing is done in the same function.
This was the case in a previous version of the patch committed as
71d3f227a790d6cf39d8c6267940e0dc0c237e11 but is no longer the case. This
patch updates the comment accordingly.

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64227

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365192 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[FileCheck] Factor some parsing checks out
Thomas Preud'homme [Fri, 5 Jul 2019 12:01:06 +0000 (12:01 +0000)]
[FileCheck] Factor some parsing checks out

Summary:
Both callers of parseNumericVariableDefinition() perform the same extra
check that no character is found after the variable name. This patch
factors out this check into parseNumericVariableDefinition().

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64226

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365191 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[FileCheck] Add missing final dot in comment
Thomas Preud'homme [Fri, 5 Jul 2019 12:00:56 +0000 (12:00 +0000)]
[FileCheck] Add missing final dot in comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365190 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ThinLTO] Attempt to recommit r365040 after caching fix
Eugene Leviant [Fri, 5 Jul 2019 12:00:10 +0000 (12:00 +0000)]
[ThinLTO] Attempt to recommit r365040 after caching fix

It's possible that some function can load and store the same
variable using the same constant expression:

store %Derived* @foo, %Derived** bitcast (%Base** @bar to %Derived**)
%42 = load %Derived*, %Derived** bitcast (%Base** @bar to %Derived**)

The bitcast expression was mistakenly cached while processing loads,
and never examined later when processing store. This caused @bar to
be mistakenly treated as read-only variable. See load-store-caching.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365188 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[docs][llvm-objcopy] Improve some wording.
James Henderson [Fri, 5 Jul 2019 11:57:07 +0000 (11:57 +0000)]
[docs][llvm-objcopy] Improve some wording.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365187 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoMake joined instances of JoinedOrSeparate flags point to the unaliased args, like...
Nico Weber [Fri, 5 Jul 2019 11:45:24 +0000 (11:45 +0000)]
Make joined instances of JoinedOrSeparate flags point to the unaliased args, like all other arg types do

This fixes an 8-year-old regression. r105763 made it so that aliases
always refer to the unaliased option – but it missed the "joined" branch
of JoinedOrSeparate flags. (r162231 then made the Args classes
non-virtual, and r169344 moved them from clang to llvm.)

Back then, there was no JoinedOrSeparate flag that was an alias, so it
wasn't observable. Now /U in CLCompatOptions is a JoinedOrSeparate alias
in clang, and warn_slash_u_filename incorrectly used the aliased arg id
(using the unaliased one isn't really a regression since that warning
checks if the undefined macro contains slash or backslash and only then
emits the warning – and no valid use will pass "-Ufoo/bar" or similar).

Also, lld has many JoinedOrSeparate aliases, and due to this bug it had
to explicitly call `getUnaliasedOption()` in a bunch of places, even
though that shouldn't be necessary by design. After this fix in Option,
these calls really don't have an effect any more, so remove them.

No intended behavior change.

(I accidentally fixed this bug while working on PR29106 but then
wondered why the warn_slash_u_filename broke. When I figured it out, I
thought it would make sense to land this in a separate commit.)

Differential Revision: https://reviews.llvm.org/D64156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365186 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Merge r365179
Nico Weber [Fri, 5 Jul 2019 11:34:48 +0000 (11:34 +0000)]
gn build: Merge r365179

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365185 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[Object/ELF.h] - Improve error reporting.
George Rimar [Fri, 5 Jul 2019 11:28:49 +0000 (11:28 +0000)]
[Object/ELF.h] - Improve error reporting.

The errors coming from ELF.h are usually not very
useful because they are uninformative. This patch is a
first step to improve the situation.

I tested this patch with a run of check-llvm and found
that few messages are untested. In this patch, I did not
add more tests but marked all such cases with a "TODO" comment.

For all tested messages I extended the error text to
provide more details (see test cases changed).

Differential revision: https://reviews.llvm.org/D64014

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365183 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agolld-link: Make /debugtype: option work better
Nico Weber [Fri, 5 Jul 2019 11:28:31 +0000 (11:28 +0000)]
lld-link: Make /debugtype: option work better

- The code tried to pass false to split()'s KeepEmpty parameter, but
  instead passed it to MaxSplit. As a result, it would never split on
  commas. This has been broken since the flag was added in r278056.

- The code used getSpelling() for getting the argument's values, but
  getSpelling() always returns the `/debugtype:` prefix without any
  values. So if any /debugtype: flag was passed, it always resulted in
  an "unknown option:" warning. (The warning code then used the correct
  getValue() for printing the invalid option, so the warning looked
  kind of like it made sense.) This regressed in r342894.

Slightly improve the test coverage of this feature (but since I don't
know what this flag actually does, there's still no test for the correct
semantics), and add a comment to getSpelling() explaining what it does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365182 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86][SSE] LowerINSERT_VECTOR_ELT - early out for out of range indices
Simon Pilgrim [Fri, 5 Jul 2019 10:34:53 +0000 (10:34 +0000)]
[X86][SSE] LowerINSERT_VECTOR_ELT - early out for out of range indices

Fixes OSS-Fuzz #15662

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365180 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] MVE VMOV immediate handling
David Green [Fri, 5 Jul 2019 10:02:43 +0000 (10:02 +0000)]
[ARM] MVE VMOV immediate handling

This adds some handling for VMOVimm, using the same method that NEON uses. We
create VMOVIMM/VMVNIMM/VMOVFPIMM nodes based on the immediate, and select them
using the now renamed ARMvmovImm/etc. There is also an extra 64bit immediate
mode that I have not yet added here.

Code by David Sherwood

Differential Revision: https://reviews.llvm.org/D63884

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365178 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] MVE fp to int conversions
David Green [Fri, 5 Jul 2019 09:34:30 +0000 (09:34 +0000)]
[ARM] MVE fp to int conversions

This adds the patterns needed for fptosi and sitofp.

Differential Revision: https://reviews.llvm.org/D63729

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365176 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[RISCV] Delete a ctor that is commented out. NFC
Fangrui Song [Fri, 5 Jul 2019 08:25:14 +0000 (08:25 +0000)]
[RISCV] Delete a ctor that is commented out. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365175 91177308-0d34-0410-b5e6-96231b3b80d8