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Evgeniy Stepanov [Mon, 24 Apr 2017 19:34:13 +0000 (19:34 +0000)]
[asan] Let the frontend disable gc-sections optimization for asan globals.
Also extend -asan-globals-live-support flag to all binary formats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301226
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Mandeep Singh Grang [Mon, 24 Apr 2017 19:20:45 +0000 (19:20 +0000)]
[SimplifyCFG] Fix for non-determinism in codegen
Summary: This patch fixes issues in codegen uncovered due to https://reviews.llvm.org/D26718
Reviewers: majnemer, chenli, davide
Reviewed By: davide
Subscribers: davide, arsenm, llvm-commits
Differential Revision: https://reviews.llvm.org/D26726
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301222
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Krzysztof Parzyszek [Mon, 24 Apr 2017 18:55:33 +0000 (18:55 +0000)]
Move size and alignment information of regclass to TargetRegisterInfo
1. RegisterClass::getSize() is split into two functions:
- TargetRegisterInfo::getRegSizeInBits(const TargetRegisterClass &RC) const;
- TargetRegisterInfo::getSpillSize(const TargetRegisterClass &RC) const;
2. RegisterClass::getAlignment() is replaced by:
- TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass &RC) const;
This will allow making those values depend on subtarget features in the
future.
Differential Revision: https://reviews.llvm.org/D31783
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301221
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Dimitry Andric [Mon, 24 Apr 2017 18:54:48 +0000 (18:54 +0000)]
Don't test setting sticky bits on files for modern BSDs
Summary: In rL297945, jhenderson added methods for setting permissions
to sys::fs, but some of the unittests that attempt to set sticky bits
(01000) on files fail on modern BSDs, such as FreeBSD, NetBSD and
OpenBSD. This is because those systems do not allow regular users to
set sticky bits on files, only on directories. Fix it by disabling
these particular tests on modern BSDs.
Reviewers: emaste, brad, jhenderson
Reviewed By: jhenderson
Subscribers: joerg, krytarowski, llvm-commits
Differential Revision: https://reviews.llvm.org/D32120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301220
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Adrian Prantl [Mon, 24 Apr 2017 18:45:59 +0000 (18:45 +0000)]
Don't emit CFI instructions at the end of a function
When functions are terminated by unreachable instructions, the last
instruction might trigger a CFI instruction to be generated. However,
emitting it would be be illegal since the function (and thus the FDE
the CFI is in) has already ended with the previous instruction.
Darwin's dwarfdump --verify --eh-frame complains about this and the
specification supports this.
Relevant bits from the DWARF 5 standard (6.4 Call Frame Information):
"[The] address_range [field in an FDE]: The number of bytes of
program instructions described by this entry."
"Row creation instructions: [...]
The new location value is always greater than the current one."
The first quotation implies that a CFI cannot describe a target
address outside of the enclosing FDE's range.
rdar://problem/
26244988
Differential Revision: https://reviews.llvm.org/D32246
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301219
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George Karpenkov [Mon, 24 Apr 2017 18:39:52 +0000 (18:39 +0000)]
Updates documentation for a syntax sugar libfuzzer flag,
as implemented in https://reviews.llvm.org/D32193
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301217
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Yaxun Liu [Mon, 24 Apr 2017 18:26:27 +0000 (18:26 +0000)]
CodeGen: Add a hook for getFenceOperandTy
Currently the operand type for ATOMIC_FENCE assumes value type of a pointer in address space 0.
This is fine for most targets. However for amdgcn target, the size of pointer in address space 0
depends on triple environment. For amdgiz environment, it is 64 bit but for other environment it is
32 bit. On the other hand, amdgcn target expects 32 bit fence operands independent of the target
triple environment. Therefore a hook is need in target lowering for getting the fence operand type.
This patch has no effect on targets other than amdgcn.
Differential Revision: https://reviews.llvm.org/D32186
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301215
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Evgeniy Stepanov [Mon, 24 Apr 2017 18:25:07 +0000 (18:25 +0000)]
Revert "Compute safety information in a much finer granularity."
Use-after-free in llvm::isGuaranteedToExecute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301214
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Sanjay Patel [Mon, 24 Apr 2017 18:24:36 +0000 (18:24 +0000)]
[InstSimplify] move (A & ~B) | (A ^ B) -> (A ^ B) from InstCombine
This is a straight cut and paste, but there's a bigger problem: if this
fold exists for simplifyOr, there should be a DeMorganized version for
simplifyAnd. But more than that, we have a patchwork of ad hoc logic
optimizations in InstCombine. There should be some structure to ensure
that we're not missing sibling folds across and/or/xor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301213
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Matthias Braun [Mon, 24 Apr 2017 18:15:00 +0000 (18:15 +0000)]
X86RegisterInfo: eliminateFrameIndex: Avoid code duplication; NFC
Re-Commit of r300922 and r300923 with less aggressive assert (see
discussion at the end of https://reviews.llvm.org/D32205)
X86RegisterInfo::eliminateFrameIndex() and
X86FrameLowering::getFrameIndexReference() both had logic to compute the
base register. This consolidates the code.
Also use MachineInstr::isReturn instead of manually enumerating tail
call instructions (return instructions were not included in the previous
list because they never reference frame indexes).
Differential Revision: https://reviews.llvm.org/D32206
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301211
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Adrian Prantl [Mon, 24 Apr 2017 18:11:42 +0000 (18:11 +0000)]
Use DW_OP_stack_value when reconstructing variable values with arithmetic.
When the location description of a source variable involves arithmetic
on the value itself, it needs to be marked with DW_OP_stack_value since it
is not describing the variable's location, but rather its value.
This is a follow-up to r297971 and fixes the source testcase quoted in
the comment in debuginfo-dce.ll.
rdar://problem/
30725338
This reapplies r301093 without modifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301210
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Adrian Prantl [Mon, 24 Apr 2017 18:11:38 +0000 (18:11 +0000)]
Add a testcase for DIExpression(DW_OP_stack_value)
and relax the assertion that prohibited its emission.
This fixes the assertion failure uncovered by r301093.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301209
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Matt Arsenault [Mon, 24 Apr 2017 18:05:16 +0000 (18:05 +0000)]
AMDGPU: Add StackPtr and FramePtr registers to MFI
These will be necessary for setting up call sequences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301208
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Matt Arsenault [Mon, 24 Apr 2017 17:49:13 +0000 (17:49 +0000)]
AMDGPU: Move trap lowering to DAG
Fixes traps in any block besides the entry block,
and fixes depending on a live-in physical register
by using a virtual register copy.
Also happens to stop emitting a nop in the case
debug trap is not supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301206
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Davide Italiano [Mon, 24 Apr 2017 17:48:44 +0000 (17:48 +0000)]
[DomPrinter] Add a way to programmatically dump a dot representation.
Differential Revision: https://reviews.llvm.org/D32145
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301205
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Zachary Turner [Mon, 24 Apr 2017 17:47:52 +0000 (17:47 +0000)]
[llvm-pdbdump] Merge functionality of graphical and text dumpers.
The *real* difference between these two was that
a) The "graphical" dumper could recurse, while the text one could
not.
b) The "text" dumper could display nested types and functions,
while the graphical one could not.
Merge these two so that there is only one dumper that can recurse
arbitrarily deep and optionally display nested types or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301204
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Zachary Turner [Mon, 24 Apr 2017 17:47:24 +0000 (17:47 +0000)]
[llvm-pdbdump] Re-write the record layout code to be more resilient.
This reworks the way virtual bases are handled, and also the way
padding is detected across multiple levels of aggregates, producing
a much more accurate result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301203
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Craig Topper [Mon, 24 Apr 2017 17:37:10 +0000 (17:37 +0000)]
[APInt] Simplify the zext and sext methods
This replaces a hand written copy loop with a call to memcpy for both zext and sext.
For sext, it replaces multiple if/else blocks propagating sign information forward. Now we just do a copy, a sign extension on the last copied word, a memset, and clearUnusedBits.
Differential Revision: https://reviews.llvm.org/D32417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301201
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George Karpenkov [Mon, 24 Apr 2017 17:28:32 +0000 (17:28 +0000)]
Testing commit credentials
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301200
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Matt Arsenault [Mon, 24 Apr 2017 17:24:37 +0000 (17:24 +0000)]
InstCombine: Fix assert when reassociating fsub with undef
There is logic to track the expected number of instructions
produced. It thought in this case an instruction would
be necessary to negate the result, but here it folded
into a ConstantExpr fneg when the non-undef value operand
was cancelled out by the second fsub.
I'm not sure why we don't fold constant FP ops with undef currently,
but I think that would also avoid this problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301199
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Craig Topper [Mon, 24 Apr 2017 17:18:47 +0000 (17:18 +0000)]
[APInt] Add ashrInPlace method and rewrite ashr to make a copy and then call ashrInPlace.
This patch adds an in place version of ashr to match lshr and shl which were recently added.
I've tried to make this similar to the lshr code with additions to handle the sign extension. I've also tried to do this with less if checks than the current ashr code by sign extending the original result to a word boundary before doing any of the shifting. This removes a lot of the complexity of determining where to fill in sign bits after the shifting.
Differential Revision: https://reviews.llvm.org/D32415
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301198
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Nicolai Haehnle [Mon, 24 Apr 2017 17:17:36 +0000 (17:17 +0000)]
AMDGPU: Move v_readlane lane select from VGPR to SGPR
Summary:
Fix a compiler bug when the lane select happens to end up in a VGPR.
Clarify the semantic of the corresponding intrinsic to be that of
the corresponding GLSL: the lane select must be uniform across a
wave front, otherwise results are undefined.
Reviewers: arsenm
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D32343
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301197
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Xin Tong [Mon, 24 Apr 2017 17:12:22 +0000 (17:12 +0000)]
Compute safety information in a much finer granularity.
Summary:
Instead of keeping a variable indicating whether there are early exits
in the loop. We keep all the early exits. This improves LICM's ability to
move instructions out of the loop based on is-guaranteed-to-execute.
I am going to update compilation time as well soon.
Reviewers: hfinkel, sanjoy, efriedma, mkuper
Reviewed By: hfinkel
Subscribers: llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D32433
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301196
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Nicolai Haehnle [Mon, 24 Apr 2017 17:08:43 +0000 (17:08 +0000)]
InstCombine/AMDGPU: Fix constant folding of llvm.amdgcn.{icmp,fcmp}
Summary:
The return value of these intrinsics should always have 0 bits for
inactive threads. This means that when all arguments are constant
and the comparison evaluates to true, the intrinsic should return
the current exec mask.
Fixes some GL_ARB_shader_ballot tests.
Reviewers: arsenm
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D32344
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301195
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Igor Breger [Mon, 24 Apr 2017 17:05:52 +0000 (17:05 +0000)]
[GlobalISel][X86] Lower FormalArgument/Ret using G_MERGE_VALUES/G_UNMERGE_VALUES.
Summary: [GlobalISel][X86] Lower FormalArgument/Ret using G_MERGE_VALUES/G_UNMERGE_VALUES.
Reviewers: zvi, t.p.northover, guyblank
Reviewed By: t.p.northover
Subscribers: dberris, rovka, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D32288
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301194
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Simon Pilgrim [Mon, 24 Apr 2017 17:05:14 +0000 (17:05 +0000)]
[DAGCombiner] Updated bswap byte offset variable names to be more descriptive. NFC
As discussed on D32039, use MaskByteOffset to describe the variable and also pull out repeated getOpcode() calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301193
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Craig Topper [Mon, 24 Apr 2017 17:00:22 +0000 (17:00 +0000)]
[APInt] Fix repeated word in comments. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301192
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Nicolai Haehnle [Mon, 24 Apr 2017 16:53:52 +0000 (16:53 +0000)]
AMDGPU: Fix crash when scheduling non-memory SMRD instructions
Summary: Fixes piglit spec/arb_shader_clock/execution/*
Reviewers: arsenm
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D32345
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301191
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Nirav Dave [Mon, 24 Apr 2017 15:37:20 +0000 (15:37 +0000)]
[SDAG] Teach Chain Analysis about BaseIndexOffset addressing.
While we use BaseIndexOffset in FindBetterNeighborChains to
appropriately realize they're almost the same address and should be
improved concurrently we do not use it in isAlias using the non-index
understanding FindBaseOffset instead. Adding a BaseIndexOffset check
in isAlias like should allow indexed stores to be merged.
FindBaseOffset to be excised in subsequent patch.
Reviewers: jyknight, aditya_nandakumar, bogner
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31987
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301187
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Simon Pilgrim [Mon, 24 Apr 2017 14:26:30 +0000 (14:26 +0000)]
[X86][AVX] Add scheduling latency/throughput tests for missing AVX1 instructions
Had to split btver2/znver1 checks as only btver2 suppresses zeroupper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301181
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Jonas Paulsson [Mon, 24 Apr 2017 12:40:28 +0000 (12:40 +0000)]
[SystemZ] Update kill-flag in splitMove().
EarlierMI needs to clear the kill flag on the first operand in case of a store.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301177
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Renato Golin [Mon, 24 Apr 2017 12:37:11 +0000 (12:37 +0000)]
[DWARF] Move test to x86 directory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301176
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Philip Pfaffe [Mon, 24 Apr 2017 11:54:37 +0000 (11:54 +0000)]
[RegionInfo] Fix dangling references created by moving RegionInfo objects
Summary: Region objects capture the address of the creating RegionInfo instance. Because the RegionInfo class is movable, moving a RegionInfo object creates dangling references. This patch fixes these references by walking the Regions post-move, and updating references to the new parent.
Reviewers: Meinersbur, grosser
Reviewed By: Meinersbur, grosser
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31719
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301175
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Ismail Donmez [Mon, 24 Apr 2017 11:18:29 +0000 (11:18 +0000)]
Add SUSE vendor
Summary: SUSE's ARM triples end with -gnueabi even though they are hard-float. This requires special handling of SUSE ARM triples. Hence we need a way to differentiate the SUSE as vendor. This CL adds that.
Reviewers: chandlerc, compnerd, echristo, rengolin
Reviewed By: rengolin
Subscribers: aemerson, rengolin, llvm-commits
Differential Revision: https://reviews.llvm.org/D32426
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301174
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Nitesh Jain [Mon, 24 Apr 2017 10:36:46 +0000 (10:36 +0000)]
[LLVM][MIPS] Fix different definition of off_t in LLDB and LLVM.
Reviewers: beanz
Subscribers: jaydeep, bhushan, lldb-commits, slthakur, llvm-commits, krytarowski, emaste
Differential Revision: https://reviews.llvm.org/D32125
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301171
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George Rimar [Mon, 24 Apr 2017 10:19:45 +0000 (10:19 +0000)]
[DWARF] - Take relocations in account when extracting ranges from .debug_ranges
I found this when investigated "Bug 32319 - .gdb_index is broken/incomplete" for LLD.
When we have object file with .debug_ranges section it may be filled with zeroes.
Relocations are exist in file to relocate this zeroes into real values later, but until that
a pair of zeroes is treated as terminator. And DWARF parser thinks there is no ranges at all
when I am trying to collect address ranges for building .gdb_index.
Solution implemented in this patch is to take relocations in account when parsing ranges.
Differential revision: https://reviews.llvm.org/D32228
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301170
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Diana Picus [Mon, 24 Apr 2017 09:12:19 +0000 (09:12 +0000)]
[ARM] GlobalISel: Legalize s8 and s16 G_(S|U)DIV
We have to widen the operands to 32 bits and then we can either use
hardware division if it is available or lower to a libcall otherwise.
At the moment it is not enough to set the Legalizer action to
WidenScalar, since for libcalls it won't know what to do (it won't be
able to find what size to widen to, because it will find Libcall and not
Legal for 32 bits). To hack around this limitation, we request Custom
lowering, and as part of that we widen first and then we run another
legalizeInstrStep on the widened DIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301166
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Sjoerd Meijer [Mon, 24 Apr 2017 08:22:20 +0000 (08:22 +0000)]
[Arch64AsmParser] better diagnostic for isb
Instruction isb takes as an operand either 'sy' or an immediate value. This
improves the diagnostic when the string is not 'sy' and adds a test case for
this which was missing. This also adds tests to check invalid inputs for dsb
and dmb.
Differential Revision: https://reviews.llvm.org/D32227
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301165
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Diana Picus [Mon, 24 Apr 2017 08:20:05 +0000 (08:20 +0000)]
[ARM] GlobalISel: Support G_(S|U)DIV for s32
Add support for both targets with hardware division and without. For
hardware division we have to add support throughout the pipeline
(legalizer, reg bank select, instruction select). For targets without
hardware division, we only need to mark it as a libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301164
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Diana Picus [Mon, 24 Apr 2017 07:22:31 +0000 (07:22 +0000)]
[GlobalISel] Legalize G_(S|U)DIV libcalls
Treat them the same as the other binary operations that we have so far,
but on integers rather than floating point types. Extract the common
code into a helper.
This will be used in the ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301163
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Diana Picus [Mon, 24 Apr 2017 06:30:56 +0000 (06:30 +0000)]
[ARM] GlobalISel: Select G_CONSTANT with CImm operands
When selecting a G_CONSTANT to a MOVi, we need the value to be an Imm
operand. We used to just leave the G_CONSTANT operand unchanged, which
works in some cases (such as the GEP offsets that we create when
referring to stack slots). However, in many other places the G_CONSTANTs
are created with CImm operands. This patch makes sure to handle those as
well, and to error out gracefully if in the end we don't end up with an
Imm operand.
Thanks to Oliver Stannard for reporting this issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301162
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Dean Michael Berris [Mon, 24 Apr 2017 06:15:53 +0000 (06:15 +0000)]
[XRay][tools] Fixup for pedantic and permissive errors/warnings
Remove extraneous semicolons and fully qualify the Trace type.
Follow-up to D29320.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301161
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Dean Michael Berris [Mon, 24 Apr 2017 05:54:33 +0000 (05:54 +0000)]
[XRay] A tool for Comparing xray function call graphs
Summary:
This is a tool for comparing the function graphs produced by the
llvm-xray graph too. It takes the form of a new subcommand of the
llvm-xray tool 'graph-diff'.
This initial version of the patch is very rough, but it is close to
feature complete.
Depends on D29363
Reviewers: dblaikie, dberris
Reviewed By: dberris
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D29320
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301160
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Craig Topper [Mon, 24 Apr 2017 05:38:26 +0000 (05:38 +0000)]
[APInt] Make behavior of ashr by BitWidth consistent between single and multi word.
Previously single word would always return 0 regardless of the original sign. Multi word would return all 0s or all 1s based on the original sign. Now single word takes into account the sign as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301159
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Frederich Munch [Mon, 24 Apr 2017 03:33:30 +0000 (03:33 +0000)]
Revert "Refactor DynamicLibrary so searching for a symbol will have a defined order.”
The changes are causing the i686-mingw32 build to fail.
This reverts commit r301153, and the changes for a separate warning on i686-mingw32 in r301155 and r301156.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301157
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Frederich Munch [Mon, 24 Apr 2017 03:12:16 +0000 (03:12 +0000)]
Fix warning converting from boolean to pointer introduced in r301153.
This reverts commit r301155, which was incorrect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301156
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Frederich Munch [Mon, 24 Apr 2017 02:51:40 +0000 (02:51 +0000)]
Fix warning converting from void* to boolean introduced in r301153.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301155
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Sanjoy Das [Mon, 24 Apr 2017 02:35:19 +0000 (02:35 +0000)]
Revert "[SCEV] Enable SCEV verification by default in EXPENSIVE_CHECKS builds"
This reverts commit r301150. It breaks CodeGen/Hexagon/hwloop-wrap2.ll, reverting
while I investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301154
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Frederich Munch [Mon, 24 Apr 2017 02:30:12 +0000 (02:30 +0000)]
Refactor DynamicLibrary so searching for a symbol will have a defined order and
libraries are properly unloaded when llvm_shutdown is called.
Summary:
This was mostly affecting usage of the JIT, where storing the library handles in
a set made iteration unordered/undefined. This lead to disagreement between the
JIT and native code as to what the address and implementation of particularly on
Windows with stdlib functions:
JIT: putenv_s("TEST", "VALUE") // called msvcrt.dll, putenv_s
JIT: getenv("TEST") -> "VALUE" // called msvcrt.dll, getenv
Native: getenv("TEST") -> NULL // called ucrt.dll, getenv
Also fixed is the issue of DynamicLibrary::getPermanentLibrary(0,0) on Windows
not giving priority to the process' symbols as it did on Unix.
Reviewers: chapuni, v.g.vassilev, lhames
Reviewed By: lhames
Subscribers: danalbert, srhines, mgorny, vsk, llvm-commits
Differential Revision: https://reviews.llvm.org/D30107
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301153
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Lang Hames [Mon, 24 Apr 2017 01:21:23 +0000 (01:21 +0000)]
[Orc] Fix a warning by removing an unused lambda capture.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301152
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Sanjoy Das [Mon, 24 Apr 2017 00:46:40 +0000 (00:46 +0000)]
Fix unused variables / fields warnings in release builds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301151
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Sanjoy Das [Mon, 24 Apr 2017 00:41:58 +0000 (00:41 +0000)]
[SCEV] Enable SCEV verification by default in EXPENSIVE_CHECKS builds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301150
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Sanjoy Das [Mon, 24 Apr 2017 00:09:46 +0000 (00:09 +0000)]
[SCEV] Fix exponential time complexity by caching
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301149
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Xinliang David Li [Sun, 23 Apr 2017 23:39:04 +0000 (23:39 +0000)]
[PartialInine]: add triaging options
There are more bugs (runtime failures) triggered when partial
inlining is turned on. Add options to help triaging problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301148
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Lang Hames [Sun, 23 Apr 2017 23:36:13 +0000 (23:36 +0000)]
[Orc] Use recursive mutexes for Error serialization.
Errors can be nested, so we need recursive locking for serialization /
deserialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301147
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Sanjoy Das [Sun, 23 Apr 2017 23:04:45 +0000 (23:04 +0000)]
[SCEV] Move towards a verifier without false positives
This change reboots SCEV's current (off by default) verification logic
to avoid false failures. Instead of stringifying trip counts, it maps
old and new trip counts to the same ScalarEvolution "universe" and
asks ScalarEvolution to compute the difference between them. If the
difference comes out to be a non-zero constant, then (barring some
corner cases) we *know* we messed up.
I've not yet enabled this by default since it hits an exponential time
issue in SCEV, but once I fix that, I'll flip it on by default in
EXPENSIVE_CHECKS builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301146
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Simon Pilgrim [Sun, 23 Apr 2017 22:08:17 +0000 (22:08 +0000)]
[X86][AVX] Add scheduling latency/throughput tests for some AVX1 instructions
More instructions will be added in future commits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301145
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Sanjay Patel [Sun, 23 Apr 2017 22:00:02 +0000 (22:00 +0000)]
[InstCombine] add/move folds for [not]-xor
We handled all of the commuted variants for plain xor already,
although they were scattered around and sometimes folded less
efficiently using distributive laws. We had no folds for not-xor.
Handling all of these patterns consistently is part of trying to
reinstate:
https://reviews.llvm.org/rL300977
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301144
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Xinliang David Li [Sun, 23 Apr 2017 21:40:58 +0000 (21:40 +0000)]
[PartialInlining] Add optimization remark support
Differential Revision: http://reviews.llvm.org/D32387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301143
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Simon Pilgrim [Sun, 23 Apr 2017 21:23:27 +0000 (21:23 +0000)]
[X86][SSE] Add scheduler class support for SSE42 (PCMPGT) instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301142
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Simon Pilgrim [Sun, 23 Apr 2017 21:00:25 +0000 (21:00 +0000)]
[X86][SSE] Add scheduling latency/throughput tests for (most) SSE42 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301141
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Sanjay Patel [Sun, 23 Apr 2017 20:59:00 +0000 (20:59 +0000)]
[InstCombine] add tests for not-xor and remove redundant tests; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301140
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Xin Tong [Sun, 23 Apr 2017 20:56:29 +0000 (20:56 +0000)]
[JumpThread] We want to fold (not thread) when all predecessor go to single BB's successor.
Summary:
In case all predecessor go to a single successor of current BB. We want to fold (not thread).
I failed to update the phi nodes properly in the last patch https://reviews.llvm.org/rL300657.
Phi nodes values are per predecessor in LLVM.
Reviewers: sanjoy
Reviewed By: sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32400
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301139
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Simon Pilgrim [Sun, 23 Apr 2017 20:05:21 +0000 (20:05 +0000)]
[X86][SSE] Add scheduling latency/throughput tests for (most) SSE41 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301137
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Simon Pilgrim [Sun, 23 Apr 2017 19:56:49 +0000 (19:56 +0000)]
[X86][SSE] Add missing scheduling latency/throughput test for PINSRW
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301136
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Xin Tong [Sun, 23 Apr 2017 17:36:25 +0000 (17:36 +0000)]
Correct grammar. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301135
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Craig Topper [Sun, 23 Apr 2017 17:16:26 +0000 (17:16 +0000)]
[APInt] Make clearUnusedBits branch free.
This makes the WordBits calculation calculate a value between 1 and 64 for the number of bits in the last word. Previously if the BitWidth was a multiple of 64 bits the WordBits value was 0 and we had to bail out early to avoid an undefined shift. Now with a value of 64 we no longer have an undefined shift issue.
This shows a 15-16k reduction in the size of the opt binary on my local x86-64 build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301134
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Craig Topper [Sun, 23 Apr 2017 17:16:24 +0000 (17:16 +0000)]
[APInt] In sext single word case, use SignExtend64 and let the APInt constructor mask off any excess bits.
The current code is trying to be clever with shifts to avoid needing to clear unused bits. But it looks like the compiler is unable to optimize out the unused bit handling in the APInt constructor. Given this its better to just use SignExtend64 and have more readable code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301133
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Sanjay Patel [Sun, 23 Apr 2017 16:37:36 +0000 (16:37 +0000)]
[InstCombine] add tests for or-to-xor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301131
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Sanjay Patel [Sun, 23 Apr 2017 16:03:00 +0000 (16:03 +0000)]
[InstCombine] add pattern matches for commuted variants of xor-to-xor
There's probably some better way to write this that eliminates the
code duplication without hurting readability, but at least this
eliminates the logic holes and is hopefully slightly more efficient
than creating new instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301129
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Sanjay Patel [Sun, 23 Apr 2017 14:51:03 +0000 (14:51 +0000)]
[InstCombine] add tests for xor-to-xor; NFC
Besides missing 2 commuted patterns, the way we handle these folds is inefficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301128
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Simon Pilgrim [Sun, 23 Apr 2017 14:01:55 +0000 (14:01 +0000)]
[X86][SSE] Add scheduling latency/throughput tests for SSSE3 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301127
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Simon Pilgrim [Sun, 23 Apr 2017 13:59:29 +0000 (13:59 +0000)]
[X86][SSE] Add scheduling latency/throughput tests for SSE3 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301126
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Sanjay Patel [Sun, 23 Apr 2017 13:37:05 +0000 (13:37 +0000)]
[InstCombine] add tests for add-to-xor commuted variants; NFC
1 out of the 4 tests commuted the operands, so there's an asymmetry
somewhere under this in how we handle these transforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301125
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Renato Golin [Sun, 23 Apr 2017 12:15:30 +0000 (12:15 +0000)]
Revert "[APInt] Fix a few places that use APInt::getRawData to operate within the normal API."
This reverts commit r301105, 4, 3 and 1, as a follow up of the previous
revert, which broke even more bots.
For reference:
Revert "[APInt] Use operator<<= where possible. NFC"
Revert "[APInt] Use operator<<= instead of shl where possible. NFC"
Revert "[APInt] Use ashInPlace where possible."
PR32754.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301111
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Renato Golin [Sun, 23 Apr 2017 12:02:07 +0000 (12:02 +0000)]
Revert "[APInt] Add ashrInPlace method and implement ashr using it. Also fix a bug in the shift by BitWidth handling."
This reverts commit r301094, as it broke all ARM self-hosting bots.
PR32754.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301110
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Ayman Musa [Sun, 23 Apr 2017 08:28:42 +0000 (08:28 +0000)]
[X86][MPX] Add load & store instructions of bnd values to getLoadStoreRegOpcode function.
This is needed for a follow up patch that generates the memory folding tables.
Differential Revision: https://reviews.llvm.org/D32232
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301109
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Ayman Musa [Sun, 23 Apr 2017 07:41:40 +0000 (07:41 +0000)]
[X86] Convert test checks to generated checks of update_llc_test_checks.py. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301107
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Artyom Skrobov [Sun, 23 Apr 2017 06:58:08 +0000 (06:58 +0000)]
[ARM] ScheduleDAGRRList::DelayForLiveRegsBottomUp must consider OptionalDefs
Summary:
D30400 has enabled tADC and tSBC instructions to be unglued, thereby allowing CPSR to remain live between Thumb1 scheduling units.
Most Thumb1 instructions have an OptionalDef for CPSR; but the scheduler ignored the OptionalDefs, and could unwittingly insert a flag-setting instruction in between an ADDS and the corresponding ADC.
Reviewers: javed.absar, atrick, MatzeB, t.p.northover, jmolloy, rengolin
Reviewed By: javed.absar
Subscribers: rogfer01, efriedma, aemerson, rengolin, llvm-commits, MatzeB
Differential Revision: https://reviews.llvm.org/D31081
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301106
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Craig Topper [Sun, 23 Apr 2017 06:41:11 +0000 (06:41 +0000)]
[APInt] Fix a few places that use APInt::getRawData to operate within the normal API.
getRawData exposes the internal type of the APInt class directly to its users. Ideally we wouldn't expose such an implementation detail.
This patch fixes a few of the easy cases by using truncate, extract, or a rotate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301105
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Craig Topper [Sun, 23 Apr 2017 05:43:02 +0000 (05:43 +0000)]
[APInt] Use operator<<= where possible. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301104
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Craig Topper [Sun, 23 Apr 2017 05:18:31 +0000 (05:18 +0000)]
[APInt] Use operator<<= instead of shl where possible. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301103
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Davide Italiano [Sun, 23 Apr 2017 04:49:34 +0000 (04:49 +0000)]
[ThinLTO/Summary] Rename anonymous globals as last action ...
... in the per-TU -O0 pipeline.
The problem is that there could be passes registered using
`addExtensionsToPM()` introducing unnamed globals.
Asan is an example, but there may be others. Building cppcheck
with `-flto=thin` and `-fsanitize=address` triggers an assertion
while we're reading bitcode (in lib/LTO), as the BitcodeReader
assumes there are no unnamed globals (because the namer has run).
Unfortunately I wasn't able to find an easy way to test this.
I added a comment in the hope nobody moves this again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301102
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Craig Topper [Sun, 23 Apr 2017 03:45:59 +0000 (03:45 +0000)]
[APInt] Use ashInPlace where possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301101
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Adrian Prantl [Sun, 23 Apr 2017 00:44:40 +0000 (00:44 +0000)]
Revert "Use DW_OP_stack_value when reconstructing variable values with arithmetic."
This reverts commit r301093 while investigating stage2 bot breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301099
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Jonathan Roelofs [Sat, 22 Apr 2017 23:43:44 +0000 (23:43 +0000)]
Fix testcase: s/CHECKNEXT/CHECK-NEXT/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301098
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Sanjay Patel [Sat, 22 Apr 2017 23:36:47 +0000 (23:36 +0000)]
[InstCombine] clean up tests and regenerate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301097
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Craig Topper [Sat, 22 Apr 2017 22:00:03 +0000 (22:00 +0000)]
[APInt] Add ashrInPlace method and implement ashr using it. Also fix a bug in the shift by BitWidth handling.
For single word, shift by BitWidth was always returning 0, but for multiword it was based on original sign. Now single word matches multi word.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301094
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Adrian Prantl [Sat, 22 Apr 2017 20:54:06 +0000 (20:54 +0000)]
Use DW_OP_stack_value when reconstructing variable values with arithmetic.
When the location description of a source variable involves arithmetic
on the value itself, it needs to be marked with DW_OP_stack_value since it
is not describing the variable's location, but rather its value.
This is a follow-up to r297971 and fixes the source testcase quoted in
the comment in debuginfo-dce.ll.
rdar://problem/
30725338
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301093
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Simon Pilgrim [Sat, 22 Apr 2017 20:13:58 +0000 (20:13 +0000)]
[X86] Regenerate TLS tests
Use the correct check prefix for X86/X32/X64 target types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301092
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Craig Topper [Sat, 22 Apr 2017 19:59:11 +0000 (19:59 +0000)]
[APInt] Remove unnecessary min with BitWidth from countTrailingOnesSlowCase.
The unused upper bits are guaranteed to be 0 so we don't need to worry about accidentally counting them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301091
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Xinliang David Li [Sat, 22 Apr 2017 19:24:19 +0000 (19:24 +0000)]
[PartialInlining] Using existing hasAddressTaken interface to legality check/NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301090
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Sanjay Patel [Sat, 22 Apr 2017 18:05:35 +0000 (18:05 +0000)]
[InstCombine] use 'match' to reduce code; NFCI
The later uses of dyn_castNotVal in this block are either
incomplete (doesn't handle vector constants) or overstepping
(shouldn't handle constants at all), but this first use is
just unnecessary. 'I' is obviously not a constant, and it
can't be a not-of-a-not because that would already be
instsimplified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301088
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Kamil Rytarowski [Sat, 22 Apr 2017 16:11:23 +0000 (16:11 +0000)]
Update documentation for the NetBSD target
LLVM is known to work on NetBSD x86 32-bit and 64-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301081
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Daniel Sanders [Sat, 22 Apr 2017 15:53:21 +0000 (15:53 +0000)]
[globalisel][tablegen] Add support for RegisterOperand.
Summary:
It functions just like RegisterClass except that the class is obtained
from a field.
Depends on D31761.
Reviewers: ab, qcolombet, t.p.northover, rovka, kristof.beyls, aditya_nandakumar
Reviewed By: ab
Subscribers: dberris, llvm-commits, igorb
Differential Revision: https://reviews.llvm.org/D32229
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301080
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Daniel Sanders [Sat, 22 Apr 2017 15:11:04 +0000 (15:11 +0000)]
[globalisel][tablegen] Revise API for ComplexPattern operands to improve flexibility.
Summary:
Some targets need to be able to do more complex rendering than just adding an
operand or two to an instruction. For example, it may need to insert an
instruction to extract a subreg first, or it may need to perform an operation
on the operand.
In SelectionDAG, targets would create SDNode's to achieve the desired effect
during the complex pattern predicate. This worked because SelectionDAG had a
form of garbage collection that would take care of SDNode's that were created
but not used due to a later predicate rejecting a match. This doesn't translate
well to GlobalISel and the churn was wasteful.
The API changes in this patch enable GlobalISel to accomplish the same thing
without the waste. The API is now:
InstructionSelector::OptionalComplexRendererFn selectArithImmed(MachineOperand &Root) const;
where Root is the root of the match. The return value can be omitted to
indicate that the predicate failed to match, or a function with the signature
ComplexRendererFn can be returned. For example:
return OptionalComplexRendererFn(
[=](MachineInstrBuilder &MIB) { MIB.addImm(Immed).addImm(ShVal); });
adds two immediate operands to the rendered instruction. Immed and ShVal are
captured from the predicate function.
As an added bonus, this also reduces the amount of information we need to
provide to GIComplexOperandMatcher.
Depends on D31418
Reviewers: aditya_nandakumar, t.p.northover, qcolombet, rovka, ab, javed.absar
Reviewed By: ab
Subscribers: dberris, kristof.beyls, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D31761
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301079
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Daniel Sanders [Sat, 22 Apr 2017 14:31:28 +0000 (14:31 +0000)]
[globalisel][tablegen] Fix PR32733 by checking which instruction operands belong to.
canMutate() was returning true when the operands were all in the same order as
the matched instruction. However, it wasn't checking the operands were actually
on that instruction. This worked when we could only match a single instruction
but the addition of nested instruction matching led to cases where the operands
could be split across multiple instructions. canMutate() now returns false if
operands belong to instructions other than the root of the match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301077
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David Blaikie [Sat, 22 Apr 2017 08:17:39 +0000 (08:17 +0000)]
Fix test to handle .rel and .rela sections (& to actually specify the target architecture as X86)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301073
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David Blaikie [Sat, 22 Apr 2017 07:53:44 +0000 (07:53 +0000)]
Avoid using relocations for ref_addr in .dwo files
In dwo files the fixed offset can be used - if the dwos are linked into
a dwp, the dwo consumer must use the dwp tables to find out where the
original range of the debug_info was and resolve the "section relative"
value relative to that original range - effectively
avoiding/reimplementing the relocation handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301072
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Sat, 22 Apr 2017 07:53:40 +0000 (07:53 +0000)]
Fix test from polluting the source tree
(though this seems like a "does this not crash" test - which isn't very
good. Should be fixed)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301071
91177308-0d34-0410-b5e6-
96231b3b80d8