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Vladimir Marko [Fri, 22 Jul 2016 17:12:01 +0000 (17:12 +0000)]
Merge \\\"ARM64/x86-64: Fix mterp fill-array-data-payload pointer calculation.\\\" am:
9e27d02040 am:
6aec037d15
am:
db558dff77
Change-Id: I82c08dfc2ece63adb5d5b5bf0b96742ce061b3ad
Vladimir Marko [Fri, 22 Jul 2016 17:09:00 +0000 (17:09 +0000)]
Merge \\"ARM64/x86-64: Fix mterp fill-array-data-payload pointer calculation.\\" am:
9e27d02040
am:
6aec037d15
Change-Id: I48398d2bcb731b60ded4aeb6f4263f5c3152136a
Vladimir Marko [Fri, 22 Jul 2016 17:06:32 +0000 (17:06 +0000)]
Merge \"ARM64/x86-64: Fix mterp fill-array-data-payload pointer calculation.\"
am:
9e27d02040
Change-Id: Ib9198592d068055b0caa2051072795cb77fc6a0f
Treehugger Robot [Fri, 22 Jul 2016 16:53:29 +0000 (16:53 +0000)]
Merge "ARM64/x86-64: Fix mterp fill-array-data-payload pointer calculation."
Vladimir Marko [Fri, 22 Jul 2016 09:52:24 +0000 (10:52 +0100)]
ARM64/x86-64: Fix mterp fill-array-data-payload pointer calculation.
Fix the pointer calculation to sign-extend the offset
instead of zero-extending it, just like we do for the switch
table pointer calculation. Clean up comments for the switch.
Test: Additional test in 412-new-array.
Change-Id: Ibb1d2d3fcb109f59280aca08de21e42edc4ce66b
Vladimir Marko [Fri, 22 Jul 2016 09:37:35 +0000 (09:37 +0000)]
Merge \\\"ARM64: Improve mterp cmpl/cmpg.\\\" am:
41c7e2e6ac am:
1562d62bf2
am:
f8d69756a0
Change-Id: Ia4a20f4f395fd0ce40bed24dfdcc4aeaad39458b
Vladimir Marko [Fri, 22 Jul 2016 09:34:34 +0000 (09:34 +0000)]
Merge \\"ARM64: Improve mterp cmpl/cmpg.\\" am:
41c7e2e6ac
am:
1562d62bf2
Change-Id: I5596939b447cf2591c2197a12888c289a773e931
Vladimir Marko [Fri, 22 Jul 2016 09:31:36 +0000 (09:31 +0000)]
Merge \"ARM64: Improve mterp cmpl/cmpg.\"
am:
41c7e2e6ac
Change-Id: I8abfa3377a1e884e46f28ce413a67e97492335e2
Vladimir Marko [Fri, 22 Jul 2016 09:24:41 +0000 (09:24 +0000)]
Merge "ARM64: Improve mterp cmpl/cmpg."
Nicolas Geoffray [Fri, 22 Jul 2016 01:18:17 +0000 (01:18 +0000)]
JIT: Don\\'t update the dex cache of another class loader. am:
e50a7b834b -s ours
am:
b9a2486834
Change-Id: I7bba7a5aeac1cfb5d551fa8048dec5ab4451af19
Nicolas Geoffray [Fri, 22 Jul 2016 01:15:48 +0000 (01:15 +0000)]
JIT: Don\'t update the dex cache of another class loader.
am:
e50a7b834b -s ours
Change-Id: I0af74a19e19bc66fcca47aca21757136073a9161
Nicolas Geoffray [Fri, 22 Jul 2016 01:00:55 +0000 (01:00 +0000)]
JIT: Don\\'t update the dex cache of another class loader. am:
e50a7b834b
am:
2114993e9a
Change-Id: I8cb090ed6334478fecf480d3fbe365ab0d0e9e5c
Andreas Gampe [Fri, 22 Jul 2016 00:11:11 +0000 (00:11 +0000)]
Merge changes I295c7876,Ib4b84b7b am:
84413a7617 am:
7aee171992
am:
3ec5be2608
Change-Id: Ie826b8f7de8087b68658d2a69dbcd911d0824987
Andreas Gampe [Fri, 22 Jul 2016 00:05:41 +0000 (00:05 +0000)]
Merge changes I295c7876,Ib4b84b7b am:
84413a7617
am:
7aee171992
Change-Id: Iccde165be1e432c9c3e86f03f07a1e2d45428d5f
Andreas Gampe [Fri, 22 Jul 2016 00:03:12 +0000 (00:03 +0000)]
Merge changes I295c7876,Ib4b84b7b
am:
84413a7617
Change-Id: I8b32598a46cb589cdefa1937ba4b9b69926f25b9
Treehugger Robot [Thu, 21 Jul 2016 23:58:00 +0000 (23:58 +0000)]
Merge changes I295c7876,Ib4b84b7b
* changes:
ART: Remove PACKED from ArtMethod's ptr_sized_fields_
ART: Rename ArtMethod JNI field
Hiroshi Yamauchi [Thu, 21 Jul 2016 23:37:33 +0000 (23:37 +0000)]
Merge \\\"Use non-CAS thread flip root visitor.\\\" am:
d4b7ad7135 am:
0cbcc8b076
am:
6863897ca7
Change-Id: I2add02017f63a7e0f16511ddc1abb18898dae2bf
Hiroshi Yamauchi [Thu, 21 Jul 2016 23:34:42 +0000 (23:34 +0000)]
Merge \\"Use non-CAS thread flip root visitor.\\" am:
d4b7ad7135
am:
0cbcc8b076
Change-Id: I7ace21c998f00f53dd5e9d56703b385dc1457e26
Hiroshi Yamauchi [Thu, 21 Jul 2016 23:32:13 +0000 (23:32 +0000)]
Merge \"Use non-CAS thread flip root visitor.\"
am:
d4b7ad7135
Change-Id: I4c560952f5f4ed488d0a849feadf2a2d25e15a2b
Nicolas Geoffray [Thu, 21 Jul 2016 23:32:11 +0000 (23:32 +0000)]
JIT: Don\'t update the dex cache of another class loader.
am:
e50a7b834b
Change-Id: Ib2019ac3afafebaa01c8b74f7e8e1744c85f367d
Hiroshi Yamauchi [Thu, 21 Jul 2016 23:24:44 +0000 (23:24 +0000)]
Merge "Use non-CAS thread flip root visitor."
Andreas Gampe [Wed, 20 Jul 2016 01:27:17 +0000 (18:27 -0700)]
ART: Remove PACKED from ArtMethod's ptr_sized_fields_
Remove the PACKED(4) hack, as it's highly annoying when debugging
a 64-bit process. Instead, fix the actual offset and size computation
for cross-size accesses.
Test: m test-art-host
Change-Id: I295c78760b74b6a62946e76856f218b4eb159cdc
Hiroshi Yamauchi [Thu, 21 Jul 2016 03:25:27 +0000 (20:25 -0700)]
Use non-CAS thread flip root visitor.
We don't need to use CAS to update the thread-local GC roots for the
thread flip.
Bug:
12687968
Bug:
29517059
Test: libartd.so boot. ART tests. Ritzperf EAAC.
Change-Id: Ia2acab824f756bd7d2ad501b2040233e0d394356
Andreas Gampe [Thu, 21 Jul 2016 18:37:10 +0000 (18:37 +0000)]
Merge \\\"ART: Make run-test temp dir consistent\\\" am:
a8f4e9061a am:
fd3b946eca
am:
80e638af31
Change-Id: Id31b16c724c5df5eff21b380c098f850ed660a60
Andreas Gampe [Thu, 21 Jul 2016 18:34:42 +0000 (18:34 +0000)]
Merge \\"ART: Make run-test temp dir consistent\\" am:
a8f4e9061a
am:
fd3b946eca
Change-Id: I35b5bf8d27d6eb9340c161a80befc30df90e5cb2
Andreas Gampe [Thu, 21 Jul 2016 18:32:42 +0000 (18:32 +0000)]
Merge \"ART: Make run-test temp dir consistent\"
am:
a8f4e9061a
Change-Id: I1d785103a7e4df2884384b0b482552a8e163e9f3
Andreas Gampe [Tue, 19 Jul 2016 15:06:07 +0000 (08:06 -0700)]
ART: Rename ArtMethod JNI field
The field is multi-purpose, rename it to data and clean up
accessors in preparation of more checks.
Test: m test-art-host
Change-Id: Ib4b84b7b1a51ca201544bc488ce8770aa858c7fd
Treehugger Robot [Thu, 21 Jul 2016 18:26:27 +0000 (18:26 +0000)]
Merge "ART: Make run-test temp dir consistent"
Mathieu Chartier [Thu, 21 Jul 2016 17:18:34 +0000 (17:18 +0000)]
Merge \\\"Add a way to measure read barrier slow paths\\\" am:
d8b668fbb6 am:
7cf6333832
am:
7a3d704a6f
Change-Id: Iadce7becd3c043ca49e8e023e546e64963383b1d
Mathieu Chartier [Thu, 21 Jul 2016 17:12:34 +0000 (17:12 +0000)]
Merge \\"Add a way to measure read barrier slow paths\\" am:
d8b668fbb6
am:
7cf6333832
Change-Id: I511a006bed571faceb739448687cee44afb0198f
Mathieu Chartier [Thu, 21 Jul 2016 17:10:02 +0000 (17:10 +0000)]
Merge \"Add a way to measure read barrier slow paths\"
am:
d8b668fbb6
Change-Id: I010c834dc4c922e7986854cba12612823fa974b4
Andreas Gampe [Thu, 21 Jul 2016 04:09:29 +0000 (21:09 -0700)]
ART: Make run-test temp dir consistent
We use the username as a directory component in run-test. Use the
same when driven through the Makefile.
Drop the username in run-test when TMP_DIR is set.
Test: m test-art-host-run-test
Test: art/test/run-test --host 001-HelloWorld
Change-Id: I060997ffbd80cd4da30dd6ac8d3954641de3292b
Mathieu Chartier [Thu, 21 Jul 2016 16:52:44 +0000 (16:52 +0000)]
Merge "Add a way to measure read barrier slow paths"
Vladimir Marko [Thu, 21 Jul 2016 11:59:46 +0000 (12:59 +0100)]
ARM64: Improve mterp cmpl/cmpg.
Use CSET+CNEG instead of MOV+CNEG+CSEL. Prefer the
CNEG/CSET alias over the CSNEG/CSINC for readability.
Test: Run ART test suite on Nexus 9 with the interpreter.
Change-Id: I5c4fb0cf2c053904253e8e82f3e7e05c774b0583
Goran Jakovljevic [Thu, 21 Jul 2016 14:29:53 +0000 (14:29 +0000)]
Merge \\\"Change return type of artIsAssignableFromCode for MIPS64\\\" am:
b78b3a8d93 am:
56dc4f5349
am:
c57ada52c3
Change-Id: Iac8c7a968635b2f38985c9337b28bbbd1afdefb8
Roland Levillain [Thu, 21 Jul 2016 14:29:52 +0000 (14:29 +0000)]
Merge \\\"Fix the definition of MACRO_LITERAL for OS X on x86-64.\\\" am:
ed33b7357c am:
37d65ef15f
am:
a18418160f
Change-Id: I3af2c88bc67e8c666712ed1c4fe41cbee2617b4c
Goran Jakovljevic [Thu, 21 Jul 2016 14:27:23 +0000 (14:27 +0000)]
Merge \\"Change return type of artIsAssignableFromCode for MIPS64\\" am:
b78b3a8d93
am:
56dc4f5349
Change-Id: I42be21594fe6dad907057e0342d568924642ff93
Roland Levillain [Thu, 21 Jul 2016 14:27:22 +0000 (14:27 +0000)]
Merge \\"Fix the definition of MACRO_LITERAL for OS X on x86-64.\\" am:
ed33b7357c
am:
37d65ef15f
Change-Id: I9f34ab8c1510c97aa22bbdd9c1c47395b31dfc56
Goran Jakovljevic [Thu, 21 Jul 2016 14:24:26 +0000 (14:24 +0000)]
Merge \"Change return type of artIsAssignableFromCode for MIPS64\"
am:
b78b3a8d93
Change-Id: Ifcc0f61101ab0a424273b97877fbb444864fdce9
Roland Levillain [Thu, 21 Jul 2016 14:24:23 +0000 (14:24 +0000)]
Merge \"Fix the definition of MACRO_LITERAL for OS X on x86-64.\"
am:
ed33b7357c
Change-Id: Ida4c2fd8c2918b77c72423fdda7cd7fb52c10aab
Treehugger Robot [Thu, 21 Jul 2016 14:19:33 +0000 (14:19 +0000)]
Merge "Change return type of artIsAssignableFromCode for MIPS64"
Roland Levillain [Thu, 21 Jul 2016 14:17:40 +0000 (14:17 +0000)]
Merge "Fix the definition of MACRO_LITERAL for OS X on x86-64."
Roland Levillain [Tue, 5 Jul 2016 17:55:32 +0000 (18:55 +0100)]
Fix the definition of MACRO_LITERAL for OS X on x86-64.
Test: "ART_USE_READ_BARRIER=true mmma art" on OS X.
Change-Id: Ia2d4c7a3eb7fec346ddfa4c7b0f7b700f1137344
Goran Jakovljevic [Thu, 21 Jul 2016 12:21:46 +0000 (14:21 +0200)]
Change return type of artIsAssignableFromCode for MIPS64
This has been missed by Ic505befc6c94e2dccbc8abf2b13d4c2d662e68d1.
This fixes MIPS64 build.
Bug:
30232671
Test: make -j 32 out/target/product/generic_mips64/obj/SHARED_LIBRARIES/libart_intermediates/arch/mips64/entrypoints_init_mips64.o
Change-Id: Iec89d25e2d38c6efc0d1025767d0ac2a8bdb7dcd
Roland Levillain [Thu, 21 Jul 2016 12:20:15 +0000 (12:20 +0000)]
Merge \\\"Move caller-saves saving/restoring to ReadBarrierMarkRegX.\\\" am:
057361ca33 am:
cc25e86689
am:
f336de5689
Change-Id: I57a52322885763109ff71a1cc393eec26565e005
Roland Levillain [Thu, 21 Jul 2016 12:17:44 +0000 (12:17 +0000)]
Merge \\"Move caller-saves saving/restoring to ReadBarrierMarkRegX.\\" am:
057361ca33
am:
cc25e86689
Change-Id: I615172164d2edf199f868dd6d3d0bd59a759d5a9
Roland Levillain [Thu, 21 Jul 2016 12:15:16 +0000 (12:15 +0000)]
Merge \"Move caller-saves saving/restoring to ReadBarrierMarkRegX.\"
am:
057361ca33
Change-Id: I91d856a7d188afb7f770beb6eb799351bfe9333d
Roland Levillain [Thu, 21 Jul 2016 12:11:15 +0000 (12:11 +0000)]
Merge "Move caller-saves saving/restoring to ReadBarrierMarkRegX."
Vladimir Marko [Thu, 21 Jul 2016 10:42:40 +0000 (10:42 +0000)]
Merge \\\"Clean up Class::FindStaticField().\\\" am:
65ad9b3516 am:
21b08980fb
am:
76eaa72577
Change-Id: I8bad1b8437debaa0d89d3ea4631df434a854f4e7
Vladimir Marko [Thu, 21 Jul 2016 10:40:09 +0000 (10:40 +0000)]
Merge \\"Clean up Class::FindStaticField().\\" am:
65ad9b3516
am:
21b08980fb
Change-Id: Iae16ee91456c046fd11925bb582480245bf18f42
Vladimir Marko [Thu, 21 Jul 2016 10:37:41 +0000 (10:37 +0000)]
Merge \"Clean up Class::FindStaticField().\"
am:
65ad9b3516
Change-Id: Ide965af3c183fe6f4bf1abd0c535ea2914522999
Vladimir Marko [Thu, 21 Jul 2016 10:33:13 +0000 (10:33 +0000)]
Merge "Clean up Class::FindStaticField()."
Roland Levillain [Wed, 20 Jul 2016 10:32:19 +0000 (11:32 +0100)]
Move caller-saves saving/restoring to ReadBarrierMarkRegX.
Instead of saving/restoring live caller-save registers
before/after the call to read barrier mark entry points
ReadBarrierMarkRegX, have these entry points save/restore
all the caller-save registers themselves (except register
rX, which contains the return value).
Also refactor the assembly code of these entry points
using macros.
* Boot image code size variation on Nexus 5X
(aosp_bullhead-userdebug build):
- total ARM64 framework Oat files size change:
119196792 bytes ->
115575920 bytes (-3.04%)
- total ARM framework Oat files size change:
100435212 bytes ->
97621188 bytes (-2.80%)
* Benchmarks (ARM64) score variations on Nexus 5X
(aosp_bullhead-userdebug build):
- RitzPerf (lower is better)
- average score difference: -2.71%
- CaffeineMark (higher is better)
- no real difference for most tests
(absolute variation lower than 1%)
- better score on the "Method" benchmark:
score variation 41253 -> 44891 (+8.82%)
Test: ART host and target (ARM, ARM64) tests.
Bug:
29506760
Bug:
12687968
Change-Id: I881bf73139a3f1c2bee9ffc6fc8c00f9a392afa6
Artem Serov [Thu, 21 Jul 2016 09:26:35 +0000 (09:26 +0000)]
Merge \\\"ARM: Port instr simplification of array accesses.\\\" am:
a92938a17b am:
030c9e6e58
am:
6b72efcb55
Change-Id: Ic54cd2045aab213e69e5cd0b30ab0fc5f0629aaf
Vladimir Marko [Thu, 21 Jul 2016 09:26:35 +0000 (09:26 +0000)]
Merge changes Ibcc11ce7,I9867dc11 am:
89b03e0cfb am:
e2d6519d95
am:
2cc7291244
Change-Id: I695e0438f5bf80cd004d627f223b792f5608394a
Vladimir Marko [Thu, 21 Jul 2016 09:24:06 +0000 (09:24 +0000)]
Merge \\"ARM: Port instr simplification of array accesses.\\" am:
a92938a17b
am:
030c9e6e58
Change-Id: I56fe574cc4200517d241939a458375feb38005af
Vladimir Marko [Thu, 21 Jul 2016 09:24:06 +0000 (09:24 +0000)]
Merge changes Ibcc11ce7,I9867dc11 am:
89b03e0cfb
am:
e2d6519d95
Change-Id: I7b6f88b4a8ec4ae6bb7458c30074fdb02d33efac
Artem Serov [Thu, 21 Jul 2016 09:22:09 +0000 (09:22 +0000)]
Merge \"ARM: Port instr simplification of array accesses.\"
am:
a92938a17b
Change-Id: Ia08b62cc89dd2cfecf9c543ed75689f07baf8ced
Vladimir Marko [Thu, 21 Jul 2016 09:22:06 +0000 (09:22 +0000)]
Merge changes Ibcc11ce7,I9867dc11
am:
89b03e0cfb
Change-Id: I841c764e1c9a69778ce840ec025815d20e1a06ab
Vladimir Marko [Thu, 21 Jul 2016 09:17:15 +0000 (09:17 +0000)]
Merge "ARM: Port instr simplification of array accesses."
Artem Serov [Wed, 6 Jul 2016 15:23:04 +0000 (16:23 +0100)]
ARM: Port instr simplification of array accesses.
After changing the addressing mode for array accesses (in
https://android-review.googlesource.com/248406) the 'add'
instruction that calculates the base address for the array can be
shared across accesses to the same array.
Before https://android-review.googlesource.com/248406:
add IP, r[Array], r[Index0], LSL #2
ldr r0, [IP, #12]
add IP, r[Array], r[Index1], LSL #2
ldr r0, [IP, #12]
Before this CL:
add IP. r[Array], #12
ldr r0, [IP, r[Index0], LSL #2]
add IP. r[Array], #12
ldr r0, [IP, r[Index1], LSL #2]
After this CL:
add IP. r[Array], #12
ldr r0, [IP, r[Index0], LSL #2]
ldr r0, [IP, r[Index1], LSL #2]
Link to the original optimization:
https://android-review.googlesource.com/#/c/127310/
Test: Run ART test suite on Nexus 6.
Change-Id: Iee26f9a0a7ca46abb90e3f60d19d22dc8dee4d8f
Vladimir Marko [Thu, 21 Jul 2016 09:15:23 +0000 (09:15 +0000)]
Merge changes Ibcc11ce7,I9867dc11
* changes:
ARM64: Improve Mterp.
ARM64: Fix mterp switch table pointer calculation.
Nicolas Geoffray [Tue, 19 Jul 2016 16:06:23 +0000 (17:06 +0100)]
JIT: Don't update the dex cache of another class loader.
This only works for properly delegating class loaders. But Java allows
non-delegating ones :(
bug:
29964720
test:612-jit-dex-cache
(cherry picked from commit
491617a612c8a1c890e72d8ba780a151ddee8e11)
(cherry picked from commit
a2d7cbb44e570ec0a9064dc93f57441e6ab9e45a)
(cherry picked from commit
ae093d69f58c2b6257c3e5b82a32c135a1f33641)
Change-Id: I73df55286a9bdb3f96963e0756e3a8b784aa9077
Mathieu Chartier [Thu, 14 Jul 2016 20:30:03 +0000 (13:30 -0700)]
Add a way to measure read barrier slow paths
If enabled, this option counts number of slow paths, measures the
total slow path time per GC and records the info into a histogram.
Also added support for systrace to see which threads are performing
slow paths.
Added runtime option -Xgc:measure to enable. The info is dumped
for SIGQUIT.
Test: Volantis boot with CC, test-art-host with CC, run EEAC with CC
and -Xgc:measure
Bug:
30162165
Change-Id: I3c2bdb4156065249c45695f13c77c0579bc8e57a
Matthew Gharrity [Thu, 21 Jul 2016 00:20:32 +0000 (00:20 +0000)]
Merge \\\"Revert \\\"Revert \\\"Refactor GetIMTIndex\\\"\\\"\\\" am:
e4b1c86d13 am:
8df507d68a
am:
7d4f6598ac
Change-Id: I31fd4faec60b56c1d4c74efaaac056543a9cb72d
Matthew Gharrity [Thu, 21 Jul 2016 00:18:32 +0000 (00:18 +0000)]
Merge \\"Revert \\"Revert \\"Refactor GetIMTIndex\\"\\"\\" am:
e4b1c86d13
am:
8df507d68a
Change-Id: Ia2def807b2ccf60b6020da2760c94e7954c2700b
Matthew Gharrity [Thu, 21 Jul 2016 00:14:11 +0000 (00:14 +0000)]
Merge \"Revert \"Revert \"Refactor GetIMTIndex\"\"\"
am:
e4b1c86d13
Change-Id: I496ad384317e215aa09e1390079fdfe3f852723e
Treehugger Robot [Thu, 21 Jul 2016 00:04:52 +0000 (00:04 +0000)]
Merge "Revert "Revert "Refactor GetIMTIndex"""
Alex Light [Wed, 20 Jul 2016 22:22:03 +0000 (22:22 +0000)]
Merge \\\"Make stream tracing have a higher thread count on host\\\" am:
ce1ba111bf am:
2aad9683a3
am:
5225fd5ff5
Change-Id: Ic7f043c818fc19b760b2f06a54bd7c9e14afd93a
Alex Light [Wed, 20 Jul 2016 22:19:32 +0000 (22:19 +0000)]
Merge \\"Make stream tracing have a higher thread count on host\\" am:
ce1ba111bf
am:
2aad9683a3
Change-Id: I54ba24e0222f734d131fe1c14310eb3ef806a357
Alex Light [Wed, 20 Jul 2016 22:16:34 +0000 (22:16 +0000)]
Merge \"Make stream tracing have a higher thread count on host\"
am:
ce1ba111bf
Change-Id: Ib482cc8e3eb49aac849a809fb4d47368abfffa77
Treehugger Robot [Wed, 20 Jul 2016 22:08:47 +0000 (22:08 +0000)]
Merge "Make stream tracing have a higher thread count on host"
Alex Light [Wed, 20 Jul 2016 17:43:39 +0000 (10:43 -0700)]
Make stream tracing have a higher thread count on host
Test: mma ART_TEST_TRACE_STREAM=true -j40 test-art-host-run-test-debug-prebuild-optimizing-relocate-stream-cms-checkjni-image-npictest-ndebuggable-001-HelloWorld32
Bug:
30229615
Change-Id: Id396f569b9e21ff764562005624aabc964d4e95a
Matthew Gharrity [Wed, 20 Jul 2016 20:48:57 +0000 (20:48 +0000)]
Merge \\\"Refactor register allocation to be pluggable\\\" am:
8a759904d4 am:
90d0c8adb6
am:
ecf1f2fd5a
Change-Id: I8becd2eb1340b0832a4d07095c73617a10e55139
Matthew Gharrity [Wed, 20 Jul 2016 20:45:56 +0000 (20:45 +0000)]
Merge \\"Refactor register allocation to be pluggable\\" am:
8a759904d4
am:
90d0c8adb6
Change-Id: If03c38d2f9088828d90026a28a36c65b27e09bb0
Matthew Gharrity [Wed, 20 Jul 2016 20:42:58 +0000 (20:42 +0000)]
Merge \"Refactor register allocation to be pluggable\"
am:
8a759904d4
Change-Id: I7dcf31e96d0eb23f794da94c4268804ab22d82dc
Treehugger Robot [Wed, 20 Jul 2016 20:38:30 +0000 (20:38 +0000)]
Merge "Refactor register allocation to be pluggable"
Matthew Gharrity [Wed, 20 Jul 2016 19:53:23 +0000 (19:53 +0000)]
Merge \\\"Fix accidental pass-by-value\\\" am:
27d99ed243 am:
3fa237bc32
am:
e23258c2ba
Change-Id: I4e118883a126df12729b74fa46af7100dbb591a3
Matthew Gharrity [Wed, 20 Jul 2016 19:50:52 +0000 (19:50 +0000)]
Merge \\"Fix accidental pass-by-value\\" am:
27d99ed243
am:
3fa237bc32
Change-Id: I5eaec7a7a98f6179e0bdb0aae1449ebbb4121075
Matthew Gharrity [Wed, 20 Jul 2016 19:48:24 +0000 (19:48 +0000)]
Merge \"Fix accidental pass-by-value\"
am:
27d99ed243
Change-Id: Iab0f6c30f77a0764a11ce094d05a79e81d28685e
Treehugger Robot [Wed, 20 Jul 2016 19:42:28 +0000 (19:42 +0000)]
Merge "Fix accidental pass-by-value"
Richard Uhler [Wed, 20 Jul 2016 18:33:17 +0000 (18:33 +0000)]
Merge changes I328ea51d,I577c5d02 am:
6c81dfeaef am:
f87c76d0dc
am:
5ff249bfca
Change-Id: Ied670089579260c7ff5b7cdc1d0d81d8d6c49a53
Richard Uhler [Wed, 20 Jul 2016 18:30:50 +0000 (18:30 +0000)]
Merge changes I328ea51d,I577c5d02 am:
6c81dfeaef
am:
f87c76d0dc
Change-Id: Id44ec9b26970ce22620975cbbdc4fa25204013cf
Richard Uhler [Wed, 20 Jul 2016 18:28:17 +0000 (18:28 +0000)]
Merge changes I328ea51d,I577c5d02
am:
6c81dfeaef
Change-Id: I18b7d076b1db11560f4ee4488a5c4f5f8093ffa5
Treehugger Robot [Wed, 20 Jul 2016 18:22:10 +0000 (18:22 +0000)]
Merge changes I328ea51d,I577c5d02
* changes:
Compute oat and odex filenames eagerly.
Make a static OatFileAssistant::DexLocationToOatFileName function.
Vladimir Marko [Wed, 20 Jul 2016 13:25:30 +0000 (14:25 +0100)]
ARM64: Improve Mterp.
Several straight-forward optimizations:
- use ubfx instead of SHR+AND,
- do not mask shifting distance,
- use 64-bit LDRSH to avoid subsequent sign extension,
- use CBNZ instead of CMP+BNE for null checks,
- style: use SXTW alias instead of explicit SBFM.
Test: Run ART test suite on Nexus 9 with the interpreter.
Change-Id: Ibcc11ce7f455432ecb789f727da21f269f8370f0
Vladimir Marko [Wed, 20 Jul 2016 16:52:51 +0000 (17:52 +0100)]
ARM64: Fix mterp switch table pointer calculation.
Do not mix 32-bit and 64-bit registers with
add x0, xPC, w0, lsl #1
that ends up compiled as
add x0, xPC, w0, uxtx #1
instead of the required sxtx. Just sing-extend the offset
correctly in previous instructions.
Test: Additional test in 501-regression-packed-switch.
Change-Id: I9867dc1180743e98f9707a312241d2f5b726ca8c
Matthew Gharrity [Wed, 20 Jul 2016 17:13:45 +0000 (10:13 -0700)]
Fix accidental pass-by-value
Change-Id: I245111eabb43368875c1215ca4f3a1f1918492fe
Matthew Gharrity [Thu, 14 Jul 2016 20:24:00 +0000 (13:24 -0700)]
Refactor register allocation to be pluggable
Allow alternate register allocation strategies to be implemented
in subclasses of a common register allocation base class.
Test: m test-art-host
Change-Id: I7c5866aa9ddff8f53fcaf721bad47654ab221b4f
Nicolas Geoffray [Wed, 20 Jul 2016 12:22:52 +0000 (12:22 +0000)]
JIT: Don\'t update the dex cache of another class loader.
am:
ae093d69f5 -s ours
Change-Id: I8da19774b4379e8b21c7e92ec1d98775ff2dee70
Andreas Gampe [Wed, 20 Jul 2016 12:13:51 +0000 (12:13 +0000)]
Merge \\\"ART: Change return types of field access entrypoints\\\" am:
360b4b0137 am:
127d900ccc
am:
415824fa1f
Change-Id: I8ddee9d7e156e5a5c3e3d4f0ad866be5a34e763a
Vladimir Marko [Wed, 20 Jul 2016 12:10:51 +0000 (12:10 +0000)]
Merge \\"ART: Change return types of field access entrypoints\\" am:
360b4b0137
am:
127d900ccc
Change-Id: Ibb1d4ae96a3c6514cdd6a1d1f77d6f9f66f8cee1
Andreas Gampe [Wed, 20 Jul 2016 12:07:24 +0000 (12:07 +0000)]
Merge \"ART: Change return types of field access entrypoints\"
am:
360b4b0137
Change-Id: I98f4f6ea89d48f5405da245c94ff7bddb0b5d588
Nicolas Geoffray [Tue, 19 Jul 2016 16:06:23 +0000 (17:06 +0100)]
JIT: Don't update the dex cache of another class loader.
This only works for properly delegating class loaders. But Java allows
non-delegating ones :(
bug:
29964720
test:612-jit-dex-cache
(cherry picked from commit
491617a612c8a1c890e72d8ba780a151ddee8e11)
(cherry picked from commit
a2d7cbb44e570ec0a9064dc93f57441e6ab9e45a)
Change-Id: I2523ce1fd4cd36dc83394d0f77ffc3f844e80c69
Vladimir Marko [Wed, 20 Jul 2016 12:01:15 +0000 (12:01 +0000)]
Merge "ART: Change return types of field access entrypoints"
Nicolas Geoffray [Wed, 20 Jul 2016 11:05:47 +0000 (11:05 +0000)]
Merge \\\"Fix test after rename.\\\" am:
522da11a6c am:
c8f60fd364
am:
1fb5373e10
Change-Id: I043ecb79c93d74023c21432e6aa3ace920fc24fa
Nicolas Geoffray [Wed, 20 Jul 2016 11:02:47 +0000 (11:02 +0000)]
Merge \\"Fix test after rename.\\" am:
522da11a6c
am:
c8f60fd364
Change-Id: I445afbc70e5c0ba06f2d6687f1876e27e1a92d2e
Nicolas Geoffray [Wed, 20 Jul 2016 10:59:18 +0000 (10:59 +0000)]
Merge \"Fix test after rename.\"
am:
522da11a6c
Change-Id: Iefbef3b21a47951c736522079a780884308a4dc5
Nicolas Geoffray [Wed, 20 Jul 2016 10:53:11 +0000 (10:53 +0000)]
Merge "Fix test after rename."
Nicolas Geoffray [Wed, 20 Jul 2016 10:49:47 +0000 (11:49 +0100)]
Fix test after rename.
bug:
29964720
Change-Id: I37cebc40ca83597b159eefbc492e8cc105996306
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