OSDN Git Service
Craig Topper [Sat, 19 Nov 2011 05:48:20 +0000 (05:48 +0000)]
Remove some unnecessary filtering checks from X86 disassembler table build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144986
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Craig Topper [Sat, 19 Nov 2011 04:49:22 +0000 (04:49 +0000)]
Remove unused parameters from the AVX maskmov classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144985
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Andrew Trick [Fri, 18 Nov 2011 03:42:41 +0000 (03:42 +0000)]
Fix a corner case in updating LoopInfo after fully unrolling an outer loop.
The loop tree's inclusive block lists are painful and expensive to
update. (I have no idea why they're inclusive). The design was
supposed to handle this case but the implementation missed it and my
unit tests weren't thorough enough.
Fixes PR11335: loop unroll update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144970
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Nadav Rotem [Fri, 18 Nov 2011 02:49:55 +0000 (02:49 +0000)]
Add AVX2 vpbroadcast support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144967
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Kostya Serebryany [Fri, 18 Nov 2011 01:41:06 +0000 (01:41 +0000)]
[asan] workaround for reg alloc bug 11395: don't instrument functions with large chunks of inline assembler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144962
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Chad Rosier [Fri, 18 Nov 2011 01:17:34 +0000 (01:17 +0000)]
Guard call to getRegForValue with isTypeLegal check to avoid unnecessary work/dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144959
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Devang Patel [Thu, 17 Nov 2011 23:43:15 +0000 (23:43 +0000)]
DISubrange supports unsigned lower/upper array bounds, so let's not fake it in the end while emitting DWARF. If a FE needs to encode signed lower/upper array bounds then we need to extend DISubrange or ad DISignedSubrange.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144937
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Kostya Serebryany [Thu, 17 Nov 2011 23:37:53 +0000 (23:37 +0000)]
quick fix: remove GlobalVariable::GlobalVariable mistakenly commited at r144933. For some reason this compiles on linux
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144936
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Andrew Trick [Thu, 17 Nov 2011 23:36:35 +0000 (23:36 +0000)]
Fix an overly general check in SimplifyIndvar to handle useless phi cycles.
The right way to check for a binary operation is
cast<BinaryOperator>. The original check: cast<Instruction> &&
numOperands() == 2 would match phi "instructions", leading to an
infinite loop in extreme corner case: a useless phi with operands
[self, constant] that prior optimization passes failed to remove,
being used in the loop by another useless phi, in turn being used by an
lshr or udiv.
Fixes PR11350: runaway iteration assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144935
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Kostya Serebryany [Thu, 17 Nov 2011 23:14:59 +0000 (23:14 +0000)]
fall back to explicit list of allowed linkages when instrumenting globals in asan; add a test check that asan does not touch linkonce_odr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144933
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Ted Kremenek [Thu, 17 Nov 2011 23:02:14 +0000 (23:02 +0000)]
Fix bug in RefCountedBase/RefCountedBaseVPTR where the reference count was accidentally copied as part of the copy constructor. This could result in objects getting leaked because there reference count was too high.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144931
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Chad Rosier [Thu, 17 Nov 2011 21:46:13 +0000 (21:46 +0000)]
Add TODO comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144920
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Craig Topper [Thu, 17 Nov 2011 07:49:38 +0000 (07:49 +0000)]
Fix SSE/AVX integer comparison patterns to understand that all integer vector loads are promoted to i64 vector loads so patterns need a bitconvert. Also slightly simplify the AVX2 variable shift patterns by using the predefined bitconvert pattern fragments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144896
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Chad Rosier [Thu, 17 Nov 2011 07:24:49 +0000 (07:24 +0000)]
Dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144888
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Chad Rosier [Thu, 17 Nov 2011 07:15:58 +0000 (07:15 +0000)]
When fast iseling a GEP, accumulate the offset rather than emitting a series of
ADDs. MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs
being: (1) If we can't materialize the large constant then we'll cause fast-isel
to bail. (2) Too large of an offset can't be directly encoded in the ADD
resulting in a MOV+ADD. Generally not a bad thing because otherwise we would
have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix
for that. (3) Conversely, too low of a threshold we'll miss opportunities to
coalesce ADDs.
rdar://
10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144886
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Craig Topper [Thu, 17 Nov 2011 07:04:00 +0000 (07:04 +0000)]
Remove seemingly unnecessary duplicate VROUND definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144885
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Chris Lattner [Thu, 17 Nov 2011 01:42:23 +0000 (01:42 +0000)]
x86/windows issues fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144878
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Eli Friedman [Thu, 17 Nov 2011 01:27:36 +0000 (01:27 +0000)]
Add support for custom names for library functions in TargetLibraryInfo. Add a custom name for fwrite and fputs on x86-32 OSX. Make SimplifyLibCalls honor the custom
names for fwrite and fputs.
Fixes <rdar://problem/
9815881>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144876
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Daniel Dunbar [Thu, 17 Nov 2011 01:19:53 +0000 (01:19 +0000)]
llvm-build: Attempt to work around a CMake Makefile generator bug that doesn't
properly quote strings when writing the CMakeFiles/Makefile.cmake output file
(which lists the dependencies). This shows up when using CMake + MSYS Makefile
generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144873
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Chad Rosier [Thu, 17 Nov 2011 01:16:53 +0000 (01:16 +0000)]
Don't unconditionally set the kill flag.
rdar://
10456186
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144872
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Eli Friedman [Thu, 17 Nov 2011 00:21:52 +0000 (00:21 +0000)]
Turn on vzeroupper insertion on call boundaries for AVX; it works as far as I know, and I'd like to see wider testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144867
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Daniel Dunbar [Wed, 16 Nov 2011 23:56:03 +0000 (23:56 +0000)]
build/make/test: Get rid of unused BUGPOINT_TOPTS variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144864
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Eli Friedman [Wed, 16 Nov 2011 23:50:22 +0000 (23:50 +0000)]
Make sure to replace the chain properly when DAGCombining a LOAD+EXTRACT_VECTOR_ELT into a single LOAD. Fixes PR10747/PR11393.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144863
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Michael J. Spencer [Wed, 16 Nov 2011 23:36:12 +0000 (23:36 +0000)]
Object/COFF: Support common symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144861
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Jim Grosbach [Wed, 16 Nov 2011 22:50:38 +0000 (22:50 +0000)]
Remove obsolete test.
The PLD encoding is checked via the .s file now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144853
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Jim Grosbach [Wed, 16 Nov 2011 22:48:37 +0000 (22:48 +0000)]
Generalize the fixup info for ARM mode.
We don't (yet) have the granularity in the fixups to be specific about which
bitranges are affected. That's a future cleanup, but we're not there yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144852
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Jim Grosbach [Wed, 16 Nov 2011 22:46:27 +0000 (22:46 +0000)]
Update test for r144842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144851
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Akira Hatanaka [Wed, 16 Nov 2011 22:44:38 +0000 (22:44 +0000)]
Lower 64-bit constant pool node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144849
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Akira Hatanaka [Wed, 16 Nov 2011 22:42:10 +0000 (22:42 +0000)]
Lower 64-bit block address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144847
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Jim Grosbach [Wed, 16 Nov 2011 22:40:25 +0000 (22:40 +0000)]
Fix encoding of NOP used for padding in ARM mode .align.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144842
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Akira Hatanaka [Wed, 16 Nov 2011 22:39:56 +0000 (22:39 +0000)]
Add patterns for 64-bit tglobaladdr, tblockaddress, tjumptable and tconstpool
nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144841
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Akira Hatanaka [Wed, 16 Nov 2011 22:36:01 +0000 (22:36 +0000)]
64-bit jump register instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144840
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Evan Cheng [Wed, 16 Nov 2011 22:24:44 +0000 (22:24 +0000)]
Another missing X86ISD::MOVLPD pattern. rdar://
10450317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144839
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Jim Grosbach [Wed, 16 Nov 2011 21:50:05 +0000 (21:50 +0000)]
ARM assembly parsing for shifted register operands for MOV instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144837
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Jim Grosbach [Wed, 16 Nov 2011 21:46:50 +0000 (21:46 +0000)]
Clean up debug printing of ARM shifted operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144836
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Chad Rosier [Wed, 16 Nov 2011 21:05:28 +0000 (21:05 +0000)]
Add fast-isel stats to determine who's doing all the work, the
target-independent selector or the target-specific selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144833
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Chad Rosier [Wed, 16 Nov 2011 21:02:08 +0000 (21:02 +0000)]
Fix the stats collection for fast-isel. The failed count was only accounting
for a single miss and not all predecessor instructions that get selected by
the selection DAG instruction selector. This is still not exact (e.g., over
states misses when folded/dead instructions are present), but it is a step in
the right direction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144832
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Chandler Carruth [Wed, 16 Nov 2011 19:52:13 +0000 (19:52 +0000)]
There are already problems with building LLVM under VS2005, and it's
quite old now. Update the documentation to reflect this, and direct
people to use VS2008 or newer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144818
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Jim Grosbach [Wed, 16 Nov 2011 19:12:24 +0000 (19:12 +0000)]
ARM assmebly two operand forms for LSR, ASR, LSL, ROR register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144814
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Jim Grosbach [Wed, 16 Nov 2011 19:05:59 +0000 (19:05 +0000)]
ARM assembly parsing for RRX mnemonic.
rdar://
9704684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144812
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Pete Cooper [Wed, 16 Nov 2011 19:03:23 +0000 (19:03 +0000)]
Added missing comment about new custom lowering of DEC64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144811
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Evan Cheng [Wed, 16 Nov 2011 18:44:48 +0000 (18:44 +0000)]
Disable expensive two-address optimizations at -O0. rdar://
10453055
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144806
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Chad Rosier [Wed, 16 Nov 2011 18:39:44 +0000 (18:39 +0000)]
Check to make sure we can select the instruction before trying to put the
operands into a register. Otherwise, we may materialize dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144805
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Evan Cheng [Wed, 16 Nov 2011 18:32:14 +0000 (18:32 +0000)]
Disable the assertion again. Looks like fastisel is still generating bad kill markers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144804
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Jim Grosbach [Wed, 16 Nov 2011 18:31:45 +0000 (18:31 +0000)]
ARM mode aliases for bitwise instructions w/ register operands.
rdar://
9704684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144803
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Bob Wilson [Wed, 16 Nov 2011 17:09:59 +0000 (17:09 +0000)]
Fix tablegen warning: hasSideEffects is inferred for eh_sjlj_dispatchsetup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144798
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NAKAMURA Takumi [Wed, 16 Nov 2011 09:18:28 +0000 (09:18 +0000)]
lib/Target/ARM/CMakeLists.txt: Disable optimization in ARMISelLowering.cpp also on MSC15(aka VS9). Seems miscompiled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144794
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Evan Cheng [Wed, 16 Nov 2011 08:38:26 +0000 (08:38 +0000)]
Sink codegen optimization level into MCCodeGenInfo along side relocation model
and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788
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Bob Wilson [Wed, 16 Nov 2011 07:57:21 +0000 (07:57 +0000)]
Record landing pads with a SmallSetVector to avoid multiple entries.
There may be many invokes that share one landing pad, and the previous code
would record the landing pad once for each invoke. Besides the wasted
effort, a pair of volatile loads gets inserted every time the landing pad is
processed. The rest of the code can get optimized away when a landing pad
is processed repeatedly, but the volatile loads remain, resulting in code like:
LBB35_18:
Ltmp483:
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r2, [r7, #-72]
ldr r2, [r7, #-68]
ldr r4, [r7, #-72]
ldr r2, [r7, #-68]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144787
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Craig Topper [Wed, 16 Nov 2011 07:30:46 +0000 (07:30 +0000)]
Fix the execution domain on a bunch of SSE/AVX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144784
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Bob Wilson [Wed, 16 Nov 2011 07:12:00 +0000 (07:12 +0000)]
Update the SP in the SjLj jmpbuf whenever it changes. <rdar://problem/
10444602>
This same basic code was in the older version of the SjLj exception handling,
but it was removed in the recent revisions to that code. It needs to be there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144782
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Bob Wilson [Wed, 16 Nov 2011 07:11:57 +0000 (07:11 +0000)]
Fix ARM SjLj-EH dispatch setup code. <rdar://problem/
10444602>
The EmitBasePointerRecalculation function has 2 problems, one minor and one
fatal. The minor problem is that it inserts the code at the setjmp
instead of in the dispatch block. The fatal problem is that at the point
where this code runs, we don't know whether there will be a base pointer,
so the entire function is a no-op. The base pointer recalculation needs to
be handled as it was before, by inserting a pseudo instruction that gets
expanded late.
Most of the support for the old approach is still here, but it no longer
has any connection to the eh_sjlj_dispatchsetup intrinsic. Clean up the
parts related to the intrinsic and just generate the pseudo instruction
directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144781
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Craig Topper [Wed, 16 Nov 2011 05:02:04 +0000 (05:02 +0000)]
Remove code to enable execution dependency fix pass on VR256. VR128 is sufficient after r144636.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144777
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Evan Cheng [Wed, 16 Nov 2011 04:55:01 +0000 (04:55 +0000)]
Revert r144568 now that r144730 has fixed the fast-isel kill marker bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144776
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Nick Lewycky [Wed, 16 Nov 2011 03:56:38 +0000 (03:56 +0000)]
Fix typo in test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144774
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Nick Lewycky [Wed, 16 Nov 2011 03:49:48 +0000 (03:49 +0000)]
Merge isObjectPointerWithTrustworthySize with getPointerSize. Use it when
looking at the size of the pointee. Fixes PR11390!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144773
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Evan Cheng [Wed, 16 Nov 2011 03:47:42 +0000 (03:47 +0000)]
If the 2addr instruction has other kills, don't move it below any other uses since we don't want to extend other live ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144772
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Evan Cheng [Wed, 16 Nov 2011 03:33:08 +0000 (03:33 +0000)]
RescheduleKillAboveMI() must backtrack to before the rescheduled DBG_VALUE instructions. rdar://
10451185
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144771
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Evan Cheng [Wed, 16 Nov 2011 03:05:12 +0000 (03:05 +0000)]
Process all uses first before defs to accurately capture register liveness. rdar://
10449480
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144770
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Eli Friedman [Wed, 16 Nov 2011 03:03:52 +0000 (03:03 +0000)]
Fix testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144769
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Eli Friedman [Wed, 16 Nov 2011 02:52:39 +0000 (02:52 +0000)]
CONCAT_VECTORS can have more than two operands. PR11389.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144768
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Eli Friedman [Wed, 16 Nov 2011 02:43:15 +0000 (02:43 +0000)]
Add a couple asserts so it will be easier to debug if we accidentally pass indexed loads/stores to the legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144767
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Michael J. Spencer [Wed, 16 Nov 2011 01:36:50 +0000 (01:36 +0000)]
Remove extra ,.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144759
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Kostya Serebryany [Wed, 16 Nov 2011 01:35:23 +0000 (01:35 +0000)]
AddressSanitizer, first commit (compiler module only)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144758
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Michael J. Spencer [Wed, 16 Nov 2011 01:25:13 +0000 (01:25 +0000)]
Object/Archive: Give Child a operator < for map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144757
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Michael J. Spencer [Wed, 16 Nov 2011 01:24:57 +0000 (01:24 +0000)]
Support/COFF: Add structs and enums from the standard for image files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144756
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Michael J. Spencer [Wed, 16 Nov 2011 01:24:41 +0000 (01:24 +0000)]
llvm-objdump: Ignore non-objects in archives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144755
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Kostya Serebryany [Wed, 16 Nov 2011 01:14:38 +0000 (01:14 +0000)]
test commit to verify that commit access works (added blank line)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144748
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Owen Anderson [Wed, 16 Nov 2011 01:02:57 +0000 (01:02 +0000)]
Rename MVT::untyped to MVT::Untyped to match similar nomenclature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144747
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Andrew Trick [Wed, 16 Nov 2011 00:52:40 +0000 (00:52 +0000)]
Fix SCEV overly optimistic back edge taken count for multi-exit loops.
Fixes PR11375: Different results for 'clang++ huh.cpp'...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144746
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Chad Rosier [Wed, 16 Nov 2011 00:32:20 +0000 (00:32 +0000)]
Add FIXME comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144743
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Jakob Stoklund Olesen [Tue, 15 Nov 2011 23:53:18 +0000 (23:53 +0000)]
Enable -widen-vmovs by default.
This will widen 32-bit register vmov instructions to 64-bit when
possible. The 64-bit vmovd instructions can then be translated to NEON
vorr instructions by the execution dependency fix pass.
The copies are only widened if they are marked as clobbering the whole
D-register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144734
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Eric Christopher [Tue, 15 Nov 2011 23:37:17 +0000 (23:37 +0000)]
Stabilize the output of the dwarf accelerator tables. Fixes a comparison
failure during bootstrap with it turned on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144731
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Chad Rosier [Tue, 15 Nov 2011 23:34:05 +0000 (23:34 +0000)]
GEPs with all zero indices are trivially coalesced by fast-isel. For example,
%arrayidx135 = getelementptr inbounds [4 x [4 x [4 x [4 x i32]]]]* %M0, i32 0, i64 0
%arrayidx136 = getelementptr inbounds [4 x [4 x [4 x i32]]]* %arrayidx135, i32 0, i64 %idxprom134
Prior to this commit, the GEP instruction that defines %arrayidx136 thought that
%arrayidx135 was a trivial kill. The GEP that defines %arrayidx135 doesn't
generate any code and thus %M0 gets folded into the second GEP. Thus, we need
to look through GEPs with all zero indices.
rdar://
10443319
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144730
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Jim Grosbach [Tue, 15 Nov 2011 23:19:15 +0000 (23:19 +0000)]
ARM assembly parsing for register range syntax for VLD/VST register lists.
For example,
vld1.f64 {d2-d5}, [r2,:128]!
Should be equivalent to:
vld1.f64 {d2,d3,d4,d5}, [r2,:128]!
It's not documented syntax in the ARM ARM, but it is consistent with what's
accepted for VLDM/VSTM and is unambiguous in meaning, so it's a good thing to
support.
rdar://
10451128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144727
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Devang Patel [Tue, 15 Nov 2011 22:59:54 +0000 (22:59 +0000)]
Merge ObjCPropertyDebugInfo.html into SourceLevelDebugging.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144724
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Jim Grosbach [Tue, 15 Nov 2011 22:54:42 +0000 (22:54 +0000)]
ARM assembly parsing for data type suffices on NEON VMOV aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144722
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Nadav Rotem [Tue, 15 Nov 2011 22:54:21 +0000 (22:54 +0000)]
Fix MSVC warnings by adding a cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144721
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Nadav Rotem [Tue, 15 Nov 2011 22:50:37 +0000 (22:50 +0000)]
AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the vbroadcast code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144720
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Chris Lattner [Tue, 15 Nov 2011 22:48:24 +0000 (22:48 +0000)]
jakob fixed X87 inline asm!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144719
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Chris Lattner [Tue, 15 Nov 2011 22:40:14 +0000 (22:40 +0000)]
add ImmutableSet/Map dox, patch by Caitlin Sadowski!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144716
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NAKAMURA Takumi [Tue, 15 Nov 2011 22:30:37 +0000 (22:30 +0000)]
test/CodeGen/X86/dec-eflags-lower.ll: Relax expression for win32 x64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144714
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Jim Grosbach [Tue, 15 Nov 2011 22:27:54 +0000 (22:27 +0000)]
ARM assembly parsing two operand forms for shift instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144713
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Chris Lattner [Tue, 15 Nov 2011 22:23:46 +0000 (22:23 +0000)]
add PTX backend info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144711
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Jim Grosbach [Tue, 15 Nov 2011 22:15:10 +0000 (22:15 +0000)]
ARM VFP assembly parsing for VADD and VSUB two-operand forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144710
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Jim Grosbach [Tue, 15 Nov 2011 22:14:41 +0000 (22:14 +0000)]
ARM accept an immediate offset in memory operands w/o the '#'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144709
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Chris Lattner [Tue, 15 Nov 2011 22:13:27 +0000 (22:13 +0000)]
some notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144708
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Pete Cooper [Tue, 15 Nov 2011 21:57:53 +0000 (21:57 +0000)]
Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used
by later instructions.
Only done for DEC64m right now.
Fixes <rdar://problem/
6172640>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144705
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Jim Grosbach [Tue, 15 Nov 2011 21:45:55 +0000 (21:45 +0000)]
ARM enclosing curly braces optional on one-register VLD/VST instruction lists.
'vld1.f32 d4, [r7]' should be parsed as equivalent to 'vld1.f32 {d4}, [r7]'
rdar://
10450488.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144701
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Akira Hatanaka [Tue, 15 Nov 2011 21:33:05 +0000 (21:33 +0000)]
Update section "MIPS Target Improvements" in the llvm 3.0 release notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144699
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Jim Grosbach [Tue, 15 Nov 2011 21:18:35 +0000 (21:18 +0000)]
ARM size suffix on VFP single-precision 'vmov' is optional.
rdar://
10435114
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144698
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Devang Patel [Tue, 15 Nov 2011 21:03:58 +0000 (21:03 +0000)]
Insert modified DBG_VALUE into LiveDbgValueMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144696
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Jim Grosbach [Tue, 15 Nov 2011 21:01:30 +0000 (21:01 +0000)]
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144695
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Jim Grosbach [Tue, 15 Nov 2011 20:49:46 +0000 (20:49 +0000)]
ARM alternate size suffices for VTRN instructions.
rdar://
10435076
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144694
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Owen Anderson [Tue, 15 Nov 2011 20:30:41 +0000 (20:30 +0000)]
Fix a misplaced paren bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144692
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Jim Grosbach [Tue, 15 Nov 2011 20:29:42 +0000 (20:29 +0000)]
ARM assembly parsing for optional datatype suffix on VFP VMOV GPR<->VFP insns.
Yet more of rdar://
10435076.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144691
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Jim Grosbach [Tue, 15 Nov 2011 20:14:51 +0000 (20:14 +0000)]
ARM assembly parsing for two-operand form of 'mul' instruction.
rdar://
10449856.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144689
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Jim Grosbach [Tue, 15 Nov 2011 20:02:06 +0000 (20:02 +0000)]
ARM assembly parsing for two-operand form of 'mul' instruction.
Ongoing rdar://
10435114.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144688
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Jim Grosbach [Tue, 15 Nov 2011 19:56:17 +0000 (19:56 +0000)]
Testcase for r144684.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144685
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Jim Grosbach [Tue, 15 Nov 2011 19:55:16 +0000 (19:55 +0000)]
Thumb2 two-operand 'mul' instruction wide encoding parsing.
rdar://
10449724
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144684
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