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Andrew Trick [Thu, 12 Jun 2014 22:36:28 +0000 (22:36 +0000)]
Fix the scheduler's MaxObservedStall computation.
WenHan Gu pointed out this bug that results in an assert
not being effective in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210846
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Eric Christopher [Thu, 12 Jun 2014 22:28:06 +0000 (22:28 +0000)]
Move PPCJITInfo off of the TargetMachine and onto the subtarget.
Needed to migrate a few functions around to avoid circular header
dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210845
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Eric Christopher [Thu, 12 Jun 2014 22:19:51 +0000 (22:19 +0000)]
Remove the use of TargetMachine from PPCJITInfo and replace with
the subtarget. Also remove unnecessary argument to the constructor
at the same time, we already have access via the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210844
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Rafael Espindola [Thu, 12 Jun 2014 22:16:55 +0000 (22:16 +0000)]
Fix the build of KillTheDoctor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210843
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Richard Smith [Thu, 12 Jun 2014 22:09:39 +0000 (22:09 +0000)]
[modules] The LLVM C API does not require C++!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210842
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Eric Christopher [Thu, 12 Jun 2014 22:05:46 +0000 (22:05 +0000)]
Move PPCInstrInfo off of the target machine and onto the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210839
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Rafael Espindola [Thu, 12 Jun 2014 21:53:57 +0000 (21:53 +0000)]
Try to fix the windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210837
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Eric Christopher [Thu, 12 Jun 2014 21:48:52 +0000 (21:48 +0000)]
Remove TargetMachine from PPCInstrInfo and all dependencies and
replace with the current subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210836
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Rafael Espindola [Thu, 12 Jun 2014 21:46:39 +0000 (21:46 +0000)]
Don't use 'using std::error_code' in include/llvm.
This should make sure that most new uses use the std prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210835
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Bob Wilson [Thu, 12 Jun 2014 21:37:30 +0000 (21:37 +0000)]
Move test for r210734 to Feature/aliases.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210833
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Matt Arsenault [Thu, 12 Jun 2014 21:27:03 +0000 (21:27 +0000)]
Delete trailing whitespace.
Hopefully this forces cmake to re-run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210830
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Juergen Ributzka [Thu, 12 Jun 2014 21:17:40 +0000 (21:17 +0000)]
Update test case to use "not" instead of "XFAIL".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210829
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Duncan P. N. Exon Smith [Thu, 12 Jun 2014 21:16:19 +0000 (21:16 +0000)]
GVN: Enable value forwarding for calloc
Enable value forwarding for loads from `calloc()` without an intervening
store.
This change extends GVN to handle the following case:
%1 = tail call noalias i8* @calloc(i64 1, i64 4)
%2 = bitcast i8* %1 to i32*
; This load is trivially constant zero
%3 = load i32* %2, align 4
This is analogous to the handling for `malloc()` in the same places.
`malloc()` returns `undef`; `calloc()` returns a zero value. Note that
it is correct to return zero even for out of bounds GEPs since the
result of such a GEP would be undefined.
Patch by Philip Reames!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210828
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Matt Arsenault [Thu, 12 Jun 2014 21:15:44 +0000 (21:15 +0000)]
R600: Mostly remove remaining AMDIL intrinsics.
Delete all unused ones, and add new AMDGPU named intrinsics for
the ones that are. Handle the old AMDIL names for comptability (although
remove their GCCBuiltin names) and add tests since there weren't any
for these before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210827
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Eric Christopher [Thu, 12 Jun 2014 21:08:06 +0000 (21:08 +0000)]
Move DataLayout from the PPCTargetMachine to the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210824
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Eric Christopher [Thu, 12 Jun 2014 20:54:11 +0000 (20:54 +0000)]
Move PPCFrameLowering into PPCSubtarget from PPCTargetMachine. Use
the initializeSubtargetDependencies code to obtain an initialized
subtarget and migrate a couple of subtarget using functions to the
.cpp file to avoid circular includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210822
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Bob Wilson [Thu, 12 Jun 2014 20:40:33 +0000 (20:40 +0000)]
LangRef: clarify that global declarations can have section and alignment info.
I'm not sure what it means to set a section for a declaration in another
translation unit, but there are some tests in the tree that do it so it seems
to be legal now regardless.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210819
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Juergen Ributzka [Thu, 12 Jun 2014 20:34:09 +0000 (20:34 +0000)]
[FastISel][X86] Argument lowering test case
This test case is supposed to xfail, because we do not handle structs or byval
arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210816
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Juergen Ributzka [Thu, 12 Jun 2014 20:12:34 +0000 (20:12 +0000)]
[FastIsel][X86] Add support for lowering the first 8 floating-point arguments.
Recommit with fixed argument attribute checking code, which is required to bail
out of all the cases we don't handle yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210815
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Saleem Abdulrasool [Thu, 12 Jun 2014 20:06:33 +0000 (20:06 +0000)]
CodeGen: enable mov.w/mov.t pairs with minsize for WoA
Windows on ARM uses COFF/PE which is intrinsically position independent. For
the case of 32-bit immediates, use a pair-wise relocation as otherwise we may
exceed the range of operators. This fixes a code generation crash when using
-Oz when targeting Windows on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210814
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Juergen Ributzka [Thu, 12 Jun 2014 19:21:43 +0000 (19:21 +0000)]
Revert "[FastIsel][X86] Add support for lowering the first 8 floating-point arguments."
Reverting it because it breaks several tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210810
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Alexey Samsonov [Thu, 12 Jun 2014 18:52:35 +0000 (18:52 +0000)]
[llvm-symbolizer] Fix parsing DW_AT_ranges in Fission skeleton compile unit DIEs.
Turns out that DW_AT_ranges_base attribute sets the offset for
DW_AT_ranges values specified in the .dwo file, but not for DW_AT_ranges specified
in the skeleton compile unit DIE in the main executable. This is extremely confusing,
and would hopefully be fixed in DWARF-5 when it's finalized. For now this
behavior makes sense, as otherwise Fission would break DWARF consumers who
doesn't know anything about DW_AT_ranges_base.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210809
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Bob Wilson [Thu, 12 Jun 2014 18:42:55 +0000 (18:42 +0000)]
Add missing "InitializerConstant" to global variable syntax in LangRef.
The syntax for Global Variables in LangRef is missing the initializer.
This syntax section was added in r199218 along with changes to the
dllexport/dllimport handling, and I guess it was just an oversight to omit the
initializer values. I’ve marked the initializer as optional because this syntax
is used for both declarations and definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210808
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Eli Bendersky [Thu, 12 Jun 2014 18:05:39 +0000 (18:05 +0000)]
Revert r210721 as it causes breakage in internal builds (and possibly GDB).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210807
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Saleem Abdulrasool [Thu, 12 Jun 2014 17:56:18 +0000 (17:56 +0000)]
X86: stifle GCC warning
lib/Target/X86/X86TargetTransformInfo.cpp: In member function ‘virtual unsigned int {anonymous}::X86TTI::getIntImmCost(unsigned int, unsigned int, const llvm::APInt&, llvm::Type*) const’:
lib/Target/X86/X86TargetTransformInfo.cpp:920:60: warning: enumeral and non-enumeral type in conditional expression [enabled by default]
This seems like an unhelpful warning, but there doesnt seem to be a controlling
flag, so add an explicit cast to silence the warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210806
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Rafael Espindola [Thu, 12 Jun 2014 17:49:35 +0000 (17:49 +0000)]
Trying to fix the windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210805
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Rafael Espindola [Thu, 12 Jun 2014 17:38:55 +0000 (17:38 +0000)]
Remove system_error.h.
This is a minimal change to remove the header. I will remove the occurrences
of "using std::error_code" in a followup patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210803
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Artyom Skrobov [Thu, 12 Jun 2014 16:07:56 +0000 (16:07 +0000)]
adding re-include guards into lib/Support/reg*.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210794
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Zachary Turner [Thu, 12 Jun 2014 16:06:51 +0000 (16:06 +0000)]
Remove pimpl class from PassRegistry.
Since removeRegistrationListener is no longer called during static
destruction, we can get rid of the pimpl in PassRegistry.
This should clean up the code somewhat, increase clarity, and also
allows us to put the Lock as a member of the class, instead of as a
ManagedStatic.
As part of this change, the PassInfo class is moved from
PassSupport.h to its own file, to eliminate the otherwise circular
header dependency between PassRegistry.h and PassSupport.h
Reviewed by: rnk, dblaikie
Differential Revision: http://reviews.llvm.org/D4107
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210793
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Tom Stellard [Thu, 12 Jun 2014 16:04:47 +0000 (16:04 +0000)]
Revert "SelectionDAG: Enable (and (setcc x), (setcc y)) -> (setcc (and x, y)) for vectors"
This reverts commit r210540, adds a testcase for the regression it
caused, and marks the R600 test it was supposed to fix as XFAIL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210792
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James Molloy [Thu, 12 Jun 2014 15:18:33 +0000 (15:18 +0000)]
Disable the load/store optimization pass for Thumb-1.
Moritz's changes have improved codegen a lot, but further testing showed significant correctness problems. Disable by default until these have been worked out.
Patch by Moritz Roth!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210789
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Daniel Sanders [Thu, 12 Jun 2014 15:00:17 +0000 (15:00 +0000)]
[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6
Summary:
Also tightened up the acceptable condition operand for these instructions
on MIPS-I to MIPS-III. Support for $fcc[1-7] was added in MIPS-IV. Prior
to that only $fcc0 is acceptable.
We currently don't optimize (BEQZ (NOT $a), $target) and similar. It's
probably best to do this in InstCombine.
Depends on D4111
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4112
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210787
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Daniel Sanders [Thu, 12 Jun 2014 14:54:13 +0000 (14:54 +0000)]
[mips][mips64r6] bc2[ft] are not available on MIPS32r6/MIPS64r6
Summary:
These instructions are not implemented for any MIPS ISA so we only need
testcases.
Depends on D4110
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4111
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210786
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Daniel Sanders [Thu, 12 Jun 2014 14:19:28 +0000 (14:19 +0000)]
[mips][mips64r6] [sl][duw]xc1 are not available on MIPS32r6/MIPS64r6
Summary:
Folded mips64-fp-indexed-ls.ll into fp-indexed-ls.ll. To do so, the zext's in
mips64-fp-indexed-ls.ll were changed to implicit sign extensions (performed
by getelementptr). This does not affect the purpose of the test.
Depends on D4004
Reviewers: zoran.jovanovic, jkolek, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4110
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210784
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Rafael Espindola [Thu, 12 Jun 2014 14:11:22 +0000 (14:11 +0000)]
Replace llvm::error_code with std::error_code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210783
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Dinesh Dwivedi [Thu, 12 Jun 2014 14:06:00 +0000 (14:06 +0000)]
This removes TODO added in reviews.llvm.org/D3658
The patch transforms
ABS(NABS(X)) -> ABS(X)
NABS(ABS(X)) -> NABS(X)
Differential Revision: http://reviews.llvm.org/D4040
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210782
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Daniel Sanders [Thu, 12 Jun 2014 13:51:27 +0000 (13:51 +0000)]
[mips][mips64r6] prefx is not available on MIPS32r6/MIPS64r6
Summary: We haven't implemented this instruction so we only add a test case.
Reviewers: vmedic, zoran.jovanovic, jkolek
Reviewed By: jkolek
Differential Revision: http://reviews.llvm.org/D4004
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210779
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Daniel Sanders [Thu, 12 Jun 2014 13:42:04 +0000 (13:42 +0000)]
[mips][mips64r6] 80 col corrections that should have been in r210777.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210778
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Daniel Sanders [Thu, 12 Jun 2014 13:39:06 +0000 (13:39 +0000)]
[mips][mips64r6] c.cond.fmt, mov[fntz], and mov[fntz].[ds] are not available on MIPS32r6/MIPS64r6
Summary:
c.cond.fmt has been replaced by cmp.cond.fmt. Where c.cond.fmt wrote to
dedicated condition registers, cmp.cond.fmt writes 1 or 0 to normal FGR's
(like the GPR comparisons).
mov[fntz] have been replaced by seleqz and selnez. These instructions
conditionally zero a register based on a bool in a GPR. The results can
then be or'd together to act as a select without, for example, requiring a third
register read port.
mov[fntz].[ds] have been replaced with sel.[ds]
MIPS64r6 currently generates unnecessary sign-extensions for most selects.
This is because the result of a SETCC is currently an i32. Bits 32-63 are
undefined in i32 and the behaviour of seleqz/selnez would otherwise depend
on undefined bits. Later, we will fix this by making the result of SETCC an
i64 on MIPS64 targets.
Depends on D3958
Reviewers: jkolek, vmedic, zoran.jovanovic
Reviewed By: vmedic, zoran.jovanovic
Differential Revision: http://reviews.llvm.org/D4003
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210777
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Daniel Sanders [Thu, 12 Jun 2014 12:58:20 +0000 (12:58 +0000)]
[mips][mips64r6] jalx is not available on MIPS32r6/MIPS64r6
Summary: Depends on D3957
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3958
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210775
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Zoran Jovanovic [Thu, 12 Jun 2014 12:40:00 +0000 (12:40 +0000)]
[mips][mips64r6] Add R_MIPS_PC19_S2
Differential Revision: http://reviews.llvm.org/D3866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210773
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Rafael Espindola [Thu, 12 Jun 2014 11:58:49 +0000 (11:58 +0000)]
Don't import make_error_code into the llvm namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210772
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Daniel Sanders [Thu, 12 Jun 2014 11:55:58 +0000 (11:55 +0000)]
[mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64
Summary:
To make this work for both AFGR64 and FGR64 register sets, I've had to make the
instruction definition consistent with the white lie (that it reads the lower
32-bits of the register) when they are generated by expandBuildPairF64().
Corrected the definition of hasMips32r2() and hasMips64r2() to include
MIPS32r6 and MIPS64r6.
Depends on D3956
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3957
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210771
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Zoran Jovanovic [Thu, 12 Jun 2014 11:47:44 +0000 (11:47 +0000)]
[mips][mips64r6] Add bgec and bgeuc instructions
Differential Revision: http://reviews.llvm.org/D4017
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210770
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Andrea Di Biagio [Thu, 12 Jun 2014 11:37:24 +0000 (11:37 +0000)]
[X86] Teach how to dump the name of target node RDTSCP_DAG.
When I originally added node RDTSCP_DAG (r207127) I forgot to add
a string name for it in method 'getTargetNodeName'.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210769
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Alp Toker [Thu, 12 Jun 2014 11:25:18 +0000 (11:25 +0000)]
CMake: don't install the internal config.h header
Background:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-June/073707.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210766
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Daniel Sanders [Thu, 12 Jun 2014 11:04:18 +0000 (11:04 +0000)]
[mips][mips64r6] madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are not available on MIPS32r6/MIPS64r6
Summary:
This patch updates both the assembler and the code generator.
MIPS32r6/MIPS64r6 replaces them with maddf.[ds] and msubf.[ds] which are fused
multiply-add/sub operations. We don't emit these yet, this patch only prevents the removed instructions from being emitted.
Depends on D3955
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210763
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Daniel Sanders [Thu, 12 Jun 2014 10:54:16 +0000 (10:54 +0000)]
[mips][mips64r6] madd/maddu/msub/msubu are not available on MIPS32r6/MIPS64r6
Summary:
This patch disables madd/maddu/msub/msubu in both the assembler and code
generator.
Depends on D3896
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210762
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Andrea Di Biagio [Thu, 12 Jun 2014 10:53:48 +0000 (10:53 +0000)]
[X86] Teach how to combine AVX and AVX2 horizontal binop on packed 256-bit vectors.
This patch adds target combine rules to match:
- [AVX] Horizontal add/sub of packed single/double precision floating point
values from 256-bit vectors;
- [AVX2] Horizontal add/sub of packed integer values from 256-bit vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210761
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Daniel Sanders [Thu, 12 Jun 2014 10:44:10 +0000 (10:44 +0000)]
[mips][mips64r6] Replace m[tf]hi, m[tf]lo, mult, multu, dmult, dmultu, div, ddiv, divu, ddivu for MIPS32r6/MIPS64.
Summary:
The accumulator-based (HI/LO) multiplies and divides from earlier ISA's have
been removed and replaced with GPR-based equivalents. For example:
div $1, $2
mflo $3
is now:
div $3, $1, $2
This patch disables the accumulator-based multiplies and divides for
MIPS32r6/MIPS64r6 and uses the GPR-based equivalents instead.
Renamed expandPseudoDiv to insertDivByZeroTrap to better describe the
behaviour of the function.
MipsDelaySlotFiller now invalidates the liveness information when moving
instructions to the delay slot. Without this, divrem.ll will abort since
%GP ends up used before it is defined.
Reviewers: vmedic, zoran.jovanovic, jkolek
Reviewed By: jkolek
Differential Revision: http://reviews.llvm.org/D3896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210760
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Matheus Almeida [Thu, 12 Jun 2014 09:50:17 +0000 (09:50 +0000)]
[mips] Move CHECK lines to the same line as the instruction it's testing
for consistency with the other tests.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210757
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Matt Arsenault [Thu, 12 Jun 2014 08:21:54 +0000 (08:21 +0000)]
R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec*
There is not such thing as a 0-data ds instruction, and the data
operand needs to be a vgpr set to something meaningful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210756
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Alp Toker [Thu, 12 Jun 2014 04:27:37 +0000 (04:27 +0000)]
Avoid in-class initializer from r210747
Turns out MSVC doesn't like this. Sorry for the noise!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210749
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Alp Toker [Thu, 12 Jun 2014 04:21:14 +0000 (04:21 +0000)]
Avoid anonymous namespace in header from r210747
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210748
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Alp Toker [Thu, 12 Jun 2014 04:02:46 +0000 (04:02 +0000)]
Avoid redundant allocations in the linker optimisation hint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210747
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Juergen Ributzka [Thu, 12 Jun 2014 03:54:05 +0000 (03:54 +0000)]
[FastISel][x86] Add testcase for r210719.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210746
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Juergen Ributzka [Thu, 12 Jun 2014 03:29:29 +0000 (03:29 +0000)]
[x86] Improve frameaddress test from r210709.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210743
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Juergen Ributzka [Thu, 12 Jun 2014 03:29:26 +0000 (03:29 +0000)]
[FastISel] Add support for the stackmap intrinsic.
This implements target-independent FastISel lowering for the stackmap intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210742
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Rafael Espindola [Thu, 12 Jun 2014 02:52:22 +0000 (02:52 +0000)]
Prefix generic_category with std::.
Sorry I missed these before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210740
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Rafael Espindola [Thu, 12 Jun 2014 02:00:39 +0000 (02:00 +0000)]
Don't put generic_category in the llvm namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210737
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Bob Wilson [Thu, 12 Jun 2014 01:46:54 +0000 (01:46 +0000)]
Fix verifier for GlobalAliases to avoid recursing into global initializers.
The verifier follows GlobalAlias operands so that it can detect cycles of
alias definitions. It was doing this in a way that caused it to also recurse
through initializers for the GlobalValue aliasees, and it would fail when
an initializer refers to a global that is a declaration and not a definition.
This patch causes it to stop recursing when it hits a global definition.
<rdar://problem/
17277451>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210734
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Rafael Espindola [Thu, 12 Jun 2014 01:45:43 +0000 (01:45 +0000)]
Don't import error_category into the llvm namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210733
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Rafael Espindola [Thu, 12 Jun 2014 01:29:42 +0000 (01:29 +0000)]
Don't import error_condition into the llvm namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210731
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Rafael Espindola [Thu, 12 Jun 2014 01:25:33 +0000 (01:25 +0000)]
Used mapWindowsError. I missed these in the initial transition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210729
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Rafael Espindola [Thu, 12 Jun 2014 01:10:47 +0000 (01:10 +0000)]
Remove some low hanging fruit from system_error.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210728
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Rafael Espindola [Thu, 12 Jun 2014 00:24:39 +0000 (00:24 +0000)]
Try to fix the mingw build.
* MingW needs mapWindowsError.
* MingW is missing some entries in std::errc, but we don't use them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210725
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Zachary Turner [Thu, 12 Jun 2014 00:16:36 +0000 (00:16 +0000)]
Do not register and de-register PassRegistrationListeners during
construction and destruction.
PassRegistrationListener is intended for use as a generic listener.
In some cases, PassRegistrationListener-derived classes were being
created, and automatically registered and de-registered in static
constructors and destructors. Since ManagedStatics are destroyed
prior to program shutdown, this leads to errors where an attempt is
made to access a ManagedStatic that has already been destroyed.
Reviewed by: rnk, dblaikie
Differential Revision: http://reviews.llvm.org/D4106
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210724
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Eli Bendersky [Wed, 11 Jun 2014 23:15:35 +0000 (23:15 +0000)]
Teach LoopUnrollPass to respect loop unrolling hints in metadata.
See http://reviews.llvm.org/D4090 for more details.
The Clang change that produces this metadata was committed in r210667
Patch by Mark Heffernan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210721
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Juergen Ributzka [Wed, 11 Jun 2014 23:11:02 +0000 (23:11 +0000)]
[FastISel][X86] Add support for the sqrt intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210720
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Juergen Ributzka [Wed, 11 Jun 2014 23:10:58 +0000 (23:10 +0000)]
[FastIsel][X86] Add support for lowering the first 8 floating-point arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210719
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Zachary Turner [Wed, 11 Jun 2014 23:03:31 +0000 (23:03 +0000)]
Don't acquire the mutex during the destructor of PassRegistry.
This destructor is run as part of static program termination, and
so all ManagedStatics (including this lock) will have been
destroyed by llvm_shutdown. Furthermore, if there is actually
a race condition during static program termination, then we are
just hiding a bug somewhere else, because other threads should
not be running at this point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210717
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Rafael Espindola [Wed, 11 Jun 2014 22:53:00 +0000 (22:53 +0000)]
Implement get_magic with generic tools and inline it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210716
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Rafael Espindola [Wed, 11 Jun 2014 21:53:22 +0000 (21:53 +0000)]
Remove unused has_magic.
This will allow inlining get_magic, which should in turn fix one of the mingw
build problems after the switch to std::error_code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210712
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Juergen Ributzka [Wed, 11 Jun 2014 21:44:44 +0000 (21:44 +0000)]
[FastISel][X86] Add support for the frameaddress intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210709
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Chad Rosier [Wed, 11 Jun 2014 21:06:56 +0000 (21:06 +0000)]
[AArch64] Basic Sched Model for Cortex-A57.
Patch by Dave Estes<cestes@codeaurora.org>
Differential Revision: http://reviews.llvm.org/D4008
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210705
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Tom Stellard [Wed, 11 Jun 2014 20:51:42 +0000 (20:51 +0000)]
R600: Set correct InstrItinClass for instructions using *Helper classes
We weren't doing this before, so all instruction using the *Helper
classes were considered for any ALU slot.
This fixes a hang in the builtin-char-clz-1.0.generated.cl piglit test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210703
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Tom Stellard [Wed, 11 Jun 2014 20:51:39 +0000 (20:51 +0000)]
R600: BCNT_INT is a vector only instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210702
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Jim Grosbach [Wed, 11 Jun 2014 20:26:45 +0000 (20:26 +0000)]
ARM: honor hex immediate formatting for ldr/str i12 offsets.
Previously we would always print the offset as decimal, regardless of
the formatting requested. Now we use the formatImm() helper so the value
is printed as the client (LLDB in the motivating example) requested.
Before:
ldr.w r8, [sp, #180] @ always
After:
ldr.w r8, [sp, #0xb4] @ when printing hex immediates
ldr.w r8, [sp, #0180] @ when printing decimal immediates
rdar://
17237103
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210701
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Jim Grosbach [Wed, 11 Jun 2014 20:26:40 +0000 (20:26 +0000)]
llvm-mc: Add option for prefering hex format disassembly.
Previously there was a separate mode entirely (--hdis vs.
--disassemble). It makes a bit more sense for the immediate printing
style to be a flag for --disassmeble rather than an entirely different
thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210700
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Matt Arsenault [Wed, 11 Jun 2014 19:31:13 +0000 (19:31 +0000)]
R600/SI: Fix bitcast between v2i32 and f64
This is the same problem fixed in r210664 for more types.
The test passes without this fix. For some reason
I'm only hitting this when creating selects lowered
to v2i32 selects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210692
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Rafael Espindola [Wed, 11 Jun 2014 19:05:50 +0000 (19:05 +0000)]
Use std::error_code instead of llvm::error_code.
The idea of this patch is to turn llvm/Support/system_error.h into a
transitional header that just brings in the erorr_code api to the llvm
namespace. I will remove it shortly afterwards.
The cases where the general idea needed some tweaking:
* std::errc is a namespace in msvc, so we cannot use "using std::errc". I could
add an #ifdef, but there were not that many uses, so I just added std:: to
them in this patch.
* Template specialization had to be moved to the std namespace in this
patch set already.
* The msvc implementation of default_error_condition doesn't seem to
provide the same transformations as we need. Not too surprising since
the standard doesn't actually say what "equivalent" means. I fixed the
problem by keeping our old mapping and using it at error_code
construction time.
Despite these shortcomings I think this is still a good thing. Some reasons:
* The different implementations of system_error might improve over time.
* It removes 925 lines of code from llvm already.
* It removes 6313 bytes from the text segment of the clang binary when
it is built with gcc and 2816 bytes when building with clang and
libstdc++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210687
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Chad Rosier [Wed, 11 Jun 2014 18:28:45 +0000 (18:28 +0000)]
[Reassociate] FileCheckize and cleanup a few testcases. No functional change
intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210685
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Chad Rosier [Wed, 11 Jun 2014 18:26:29 +0000 (18:26 +0000)]
Fix assert comments in Instruction.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210684
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Matt Arsenault [Wed, 11 Jun 2014 18:11:34 +0000 (18:11 +0000)]
R600/SI: Update place using old subtarget predicate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210683
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Matt Arsenault [Wed, 11 Jun 2014 18:08:54 +0000 (18:08 +0000)]
R600/SI: Add common 64-bit LDS atomics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210680
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Matt Arsenault [Wed, 11 Jun 2014 18:08:50 +0000 (18:08 +0000)]
R600/SI: Add instruction definitions for 64-bit LDS atomics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210679
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Matt Arsenault [Wed, 11 Jun 2014 18:08:48 +0000 (18:08 +0000)]
R600/SI: Add 32-bit LDS atomic cmpxchg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210678
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Matt Arsenault [Wed, 11 Jun 2014 18:08:45 +0000 (18:08 +0000)]
R600/SI: Use LDS atomic inc / dec
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210677
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Matt Arsenault [Wed, 11 Jun 2014 18:08:42 +0000 (18:08 +0000)]
R600/SI: Add other LDS atomic operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210676
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Matt Arsenault [Wed, 11 Jun 2014 18:08:39 +0000 (18:08 +0000)]
R600/SI: Add instruction definitions for more LDS ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210675
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Matt Arsenault [Wed, 11 Jun 2014 18:08:37 +0000 (18:08 +0000)]
R600/SI: Fix backwards names for local atomic instructions.
The manual lists them as *_RTN_U32, not *_U32_RTN, which is more
consistent with how every other sized instruction is named.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210674
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Matt Arsenault [Wed, 11 Jun 2014 18:08:34 +0000 (18:08 +0000)]
R600/SI: Refactor local atomics.
Use patterns that will also match the immediate offset to
match the normal read / writes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210673
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Matt Arsenault [Wed, 11 Jun 2014 17:50:44 +0000 (17:50 +0000)]
R600/SI: Use v_cvt_f32_ubyte* instructions
This eliminates extra extract instructions when loading an i8 vector to
a float vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210666
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David Blaikie [Wed, 11 Jun 2014 17:50:14 +0000 (17:50 +0000)]
SmallVectorTest: Make the deleted member functions private to help MSVC users.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210665
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Matt Arsenault [Wed, 11 Jun 2014 17:40:32 +0000 (17:40 +0000)]
R600/SI: Fix selection failure on scalar_to_vector
There seem to be only 2 places that produce these,
and it's kind of tricky to hit them.
Also fixes failure to bitcast between i64 and v2f32,
although this for some reason wasn't actually broken in the
simple bitcast testcase, but did in the scalar_to_vector one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210664
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Tim Northover [Wed, 11 Jun 2014 17:04:08 +0000 (17:04 +0000)]
X86: add stringy name for X86ISD::LCMPXCHG16_DAG
I don't know what "target specific node #383" is, and I don't want to
have to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210663
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Eric Christopher [Wed, 11 Jun 2014 16:59:33 +0000 (16:59 +0000)]
Revert r210613 to conform to coding standards.
Thanks Duncan for noticing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210662
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Daniel Sanders [Wed, 11 Jun 2014 15:48:00 +0000 (15:48 +0000)]
[mips][mips64r6] Improve tests affected by the changes to multiplies and divides
Summary:
MIPS32r6/MIPS64r6 support has not been added yet.
inlineasm-cnstrnt-reg.ll:
Explicitly specify the CPU since it will not work on MIPS32r6/MIPS64r6
when -integrated-as is the default. We can't change the mnemonic since the
LO register is an implicit def of mtlo and MIPS32r6/MIPS64r6 has no
instructions that use LO.
2008-08-01-AsmInline.ll:
Explicitly specify the CPU since MIPS32r6/MIPS64r6 will correctly emit
different code and this is a regression test.
mips64instrs.ll and mips64muldiv.ll
Check registers and the way the multiply is used in m1
divrem.ll
Check registers and use multiple filecheck prefixes to limit redundancy
Reviewers: vmedic, jkolek, zoran.jovanovic, matheusalmeida
Reviewed By: matheusalmeida
Subscribers: matheusalmeida
Differential Revision: http://reviews.llvm.org/D3894
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210656
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Matheus Almeida [Wed, 11 Jun 2014 15:05:56 +0000 (15:05 +0000)]
[mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier).
Summary: These instructions are available in ISAs >= mips32/mips64. For mips32r6/mips64r6, jr.hb has a new encoding format.
Reviewers: dsanders
Reviewed By: dsanders
Differential Revision: http://reviews.llvm.org/D4019
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210654
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Cameron McInally [Wed, 11 Jun 2014 12:54:45 +0000 (12:54 +0000)]
Add AVX512 masked leadz instrinsic support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210652
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