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Alberto Garcia [Mon, 28 May 2018 15:01:28 +0000 (17:01 +0200)]
qcow2: Fix Coverity warning when calculating the refcount cache size
MIN_REFCOUNT_CACHE_SIZE is 4 and the cluster size is guaranteed to be
at most 2MB, so the minimum refcount cache size (in bytes) is always
going to fit in a 32-bit integer.
Coverity doesn't know that, and since we're storing the result in a
uint64_t (*refcount_cache_size) it thinks that we need the 64 bits and
that we probably want to do a 64-bit multiplication to prevent the
result from being truncated.
This is a false positive in this case, but it's a fair warning.
We could do a 64-bit multiplication to get rid of it, but since we
know that a 32-bit variable is enough to store this value let's simply
reuse min_refcount_cache, make it a normal int and stop doing casts.
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Peter Maydell [Tue, 29 May 2018 12:01:11 +0000 (13:01 +0100)]
Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2018-05-29-v1.for-upstream' into staging
Tag edgar/xilinx-next-2018-05-29-v1.for-upstream
# gpg: Signature made Tue 29 May 2018 09:58:30 BST
# gpg: using RSA key
29C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>"
# gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>"
# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83
* remotes/edgar/tags/edgar/xilinx-next-2018-05-29-v1.for-upstream: (38 commits)
target-microblaze: Consolidate MMU enabled checks
target-microblaze: cpu_mmu_index: Fixup indentation
target-microblaze: Use tcg_gen_movcond in eval_cond_jmp
target-microblaze: Convert env_btarget to i64
target-microblaze: Remove argument b in eval_cc()
target-microblaze: Use table based condition-codes conversion
target-microblaze: mmu: Cleanup debug log messages
target-microblaze: Simplify address computation using tcg_gen_addi_i32()
target-microblaze: Allow address sizes between 32 and 64 bits
target-microblaze: Add support for extended access to TLBLO
target-microblaze: dec_msr: Plug a temp leak
target-microblaze: mmu: Add a configurable output address mask
target-microblaze: mmu: Prepare for 64-bit addresses
target-microblaze: mmu: Remove unused register state
target-microblaze: mmu: Add R_TBLX_MISS macros
target-microblaze: Implement MFSE EAR
target-microblaze: Add Extended Addressing
target-microblaze: Setup for 64bit addressing
target-microblaze: Make special registers 64-bit
target-microblaze: dec_msr: Fix MTS to FSR
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 22 May 2018 10:40:00 +0000 (11:40 +0100)]
qemu-doc.texi: Rename references to 2.13 to 3.0
Update references to 2.13 to read 3.0, since that's the
number we're using for the next release.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id:
20180522104000.9044-6-peter.maydell@linaro.org
Peter Maydell [Tue, 22 May 2018 10:39:59 +0000 (11:39 +0100)]
ppc: Rename 2.13 machines to 3.0
Rename the 2.13 machines to match the number we're going to
use for the next release.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Message-id:
20180522104000.9044-5-peter.maydell@linaro.org
Peter Maydell [Tue, 22 May 2018 10:39:58 +0000 (11:39 +0100)]
hw/s390x: Rename 2.13 machines to 3.0
Rename the 2.13 machines to match the number we're going to
use for the next release.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id:
20180522104000.9044-4-peter.maydell@linaro.org
Peter Maydell [Tue, 22 May 2018 10:39:57 +0000 (11:39 +0100)]
hw/i386: Rename 2.13 machine types to 3.0
Rename the 2.13 machine types to match what we're going to
use as our next release number.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Message-id:
20180522104000.9044-3-peter.maydell@linaro.org
Peter Maydell [Tue, 22 May 2018 10:39:56 +0000 (11:39 +0100)]
qapi: Change "since 2.13" annotations to "since 3.0"
We're going to make the next release be 3.0, not 2.13; change
the annotations in our json appropriately.
Changes produced with
sed -i -e 's/2\.13/3.0/g' qapi/*.json
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id:
20180522104000.9044-2-peter.maydell@linaro.org
Peter Maydell [Tue, 29 May 2018 08:57:09 +0000 (09:57 +0100)]
Merge remote-tracking branch 'remotes/stefanberger/tags/pull-tpm-2018-05-23-4' into staging
Merge tpm 2018/05/23 v4
# gpg: Signature made Sat 26 May 2018 03:52:12 BST
# gpg: using RSA key
75AD65802A0B4211
# gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B818 B9CA DF90 89C2 D5CE C66B 75AD 6580 2A0B 4211
* remotes/stefanberger/tags/pull-tpm-2018-05-23-4:
test: Add test cases that use the external swtpm with CRB interface
docs: tpm: add VM save/restore example and troubleshooting guide
tpm: extend TPM TIS with state migration support
tpm: extend TPM emulator with state migration support
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Tue, 15 May 2018 21:44:28 +0000 (23:44 +0200)]
target-microblaze: Consolidate MMU enabled checks
Consolidate MMU enabled checks to cpu_mmu_index().
No functional changes.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Tue, 15 May 2018 21:35:16 +0000 (23:35 +0200)]
target-microblaze: cpu_mmu_index: Fixup indentation
Fixup the indentation of cpu_mmu_index in preparation for
future edits.
No functional changes.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Tue, 8 May 2018 16:42:31 +0000 (18:42 +0200)]
target-microblaze: Use tcg_gen_movcond in eval_cond_jmp
Cleanup eval_cond_jmp to use tcg_gen_movcond_i64().
No functional change.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Tue, 8 May 2018 16:31:06 +0000 (18:31 +0200)]
target-microblaze: Convert env_btarget to i64
Convert env_btarget to i64.
No functional change.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Tue, 8 May 2018 15:34:21 +0000 (17:34 +0200)]
target-microblaze: Remove argument b in eval_cc()
Remove argument b in eval_cc() as it is always set to zero.
No functional change.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Tue, 8 May 2018 15:31:50 +0000 (17:31 +0200)]
target-microblaze: Use table based condition-codes conversion
Use a table based conversion to map condition-codes between
MicroBlaze ISA encoding and TCG.
No functional change.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 5 May 2018 13:55:25 +0000 (15:55 +0200)]
target-microblaze: mmu: Cleanup debug log messages
Cleanup debug log messages:
* Avoid long 80+ character lines.
* Remove D() macro and use qemu_log_mask.
* Remove logs that are not very useful
Suggested-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 5 May 2018 12:27:23 +0000 (14:27 +0200)]
target-microblaze: Simplify address computation using tcg_gen_addi_i32()
Simplify address computation using tcg_gen_addi_i32().
tcg_gen_addi_i32() already optimizes the case when the
immediate is zero.
No functional change.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Tue, 17 Apr 2018 16:17:40 +0000 (18:17 +0200)]
target-microblaze: Allow address sizes between 32 and 64 bits
Allow address sizes between 32 and 64 bits.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Mon, 16 Apr 2018 19:25:01 +0000 (21:25 +0200)]
target-microblaze: Add support for extended access to TLBLO
Add support for extended access to TLBLO's upper 32 bits.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Tue, 15 May 2018 22:04:54 +0000 (00:04 +0200)]
target-microblaze: dec_msr: Plug a temp leak
Plug a temp leak.
Reported-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Mon, 16 Apr 2018 17:37:16 +0000 (19:37 +0200)]
target-microblaze: mmu: Add a configurable output address mask
Add a configurable output address mask, used to mimic the
configurable physical address bit width.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Mon, 16 Apr 2018 19:03:01 +0000 (21:03 +0200)]
target-microblaze: mmu: Prepare for 64-bit addresses
Prepare for 64-bit addresses.
This makes no functional difference as the upper parts of
the 64-bit addresses are not yet reachable.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sun, 15 Apr 2018 21:25:58 +0000 (23:25 +0200)]
target-microblaze: mmu: Remove unused register state
Add explicit handling for MMU_R_TLBX and log accesses to
invalid MMU registers. We can now remove the state for
all regs but PID, ZPR and TLBX (0 - 2).
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sun, 15 Apr 2018 21:18:49 +0000 (23:18 +0200)]
target-microblaze: mmu: Add R_TBLX_MISS macros
Add a R_TBLX_MISS MASK and SHIFT macros.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 14 Apr 2018 21:44:51 +0000 (23:44 +0200)]
target-microblaze: Implement MFSE EAR
Implement MFSE EAR to enable access to the upper part of EAR.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Fri, 13 Apr 2018 20:04:37 +0000 (22:04 +0200)]
target-microblaze: Add Extended Addressing
Add support for Extended Addressing. Load/stores with EA
enabled concatenate two 32bit registers to form an extended
address.
We don't allow users to enable address sizes larger than
32 bits quite yet though. Once the MMU support is in, we'll
turn it on.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Fri, 13 Apr 2018 16:10:00 +0000 (18:10 +0200)]
target-microblaze: Setup for 64bit addressing
Setup MicroBlaze builds for 64bit addressing.
No functional change since the translator does not yet
emit 64bit addresses.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 14 Apr 2018 15:59:29 +0000 (17:59 +0200)]
target-microblaze: Make special registers 64-bit
Extend special registers to 64-bits. This is in preparation for
MFSE/MTSE, moves to and from extended special registers.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 14 Apr 2018 15:42:24 +0000 (17:42 +0200)]
target-microblaze: dec_msr: Fix MTS to FSR
Fix moves to FSR. Not only bit 31 is accessible.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 14 Apr 2018 13:46:20 +0000 (15:46 +0200)]
target-microblaze: dec_msr: Reuse more code when reg-decoding
Reuse more code when decoding register numbers.
No functional changes.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 14 Apr 2018 13:17:52 +0000 (15:17 +0200)]
target-microblaze: dec_msr: Use bool and extract32
Use bool and extract32 to represent the to, clr and
clrset flags.
No functional change.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 14 Apr 2018 16:41:24 +0000 (18:41 +0200)]
target-microblaze: Break out trap_illegal()
Break out trap_illegal() to handle illegal operation traps.
We now generally stop translation of the current insn if
it's not valid.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Fri, 13 Apr 2018 21:02:41 +0000 (23:02 +0200)]
target-microblaze: Break out trap_userspace()
Break out trap_userspace() to avoid open coding it everywhere.
For privileged insns, we now always stop translation of the
current insn for cores without exceptions.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 14 Apr 2018 12:03:06 +0000 (14:03 +0200)]
target-microblaze: Name special registers we support
Name special registers we support.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Fri, 13 Apr 2018 18:20:25 +0000 (20:20 +0200)]
target-microblaze: Use TCGv for load/store addresses
Use TCGv for load/store addresses, allowing for future
computation of 64-bit load/store address.
No functional change.
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Fri, 13 Apr 2018 18:02:07 +0000 (20:02 +0200)]
target-microblaze: Remove pointer indirection for ld/st addresses
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Fri, 13 Apr 2018 14:12:56 +0000 (16:12 +0200)]
target-microblaze: Make compute_ldst_addr always use a temp
Make compute_ldst_addr always use a temp. This simplifies
the code a bit in preparation for adding support for
64bit addresses.
No functional change.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Fri, 13 Apr 2018 20:16:57 +0000 (22:16 +0200)]
target-microblaze: Bypass MMU with MMU_NOMMU_IDX
Bypass MMU translation when mmu-index MMU_NOMMU_IDX is used.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Fri, 13 Apr 2018 14:04:13 +0000 (16:04 +0200)]
target-microblaze: Conditionalize setting of PVR11_USE_MMU
Conditionalize setting of PVR11_USE_MMU on the use_mmu
CPU property, otherwise we may incorrectly advertise an
MMU via PVR when the core in fact has none.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Fri, 13 Apr 2018 07:46:28 +0000 (09:46 +0200)]
target-microblaze: Remove USE_MMU PVR checks
We already have a CPU property to control if a core has
an MMU or not. Remove USE_MMU PVR checks in favor of
looking at the property.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Thu, 5 Apr 2018 17:09:30 +0000 (19:09 +0200)]
target-microblaze: Tighten up TCGv_i32 vs TCGv type usage
Tighten up TCGv_i32 vs TCGv type usage. Avoid using TCGv when
TCGv_i32 should be used.
This is in preparation for adding 64bit addressing support.
No functional change.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 14 Apr 2018 20:15:19 +0000 (22:15 +0200)]
target-microblaze: Correct the PVR array size
Correct the PVR array size, there are 13 PVR registers.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Fri, 13 Apr 2018 19:55:21 +0000 (21:55 +0200)]
target-microblaze: Correct special register array sizes
Correct special register array sizes.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Mon, 16 Apr 2018 20:23:05 +0000 (22:23 +0200)]
target-microblaze: Fallback to our latest CPU version
Today, when running QEMU in linux-user or with boards that don't
select a specific CPU version, we treat it as an invalid version
and log a message.
Instead, if no specific version was selected, fallback to our
latest CPU version.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Wed, 4 Apr 2018 14:34:21 +0000 (16:34 +0200)]
target-microblaze: compute_ldst_addr: Use bool instead of int
Use bool instead of int to represent flags.
No functional change.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Wed, 4 Apr 2018 11:55:48 +0000 (13:55 +0200)]
target-microblaze: dec_store: Use bool instead of unsigned int
Use bool instead of unsigned int to represent flags.
Also, use extract32 instead of open coding the bit extract.
No functional change.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Wed, 4 Apr 2018 11:47:33 +0000 (13:47 +0200)]
target-microblaze: dec_load: Use bool instead of unsigned int
Use bool instead of unsigned int to represent flags.
No functional change.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Stefan Berger [Wed, 7 Mar 2018 19:45:06 +0000 (14:45 -0500)]
test: Add test cases that use the external swtpm with CRB interface
Add a test program for testing the CRB with the external swtpm.
The 1st test case extends a PCR and reads back the value and compares
it against an expected return packet.
The 2nd test case repeats the 1st test case and then migrates the
external swtpm's state along with the VM state to a destination
QEMU and swtpm and checks that the PCR has the expected value now.
The test cases require 'swtpm' to be installed on the system and
in the PATH and 'swtpm' must support the --tpm2 option. If this is
not the case, the test will be skipped.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Peter Maydell [Fri, 25 May 2018 16:52:34 +0000 (17:52 +0100)]
Merge remote-tracking branch 'remotes/juanquintela/tags/migration/
20180525' into staging
migration/next for
20180525
# gpg: Signature made Fri 25 May 2018 14:30:47 BST
# gpg: using RSA key
F487EF185872D723
# gpg: Good signature from "Juan Quintela <quintela@redhat.com>"
# gpg: aka "Juan Quintela <quintela@trasno.org>"
# Primary key fingerprint: 1899 FF8E DEBF 58CC EE03 4B82 F487 EF18 5872 D723
* remotes/juanquintela/tags/migration/
20180525:
migration: use g_free for ram load bitmap
migration: fix exec/fd migrations
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Xu [Fri, 25 May 2018 01:50:42 +0000 (09:50 +0800)]
migration: use g_free for ram load bitmap
Buffers allocated with bitmap_new() should be freed with g_free().
Both reported by Coverity:
*** CID
1391300: API usage errors (ALLOC_FREE_MISMATCH)
/migration/ram.c: 3517 in ram_dirty_bitmap_reload()
3511 * the last one to sync, we need to notify the main send thread.
3512 */
3513 ram_dirty_bitmap_reload_notify(s);
3514
3515 ret = 0;
3516 out:
>>> CID
1391300: API usage errors (ALLOC_FREE_MISMATCH)
>>> Calling "free" frees "le_bitmap" using "free" but it should have been freed using "g_free".
3517 free(le_bitmap);
3518 return ret;
3519 }
3520
3521 static int ram_resume_prepare(MigrationState *s, void *opaque)
3522 {
*** CID
1391292: API usage errors (ALLOC_FREE_MISMATCH)
/migration/ram.c: 249 in ramblock_recv_bitmap_send()
243 * Mark as an end, in case the middle part is screwed up due to
244 * some "misterious" reason.
245 */
246 qemu_put_be64(file, RAMBLOCK_RECV_BITMAP_ENDING);
247 qemu_fflush(file);
248
>>> CID
1391292: API usage errors (ALLOC_FREE_MISMATCH)
>>> Calling "free" frees "le_bitmap" using "free" but it should have been freed using "g_free".
249 free(le_bitmap);
250
251 if (qemu_file_get_error(file)) {
252 return qemu_file_get_error(file);
253 }
254
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <
20180525015042.31778-1-peterx@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Juan Quintela [Wed, 23 May 2018 09:14:11 +0000 (11:14 +0200)]
migration: fix exec/fd migrations
Commit:
commit
36c2f8be2c4eb0003ac77a14910842b7ddd7337e
Author: Juan Quintela <quintela@redhat.com>
Date: Wed Mar 7 08:40:52 2018 +0100
migration: Delay start of migration main routines
Missed tcp and fd transports. This fix its.
Reported-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Tested-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20180523091411.1073-1-quintela@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Peter Maydell [Fri, 25 May 2018 09:04:36 +0000 (10:04 +0100)]
Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-2.13-pull-request' into staging
This pull request includes:
- fixes for some comments
- netlink update and fix
- rework/cleanup fo socket.h,
including fixes for SPARC part.
# gpg: Signature made Fri 25 May 2018 09:16:21 BST
# gpg: using RSA key
F30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>"
# gpg: aka "Laurent Vivier <laurent@vivier.eu>"
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier2/tags/linux-user-for-2.13-pull-request:
gdbstub: Clarify what gdb_handlesig() is doing
linux-user: define TARGET_SO_REUSEPORT
linux-user: copy sparc/sockbits.h definitions from linux
linux-user: update ARCH_HAS_SOCKET_TYPES use
linux-user: move ppc socket.h definitions to ppc/sockbits.h
linux-user: move socket.h generic definitions to generic/sockbits.h
linux-user: move sparc/sparc64 socket.h definitions to sparc/sockbits.h
linux-user: move alpha socket.h definitions to alpha/sockbits.h
linux-user: move mips socket.h definitions to mips/sockbits.h
linux-user: Fix payload size logic in host_to_target_cmsg()
linux-user: update comments to point to tcg_exec_init()
linux-user: update netlink emulation
linux-user: Assert on bad type in thunk_type_align() and thunk_type_size()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 15 May 2018 18:19:58 +0000 (19:19 +0100)]
gdbstub: Clarify what gdb_handlesig() is doing
gdb_handlesig()'s behaviour is not entirely obvious at first
glance. Add a doc comment for it, and also add a comment
explaining why it's ok for gdb_do_syscallv() to ignore
gdb_handlesig()'s return value. (Coverity complains about
this: CID
1390850.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20180515181958.25837-1-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Laurent Vivier [Sat, 19 May 2018 09:29:56 +0000 (11:29 +0200)]
linux-user: define TARGET_SO_REUSEPORT
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20180519092956.15134-9-laurent@vivier.eu>
Laurent Vivier [Sat, 19 May 2018 09:29:55 +0000 (11:29 +0200)]
linux-user: copy sparc/sockbits.h definitions from linux
Values defined for sparc are not correct.
Copy the content of "arch/sparc/include/uapi/asm/socket.h"
to fix them.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20180519092956.15134-8-laurent@vivier.eu>
Laurent Vivier [Sat, 19 May 2018 09:29:54 +0000 (11:29 +0200)]
linux-user: update ARCH_HAS_SOCKET_TYPES use
to be like in the kernel and rename it TARGET_ARCH_HAS_SOCKET_TYPES
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20180519092956.15134-7-laurent@vivier.eu>
Laurent Vivier [Sat, 19 May 2018 09:29:53 +0000 (11:29 +0200)]
linux-user: move ppc socket.h definitions to ppc/sockbits.h
Change conditional #ifdef part by #undef of the symbols
redefined for PPC relative to generic/socket.h
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20180519092956.15134-6-laurent@vivier.eu>
Laurent Vivier [Sat, 19 May 2018 09:29:52 +0000 (11:29 +0200)]
linux-user: move socket.h generic definitions to generic/sockbits.h
and include the file from architectures without specific definitions
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20180519092956.15134-5-laurent@vivier.eu>
Laurent Vivier [Sat, 19 May 2018 09:29:51 +0000 (11:29 +0200)]
linux-user: move sparc/sparc64 socket.h definitions to sparc/sockbits.h
No code change.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20180519092956.15134-4-laurent@vivier.eu>
Laurent Vivier [Sat, 19 May 2018 09:29:50 +0000 (11:29 +0200)]
linux-user: move alpha socket.h definitions to alpha/sockbits.h
No code change.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20180519092956.15134-3-laurent@vivier.eu>
Laurent Vivier [Sat, 19 May 2018 09:29:49 +0000 (11:29 +0200)]
linux-user: move mips socket.h definitions to mips/sockbits.h
No code change.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20180519092956.15134-2-laurent@vivier.eu>
Peter Maydell [Fri, 18 May 2018 18:47:15 +0000 (19:47 +0100)]
linux-user: Fix payload size logic in host_to_target_cmsg()
Coverity points out that there's a missing break in the switch in
host_to_target_cmsg() where we update tgt_len for
cmsg_level/cmsg_type combinations which require a different length
for host and target (CID
1385425). To avoid duplicating the default
case (target length same as host) in both switches, set that before
the switch so that only the cases which want to override it need any
code.
This fixes a bug where we would have used the wrong length
for SOL_SOCKET/SO_TIMESTAMP messages where the target and
host have differently sized 'struct timeval' (ie one is 32
bit and the other is 64 bit).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
20180518184715.29833-1-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Igor Mammedov [Thu, 17 May 2018 11:51:17 +0000 (13:51 +0200)]
linux-user: update comments to point to tcg_exec_init()
cpu_init() was replaced by cpu_create() since 2.12 but comments
weren't updated. So update stale comments to point that page
sizes arei actually initialized by tcg_exec_init(). Also move
another qemu_host_page_size related comment before tcg_exec_init()
where it belongs.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
1526557877-293151-1-git-send-email-imammedo@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Laurent Vivier [Wed, 16 May 2018 22:12:13 +0000 (00:12 +0200)]
linux-user: update netlink emulation
Update enums with entries from linux 4.17
Translate entries that generate logs with iproute2 4.9.0 and
host kernel 4.15:
# ip address show
Unknown host QEMU_IFLA type: 43
Unknown host QEMU_IFLA type: 43
Unknown host QEMU_IFLA type: 43
Unknown QEMU_IFLA_BR type 41
Unknown QEMU_IFLA_BR type 42
Unknown QEMU_IFLA_BR type 43
Unknown QEMU_IFLA_BR type 44
Unknown host QEMU_IFLA type: 43
Unknown QEMU_IFLA_BR type 41
Unknown QEMU_IFLA_BR type 42
Unknown QEMU_IFLA_BR type 43
Unknown QEMU_IFLA_BR type 44
Unknown host QEMU_IFLA type: 43
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
20180516221213.11111-1-laurent@vivier.eu>
Peter Maydell [Mon, 14 May 2018 17:46:16 +0000 (18:46 +0100)]
linux-user: Assert on bad type in thunk_type_align() and thunk_type_size()
In thunk_type_align() and thunk_type_size() we currently return
-1 if the value at the type_ptr isn't one of the TYPE_* values
we understand. However, this should never happen, and if it does
then the calling code will go confusingly wrong because none
of the callsites try to handle an error return. Switch to an
assertion instead, so that if this does somehow happen we'll have
a nice clear backtrace of what happened rather than a weird crash
or misbehaviour.
This also silences various Coverity complaints about not handling
the negative return value (CID
1005735,
1005736,
1005738,
1390582).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
20180514174616.19601-1-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Peter Maydell [Thu, 24 May 2018 16:48:01 +0000 (17:48 +0100)]
Merge remote-tracking branch 'remotes/kraxel/tags/vga-
20180524-pull-request' into staging
vga: catch depth 0
hw/display: add new bochs-display device
some cleanups.
# gpg: Signature made Thu 24 May 2018 16:45:46 BST
# gpg: using RSA key
4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/vga-
20180524-pull-request:
MAINTAINERS: add vga entries
bochs-display: add pcie support
bochs-display: add dirty tracking support
hw/display: add new bochs-display device
vga-pci: use PCI_VGA_MMIO_SIZE
vga: move bochs vbe defines to header file
vga: catch depth 0
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Stefan Berger [Mon, 5 Mar 2018 22:10:01 +0000 (17:10 -0500)]
docs: tpm: add VM save/restore example and troubleshooting guide
Extend the docs related to TPM with specs related to VM save and
restore and a troubleshooting guide for TPM migration.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Stefan Berger [Wed, 11 Oct 2017 14:36:53 +0000 (10:36 -0400)]
tpm: extend TPM TIS with state migration support
Extend the TPM TIS interface with state migration support.
We need to synchronize with the backend thread to make sure that a command
being processed by the external TPM emulator has completed and its
response been received.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Stefan Berger [Wed, 11 Oct 2017 14:36:53 +0000 (10:36 -0400)]
tpm: extend TPM emulator with state migration support
Extend the TPM emulator backend device with state migration support.
The external TPM emulator 'swtpm' provides a protocol over
its control channel to retrieve its state blobs. We implement
functions for getting and setting the different state blobs.
In case the setting of the state blobs fails, we return a
negative errno code to fail the start of the VM.
Since we have an external TPM emulator, we need to make sure
that we do not migrate the state for as long as it is busy
processing a request. We need to wait for notification that
the request has completed processing.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Peter Maydell [Thu, 24 May 2018 13:22:23 +0000 (14:22 +0100)]
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pc, pci, virtio, vhost: fixes, features
Beginning of merging vDPA, new PCI ID, a new virtio balloon stat, intel
iommu rework fixing a couple of security problems (no CVEs yet), fixes
all over the place.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Wed 23 May 2018 15:41:32 BST
# gpg: using RSA key
281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>"
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream: (28 commits)
intel-iommu: rework the page walk logic
util: implement simple iova tree
intel-iommu: trace domain id during page walk
intel-iommu: pass in address space when page walk
intel-iommu: introduce vtd_page_walk_info
intel-iommu: only do page walk for MAP notifiers
intel-iommu: add iommu lock
intel-iommu: remove IntelIOMMUNotifierNode
intel-iommu: send PSI always even if across PDEs
nvdimm: fix typo in label-size definition
contrib/vhost-user-blk: enable protocol feature for vhost-user-blk
hw/virtio: Fix brace Werror with clang 6.0.0
libvhost-user: Send messages with no data
vhost-user+postcopy: Use qemu_set_nonblock
virtio: support setting memory region based host notifier
vhost-user: support receiving file descriptors in slave_read
vhost-user: add Net prefix to internal state structure
linux-headers: add kvm header for mips
linux-headers: add unistd.h on all arches
update-linux-headers.sh: unistd.h, kvm consistency
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 24 May 2018 12:24:22 +0000 (13:24 +0100)]
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
Block layer patches:
- Generic background jobs
- qemu-iotests fixes for NFS and the 'migration' group
- sheepdog: Minor code simplification
# gpg: Signature made Wed 23 May 2018 13:33:49 BST
# gpg: using RSA key
7F09B272C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>"
# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6
* remotes/kevin/tags/for-upstream: (46 commits)
qemu-iotests: Test job-* with block jobs
iotests: Move qmp_to_opts() to VM
blockjob: Remove BlockJob.driver
job: Add query-jobs QMP command
job: Add lifecycle QMP commands
job: Add JOB_STATUS_CHANGE QMP event
job: Introduce qapi/job.json
job: Move progress fields to Job
job: Add job_transition_to_ready()
job: Add job_is_ready()
job: Add job_dismiss()
job: Add job_yield()
block: Cancel job in bdrv_close_all() callers
job: Move completion and cancellation to Job
job: Move transactions to Job
job: Switch transactions to JobTxn
job: Move job_finish_sync() to Job
job: Move .complete callback to Job
job: Add job_drain()
job: Convert block_job_cancel_async() to Job
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 24 May 2018 10:30:59 +0000 (11:30 +0100)]
Merge remote-tracking branch 'remotes/sstabellini-http/tags/xen-
20180522-tag' into staging
Xen 2018/05/22
# gpg: Signature made Tue 22 May 2018 19:44:06 BST
# gpg: using RSA key
894F8F4870E1AE90
# gpg: Good signature from "Stefano Stabellini <stefano.stabellini@eu.citrix.com>"
# gpg: aka "Stefano Stabellini <sstabellini@kernel.org>"
# Primary key fingerprint: D04E 33AB A51F 67BA 07D3 0AEA 894F 8F48 70E1 AE90
* remotes/sstabellini-http/tags/xen-
20180522-tag:
xen_disk: be consistent with use of xendev and blkdev->xendev
xen_disk: use a single entry iovec
xen_backend: make the xen_feature_grant_copy flag private
xen_disk: remove use of grant map/unmap
xen_backend: add an emulation of grant copy
xen: remove other open-coded use of libxengnttab
xen_disk: remove open-coded use of libxengnttab
xen_backend: add grant table helpers
xen: add a meaningful declaration of grant_copy_segment into xen_common.h
checkpatch: generalize xen handle matching in the list of types
xen-hvm: create separate function for ioreq server initialization
xen_pt: Present the size of 64 bit BARs correctly
configure: Add explanation for --enable-xen-pci-passthrough
xen/pt: use address_space_memory object for memory region hooks
xen-pvdevice: Introduce a simplistic xen-pvdevice save state
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 24 May 2018 09:25:43 +0000 (10:25 +0100)]
Merge remote-tracking branch 'remotes/mwalle/tags/lm32-queue/
20180521' into staging
target/lm32: BQL patch
# gpg: Signature made Tue 22 May 2018 19:25:30 BST
# gpg: using RSA key
B458ABB0D8D378E3
# gpg: Good signature from "Michael Walle <michael@walle.cc>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 2190 3E48 4537 A7C2 90CE 3EB2 B458 ABB0 D8D3 78E3
* remotes/mwalle/tags/lm32-queue/
20180521:
lm32: take BQL before writing IP/IM register
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Gerd Hoffmann [Tue, 22 May 2018 16:50:58 +0000 (18:50 +0200)]
MAINTAINERS: add vga entries
Add entries for standard vga, virtio-gpu and cirrus.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20180522165058.15404-7-kraxel@redhat.com
Gerd Hoffmann [Tue, 22 May 2018 16:50:57 +0000 (18:50 +0200)]
bochs-display: add pcie support
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20180522165058.15404-6-kraxel@redhat.com
Gerd Hoffmann [Tue, 22 May 2018 16:50:56 +0000 (18:50 +0200)]
bochs-display: add dirty tracking support
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-id:
20180522165058.15404-5-kraxel@redhat.com
Gerd Hoffmann [Tue, 22 May 2018 16:50:55 +0000 (18:50 +0200)]
hw/display: add new bochs-display device
After writing up the virtual mdev device emulating a display supporting
the bochs vbe dispi interface (mbochs.ko) and seeing how simple it
actually is I've figured that would be useful for qemu too.
So, here it is, -device bochs-display. It is basically -device VGA
without legacy vga emulation. PCI bar 0 is the framebuffer, PCI bar 2
is mmio with the registers. The vga registers are simply not there
though, neither in the legacy ioport location nor in the mmio bar.
Consequently it is PCI class DISPLAY_OTHER not DISPLAY_VGA.
So there is no text mode emulation, no weird video modes (planar,
256color palette), no memory window at 0xa0000. Just a linear
framebuffer in the pci memory bar. And the amount of code to emulate
this (and therefore the attack surface) is an order of magnitude smaller
when compared to vga emulation.
Compatibility wise it works with OVMF (latest git master).
The bochs-drm.ko linux kernel module can handle it just fine too.
So UEFI guests should not see any functional difference to VGA.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-id:
20180522165058.15404-4-kraxel@redhat.com
Gerd Hoffmann [Tue, 22 May 2018 16:50:54 +0000 (18:50 +0200)]
vga-pci: use PCI_VGA_MMIO_SIZE
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20180522165058.15404-3-kraxel@redhat.com
Gerd Hoffmann [Tue, 22 May 2018 16:50:53 +0000 (18:50 +0200)]
vga: move bochs vbe defines to header file
Create a new header file, move the bochs vbe dispi interface
defines to it, so they can be used outside vga code.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-id:
20180522165058.15404-2-kraxel@redhat.com
Gerd Hoffmann [Mon, 14 May 2018 10:31:17 +0000 (12:31 +0200)]
vga: catch depth 0
depth == 0 is used to indicate 256 color modes. Our region calculation
goes wrong in that case. So detect that and just take the safe code
path we already have for the wraparound case.
While being at it also catch depth == 15 (where our region size
calculation goes wrong too). And make the comment more verbose,
explaining what is going on here.
Without this windows guest install might trigger an assert due to trying
to check dirty bitmap outside the snapshot region.
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=
1575541
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20180514103117.21059-1-kraxel@redhat.com
Peter Xu [Fri, 18 May 2018 07:25:17 +0000 (15:25 +0800)]
intel-iommu: rework the page walk logic
This patch fixes a potential small window that the DMA page table might
be incomplete or invalid when the guest sends domain/context
invalidations to a device. This can cause random DMA errors for
assigned devices.
This is a major change to the VT-d shadow page walking logic. It
includes but is not limited to:
- For each VTDAddressSpace, now we maintain what IOVA ranges we have
mapped and what we have not. With that information, now we only send
MAP or UNMAP when necessary. Say, we don't send MAP notifies if we
know we have already mapped the range, meanwhile we don't send UNMAP
notifies if we know we never mapped the range at all.
- Introduce vtd_sync_shadow_page_table[_range] APIs so that we can call
in any places to resync the shadow page table for a device.
- When we receive domain/context invalidation, we should not really run
the replay logic, instead we use the new sync shadow page table API to
resync the whole shadow page table without unmapping the whole
region. After this change, we'll only do the page walk once for each
domain invalidations (before this, it can be multiple, depending on
number of notifiers per address space).
While at it, the page walking logic is also refactored to be simpler.
CC: QEMU Stable <qemu-stable@nongnu.org>
Reported-by: Jintack Lim <jintack@cs.columbia.edu>
Tested-by: Jintack Lim <jintack@cs.columbia.edu>
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Peter Xu [Fri, 18 May 2018 07:25:16 +0000 (15:25 +0800)]
util: implement simple iova tree
Introduce a simplest iova tree implementation based on GTree.
CC: QEMU Stable <qemu-stable@nongnu.org>
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Peter Xu [Fri, 18 May 2018 07:25:15 +0000 (15:25 +0800)]
intel-iommu: trace domain id during page walk
This patch only modifies the trace points.
Previously we were tracing page walk levels. They are redundant since
we have page mask (size) already. Now we trace something much more
useful which is the domain ID of the page walking. That can be very
useful when we trace more than one devices on the same system, so that
we can know which map is for which domain.
CC: QEMU Stable <qemu-stable@nongnu.org>
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Peter Xu [Fri, 18 May 2018 07:25:14 +0000 (15:25 +0800)]
intel-iommu: pass in address space when page walk
We pass in the VTDAddressSpace too. It'll be used in the follow up
patches.
CC: QEMU Stable <qemu-stable@nongnu.org>
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Peter Xu [Fri, 18 May 2018 07:25:13 +0000 (15:25 +0800)]
intel-iommu: introduce vtd_page_walk_info
During the recursive page walking of IOVA page tables, some stack
variables are constant variables and never changed during the whole page
walking procedure. Isolate them into a struct so that we don't need to
pass those contants down the stack every time and multiple times.
CC: QEMU Stable <qemu-stable@nongnu.org>
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Peter Xu [Fri, 18 May 2018 07:25:12 +0000 (15:25 +0800)]
intel-iommu: only do page walk for MAP notifiers
For UNMAP-only IOMMU notifiers, we don't need to walk the page tables.
Fasten that procedure by skipping the page table walk. That should
boost performance for UNMAP-only notifiers like vhost.
CC: QEMU Stable <qemu-stable@nongnu.org>
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Peter Xu [Fri, 18 May 2018 07:25:11 +0000 (15:25 +0800)]
intel-iommu: add iommu lock
SECURITY IMPLICATION: this patch fixes a potential race when multiple
threads access the IOMMU IOTLB cache.
Add a per-iommu big lock to protect IOMMU status. Currently the only
thing to be protected is the IOTLB/context cache, since that can be
accessed even without BQL, e.g., in IO dataplane.
Note that we don't need to protect device page tables since that's fully
controlled by the guest kernel. However there is still possibility that
malicious drivers will program the device to not obey the rule. In that
case QEMU can't really do anything useful, instead the guest itself will
be responsible for all uncertainties.
CC: QEMU Stable <qemu-stable@nongnu.org>
Reported-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Peter Xu [Fri, 18 May 2018 07:25:10 +0000 (15:25 +0800)]
intel-iommu: remove IntelIOMMUNotifierNode
That is not really necessary. Removing that node struct and put the
list entry directly into VTDAddressSpace. It simplfies the code a lot.
Since at it, rename the old notifiers_list into vtd_as_with_notifiers.
CC: QEMU Stable <qemu-stable@nongnu.org>
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Peter Xu [Fri, 18 May 2018 07:25:09 +0000 (15:25 +0800)]
intel-iommu: send PSI always even if across PDEs
SECURITY IMPLICATION: without this patch, any guest with both assigned
device and a vIOMMU might encounter stale IO page mappings even if guest
has already unmapped the page, which may lead to guest memory
corruption. The stale mappings will only be limited to the guest's own
memory range, so it should not affect the host memory or other guests on
the host.
During IOVA page table walking, there is a special case when the PSI
covers one whole PDE (Page Directory Entry, which contains 512 Page
Table Entries) or more. In the past, we skip that entry and we don't
notify the IOMMU notifiers. This is not correct. We should send UNMAP
notification to registered UNMAP notifiers in this case.
For UNMAP only notifiers, this might cause IOTLBs cached in the devices
even if they were already invalid. For MAP/UNMAP notifiers like
vfio-pci, this will cause stale page mappings.
This special case doesn't trigger often, but it is very easy to be
triggered by nested device assignments, since in that case we'll
possibly map the whole L2 guest RAM region into the device's IOVA
address space (several GBs at least), which is far bigger than normal
kernel driver usages of the device (tens of MBs normally).
Without this patch applied to L1 QEMU, nested device assignment to L2
guests will dump some errors like:
qemu-system-x86_64: VFIO_MAP_DMA: -17
qemu-system-x86_64: vfio_dma_map(0x557305420c30, 0xad000, 0x1000,
0x7f89a920d000) = -17 (File exists)
CC: QEMU Stable <qemu-stable@nongnu.org>
Acked-by: Jason Wang <jasowang@redhat.com>
[peterx: rewrite the commit message]
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Ross Zwisler [Mon, 21 May 2018 16:32:00 +0000 (10:32 -0600)]
nvdimm: fix typo in label-size definition
Signed-off-by: Ross Zwisler <ross.zwisler@linux.intel.com>
Fixes: commit
da6789c27c2e ("nvdimm: add a macro for property "label-size"")
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Cc: Haozhong Zhang <haozhong.zhang@intel.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Changpeng Liu [Fri, 18 May 2018 22:20:46 +0000 (06:20 +0800)]
contrib/vhost-user-blk: enable protocol feature for vhost-user-blk
This patch reports the protocol feature that is only advertised by
QEMU if the device implements the config ops.
Signed-off-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Richard Henderson [Sat, 12 May 2018 04:59:40 +0000 (21:59 -0700)]
hw/virtio: Fix brace Werror with clang 6.0.0
The warning is
hw/virtio/vhost-user.c:1319:26: error: suggest braces
around initialization of subobject [-Werror,-Wmissing-braces]
VhostUserMsg msg = { 0 };
^
{}
While the original code is correct, and technically exactly correct
as per ISO C89, both GCC and Clang support plain empty set of braces
as an extension.
Cc: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Dr. David Alan Gilbert [Fri, 4 May 2018 09:53:46 +0000 (10:53 +0100)]
libvhost-user: Send messages with no data
The response to a VHOST_USER_POSTCOPY_ADVISE contains a fd but doesn't
actually contain any data. FIx vu_message_write so that it doesn't
do a 0-byte write() call, since this was ending up with rc=0
that was confusing the error handling code.
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Dr. David Alan Gilbert [Wed, 2 May 2018 10:55:52 +0000 (11:55 +0100)]
vhost-user+postcopy: Use qemu_set_nonblock
Use qemu_set_nonblock rather than a simple fcntl; cleaner
and I have no reason to change other flags.
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Tiwei Bie [Thu, 12 Apr 2018 15:12:30 +0000 (23:12 +0800)]
virtio: support setting memory region based host notifier
This patch introduces the support for setting memory region
based host notifiers for virtio device. This is helpful when
using a hardware accelerator for a virtio device, because
hardware heavily depends on the notification, this will allow
the guest driver in the VM to notify the hardware directly.
Signed-off-by: Tiwei Bie <tiwei.bie@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Tiwei Bie [Thu, 12 Apr 2018 15:12:29 +0000 (23:12 +0800)]
vhost-user: support receiving file descriptors in slave_read
Signed-off-by: Tiwei Bie <tiwei.bie@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Kevin Wolf [Tue, 8 May 2018 12:04:58 +0000 (14:04 +0200)]
qemu-iotests: Test job-* with block jobs
This adds a test case that tests the new job-* QMP commands with
mirror and backup block jobs.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Tue, 8 May 2018 16:10:16 +0000 (18:10 +0200)]
iotests: Move qmp_to_opts() to VM
qmp_to_opts() used to be a method of QMPTestCase, but recently we
started to add more Python test cases that don't make use of
QMPTestCase. In order to make the method usable there, move it to VM.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
Kevin Wolf [Mon, 14 May 2018 12:51:21 +0000 (14:51 +0200)]
blockjob: Remove BlockJob.driver
BlockJob.driver is redundant with Job.driver and only used in very few
places any more. Remove it.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Fri, 4 May 2018 14:25:43 +0000 (16:25 +0200)]
job: Add query-jobs QMP command
This adds a minimal query-jobs implementation that shouldn't pose many
design questions. It can later be extended to expose more information,
and especially job-specific information.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Thu, 3 May 2018 17:01:14 +0000 (19:01 +0200)]
job: Add lifecycle QMP commands
This adds QMP commands that control the transition between states of the
job lifecycle.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>