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Krzysztof Parzyszek [Thu, 10 Aug 2017 16:17:32 +0000 (16:17 +0000)]
Add "Restored" flag to CalleeSavedInfo
The liveness-tracking code assumes that the registers that were saved
in the function's prolog are live outside of the function. Specifically,
that registers that were saved are also live-on-exit from the function.
This isn't always the case as illustrated by the LR register on ARM.
Differential Revision: https://reviews.llvm.org/D36160
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310619
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Sanjay Patel [Thu, 10 Aug 2017 15:37:26 +0000 (15:37 +0000)]
[InstCombine] add memcpy expansion tests with potential DL dependency; NFC
Current behavior is to transform these independently of the datalayout.
There's a proposal to change this in D35035:
https://reviews.llvm.org/D35035
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310611
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Marcello Maggioni [Thu, 10 Aug 2017 15:35:25 +0000 (15:35 +0000)]
[unittests] Adding a unittest for ChangeTaTargetIndex. NFC
Differential Revision: https://reviews.llvm.org/D36565
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310610
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Nirav Dave [Thu, 10 Aug 2017 15:29:33 +0000 (15:29 +0000)]
[DAG] Rewrite expression. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310608
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Simon Pilgrim [Thu, 10 Aug 2017 15:25:08 +0000 (15:25 +0000)]
[CostModel][X86] Added v2f64/v2i64 single src shuffle model tests
Fixed label checks for all prefixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310606
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Nirav Dave [Thu, 10 Aug 2017 15:12:32 +0000 (15:12 +0000)]
[X86] Keep dependencies when constructing loads in combineStore
Summary:
Preserve chain dependecies between old and new loads constructed to
prevent loads from reordering below later stores.
Fixes PR34088.
Reviewers: craig.topper, spatel, RKSimon, efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D36528
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310604
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Sanjay Patel [Thu, 10 Aug 2017 15:07:37 +0000 (15:07 +0000)]
[InstCombine] regenerate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310603
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Krzysztof Parzyszek [Thu, 10 Aug 2017 15:00:30 +0000 (15:00 +0000)]
[Hexagon] Use isMetaInstruction instead of isDebugValue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310601
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Alexander Potapenko [Thu, 10 Aug 2017 15:00:13 +0000 (15:00 +0000)]
[sanitizer-coverage] Change cmp instrumentation to distinguish const operands
This implementation of SanitizerCoverage instrumentation inserts different
callbacks depending on constantness of operands:
1. If both operands are non-const, then a usual
__sanitizer_cov_trace_cmp[1248] call is inserted.
2. If exactly one operand is const, then a
__sanitizer_cov_trace_const_cmp[1248] call is inserted. The first
argument of the call is always the constant one.
3. If both operands are const, then no callback is inserted.
This separation comes useful in fuzzing when tasks like "find one operand
of the comparison in input arguments and replace it with the other one"
have to be done. The new instrumentation allows us to not waste time on
searching the constant operands in the input.
Patch by Victor Chibotaru.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310600
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Sanjay Patel [Thu, 10 Aug 2017 14:51:42 +0000 (14:51 +0000)]
[InstCombine] regenerate test checks, add comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310598
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Chad Rosier [Thu, 10 Aug 2017 14:12:57 +0000 (14:12 +0000)]
[NewGVN] Add CL option to control the generation of phi-of-ops (disable by default).
Differential Revision: https://reviews.llvm.org/
D36478539
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310594
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Guy Blank [Thu, 10 Aug 2017 14:09:50 +0000 (14:09 +0000)]
[SelectionDAG] Allow constant folding for implicitly truncating BUILD_VECTOR nodes.
In FoldConstantArithmetic, handle BUILD_VECTOR nodes that do implicit truncation on the elements.
This is similar to what is done in FoldConstantVectorArithmetic.
Differential Revision:
https://reviews.llvm.org/D36506
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310593
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Alexander Potapenko [Thu, 10 Aug 2017 14:01:45 +0000 (14:01 +0000)]
[libFuzzer] Update LibFuzzer w.r.t. the new comparisons instrumentation API
Added the _sanitizer_cov_trace_const_cmp[1248] callbacks.
For now they are implemented the same way as _sanitizer_cov_trace_cmp[1248].
For more details, please see https://reviews.llvm.org/D36465.
Patch by Victor Chibotaru.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310592
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Oleg Ranevskyy [Thu, 10 Aug 2017 13:37:58 +0000 (13:37 +0000)]
[CMake][LLVM] Remove duplicated library mask. Broken clang linking against clangShared
Summary:
The `LLVM${c}Info` mask is listed twice in LLVM-Config.cmake. This results in the libraries such as LLVMARMInfo, LLVMAArch4Info, etc appearing twice in `extract_symbols.py` command line while building `clangShared`. `Extract_symbols.py` does not work well in such a case and completely ignores the symbols from the duplicated libraries. Thus, the LLVM(...)Info symbols do not get exported from `clangShared` and linking clang against it fails with unresolved dependencies.
Seems to be a mere copy-paste mistake.
Reviewers: beanz, chapuni
Reviewed By: chapuni
Subscribers: chapuni, aemerson, mgorny, kristof.beyls, llvm-commits, asl
Differential Revision: https://reviews.llvm.org/D36119
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310590
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Nikolai Bozhenov [Thu, 10 Aug 2017 11:24:57 +0000 (11:24 +0000)]
[ValueTracking] Enabling ValueTracking patch by default (recommit). Part 2.
The original patch was an improvement to IR ValueTracking on non-negative
integers. It has been checked in to trunk (D18777, r284022). But was disabled by
default due to performance regressions.
Perf impact has improved. The patch would be enabled by default.
Reviewers: reames, hfinkel
Differential Revision: https://reviews.llvm.org/D34101
Patch by: Olga Chupina <olga.chupina@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310583
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Zoran Jovanovic [Thu, 10 Aug 2017 10:27:29 +0000 (10:27 +0000)]
[mips][microMIPS] Extending size reduction pass with XOR16
Author: milena.vujosevic.janicic
Reviewers: sdardis
The patch extends size reduction pass for MicroMIPS.
XOR instruction is transformed into 16-bit instruction XOR16, if possible.
Differential Revision: https://reviews.llvm.org/D34239
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310579
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Sam Parker [Thu, 10 Aug 2017 09:52:55 +0000 (09:52 +0000)]
[AArch64] Assembler support for v8.3 RCpc
Added assembler and disassembler support for the new Release
Consistent processor consistent instructions, introduced with ARM
v8.3-A for AArch64.
Differential Revision: https://reviews.llvm.org/D36522
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310575
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Sam Parker [Thu, 10 Aug 2017 09:41:00 +0000 (09:41 +0000)]
[ARM][AArch64] ARMv8.3-A enablement
The beta ARMv8.3 ISA specifications have been released for AArch64
and AArch32, these can be found at:
https://developer.arm.com/products/architecture/a-profile/exploration-tools
An introduction to this architecture update can be found at:
https://community.arm.com/processors/b/blog/posts/armv8-a-architecture-2016-additions
This patch is the first in a series which will add ARM v8.3-A support
in LLVM and Clang. It adds the necessary changes that create targets
for both the ARM and AArch64 backends.
Differential Revision: https://reviews.llvm.org/D36514
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310561
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Elad Cohen [Thu, 10 Aug 2017 07:44:23 +0000 (07:44 +0000)]
[SelectionDAG] When scalarizing vselect, don't assert on
a legal cond operand.
When scalarizing the result of a vselect, the legalizer currently expects
to already have scalarized the operands. While this is true for the true/false
operands (which have the same type as the result), it is not case for the
condition operand. On X86 AVX512, v1i1 is legal - this leads to operations such
as '< N x type> vselect < N x i1> < N x type> < N x type>' where < N x type > is
illegal to hit an assertion during the scalarization.
The handling is similar to r205625.
This also exposes the fact that (v1i1 extract_subvector) should be legal
and selectable on AVX512 - We do this by custom lowering to vector_extract_elt.
This still leaves us in some cases with redundant dag nodes which will be
combined in a separate soon to come patch.
This fixes pr33349.
Differential revision: https://reviews.llvm.org/D36511
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310552
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Dehao Chen [Thu, 10 Aug 2017 05:10:32 +0000 (05:10 +0000)]
Revert part of r310296 to make it really NFC for instrumentation PGO.
Summary: Part of r310296 will disable PGOIndirectCallPromotion in ThinLTO backend if PGOOpt is None. However, as PGOOpt is not passed down to ThinLTO backend for instrumentation based PGO, that change would actually disable ICP entirely in ThinLTO backend, making it behave differently in instrumentation PGO mode. This change reverts that change, and only disable ICP there when it is SamplePGO.
Reviewers: davidxl
Reviewed By: davidxl
Subscribers: sanjoy, mehdi_amini, eraman, llvm-commits
Differential Revision: https://reviews.llvm.org/D36566
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310550
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Chandler Carruth [Thu, 10 Aug 2017 03:05:21 +0000 (03:05 +0000)]
[LCG] Fix an assert in a on-scope-exit lambda that checked the contents
of the returned value.
Checking the returned value from inside of a scoped exit isn't actually
valid. It happens to work when NRVO fires and the stars align, which
they reliably do with Clang but don't, for example, on MSVC builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310547
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Hiroshi Yamauchi [Thu, 10 Aug 2017 02:23:14 +0000 (02:23 +0000)]
[LVI] Fix LVI compile time regression around constantFoldUser()
Summary:
Avoid checking each operand and calling getValueFromCondition() before calling
constantFoldUser() when the instruction type isn't supported by
constantFoldUser().
This fixes a large compile time regression in an internal build.
Reviewers: sanjoy
Reviewed By: sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D36552
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310545
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Peter Collingbourne [Thu, 10 Aug 2017 01:07:44 +0000 (01:07 +0000)]
Linker: Create a function declaration when moving a non-prevailing alias of function type.
We were previously creating a global variable of function type,
which is invalid IR. This issue was exposed by r304690, in which we
started asserting that global variables were of a valid type.
Fixes PR33462.
Differential Revision: https://reviews.llvm.org/D36438
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310543
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Craig Topper [Thu, 10 Aug 2017 01:02:02 +0000 (01:02 +0000)]
[InstSimplify] Add test cases that show that simplifySelectWithICmpCond doesn't work with non-canonical comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310542
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Eugene Zelenko [Thu, 10 Aug 2017 00:46:15 +0000 (00:46 +0000)]
[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310541
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Evgeniy Stepanov [Wed, 9 Aug 2017 23:24:07 +0000 (23:24 +0000)]
Fix thinlto cache key computation for cfi-icall.
Summary:
Fixed PR33966.
CFI code generation for users (not just callers) of a function depends
on whether this function has a jumptable entry or not. This
information needs to be encoded in of thinlto cache key.
We filter the jumptable list against functions that are actually
referenced in the current module.
Subscribers: mehdi_amini, inglorion, eraman, hiraditya
Differential Revision: https://reviews.llvm.org/D36346
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310536
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Matthias Braun [Wed, 9 Aug 2017 22:22:05 +0000 (22:22 +0000)]
ARM: Fix CMP_SWAP expansion
Clean up after my misguided attempt in r304267 to "fix" CMP_SWAP
returning an uninitialized status value.
- I was always using tMOVi8 to zero the status register which cannot
encode higher register numbers and llvm would silently miscompile)
- Nobody was ever looking at that status value outside the expansion.
ARMDAGToDAGISel::SelectCMP_SWAP() the only place creating CMP_SWAP
instructions was not mapping anything to it. (The cmpxchg status value
from llvm IR is lowered to a manual comparison after the CMP_SWAP)
So this:
- Renames the register from "status" to "temp" it make it obvious that
it isn't used outside the expansion.
- Remove the zeroing status/temp register.
- Keep the live-in list improvements from r304267
Fixes http://llvm.org/PR34056
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310534
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Matthias Braun [Wed, 9 Aug 2017 22:22:04 +0000 (22:22 +0000)]
LangRef: Fix/improve cmpxchg wording
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310533
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Benjamin Kramer [Wed, 9 Aug 2017 22:06:32 +0000 (22:06 +0000)]
[Path] Sink predicate computations to their uses. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310531
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Coby Tayree [Wed, 9 Aug 2017 21:49:17 +0000 (21:49 +0000)]
[X86][Asm] Allow negative immediate to appear before bracketed expression
Currently, only non-negative immediate is allowed prior to a brac expression (memory reference).
MASM / GAS does not have any problem cope with the left side of the real line, so we should be able to as well.
Differntial Revision: https://reviews.llvm.org/D36229
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310528
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Krzysztof Parzyszek [Wed, 9 Aug 2017 21:22:05 +0000 (21:22 +0000)]
[Hexagon] Ignore DBG_VALUEs when counting instructions in hexagon-early-if
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310524
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Benoit Belley [Wed, 9 Aug 2017 20:58:39 +0000 (20:58 +0000)]
[Linker] PR33527 - Linker::LinkOnlyNeeded should import AppendingLinkage globals
Linker::LinkOnlyNeeded should always import globals with
AppendingLinkage.
This resolves PR33527.
Differential Revision: https://reviews.llvm.org/D34448
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310522
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Craig Topper [Wed, 9 Aug 2017 20:55:33 +0000 (20:55 +0000)]
[Docs] Remove a stray period from a code example in the Programmer's Manual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310520
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Eli Friedman [Wed, 9 Aug 2017 20:43:31 +0000 (20:43 +0000)]
[llvm-cov] Rearrange entries in report index.
Files which don't contain any functions are likely useless; don't
include them in the main table. Put the links at the bottom of the
page, in case someone wants to figure out coverage for code inside
a macro.
Not sure if this is the best solution, but it seems like an
improvement.
Differential Revision: https://reviews.llvm.org/D36298
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310518
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Lang Hames [Wed, 9 Aug 2017 20:19:27 +0000 (20:19 +0000)]
[RuntimeDyld][ORC] Add support for Thumb mode to RuntimeDyldMachOARM.
This patch adds support for thumb relocations to RuntimeDyldMachOARM, and adds
a target-specific flags field to JITSymbolFlags (so that on ARM we can record
whether each symbol is Thumb-mode code).
RuntimeDyldImpl::emitSection is modified to ensure that stubs memory is
correctly aligned based on the size returned by getStubAlignment().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310517
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Matt Arsenault [Wed, 9 Aug 2017 20:09:35 +0000 (20:09 +0000)]
AMDGPU: Fix assert on n inline asm constraint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310515
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Krzysztof Parzyszek [Wed, 9 Aug 2017 19:58:00 +0000 (19:58 +0000)]
[Hexagon] Tie implicit uses to defs in predicated instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310514
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Sanjay Patel [Wed, 9 Aug 2017 18:56:26 +0000 (18:56 +0000)]
[SimplifyCFG] remove checks for crasher test from r310481
Not sure why the earlier version would fail, but trying to get the bots
(and my local machine) to pass again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310510
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Sanjay Patel [Wed, 9 Aug 2017 18:37:41 +0000 (18:37 +0000)]
[InstCombine] narrow rotate left/right patterns to eliminate zext/trunc (PR34046)
I couldn't find any smaller folds to help the cases in:
https://bugs.llvm.org/show_bug.cgi?id=34046
after:
rL310141
The truncated rotate-by-variable patterns elude all of the existing transforms because
of multiple uses and knowledge about demanded bits and knownbits that doesn't exist
without the whole pattern. So we need an unfortunately large pattern match. But by
simplifying this pattern in IR, the backend is already able to generate
rolb/rolw/rorb/rorw for x86 using its existing rotate matching logic (although
there is a likely extraneous 'and' of the rotate amount).
Note that rotate-by-constant doesn't have this problem - smaller folds should already
produce the narrow IR ops.
Differential Revision: https://reviews.llvm.org/D36395
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310509
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David Blaikie [Wed, 9 Aug 2017 18:34:21 +0000 (18:34 +0000)]
PointerLikeTypeTraits: class->struct & remove the base definition
This simplifies implementations and removing the base definition paves
the way for detecting whether a type is 'pointer like'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310507
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David Blaikie [Wed, 9 Aug 2017 18:34:18 +0000 (18:34 +0000)]
Reduce variable scope by moving declaration into if clause
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310506
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Matt Morehouse [Wed, 9 Aug 2017 17:59:43 +0000 (17:59 +0000)]
[asan] Fix instruction emission ordering with dynamic shadow.
Summary:
Instrumentation to copy byval arguments is now correctly inserted
after the dynamic shadow base is loaded.
Reviewers: vitalybuka, eugenis
Reviewed By: vitalybuka
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D36533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310503
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Mandeep Singh Grang [Wed, 9 Aug 2017 17:58:39 +0000 (17:58 +0000)]
[COFF, ARM64] Add MS builtins __dmb, __dsb, __isb
Reviewers: mstorsjo, rnk, ruiu, compnerd, efriedma
Reviewed By: efriedma
Subscribers: efriedma, aemerson, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D36110
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310502
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Guy Blank [Wed, 9 Aug 2017 17:21:01 +0000 (17:21 +0000)]
[X86][AVX512] Choose correct registers in vpbroadcastb/w
Fixes the vpbroadcastb/w instructions which use GPRs as source operands, to use the correct registers.
The full GPR should be used, and not the subregister, as it happens before the patch.
Fixes pr33795
Differential Revision:
https://reviews.llvm.org/D36479
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310498
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Dmitry Preobrazhensky [Wed, 9 Aug 2017 17:10:47 +0000 (17:10 +0000)]
[AMDGPU][MC][GFX9] Added 16-bit renamed and "_legacy" VALU opcodes
See Bug 33629: https://bugs.llvm.org//show_bug.cgi?id=33629
Reviewers: vpykhtin, SamWot, arsenm
Differential Revision: https://reviews.llvm.org/D36322
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310497
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Nuno Lopes [Wed, 9 Aug 2017 17:02:18 +0000 (17:02 +0000)]
CFLAA: return MustAlias when pointers p, q are equal, i.e.,
must-alias(p, sz_p, p, sz_q) irrespective of access sizes sz_p, sz_q
As discussed a couple of weeks ago on the ML.
This makes the behavior consistent with that of BasicAA.
AA clients already check the obj size themselves and may not require the
obj size to match exactly the access size (e.g., in case of store forwarding)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310495
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Davide Italiano [Wed, 9 Aug 2017 16:06:54 +0000 (16:06 +0000)]
[ValueTracking] Turn a test into an assertion.
As discussed with Chad, this should never happen, but this
assertion is basically free, so, keep it around just in case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310493
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Davide Italiano [Wed, 9 Aug 2017 16:06:04 +0000 (16:06 +0000)]
[ValueTracking] Update tests to unbreak the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310492
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Sanjay Patel [Wed, 9 Aug 2017 15:57:02 +0000 (15:57 +0000)]
[x86] add more tests for select-of-constants; NFC
This is to help recommit a fixed version of r310208. As shown in PR34097,
we could miscompile if subtraction of the constants overflowed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310490
91177308-0d34-0410-b5e6-
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Florian Hahn [Wed, 9 Aug 2017 15:39:10 +0000 (15:39 +0000)]
[ARM] Emit error when ARM exec mode is not available.
Summary:
A similar error message has been removed from the ARMTargetMachineBase
constructor in r306939. With this patch, we generate an error message
for the example below, compiled with -mcpu=cortex-m0, which does not
have ARM execution mode.
__attribute__((target("arm"))) int foo(int a, int b)
{
return a + b % a;
}
__attribute__((target("thumb"))) int bar(int a, int b)
{
return a + b % a;
}
By adding this error message to ARMBaseTargetMachine::getSubtargetImpl,
we can deal with functions that set -thumb-mode in target-features.
At the moment it seems like Clang does not have access to target-feature
specific information, so adding the error message to the frontend will
be harder.
Reviewers: echristo, richard.barton.arm, t.p.northover, rengolin, efriedma
Reviewed By: echristo, efriedma
Subscribers: efriedma, aemerson, javed.absar, kristof.beyls
Differential Revision: https://reviews.llvm.org/D35627
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310486
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Coby Tayree [Wed, 9 Aug 2017 15:34:55 +0000 (15:34 +0000)]
[X86][Asm]Allow far jmp/call to be picked when using explicit FWORD size specifier
Currently, far jmp/call which utilizes a 48bit memory operand would have been invoked via the 'lcall/ljmp' mnemonic (intel style).
This patch align those variants to formal intel spec
Differential Revision: https://reviews.llvm.org/D35846
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310485
91177308-0d34-0410-b5e6-
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Davide Italiano [Wed, 9 Aug 2017 15:13:50 +0000 (15:13 +0000)]
[ValueTracking] Honour recursion limit.
The recently improved support for `icmp` in ValueTracking
(r307304) exposes the fact that `isImplied` condition doesn't
really bail out if we hit the recursion limit (and calls
`computeKnownBits` which increases the depth and asserts).
Differential Revision: https://reviews.llvm.org/D36512
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310481
91177308-0d34-0410-b5e6-
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Sjoerd Meijer [Wed, 9 Aug 2017 14:59:54 +0000 (14:59 +0000)]
[AArch64] Assembler support for the ARMv8.2a dot product instructions
Dot product is an optional ARMv8.2a extension, see also the public architecture
specification here:
https://developer.arm.com/products/architecture/a-profile/exploration-tools.
This patch adds AArch64 assembler support for these dot product instructions.
Differential Revision: https://reviews.llvm.org/D36515
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310480
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Florian Hahn [Wed, 9 Aug 2017 13:53:28 +0000 (13:53 +0000)]
[ARM] Remove FeatureNoARM implies ModeThumb.
Summary:
By removing FeatureNoARM implies ModeThumb, we can detect cases where a
function's target-features contain -thumb-mode (enables ARM codegen for the
function), but the architecture does not support ARM mode. Previously, the
implication caused the FeatureNoARM bit to be cleared for functions with
-thumb-mode, making the assertion in ARMSubtarget::ARMSubtarget [1]
pointless for such functions.
This assertion is the only guard against generating ARM code for
architectures without ARM codegen support. Is there a place where we
could easily generate error messages for the user? At the moment, we
would generate ARM code for Thumb-only architectures. X86 has the same
behavior as ARM, as in it only has an assertion and no error message,
but I think for ARM an error message would be helpful. What do you
think?
For the example below, `llc -mtriple=armv7m-eabi test.ll -o -` will
generate ARM assembler (or fail with an assertion error with this patch).
Note that if we run the resulting assembler through llvm-mc, we get
an appropriate error message, but not when codegen is handled
through clang.
```
define void @bar() #0 {
entry:
ret void
}
attributes #0 = { "target-features"="-thumb-mode" }
```
[1] https://github.com/llvm-mirror/llvm/blob/
c1f7b54cef62e9c8aa745d40bea146a167bf844e/lib/Target/ARM/ARMSubtarget.cpp#L147
Reviewers: t.p.northover, rengolin, peter.smith, aadg, silviu.baranga, richard.barton.arm, echristo
Reviewed By: rengolin, echristo
Subscribers: efriedma, aemerson, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D35569
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310476
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Benoit Belley [Wed, 9 Aug 2017 13:47:01 +0000 (13:47 +0000)]
[Support] PR33388 - Fix formatv_object move constructor
formatv_object currently uses the implicitly defined move constructor,
but it is buggy. In typical use-cases, the problem doesn't show-up
because all calls to the move constructor are elided. Thus, the buggy
constructors are never invoked.
The issue especially shows-up when code is compiled using the
-fno-elide-constructors compiler flag. For instance, this is useful when
attempting to collect accurate code coverage statistics.
The exact issue is the following:
The Parameters data member is correctly moved, thus making the
parameters occupy a new memory location in the target
object. Unfortunately, the default copying of the Adapters blindly
copies the vector of pointers, leaving each of these pointers
referencing the parameters in the original object instead of the copied
one. These pointers quickly become dangling when the original object is
deleted. This quickly leads to crashes.
The solution is to update the Adapters pointers when performing a move.
The copy constructor isn't useful for format objects and can thus be
deleted.
This resolves PR33388.
Differential Revision: https://reviews.llvm.org/D34463
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310475
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Nirav Dave [Wed, 9 Aug 2017 13:37:07 +0000 (13:37 +0000)]
[DAG] Explicitly cleanup merged load values during store merge. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310474
91177308-0d34-0410-b5e6-
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Haojian Wu [Wed, 9 Aug 2017 12:49:20 +0000 (12:49 +0000)]
Fix -Wpessimizing-move warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310469
91177308-0d34-0410-b5e6-
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Coby Tayree [Wed, 9 Aug 2017 12:32:05 +0000 (12:32 +0000)]
[AsmParser][AVX512]Enhance OpMask/Zero/Merge syntax check rubostness
Adopt a more strict approach regarding what marks should/can appear after a destination register, when operating upon an AVX512 platform.
Differential Revision: https://reviews.llvm.org/D35785
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310467
91177308-0d34-0410-b5e6-
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Jonas Paulsson [Wed, 9 Aug 2017 11:28:01 +0000 (11:28 +0000)]
[LSR / TTI / SystemZ] Eliminate TargetTransformInfo::isFoldableMemAccess()
isLegalAddressingMode() has recently gained the extra optional Instruction*
parameter, and therefore it can now do the job that previously only
isFoldableMemAccess() could do.
The SystemZ implementation of isLegalAddressingMode() has gained the
functionality of checking for offsets, which used to be done with
isFoldableMemAccess().
The isFoldableMemAccess() hook has been removed everywhere.
Review: Quentin Colombet, Ulrich Weigand
https://reviews.llvm.org/D35933
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310463
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Jonas Paulsson [Wed, 9 Aug 2017 11:27:46 +0000 (11:27 +0000)]
[LoopStrengthReduce] Don't neglect the Fixup.Offset in isAMCompletelyFolded().
In the recursive call to isAMCompletelyFolded(), the passed offset should be
the sum of F.BaseOffset and Fixup.Offset.
Review: Quentin Colombet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310462
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Simon Dardis [Wed, 9 Aug 2017 10:47:52 +0000 (10:47 +0000)]
[mips] PR34083 - Wimplicit-fallthrough warning in MipsAsmParser.cpp
Assert that a binary expression is actually a binary expression,
rather than potientially incorrectly attempting to handle it as a
unary expression.
This resolves PR34083.
Thanks to Simonn Pilgrim for reporting the issue!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310460
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Gabor Horvath [Wed, 9 Aug 2017 10:38:53 +0000 (10:38 +0000)]
Suppress a warning. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310459
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Oliver Stannard [Wed, 9 Aug 2017 09:40:51 +0000 (09:40 +0000)]
[AsmParser] Hash is not a comment on some targets
The '#' token is not a comment for all targets (on ARM and AArch64 it marks an
immediate operand), so we shouldn't treat it as such.
Comments are already converted to AsmToken::EndOfStatement by
AsmLexer::LexLineComment, so this check was unnecessary.
Differential Revision: https://reviews.llvm.org/D36405
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310457
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Chandler Carruth [Wed, 9 Aug 2017 09:37:39 +0000 (09:37 +0000)]
[LCG] Completely remove the map-based association of post-order numbers
to Nodes when removing ref edges from a RefSCC.
This map based association turns out to be pretty expensive for large
RefSCCs and pointless as we already have embedded data members inside
nodes that we use to track the DFS state. We can reuse one of those and
the map becomes unnecessary.
This also fuses the update of those numbers into the scan across the
pending stack of nodes so that we don't walk the nodes twice during the
DFS.
With this I expect the new PM to be faster than the old PM for the test
case I have been optimizing. That said, it also seems simpler and more
direct in many ways. The side storage was always pretty awkward.
The last remaining hot-spot in the profile of the LCG once this is done
will be the edge iterator walk in the DFS. I'll take a look at improving
that next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310456
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Davide Italiano [Wed, 9 Aug 2017 09:23:29 +0000 (09:23 +0000)]
[GlobalOpt] Switch an explicit loop to llvm::all_of(). NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310453
91177308-0d34-0410-b5e6-
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Chandler Carruth [Wed, 9 Aug 2017 09:14:34 +0000 (09:14 +0000)]
[LCG] Special case when removing a ref edge from a RefSCC leaves
that RefSCC still connected.
This is common and can be handled much more efficiently. As soon as we
know we've covered every node in the RefSCC with the DFS, we can simply
reset our state and return. This avoids numerous data structure updates
and other complexity.
On top of other changes, this appears to get new PM back to parity with
the old PM for a large protocol buffer message source code. The dense
map updates are very hot in this function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310451
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Chandler Carruth [Wed, 9 Aug 2017 09:05:27 +0000 (09:05 +0000)]
[LCG] Switch one of the update methods for the LazyCallGraph to support
limited batch updates.
Specifically, allow removing multiple reference edges starting from
a common source node. There are a few constraints that play into
supporting this form of batching:
1) The way updates occur during the CGSCC walk, about the most we can
functionally batch together are those with a common source node. This
also makes the batching simpler to implement, so it seems
a worthwhile restriction.
2) The far and away hottest function for large C++ files I measured
(generated code for protocol buffers) showed a huge amount of time
was spent removing ref edges specifically, so it seems worth focusing
there.
3) The algorithm for removing ref edges is very amenable to this
restricted batching. There are just both API and implementation
special casing for the non-batch case that gets in the way. Once
removed, supporting batches is nearly trivial.
This does modify the API in an interesting way -- now, we only preserve
the target RefSCC when the RefSCC structure is unchanged. In the face of
any splits, we create brand new RefSCC objects. However, all of the
users were OK with it that I could find. Only the unittest needed
interesting updates here.
How much does batching these updates help? I instrumented the compiler
when run over a very large generated source file for a protocol buffer
and found that the majority of updates are intrinsically updating one
function at a time. However, nearly 40% of the total ref edges removed
are removed as part of a batch of removals greater than one, so these
are the cases batching can help with.
When compiling the IR for this file with 'opt' and 'O3', this patch
reduces the total time by 8-9%.
Differential Revision: https://reviews.llvm.org/D36352
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310450
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Craig Topper [Wed, 9 Aug 2017 06:17:49 +0000 (06:17 +0000)]
[X86] Add the rest of the ADC and SBB instructions to isDefConvertible.
I don't know if this really affects anything. Just thought it was weird that we had all of the ADD/SUB/AND/OR/XOR instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310447
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Craig Topper [Wed, 9 Aug 2017 06:17:48 +0000 (06:17 +0000)]
[InstCombine] Use regular dyn_cast instead of a matcher for a simple case. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310446
91177308-0d34-0410-b5e6-
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Serguei Katkov [Wed, 9 Aug 2017 05:17:02 +0000 (05:17 +0000)]
[ImplicitNullCheck] Fix the bug when dependent instruction accesses memory
It is possible that dependent instruction may access memory.
In this case we must reject optimization because the memory change will
be visible in null handler basic block. So we will execute an instruction which
we must not execute if check fails.
Reviewers: sanjoy, reames
Reviewed By: sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D36392
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310443
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Zachary Turner [Wed, 9 Aug 2017 04:48:16 +0000 (04:48 +0000)]
Fix broken pdb test.
For some reason I didn't see this failure the first time. The
output format changed slightly, so we just have to update the
test for the new format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310442
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Zachary Turner [Wed, 9 Aug 2017 04:34:11 +0000 (04:34 +0000)]
Fix -Wreorder-fields warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310440
91177308-0d34-0410-b5e6-
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Zachary Turner [Wed, 9 Aug 2017 04:23:59 +0000 (04:23 +0000)]
[PDB] Fix an issue writing the publics stream.
In the refactor to merge the publics and globals stream, a bug
was introduced that wrote the wrong value for one of the fields
of the PublicsStreamHeader. This caused debugging in WinDbg
to break.
We had no way of dumping any of these fields, so in addition to
fixing the bug I've added dumping support for them along with a
test that verifies the correct value is written.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310439
91177308-0d34-0410-b5e6-
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Zachary Turner [Wed, 9 Aug 2017 04:23:25 +0000 (04:23 +0000)]
[PDB] Merge Global and Publics Builders.
The publics stream and globals stream are very similar. They both
contain a list of hash buckets that refer into a single shared stream,
the symbol record stream. Because of the need for each builder to manage
both an independent hash stream as well as a single shared record
stream, making the two builders be independent entities is not the right
design. This patch merges them into a single class, of which only a
single instance is needed to create all 3 streams. PublicsStreamBuilder
and GlobalsStreamBuilder are now merged into the single GSIStreamBuilder
class, which writes all 3 streams at once.
Note that this patch does not contain any functionality change. So we're
still not yet writing any records to the globals stream. All we're doing
is making it so that when we do start writing records to the globals,
this refactor won't have to be part of that patch.
Differential Revision: https://reviews.llvm.org/D36489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310438
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Craig Topper [Wed, 9 Aug 2017 01:30:22 +0000 (01:30 +0000)]
[InstCombine] Add a test case for a missed opportunity to turn a select into logic ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310434
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Eugene Zelenko [Wed, 9 Aug 2017 00:06:29 +0000 (00:06 +0000)]
[AMDGPU] Revert r310429 changes in AMDKernelCodeT.h which broke some build bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310430
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Eugene Zelenko [Tue, 8 Aug 2017 23:53:55 +0000 (23:53 +0000)]
[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310429
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Quentin Colombet [Tue, 8 Aug 2017 22:22:30 +0000 (22:22 +0000)]
Revert "[GlobalISel] Remove the GISelAccessor API."
This reverts commit r310115.
It causes a linker failure for the one of the unittests of AArch64 on one
of the linux bot:
http://lab.llvm.org:8011/builders/clang-ppc64le-linux-multistage/builds/3429
: && /home/fedora/gcc/install/gcc-7.1.0/bin/g++ -fPIC
-fvisibility-inlines-hidden -Werror=date-time -std=c++11 -Wall -W
-Wno-unused-parameter -Wwrite-strings -Wcast-qual
-Wno-missing-field-initializers -pedantic -Wno-long-long
-Wno-maybe-uninitialized -Wdelete-non-virtual-dtor -Wno-comment
-ffunction-sections -fdata-sections -O2
-L/home/fedora/gcc/install/gcc-7.1.0/lib64 -Wl,-allow-shlib-undefined
-Wl,-O3 -Wl,--gc-sections
unittests/Target/AArch64/CMakeFiles/AArch64Tests.dir/InstSizes.cpp.o -o
unittests/Target/AArch64/AArch64Tests
lib/libLLVMAArch64CodeGen.so.6.0.0svn lib/libLLVMAArch64Desc.so.6.0.0svn
lib/libLLVMAArch64Info.so.6.0.0svn lib/libLLVMCodeGen.so.6.0.0svn
lib/libLLVMCore.so.6.0.0svn lib/libLLVMMC.so.6.0.0svn
lib/libLLVMMIRParser.so.6.0.0svn lib/libLLVMSelectionDAG.so.6.0.0svn
lib/libLLVMTarget.so.6.0.0svn lib/libLLVMSupport.so.6.0.0svn -lpthread
lib/libgtest_main.so.6.0.0svn lib/libgtest.so.6.0.0svn -lpthread
-Wl,-rpath,/home/buildbots/ppc64le-clang-multistage-test/clang-ppc64le-multistage/stage1/lib
&& :
unittests/Target/AArch64/CMakeFiles/AArch64Tests.dir/InstSizes.cpp.o:(.toc+0x0):
undefined reference to `vtable for llvm::LegalizerInfo'
unittests/Target/AArch64/CMakeFiles/AArch64Tests.dir/InstSizes.cpp.o:(.toc+0x8):
undefined reference to `vtable for llvm::RegisterBankInfo'
The particularity of this bot is that it is built with
BUILD_SHARED_LIBS=ON
However, I was not able to reproduce the problem so far.
Reverting to unblock the bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310425
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Nemanja Ivanovic [Tue, 8 Aug 2017 22:17:31 +0000 (22:17 +0000)]
My commit r310346 introduced some valid warnings. This cleans them up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310424
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Jessica Paquette [Tue, 8 Aug 2017 21:51:26 +0000 (21:51 +0000)]
[MachineOutliner] Ensure AArch64 outliner doesn't mess with W30 or LR
Before, the outliner would mark all instructions that read from/modify LR as
illegal. This doesn't handle W30, which overlaps with LR. This shouldn't be
outlined.
This commit fixes that by making modifiesRegister() and readsRegister() look at
W30 + take in a TRI argument. This makes sure that modifiesRegister() and
readsRegister() won't outline either of W30 and LR.
https://reviews.llvm.org/D36435
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310422
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Wei Mi [Tue, 8 Aug 2017 21:40:14 +0000 (21:40 +0000)]
[GVN] Remove stale entries in phitranslate cache when new phi is generated for PRE
When a new phi is generated for scalarpre of an expression, the phiTranslate cache
will become stale: Before PRE, the candidate expression must not be available in a
predecessor block, and phitranslate will cache the information. After PRE, the
expression will become available in all predecessor blocks, so the related entries
in phiTranslate cache becomes stale. The patch will simply remove the stale entries
so phiTranslate can be recomputed next time.
The stale entries in phitranslate cache will not affect correctness but will cause
missing PRE opportunity for later instructions.
Differential Revision: https://reviews.llvm.org/D36124
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310421
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Nuno Lopes [Tue, 8 Aug 2017 21:25:26 +0000 (21:25 +0000)]
BasicAA: assert on another case where aliasGEP shouldn't get a PartialAlias response
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310420
91177308-0d34-0410-b5e6-
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Dehao Chen [Tue, 8 Aug 2017 20:57:33 +0000 (20:57 +0000)]
Make ICP uses PSI to check for hotness.
Summary: Currently, ICP checks the count against a fixed value to see if it is hot enough to be promoted. This does not work for SamplePGO because sampled count may be much smaller. This patch uses PSI to check if the count is hot enough to be promoted.
Reviewers: davidxl, tejohnson, eraman
Reviewed By: davidxl
Subscribers: sanjoy, llvm-commits, mehdi_amini
Differential Revision: https://reviews.llvm.org/D36341
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310416
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Reid Kleckner [Tue, 8 Aug 2017 20:30:14 +0000 (20:30 +0000)]
[codeview] Emit nested enums and typedefs from classes
Previously we limited ourselves to only emitting nested classes, but we
need other kinds of types as well.
This fixes the Visual Studio STL visualizers, so that users can
visualize std::string and other objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310410
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Craig Topper [Tue, 8 Aug 2017 20:14:11 +0000 (20:14 +0000)]
[InstCombine] Support pulling left shifts through a subtract with constant LHS
We already support pulling through an add with constant RHS. We can do the same for subtract.
Differential Revision: https://reviews.llvm.org/D36443
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310407
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Nirav Dave [Tue, 8 Aug 2017 20:01:18 +0000 (20:01 +0000)]
[DAG] Introduce peekThroughBitcast function. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310405
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Nirav Dave [Tue, 8 Aug 2017 19:52:19 +0000 (19:52 +0000)]
[DAG] Update comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310404
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Connor Abbott [Tue, 8 Aug 2017 18:52:22 +0000 (18:52 +0000)]
[AMDGPU] Add llvm.amdgpu.update.dpp intrinsic
Summary:
Now that we've made all the necessary backend changes, we can add a new
intrinsic which exposes the new capabilities to IR producers. Since
llvm.amdgpu.update.dpp is a strict superset of llvm.amdgpu.mov.dpp, we
should deprecate the former. We also add tests for all the functionality
that was added in previous changes, now that we can access it via an IR
construct.
Reviewers: tstellar, arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye
Differential Revision: https://reviews.llvm.org/D34718
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310399
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Chad Rosier [Tue, 8 Aug 2017 18:41:49 +0000 (18:41 +0000)]
[NewGVN] Use a cast instead of a dyn_cast.
Differential Revision: https://reviews.llvm.org/D36478
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310397
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Zachary Turner [Tue, 8 Aug 2017 18:34:44 +0000 (18:34 +0000)]
[PDB] Fix linking of function symbols and local variables.
The compiler outputs PROC32_ID symbols into the object files
for functions, and these symbols have an embedded type index
which, when copied to the PDB, refer to the IPI stream. However,
the symbols themselves are also converted into regular symbols
(e.g. S_GPROC32_ID -> S_GPROC32), and type indices in the regular
symbol records refer to the TPI stream. So this patch applies
two fixes to function records.
1. It converts ID symbols to the proper non-ID record type.
2. After remapping the type index from the object file's index
space to the PDB file/IPI stream's index space, it then
remaps that index to the TPI stream's index space by.
Besides functions, during the remapping process we were also
discarding symbol record types which we did not recognize.
In particular, we were discarding S_BPREL32 records, which is
what MSVC uses to describe local variables on the stack. So
this patch fixes that as well by copying them to the PDB.
Differential Revision: https://reviews.llvm.org/D36426
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310394
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Adrian Prantl [Tue, 8 Aug 2017 18:26:12 +0000 (18:26 +0000)]
dsymutil: support dwarf version mismatches between object and clang module
This adds a missing call to maybeUpdateMaxDwarfVersion when visitng a
clang module. Failing to do so will cause a failure when emitting
DWARF 4 forms into a CU that AsmPrinter believes to be DWARF 2.
rdar://problem/
33666528
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310392
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Anna Thomas [Tue, 8 Aug 2017 18:07:44 +0000 (18:07 +0000)]
[LoopVectorize] Fix assertion failure in Fcmp vectorization
Summary:
When vectorizing fcmps we can trip on incorrect cast assertion when setting the
FastMathFlags after generating the vectorized FCmp.
This can happen if the FCmp can be folded to true or false directly. The fix
here is to set the FastMathFlag using the FastMathFlagBuilder *before* creating
the FCmp Instruction. This is what's done by other optimizations such as
InstCombine.
Added a test case which trips on cast assertion without this patch.
Reviewers: Ayal, mssimpso, mkuper, gilr
Reviewed by: Ayal, mssimpso
Subscribers: llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D36244
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310389
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Tim Northover [Tue, 8 Aug 2017 17:16:46 +0000 (17:16 +0000)]
Revert "[ARM] Fix assembly and disassembly for VMRS/VMSR"
This reverts r310243. Only MVFR2 is actually restricted to v8 and it'll be a
little while before we can get a proper fix together. Better that we allow
incorrect code than reject correct in the meantime.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310384
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Sanjoy Das [Tue, 8 Aug 2017 17:15:29 +0000 (17:15 +0000)]
[DomTree] Use a non-recursive DFS instead of a recursive one; NFC
Summary: The recursive DFS can stack overflow in pathological cases.
Reviewers: kuhar
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D36442
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310383
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Craig Topper [Tue, 8 Aug 2017 16:29:35 +0000 (16:29 +0000)]
[KnownBits][ValueTracking] Move the math for calculating known bits for add/sub into a static method in KnownBits object
I want to reuse this code in SimplifyDemandedBits handling of Add/Sub. This will make that easier.
Wonder if we should use it in SelectionDAG's computeKnownBits too.
Differential Revision: https://reviews.llvm.org/D36433
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310378
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Alex Bradbury [Tue, 8 Aug 2017 16:20:39 +0000 (16:20 +0000)]
[RISCV] Fix warning about unused getSubtargetFeatureName()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310375
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Nuno Lopes [Tue, 8 Aug 2017 16:13:24 +0000 (16:13 +0000)]
BasicAA: aliasGEP shouldn't get a PartialAlias response here
add an assert() to ensure that's the case (as I'm not convinced it won't happen)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310373
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Simon Pilgrim [Tue, 8 Aug 2017 16:10:33 +0000 (16:10 +0000)]
[DAGCombiner] simplifyShuffleMask - handle UNDEF inputs from shuffles as well as BUILD_VECTOR
Minor extension to D36393
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310372
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Alex Bradbury [Tue, 8 Aug 2017 14:43:36 +0000 (14:43 +0000)]
[RISCV] Add basic RISCVAsmParser (missing files)
This commit adds the files missing from rL310361. Apologies for the noise.
Differential Revision: https://reviews.llvm.org/D23563
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310363
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Alex Bradbury [Tue, 8 Aug 2017 14:32:35 +0000 (14:32 +0000)]
[RISCV] Add basic RISCVAsmParser
This doesn't yet support parsing things like %pcrel_hi(foo), but will handle
basic instructions with register or immediate operands.
Differential Revision: https://reviews.llvm.org/D23563
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310361
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