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6 years ago[SelectionDAG] Teach computeKnownBits some improvements to ISD::SRL with a non-splat...
Craig Topper [Mon, 4 Dec 2017 05:38:42 +0000 (05:38 +0000)]
[SelectionDAG] Teach computeKnownBits some improvements to ISD::SRL with a non-splat constant shift amount.

If we have a non-splat constant shift amount, the minimum shift amount can be used to infer the number of zero upper bits of the result. There's probably a lot more that we can do here, but this
fixes a case where I wanted to infer the sign bit as zero when all the shift amounts are non-zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319639 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX512] Tag PH2PS/PS2PH conversion instructions scheduler classes
Simon Pilgrim [Sun, 3 Dec 2017 21:43:54 +0000 (21:43 +0000)]
[X86][AVX512] Tag PH2PS/PS2PH conversion instructions scheduler classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319637 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX512] Tag packed F2I/I2F/F2F conversion instructions scheduler class
Simon Pilgrim [Sun, 3 Dec 2017 21:16:12 +0000 (21:16 +0000)]
[X86][AVX512] Tag packed F2I/I2F/F2F conversion instructions scheduler class

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319636 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX512] Regenerate schedule tests.
Simon Pilgrim [Sun, 3 Dec 2017 21:07:36 +0000 (21:07 +0000)]
[X86][AVX512] Regenerate schedule tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319635 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] Remove unused IIC_SSE_CVT_PI2PS_RR/IIC_SSE_CVT_PI2PS_RM itineraries
Simon Pilgrim [Sun, 3 Dec 2017 20:57:04 +0000 (20:57 +0000)]
[X86][SSE] Remove unused IIC_SSE_CVT_PI2PS_RR/IIC_SSE_CVT_PI2PS_RM itineraries

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319634 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCodeGen: Fix SelectionDAGISel::LowerArguments for sret addr space
Yaxun Liu [Sun, 3 Dec 2017 03:31:45 +0000 (03:31 +0000)]
CodeGen: Fix SelectionDAGISel::LowerArguments for sret addr space

SelectionDAGISel::LowerArguments assumes sret addr space is 0, which is
not true for amdgcn---amdgiz target.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D40255

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319630 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SelectionDAG] Use the inlined APInt shift methods since we've already bounds checked...
Craig Topper [Sun, 3 Dec 2017 03:07:09 +0000 (03:07 +0000)]
[SelectionDAG] Use the inlined APInt shift methods since we've already bounds checked the shift.

The version that takes APInt is out of line. The 'unsigned' version optimizes for the common case of single word APInts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319628 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoReland "[WebAssembly] Add visibility flag to Wasm symbol flags""
Sam Clegg [Sun, 3 Dec 2017 01:19:23 +0000 (01:19 +0000)]
Reland "[WebAssembly] Add visibility flag to Wasm symbol flags""

Original change was rL319488.

This was reverted rL319602 due to a gcc 7.1 warning.

Differential Revision: https://reviews.llvm.org/D40772

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319626 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix typo in emitted attribute name
Matt Arsenault [Sun, 3 Dec 2017 00:03:01 +0000 (00:03 +0000)]
Fix typo in emitted attribute name

Fixes build when using this attribute combination
on an intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319625 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ValueTracking] Pass only a single lambda to computeKnownBitsFromShiftOperator by...
Craig Topper [Sat, 2 Dec 2017 23:42:17 +0000 (23:42 +0000)]
[ValueTracking] Pass only a single lambda to computeKnownBitsFromShiftOperator by using KnownBits struct instead of separate APInts. NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319624 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCodeGen: Fix pointer info in SplitVecOp_EXTRACT_VECTOR_ELT/SplitVecRes_INSERT_VECTOR_ELT
Yaxun Liu [Sat, 2 Dec 2017 22:13:22 +0000 (22:13 +0000)]
CodeGen: Fix pointer info in SplitVecOp_EXTRACT_VECTOR_ELT/SplitVecRes_INSERT_VECTOR_ELT

Two issues found when doing codegen for splitting vector with non-zero alloca addr space:

DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT/SplitVecOp_EXTRACT_VECTOR_ELT uses dummy pointer info for creating
SDStore. Since one pointer operand contains multiply and add, InferPointerInfo is unable to
infer the correct pointer info, which ends up with a dummy pointer info for the target to lower
store and results in isel failure. The fix is to introduce MachinePointerInfo::getUnknownStack to
represent MachinePointerInfo which is known in alloca address space but without other information.

TargetLowering::getVectorElementPointer uses value type of pointer in addr space 0 for
multiplication of index and then add it to the pointer. However the pointer may be in an addr
space which has different size than addr space 0. The fix is to use the pointer value type for
index multiplication.

Differential Revision: https://reviews.llvm.org/D39758

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319622 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[cmake] Re-commit: Remove redundant call to cmake when building host tools.
Don Hinton [Sat, 2 Dec 2017 19:12:38 +0000 (19:12 +0000)]
[cmake] Re-commit: Remove redundant call to cmake when building host tools.

Also pass CMAKE_(C|CXX)_COMPILER to add_custom_command.

Summary:
Remove the redundant, config-time call to cmake when
building host tools for cross compiles or optimized tablegen..

The config-time call to cmake is redundant because it will always get
called again when the CONFIGURE_LLVM_${target_name} target fires at
build-time.  This speeds up initial configuration, but has no affect
on build behavior.

Differential Revision: https://reviews.llvm.org/D40229

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319620 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-readobj] Remove redundant local variables to reduce the code. NFC
Simon Atanasyan [Sat, 2 Dec 2017 13:06:40 +0000 (13:06 +0000)]
[llvm-readobj] Remove redundant local variables to reduce the code. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319617 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-readobj] Print static MIPS GOT
Simon Atanasyan [Sat, 2 Dec 2017 13:06:35 +0000 (13:06 +0000)]
[llvm-readobj] Print static MIPS GOT

If a linked binary file contains a dynamic section, the GOT layout
defined by the dynamic section entries. In a statically linked file
the GOT is just a series of entries. This change teaches `llvm-readobj`
to print the GOT in that case. That provides a feature parity with GNU
`readelf`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319616 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-readobj] Delete unused method argument. NFC
Simon Atanasyan [Sat, 2 Dec 2017 13:06:27 +0000 (13:06 +0000)]
[llvm-readobj] Delete unused method argument. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319615 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] Cleanup float/int conversion scheduler itinerary classes
Simon Pilgrim [Sat, 2 Dec 2017 12:27:44 +0000 (12:27 +0000)]
[X86][SSE] Cleanup float/int conversion scheduler itinerary classes

Makes it easier to grok where each is supposed to be used, mainly useful for adding to the AVX512 instructions but hopefully can be used more in SSE/AVX as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319614 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Fix copy paste mistake in test case for r319612.
Craig Topper [Sat, 2 Dec 2017 08:39:02 +0000 (08:39 +0000)]
[X86] Fix copy paste mistake in test case for r319612.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319613 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Teach the assembler to support %db8-%db15 as aliases for %dr8-%dr15.
Craig Topper [Sat, 2 Dec 2017 08:27:46 +0000 (08:27 +0000)]
[X86] Teach the assembler to support %db8-%db15 as aliases for %dr8-%dr15.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319612 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Support %dr8-%dr15 in the assembler.
Craig Topper [Sat, 2 Dec 2017 08:27:45 +0000 (08:27 +0000)]
[X86] Support %dr8-%dr15 in the assembler.

Apparently I failed to make this work when I fixed it in the disassembler way back in r224862.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319611 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCMAKE: help CheckAtomic find check_library_exists
Martell Malone [Sat, 2 Dec 2017 07:17:01 +0000 (07:17 +0000)]
CMAKE: help CheckAtomic find check_library_exists

lldb fails to build standalone on x86

-- Performing Test HAVE_CXX_ATOMICS64_WITHOUT_LIB - Failed
CMake Error at CheckAtomic.cmake:66 (check_library_exists):
  Unknown CMake command "check_library_exists".
Call Stack (most recent call first):
  LLDBStandalone.cmake:90 (include)
CMakeLists.txt:3 (include)

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D40220

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319610 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARC] Add instruction subset for the ARC backend.
Tatyana Krasnukha [Sat, 2 Dec 2017 05:25:17 +0000 (05:25 +0000)]
[ARC] Add instruction subset for the ARC backend.

Reviewers: petecoup, kparzysz

Reviewed By: petecoup

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D37983

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319609 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAG][AArch64] Disable post-legalization store
Nirav Dave [Sat, 2 Dec 2017 04:01:26 +0000 (04:01 +0000)]
[DAG][AArch64] Disable post-legalization store

Disable post-legalization store for AArch64 backend which is causing
errors out-of-tree.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319607 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Revert r319488 "Add visibility flag to Wasm symbol flags"
Heejin Ahn [Sat, 2 Dec 2017 02:05:06 +0000 (02:05 +0000)]
[WebAssembly] Revert r319488 "Add visibility flag to Wasm symbol flags"

This patch reportedly broke one of LLVM bots (ubuntu-gcc7.1-werror).

See http://lab.llvm.org:8011/builders/ubuntu-gcc7.1-werror/builds/3369 for
details.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319602 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[X86] Improvement in CodeGen instruction selection for LEAs."
Matt Morehouse [Fri, 1 Dec 2017 22:20:26 +0000 (22:20 +0000)]
Revert "[X86] Improvement in CodeGen instruction selection for LEAs."

This reverts r319543, due to ASan bot breakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319591 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[libFuzzer] add a flag -malloc_limit_mb
Kostya Serebryany [Fri, 1 Dec 2017 22:12:04 +0000 (22:12 +0000)]
[libFuzzer] add a flag -malloc_limit_mb

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319590 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MachineOutliner] NFC: Throw out self-intersections on candidates early
Jessica Paquette [Fri, 1 Dec 2017 21:56:56 +0000 (21:56 +0000)]
[MachineOutliner] NFC: Throw out self-intersections on candidates early

Currently, the outliner considers candidates that intersect with themselves in
the candidate pruning step. That is, candidates of the form "AA" in ranges like
"AAAAAA". In that range, it looks like there are 5 instances of "AA" that could
possibly be outlined, and that's considered in the benefit calculation.

However, only at most 3 instances of "AA" could ever be outlined in "AAAAAA".
Thus, it's possible to pass through "AA" to the candidate selection step even
though it's *never* the case that "AA" could be outlined. This makes it so that
when we find candidates, we consider only non-overlapping occurrences of that
candidate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319588 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAG][ARM] Revert "Reenable post-legalize store merge"
Nirav Dave [Fri, 1 Dec 2017 21:55:47 +0000 (21:55 +0000)]
[DAG][ARM] Revert "Reenable post-legalize store merge"

due to failures in AArch and ARM code gen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319587 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MC] Handle unknown literal register numbers in .cfi_* directives
Jake Ehrlich [Fri, 1 Dec 2017 21:44:27 +0000 (21:44 +0000)]
[MC] Handle unknown literal register numbers in .cfi_* directives

r230670 introduced a step to map EH register numbers to standard
DWARF register numbers. This failed to consider the case when a
user .cfi_* directive uses an integer literal rather than a
register name, to specify a DWARF register number that has no
corresponding LLVM register number (e.g. a special register that
the compiler and assembler have no name for).

Fixes PR34028.

Patch by Roland McGrath

Differential Revision: https://reviews.llvm.org/D36493

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319586 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[IndVars] Fix a bug introduced in r317012
Philip Reames [Fri, 1 Dec 2017 20:57:19 +0000 (20:57 +0000)]
[IndVars] Fix a bug introduced in r317012

Turns out we can have comparisons which are indirect users of the induction variable that we can make invariant.  In this case, there is no loop invariant value contributing and we'd fail an assert.

The test case was found by a java fuzzer and reduced.  It's a real cornercase.  You have to have a static loop which we've already proven only executes once, but haven't broken the backedge on, and an inner phi whose result can be constant folded by SCEV using exit count reasoning but not proven by isKnownPredicate.  To my knowledge, only the fuzzer has hit this case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319583 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[cmake] Revert (rL319574): Resubmit Remove redundant call to cmake when building...
Don Hinton [Fri, 1 Dec 2017 20:46:45 +0000 (20:46 +0000)]
[cmake] Revert (rL319574): Resubmit Remove redundant call to cmake when building host tools.

Still fails for some bots.

Differential Revision: https://reviews.llvm.org/D40229

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319582 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[opt-remarks] If hotness threshold is set, ignore remarks without hotness
Adam Nemet [Fri, 1 Dec 2017 20:41:38 +0000 (20:41 +0000)]
[opt-remarks] If hotness threshold is set, ignore remarks without hotness

These are blocks that haven't not been executed during training.  For large
projects this could make a significant difference.  For the project, I was
looking at, I got an order of magnitude decrease in the size of the total YAML
files with this and r319235.

Differential Revision: https://reviews.llvm.org/D40678

Re-commit after fixing the failing testcase in rL319576, rL319577 and
rL319578.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319581 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[cmake] Resubmit Remove redundant call to cmake when building host tools.
Don Hinton [Fri, 1 Dec 2017 19:35:56 +0000 (19:35 +0000)]
[cmake] Resubmit Remove redundant call to cmake when building host tools.

Only pass Native to LLVM_TARGETS_TO_BUILD.

Summary:
Remove the redundant, config-time call to cmake when
building host tools for cross compiles or optimized tablegen..

The config-time call to cmake is redundant because it will always get
called again when the CONFIGURE_LLVM_${target_name} target fires at
build-time.  This speeds up initial configuration, but has no affect
on build behavior.

Differential Revision: https://reviews.llvm.org/D40229

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319574 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAGCombine] Simplify ISD::AND handling in ReduceLoadWidth
Eli Friedman [Fri, 1 Dec 2017 19:33:56 +0000 (19:33 +0000)]
[DAGCombine] Simplify ISD::AND handling in ReduceLoadWidth

Followup to D39595. Removes a bunch of redundant checks.

Differential Revision: https://reviews.llvm.org/D40667

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319573 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX512] Tag subvector extract/insert instructions scheduler classes
Simon Pilgrim [Fri, 1 Dec 2017 18:40:32 +0000 (18:40 +0000)]
[X86][AVX512] Tag subvector extract/insert instructions scheduler classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319568 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[IR] Avoid dangling else warning. NFC.
Benjamin Kramer [Fri, 1 Dec 2017 18:39:58 +0000 (18:39 +0000)]
[IR] Avoid dangling else warning. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319567 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoIR printing improvement for loop passes - handle -print-module-scope
Fedor Sergeev [Fri, 1 Dec 2017 18:33:58 +0000 (18:33 +0000)]
IR printing improvement for loop passes - handle -print-module-scope

Summary:
Adding support for -print-module-scope similar to how it is
being done for function passes. This option causes loop-pass printer
to emit a whole-module IR instead of just a loop itself.

Reviewers: sanjoy, silvas, weimingz

Reviewed By: sanjoy

Subscribers: apilipenko, skatkov, llvm-commits

Differential Revision: https://reviews.llvm.org/D40247

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319566 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo] Bail out if making no progress dumping line tables.
Paul Robinson [Fri, 1 Dec 2017 18:25:30 +0000 (18:25 +0000)]
[DebugInfo] Bail out if making no progress dumping line tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319564 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[opt-remarks] If hotness threshold is set, ignore remarks without hotness"
Adam Nemet [Fri, 1 Dec 2017 18:12:29 +0000 (18:12 +0000)]
Revert "[opt-remarks] If hotness threshold is set, ignore remarks without hotness"

This reverts commit r319556.

Something is not working with this when used with sample-based profiling.
Investigating...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319562 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoIR printing improvement for function passes - introducing -print-module-scope
Fedor Sergeev [Fri, 1 Dec 2017 17:42:46 +0000 (17:42 +0000)]
IR printing improvement for function passes - introducing -print-module-scope

Summary:
When debugging function passes it happens to be rather useful to dump
the whole module before the transformation and then use this dump
to analyze this single transformation by running it separately
on that particular module state.

Introducing
    -print-module-scope
debugging option that forces all the function-level IR dumps
to become whole-module dumps.

This option builds on top of normal dumping controls like
   -print-before/after
   -filter-print-funcs

The plan is to eventually extend this option to cover other local passes
(at least loop passes) but that should go as a separate change.

Reviewers: sanjoy, weimingz, silvas, fedor.sergeev

Reviewed By: weimingz

Subscribers: apilipenko, skatkov, llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D40245

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319561 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix line endings. NFCI.
Simon Pilgrim [Fri, 1 Dec 2017 17:24:15 +0000 (17:24 +0000)]
Fix line endings. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319559 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX512] Tag VPERM2I/VPERM2T instructions scheduler class
Simon Pilgrim [Fri, 1 Dec 2017 17:23:06 +0000 (17:23 +0000)]
[X86][AVX512] Tag VPERM2I/VPERM2T instructions scheduler class

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319558 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[opt-remarks] If hotness threshold is set, ignore remarks without hotness
Adam Nemet [Fri, 1 Dec 2017 17:02:04 +0000 (17:02 +0000)]
[opt-remarks] If hotness threshold is set, ignore remarks without hotness

These are blocks that haven't not been executed during training.  For large
projects this could make a significant difference.  For the project, I was
looking at, I got an order of magnitude decrease in the size of the total YAML
files with this and r319235.

Differential Revision: https://reviews.llvm.org/D40678

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319556 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX512] Tag VFPCLASS instructions scheduler class
Simon Pilgrim [Fri, 1 Dec 2017 16:51:48 +0000 (16:51 +0000)]
[X86][AVX512] Tag VFPCLASS instructions scheduler class

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319554 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX512] Tag VPSHUFBITQMB instructions scheduler class
Simon Pilgrim [Fri, 1 Dec 2017 16:35:57 +0000 (16:35 +0000)]
[X86][AVX512] Tag VPSHUFBITQMB instructions scheduler class

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319553 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX512] Tag VPCOMRESS/VPEXPAND instructions scheduler classes
Simon Pilgrim [Fri, 1 Dec 2017 16:20:03 +0000 (16:20 +0000)]
[X86][AVX512] Tag VPCOMRESS/VPEXPAND instructions scheduler classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319551 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r319531 "[SLPVectorizer] Failure to beneficially vectorize 'copyable' elements...
Hans Wennborg [Fri, 1 Dec 2017 16:17:24 +0000 (16:17 +0000)]
Revert r319531 "[SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer binary ops."

It causes builds to fail with "Instruction does not dominate all uses" (PR35497).

> Patch tries to improve vectorization of the following code:
>
> void add1(int * __restrict dst, const int * __restrict src) {
>   *dst++ = *src++;
>   *dst++ = *src++ + 1;
>   *dst++ = *src++ + 2;
>   *dst++ = *src++ + 3;
> }
> Allows to vectorize even if the very first operation is not a binary add, but just a load.
>
> Fixed issues related to previous commit.
>
> Reviewers: spatel, mzolotukhin, mkuper, hfinkel, RKSimon, filcab, ABataev
>
> Reviewed By: ABataev, RKSimon
>
> Subscribers: llvm-commits, RKSimon
>
> Differential Revision: https://reviews.llvm.org/D28907

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319550 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] and + load combine tests
Sam Parker [Fri, 1 Dec 2017 15:31:41 +0000 (15:31 +0000)]
[ARM] and + load combine tests

Add a few more tests cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319548 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM][DAG] Reenable post-legalize store merge
Nirav Dave [Fri, 1 Dec 2017 14:49:26 +0000 (14:49 +0000)]
[ARM][DAG] Reenable post-legalize store merge

Summary: Reenable post-legalize stores with constant merging computation and cofrresponding test case.

Reviewers: eastig, efriedma

Subscribers: aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D40701

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319547 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd more triples to llc_test_checks.py
Sam Parker [Fri, 1 Dec 2017 14:27:11 +0000 (14:27 +0000)]
Add more triples to llc_test_checks.py

Added some commonly used Arm triples to the script, with and without
the -eabi suffix.

Differential Revision: https://reviews.llvm.org/D40708

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319545 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Improvement in CodeGen instruction selection for LEAs.
Jatin Bhateja [Fri, 1 Dec 2017 14:07:38 +0000 (14:07 +0000)]
[X86] Improvement in CodeGen instruction selection for LEAs.

Summary:
1/  Operand folding during complex pattern matching for LEAs has been extended, such that it promotes Scale to
     accommodate similar operand appearing in the DAG  e.g.
                 T1 = A + B
                 T2 = T1 + 10
                 T3 = T2 + A
    For above DAG rooted at T3, X86AddressMode will now look like
                Base = B , Index = A , Scale = 2 , Disp = 10

2/  During OptimizeLEAPass down the pipeline factorization is now performed over LEAs so that if there is an opportunity
     then complex LEAs (having 3 operands) could be factored out  e.g.
                 leal 1(%rax,%rcx,1), %rdx
                 leal 1(%rax,%rcx,2), %rcx
     will be factored as following
                 leal 1(%rax,%rcx,1), %rdx
                 leal (%rdx,%rcx)   , %edx

3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops, thus avoiding creation of any complex LEAs within a loop.

4/ Simplify LEA converts (lea (BASE,1,INDEX,0)  --> add (BASE, INDEX) which offers better through put.

PR32755 will be taken care of by this pathc.

Previous patch revisions : r313343 , r314886

Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy, jbhateja

Reviewed By: lsaba, RKSimon, jbhateja

Subscribers: jmolloy, spatel, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D35014

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319543 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] and + load combine tests
Sam Parker [Fri, 1 Dec 2017 13:42:39 +0000 (13:42 +0000)]
[ARM] and + load combine tests

Adding autogenerated tests for narrow load combines.

Differential Revision: https://reviews.llvm.org/D40709

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319542 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX512] Tag vshift/vpermv/pshufd/pshufb instructions scheduler classes
Simon Pilgrim [Fri, 1 Dec 2017 13:25:54 +0000 (13:25 +0000)]
[X86][AVX512] Tag vshift/vpermv/pshufd/pshufb instructions scheduler classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319540 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r319537: Bail out of a SimplifyCFG switch table opt at undef values.
Mikael Holmen [Fri, 1 Dec 2017 13:11:39 +0000 (13:11 +0000)]
Revert r319537: Bail out of a SimplifyCFG switch table opt at undef values.

Broke build bots so reverting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319539 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstSimplify] More fcmp cases when comparing against negative constants.
Florian Hahn [Fri, 1 Dec 2017 12:34:16 +0000 (12:34 +0000)]
[InstSimplify] More fcmp cases when comparing against negative constants.

Summary:
For known positive non-zero value X:
    fcmp uge X, -C => true
    fcmp ugt X, -C => true
    fcmp une X, -C => true
    fcmp oeq X, -C => false
    fcmp ole X, -C => false
    fcmp olt X, -C => false

Patch by Paul Walker.

Reviewers: majnemer, t.p.northover, spatel, RKSimon

Reviewed By: spatel

Subscribers: fhahn, llvm-commits

Differential Revision: https://reviews.llvm.org/D40012

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319538 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoBail out of a SimplifyCFG switch table opt at undef values.
Mikael Holmen [Fri, 1 Dec 2017 12:30:49 +0000 (12:30 +0000)]
Bail out of a SimplifyCFG switch table opt at undef values.

Summary:
A true or false result is expected from a comparison, but it seems the possibility of undef was overlooked, which could lead to a failed assert. This is fixed by this patch by bailing out if we encounter undef.

The bug is old and the assert has been there since the end of 2014, so it seems this is unusual enough to forego optimization.

Patch by: JesperAntonsson

Reviewers: spatel, eeckstein, hans

Reviewed By: hans

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D40639

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319537 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFollow-up to r319434 to turn the pass on by default
Nemanja Ivanovic [Fri, 1 Dec 2017 12:02:59 +0000 (12:02 +0000)]
Follow-up to r319434 to turn the pass on by default

Now that the patch has gone through the buildbot cycle,
turn it on by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319535 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] SiFixSGPRCopies should not modify non-divergent PHI
Alexander Timofeev [Fri, 1 Dec 2017 11:56:34 +0000 (11:56 +0000)]
[AMDGPU] SiFixSGPRCopies should not modify non-divergent PHI

Differential revision: https://reviews.llvm.org/D40556

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319534 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[cmake] Enable zlib support on windows
Pavel Labath [Fri, 1 Dec 2017 11:41:07 +0000 (11:41 +0000)]
[cmake] Enable zlib support on windows

Summary:
zlib support was hard-wired to off for (non-cygwin) windows targets.
This disables some features, such as reading debug info from compressed
dwarf sections.

This has been this way since zlib support was added in 2013 (r180083),
but there is no obvious reason for that. Zlib is perfectly capable of
being compiled for windows (it even has a cmake file that works out of
the box).

This enables one to turn on zlib support on windows, if one has zlib
avaliable.

Reviewers: rnk, beanz

Subscribers: mgorny, aprantl, llvm-commits

Differential Revision: https://reviews.llvm.org/D40655

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319533 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer...
Dinar Temirbulatov [Fri, 1 Dec 2017 11:10:47 +0000 (11:10 +0000)]
[SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer binary ops.

            Patch tries to improve vectorization of the following code:

            void add1(int * __restrict dst, const int * __restrict src) {
              *dst++ = *src++;
              *dst++ = *src++ + 1;
              *dst++ = *src++ + 2;
              *dst++ = *src++ + 3;
            }
            Allows to vectorize even if the very first operation is not a binary add, but just a load.

            Fixed issues related to previous commit.

            Reviewers: spatel, mzolotukhin, mkuper, hfinkel, RKSimon, filcab, ABataev

            Reviewed By: ABataev, RKSimon

            Subscribers: llvm-commits, RKSimon

            Differential Revision: https://reviews.llvm.org/D28907

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319531 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Don't enable LSan on Darwin for Apple clang 9.0.0
Jonas Devlieghere [Fri, 1 Dec 2017 10:49:47 +0000 (10:49 +0000)]
[lit] Don't enable LSan on Darwin for Apple clang 9.0.0

The latest clang that ships with Xcode (clang 900 or 9.0.0) does not
support LSan. This fixes the lit configuration to reflect that.

Differential revision: https://reviews.llvm.org/D40672

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319530 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Implement non-pipelined ‘mkdir’, ‘diff’ and ‘rm’ commands internally
Ying Yi [Fri, 1 Dec 2017 09:54:27 +0000 (09:54 +0000)]
[lit] Implement non-pipelined â€˜mkdir’, â€˜diff’ and â€˜rm’ commands internally

Summary:
The internal shell already supports 'cd', â€˜export’ and â€˜echo’ commands.
This patch adds implementation of non-pipelined â€˜mkdir’, â€˜diff’ and â€˜rm’
commands as the internal shell builtins.

Reviewed by: Zachary Turner, Reid Kleckner

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39567

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319528 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoGlobalISel: Enable the legalization of G_MERGE_VALUES and G_UNMERGE_VALUES
Volkan Keles [Fri, 1 Dec 2017 08:19:10 +0000 (08:19 +0000)]
GlobalISel: Enable the legalization of G_MERGE_VALUES and G_UNMERGE_VALUES

Summary: LegalizerInfo assumes all G_MERGE_VALUES and G_UNMERGE_VALUES instructions are legal, so it is not possible to legalize vector operations on illegal vector types. This patch fixes the problem by removing the related check and adding default actions for G_MERGE_VALUES and G_UNMERGE_VALUES.

Reviewers: qcolombet, ab, dsanders, aditya_nandakumar, t.p.northover, kristof.beyls

Reviewed By: dsanders

Subscribers: rovka, javed.absar, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D39823

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319524 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRecommit rL319407: [SROA] enable splitting for non-whole-alloca loads and stores
Hiroshi Inoue [Fri, 1 Dec 2017 06:05:05 +0000 (06:05 +0000)]
Recommit rL319407: [SROA] enable splitting for non-whole-alloca loads and stores

Recommiting once reverted patch rL319407 after adding a check for bit vector size to avoid failures in some build bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319522 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Custom legalize v2i32 gathers via widening rather than promoting.
Craig Topper [Fri, 1 Dec 2017 06:02:02 +0000 (06:02 +0000)]
[X86] Custom legalize v2i32 gathers via widening rather than promoting.

The default legalization for v2i32 is promotion to v2i64. This results in a gather that reads 64-bit elements rather than 32. If one of the elements is near a page boundary this can cause an illegal access that can fault.

We also miscalculate the scale for the gather which is an even worse problem, but we probably could have found a separate way to fix that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319521 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SelectionDAG] Make sure we explicitly sign extend the index when type promoting...
Craig Topper [Fri, 1 Dec 2017 06:02:00 +0000 (06:02 +0000)]
[X86][SelectionDAG] Make sure we explicitly sign extend the index when type promoting the index of scatter and gather.

Type promotion makes no guarantee about the contents of the promoted bits. Since the gather/scatter instruction will use the bits to calculate addresses, we need to ensure they aren't garbage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319520 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add another v2i32 gather test case with v2i64 index that wasn't sign extended.
Craig Topper [Fri, 1 Dec 2017 06:01:59 +0000 (06:01 +0000)]
[X86] Add another v2i32 gather test case with v2i64 index that wasn't sign extended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319519 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add a DAG combine to simplify masks for AVX2 gather instructions.
Craig Topper [Fri, 1 Dec 2017 02:49:07 +0000 (02:49 +0000)]
[X86] Add a DAG combine to simplify masks for AVX2 gather instructions.

AVX2 gathers only use the upper bit of the mask allowing us to simplify sign_extend_inreg to a shift left.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319514 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[cmake] Expose opt-viewer availability
Adam Nemet [Fri, 1 Dec 2017 01:44:26 +0000 (01:44 +0000)]
[cmake] Expose opt-viewer availability

This will be used in https://github.com/apple/swift/pull/12938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319511 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Update MC tests now that hidden attr is supported
Sam Clegg [Fri, 1 Dec 2017 01:18:47 +0000 (01:18 +0000)]
[WebAssembly] Update MC tests now that hidden attr is supported

Summary:
Support was added in rL319488 but these tests were not
updated.

Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish

Differential Revision: https://reviews.llvm.org/D40693

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319510 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd flag to ArchiveWriter to test GNU64 format more efficiently
Jake Ehrlich [Fri, 1 Dec 2017 00:54:28 +0000 (00:54 +0000)]
Add flag to ArchiveWriter to test GNU64 format more efficiently

Even with the sparse file optimizations the SYM64 test can still be painfully
slow. This unnecessarily slows down devs. It's critical that we test that the
switch to the SYM64 format occurs at 4GB but there isn't any better of a way to
fake the size of the file than sparse files. This change introduces a flag that
allows the cutoff to be arbitrarily set to whatever power of two is desired.
The flag is hidden as it really isn't meant to be used outside this one test.
This is unfortunate but appears necessary, at least until the average hard
drive is much faster.

The changes to the test require some explanation. Prior to this change we knew
that the SYM64 format was being used because the file was simply too large to
have validly handled this case if the SYM64 format were not used. To ensure
that the SYM64 format is still being used I am grepping the file for "SYM64".
Without changing the filename however this would be pointless because "SYM64"
would occur in the file either way. So the filename of the test is also changed
in order to avoid this issue.

Differential Revision: https://reviews.llvm.org/D40632

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319507 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMark all library options as hidden.
Zachary Turner [Fri, 1 Dec 2017 00:53:10 +0000 (00:53 +0000)]
Mark all library options as hidden.

These command line options are not intended for public use, and often
don't even make sense in the context of a particular tool anyway. About
90% of them are already hidden, but when people add new options they
forget to hide them, so if you were to make a brand new tool today, link
against one of LLVM's libraries, and run tool -help you would get a
bunch of junk that doesn't make sense for the tool you're writing.

This patch hides these options. The real solution is to not have
libraries defining command line options, but that's a much larger effort
and not something I'm prepared to take on.

Differential Revision: https://reviews.llvm.org/D40674

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319505 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agodocs/GettingStarted.rst: Update the list of release versions and tags
Hans Wennborg [Thu, 30 Nov 2017 23:47:30 +0000 (23:47 +0000)]
docs/GettingStarted.rst: Update the list of release versions and tags

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319502 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Use carry-less adds in FI elimination
Matt Arsenault [Thu, 30 Nov 2017 23:42:30 +0000 (23:42 +0000)]
AMDGPU: Use carry-less adds in FI elimination

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319501 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoThinLTOBitcodeWriter: Try harder to discard unused references to the merged module.
Peter Collingbourne [Thu, 30 Nov 2017 23:05:52 +0000 (23:05 +0000)]
ThinLTOBitcodeWriter: Try harder to discard unused references to the merged module.

If the thin module has no references to an internal global in the
merged module, we need to make sure to preserve that property if the
global is a member of a comdat group, as otherwise promotion can end
up adding global symbols to the comdat, which is not allowed.

This situation can arise if the external global in the thin module
has dead constant users, which would cause use_empty() to return
false and would cause us to try to promote it. To prevent this from
happening, discard the dead constant users before asking whether a
global is empty.

Differential Revision: https://reviews.llvm.org/D40593

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319494 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSimplify the DenseSet used for hashing CodeView records.
Zachary Turner [Thu, 30 Nov 2017 23:00:30 +0000 (23:00 +0000)]
Simplify the DenseSet used for hashing CodeView records.

This was storing the hash alongside the key so that the hash
doesn't need to be re-computed every time, but in doing so it
was allocating a structure to keep the key size small in the
DenseMap.  This is a noble goal, but it also leads to a pointer
indirection on every probe, and this cost of this pointer
indirection ends up being higher than the cost of having a
slightly larger entry in the hash table.  Removing this not only
simplifies the code, but yields a small but noticeable
performance improvement in the type merging algorithm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319493 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Use gfx9 carry-less add/sub instructions
Matt Arsenault [Thu, 30 Nov 2017 22:51:26 +0000 (22:51 +0000)]
AMDGPU: Use gfx9 carry-less add/sub instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319491 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoXOR the frame pointer with the stack cookie when protecting the stack
Reid Kleckner [Thu, 30 Nov 2017 22:41:21 +0000 (22:41 +0000)]
XOR the frame pointer with the stack cookie when protecting the stack

Summary: This strengthens the guard and matches MSVC.

Reviewers: hans, etienneb

Subscribers: hiraditya, JDevlieghere, vlad.tsyrklevich, llvm-commits

Differential Revision: https://reviews.llvm.org/D40622

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319490 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd visibility flag to Wasm symbol flags
Sam Clegg [Thu, 30 Nov 2017 22:34:58 +0000 (22:34 +0000)]
Add visibility flag to Wasm symbol flags

The LLVM "hidden" flag needs to be passed through the Wasm
intermediate objects in order for the linker to apply
it to the final Wasm object.

The corresponding change in LLD is here: https://github.com/WebAssembly/lld/pull/14

Patch by Nicholas Wilson

Differential Revision: https://reviews.llvm.org/D40442

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319488 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[memcpyopt] Commit file missed in r319482.
Dan Gohman [Thu, 30 Nov 2017 22:13:13 +0000 (22:13 +0000)]
[memcpyopt] Commit file missed in r319482.

This change was meant to be included with r319482 but was accidentally
omitted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319483 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[memcpyopt] Teach memcpyopt to optimize across basic blocks
Dan Gohman [Thu, 30 Nov 2017 22:10:53 +0000 (22:10 +0000)]
[memcpyopt] Teach memcpyopt to optimize across basic blocks

This teaches memcpyopt to make a non-local memdep query when a local query
indicates that the dependency is non-local. This notably allows it to
eliminate many more llvm.memcpy calls in common Rust code, often by 20-30%.

Fixes PR28958.

Differential Revision: https://reviews.llvm.org/D38374

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319482 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InlineCost] Prefer getFunction() to two calls to getParent().
Davide Italiano [Thu, 30 Nov 2017 22:10:35 +0000 (22:10 +0000)]
[InlineCost] Prefer getFunction() to two calls to getParent().

Improves clarity, also slightly cheaper. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319481 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm] Add stripped installation targets
Shoaib Meenai [Thu, 30 Nov 2017 21:48:26 +0000 (21:48 +0000)]
[llvm] Add stripped installation targets

CMake's generated installation scripts support `CMAKE_INSTALL_DO_STRIP`
to enable stripping the installed binaries. LLVM's build system doesn't
expose this option to the `install-` targets, but it's useful in
conjunction with `install-distribution`.

Add a new function to create the install targets, which creates both the
regular install target and a second install target that strips during
installation. Change the creation of all installation targets to use
this new function. Stripping doesn't make a whole lot of sense for some
installation targets (e.g. the LLVM headers), but consistency doesn't
hurt.

I'll make other repositories (e.g. clang, compiler-rt) use this in a
follow-up, and then add an `install-distribution-stripped` target to
actually accomplish the end goal of creating a stripped distribution. I
don't want to do that step yet because the creation of that target would
depend on the presence of the `install-*-stripped` target for each
distribution component, and the distribution components from other
repositories will be missing that target right now.

Differential Revision: https://reviews.llvm.org/D40620

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319480 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Implement HexagonSubtarget::useAA()
Krzysztof Parzyszek [Thu, 30 Nov 2017 21:25:28 +0000 (21:25 +0000)]
[Hexagon] Implement HexagonSubtarget::useAA()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319477 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Fix wrong check in test/CodeGen/Hexagon/newvaluejump-solo.mir
Krzysztof Parzyszek [Thu, 30 Nov 2017 21:23:19 +0000 (21:23 +0000)]
[Hexagon] Fix wrong check in test/CodeGen/Hexagon/newvaluejump-solo.mir

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319476 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[globalisel][tablegen] Add support for relative AtomicOrderings
Daniel Sanders [Thu, 30 Nov 2017 21:05:59 +0000 (21:05 +0000)]
[globalisel][tablegen] Add support for relative AtomicOrderings

No test yet because the relevant rules are blocked on the atomic_load,
and atomic_store nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319475 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Fix wrong pass in testcase
Krzysztof Parzyszek [Thu, 30 Nov 2017 20:39:15 +0000 (20:39 +0000)]
[Hexagon] Fix wrong pass in testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319471 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Solo instructions cannot be used with new value jumps
Krzysztof Parzyszek [Thu, 30 Nov 2017 20:32:54 +0000 (20:32 +0000)]
[Hexagon] Solo instructions cannot be used with new value jumps

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319470 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] Convert test/tools/llvm-objdump/AMDGPU/source-lines.ll to amdgiz
Yaxun Liu [Thu, 30 Nov 2017 20:27:56 +0000 (20:27 +0000)]
[AMDGPU] Convert test/tools/llvm-objdump/AMDGPU/source-lines.ll to amdgiz

Differential Revision: https://reviews.llvm.org/D40653

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319469 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Promote i8 CTPOP to i32 instead of i16 when we have the POPCNT instruction.
Craig Topper [Thu, 30 Nov 2017 20:15:31 +0000 (20:15 +0000)]
[X86] Promote i8 CTPOP to i32 instead of i16 when we have the POPCNT instruction.

The 32-bit version is shorter to encode and the zext we emit for the promotion is likely going to be a 32-bit zero extend anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319468 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-objcopy] Add support for --only-keep/-j and --keep
Jake Ehrlich [Thu, 30 Nov 2017 20:14:53 +0000 (20:14 +0000)]
[llvm-objcopy] Add support for --only-keep/-j and --keep

This change adds support for the --only-keep option and the -j alias as well.
A common use case for these being used together is to dump a specific section's
data. Additionally the --keep option is added (GNU objcopy doesn't have this)
to avoid removing a bunch of things. This allows people to err on the side of
stripping aggressively and then to keep the specific bits that they need for
their application.

Differential Revision: https://reviews.llvm.org/D39021

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319467 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[aarch64][globalisel] Legalize G_ATOMIC_CMPXCHG_WITH_SUCCESS and G_ATOMICRMW_*
Daniel Sanders [Thu, 30 Nov 2017 20:11:42 +0000 (20:11 +0000)]
[aarch64][globalisel] Legalize G_ATOMIC_CMPXCHG_WITH_SUCCESS and G_ATOMICRMW_*

G_ATOMICRMW_* is generally legal on AArch64. The exception is G_ATOMICRMW_NAND.

G_ATOMIC_CMPXCHG_WITH_SUCCESS needs to be lowered to G_ATOMIC_CMPXCHG with an
external comparison.

Note that IRTranslator doesn't generate these instructions yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319466 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel][IRTranslator] Fix crash during translation of zero sized loads/stores...
Amara Emerson [Thu, 30 Nov 2017 20:06:02 +0000 (20:06 +0000)]
[GlobalISel][IRTranslator] Fix crash during translation of zero sized loads/stores/args/returns.

This fixes PR35358.

rdar://35619533

Differential Revision: https://reviews.llvm.org/D40604

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319465 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Skip counter promotion for infinite loops
Xinliang David Li [Thu, 30 Nov 2017 19:16:25 +0000 (19:16 +0000)]
[PGO] Skip counter promotion for infinite loops

Differential Revision: http://reviews.llvm.org/D40662

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319462 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[cmake] Include project name in Sphinx doctree dir to fix race conditions
Michal Gorny [Thu, 30 Nov 2017 19:09:22 +0000 (19:09 +0000)]
[cmake] Include project name in Sphinx doctree dir to fix race conditions

Modify add_sphinx_target() to include the project name alongside builder
in Sphinx doctree directory. This aims to avoid crashes due to race
conditions between multiple Sphinx instances running in parallel that
attempt to create or read that directory simultaneously.

This problem has originally been addressed in r283188. However, that
commit presumed that there will be only one target per builder being
run. However, r314863 introduced a second manpage target, reintroducing
the race condition.

Differential Revision: https://reviews.llvm.org/D40656

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319461 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[globalisel][tablegen] Add support for specific immediates in the match pattern
Daniel Sanders [Thu, 30 Nov 2017 18:48:35 +0000 (18:48 +0000)]
[globalisel][tablegen] Add support for specific immediates in the match pattern

This enables a few rules such as ARM's uxtb instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319457 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSplit TypeTableBuilder into two classes.
Zachary Turner [Thu, 30 Nov 2017 18:39:50 +0000 (18:39 +0000)]
Split TypeTableBuilder into two classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319456 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-readobj] Fix mismatched line endings
Zachary Turner [Thu, 30 Nov 2017 18:33:34 +0000 (18:33 +0000)]
[llvm-readobj] Fix mismatched line endings

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319453 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Revert r319186 "Support bitcasted function addresses with varargs."
Dan Gohman [Thu, 30 Nov 2017 18:16:49 +0000 (18:16 +0000)]
[WebAssembly] Revert r319186 "Support bitcasted function addresses with varargs."

The patch broke Emscripten's EM_ASM macros, which utiltize unprototyped
functions.

See https://bugs.llvm.org/show_bug.cgi?id=35385 for details.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319452 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MIR] Fix DebugInfo tests after r319445
Francis Visoiu Mistrih [Thu, 30 Nov 2017 16:48:53 +0000 (16:48 +0000)]
[MIR] Fix DebugInfo tests after r319445

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319447 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CodeGen] Always use `printReg` to print registers in both MIR and debug
Francis Visoiu Mistrih [Thu, 30 Nov 2017 16:12:24 +0000 (16:12 +0000)]
[CodeGen] Always use `printReg` to print registers in both MIR and debug
output

As part of the unification of the debug format and the MIR format,
always use `printReg` to print all kinds of registers.

Updated the tests using '_' instead of '%noreg' until we decide which
one we want to be the default one.

Differential Revision: https://reviews.llvm.org/D40421

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319445 91177308-0d34-0410-b5e6-96231b3b80d8