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Kenneth Graunke [Wed, 30 Dec 2015 00:06:19 +0000 (16:06 -0800)]
nir/spirv/glsl450: Enumerate more built-in opcodes.
Kenneth Graunke [Tue, 29 Dec 2015 23:50:15 +0000 (15:50 -0800)]
anv/state: Fix reversed MIN vs. MAX in levelCount handling.
The point is to promote a levelCount of 0 to 1 before subtracting 1.
This needs MAX, not MIN.
Jason Ekstrand [Tue, 29 Dec 2015 23:44:37 +0000 (15:44 -0800)]
nir/spirv: Use instr_rewrite_src for updating phi sources
You can't just add a new source to a phi because use/def information won't
get updated properly. Instead, you have to use one of the core helpers.
Some day, we may want to add a nir_phi_instr_add_src helper.
Jason Ekstrand [Tue, 29 Dec 2015 23:35:29 +0000 (15:35 -0800)]
nir/validate: Don't validate the return deref for void function calls
Jason Ekstrand [Tue, 29 Dec 2015 23:25:43 +0000 (15:25 -0800)]
nir/dominance: Handle unreachable blocks
Previously, nir_dominance.c didn't properly handle unreachable blocks.
This can happen if, for instance, you have something like this:
loop {
if (...) {
break;
} else {
break;
}
}
In this case, the block right after the if statement will be unreachable.
This commit makes two changes to handle this. First, it removes an assert
and allows block->imm_dom to be null if the block is unreachable. Second,
it properly skips unreachable blocks in calc_dom_frontier_cb.
Kenneth Graunke [Tue, 29 Dec 2015 23:13:46 +0000 (15:13 -0800)]
nir/spirv/glsl450: Implement inverse hyperbolic trig built-ins.
Kenneth Graunke [Tue, 29 Dec 2015 08:28:42 +0000 (00:28 -0800)]
nir/spirv/glsl450: Implement Refract built-in.
Kenneth Graunke [Tue, 29 Dec 2015 08:18:54 +0000 (00:18 -0800)]
nir/spirv/glsl450: Implement hyperbolic trig built-ins.
Kenneth Graunke [Tue, 29 Dec 2015 08:10:39 +0000 (00:10 -0800)]
nir/spirv/glsl450: implement Reflect built-in.
Kenneth Graunke [Tue, 29 Dec 2015 07:59:32 +0000 (23:59 -0800)]
nir/spirv/glsl450: Implement FaceForward built-in.
Kenneth Graunke [Tue, 29 Dec 2015 07:52:10 +0000 (23:52 -0800)]
nir/spirv/glsl450: Implement SmoothStep.
Kenneth Graunke [Tue, 29 Dec 2015 07:39:14 +0000 (23:39 -0800)]
nir/spirv/glsl450: Implement Cross built-in.
Kenneth Graunke [Tue, 29 Dec 2015 04:40:10 +0000 (20:40 -0800)]
nir/spirv/glsl450: Implement Clamp/SClamp/UClamp.
Kenneth Graunke [Tue, 29 Dec 2015 05:21:51 +0000 (21:21 -0800)]
nir/spirv/glsl450: Implement the Log built-in.
Kenneth Graunke [Tue, 29 Dec 2015 05:04:30 +0000 (21:04 -0800)]
nir/spirv/glsl450: Implement Exp built-in.
Kenneth Graunke [Tue, 29 Dec 2015 23:18:05 +0000 (15:18 -0800)]
nir/spirv/glsl450: Add a helper for doing fclamp().
Kenneth Graunke [Tue, 29 Dec 2015 23:15:05 +0000 (15:15 -0800)]
nir/spirv/glsl450: Add helpers for calculating exp() and log().
Kenneth Graunke [Tue, 29 Dec 2015 05:09:19 +0000 (21:09 -0800)]
nir/spirv/glsl450: Add an 'nb' shortcut variable.
"nb" is shorter and more convenient than "&b->nb", especially
when several operations are composed together into a larger expression
tree.
Jason Ekstrand [Tue, 29 Dec 2015 22:51:45 +0000 (14:51 -0800)]
nir/lower_returns: Don't just change the type of a jump.
It doesn't give core NIR the opportunity to update predecessors and
successors. Instead, we have to remove and re-insert the instruction.
Jason Ekstrand [Tue, 29 Dec 2015 22:48:34 +0000 (14:48 -0800)]
nir/builder: Add a nir_jump helper
Jason Ekstrand [Tue, 29 Dec 2015 22:32:10 +0000 (14:32 -0800)]
glsl/types.cpp: Fix function_key_compare
Jason Ekstrand [Tue, 29 Dec 2015 22:29:03 +0000 (14:29 -0800)]
nir/spirv: Update to the 1.0 GLSL.std.450 header
Jason Ekstrand [Tue, 29 Dec 2015 21:47:37 +0000 (13:47 -0800)]
Merge remote-tracking branch 'mesa-public/master' into vulkan
This pulls in nir_builder_init_simple_shader and allows us to delete
anv_nir_builder.h entirely.
Jason Ekstrand [Tue, 29 Dec 2015 17:56:44 +0000 (09:56 -0800)]
nir/builder: Add an init function that creates a simple shader for you
A hugely common case when using nir_builder is to have a shader with a
single function called main. This adds a helper that gives you just that.
This commit also makes us use it in the NIR control-flow unit tests as well
as tgsi_to_nir and prog_to_nir.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 29 Dec 2015 21:15:17 +0000 (13:15 -0800)]
nir/spirv: Use a C99-style initializer for structure fields
This ensures that all unknown fields get zero-initizlied so we don't have
undefined values floating around.
Jason Ekstrand [Tue, 29 Dec 2015 21:03:01 +0000 (13:03 -0800)]
anv/pipeline: Use vs_prog_data.inputs_read when computing vb_used
Jason Ekstrand [Tue, 29 Dec 2015 20:09:32 +0000 (12:09 -0800)]
nir/spirv: Move CF emit code into vtn_cfg.c
Jason Ekstrand [Tue, 29 Dec 2015 18:24:54 +0000 (10:24 -0800)]
nir/spirv: Add support for switch statements
Jason Ekstrand [Tue, 29 Dec 2015 05:26:13 +0000 (21:26 -0800)]
nir/spirv: A couple simple loop fixes
Jason Ekstrand [Tue, 29 Dec 2015 02:19:40 +0000 (18:19 -0800)]
nir/spirv: Add an actual CFG data structure
The current data structure doesn't handle much that we couldn't handle
before. However, this will be absolutely crucial for doing swith
statements. Also, this should fix structured continues.
Kristian Høgsberg Kristensen [Tue, 29 Dec 2015 19:14:07 +0000 (11:14 -0800)]
mesa/st: Pad out _mesa_sysval_to_semantic for new SYSTEM_VALUE_* enums
GL_ARB_shader_draw_parameters added two new system values. This gets us
back to mapping mesa system values to the right TGSI semantics.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Tue, 29 Dec 2015 20:05:34 +0000 (15:05 -0500)]
nv50/ir: float(s32 & 0xff) = float(u8), not s8
Make sure to make conversion unsigned when we're ANDing the high bits
away. Fixes corruption in dolphin.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Kristian Høgsberg Kristensen [Tue, 15 Dec 2015 07:36:06 +0000 (23:36 -0800)]
i965: Reemit vertex state between indirect multi draws
If we're doing an indirect draw, prims[i].basevertex is always 0 and the
real base vertex value is in the indirect parameter buffer. We try to
avoid flagging BRW_NEW_VERTICES if prims[i].basevertex doesn't change,
which then breaks down for indirect draws. Thus, if a program uses base
vertex or base instance, and the draw call is indirect, always flag
BRW_NEW_VERTICES. A new piglit test,
spec/ARB_shader_draw_parameters/drawid-indirect-vertexid tests this.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kristian Høgsberg Kristensen [Tue, 15 Dec 2015 01:44:23 +0000 (17:44 -0800)]
nir: Teach nir_opt_algebraic about adding and subtracting the same thing
This optimizes a + b - b to just a. Modest shader-db results (BDW):
total instructions in shared programs:
7842452 ->
7841862 (-0.01%)
instructions in affected programs: 61938 -> 61348 (-0.95%)
total loops in shared programs: 2131 -> 2131 (0.00%)
helped: 263
HURT: 0
GAINED: 0
LOST: 0
but the optimization turns
gl_VertexID - gl_BaseVertexARB
into just a reference to SYSTEM_VALUE_VERTEX_ID_ZERO_BASE, which the
i965 hardware supports natively. That means we can avoid using the
internal vertex buffer for gl_BaseVertexARB in this case.
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kristian Høgsberg Kristensen [Thu, 10 Dec 2015 20:27:38 +0000 (12:27 -0800)]
i965: Add support for gl_DrawIDARB and enable extension
We have to break open a new vec4 for gl_DrawIDARB. We've used up all
space in the vec4 we use for SGVS and gl_DrawIDARB has to come from its
own separate vertex buffer anyway. This is because we point the vb for
base vertex and base instance into the draw parameter BO for indirect
draw calls, but the draw id is generated by mesa in a different buffer.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kristian Høgsberg Kristensen [Thu, 10 Dec 2015 20:24:50 +0000 (12:24 -0800)]
i965: Add support for gl_BaseVertexARB and gl_BaseInstanceARB
We already have gl_BaseVertexARB in the .x component of the SGVS vec4
and plug gl_BaseInstanceARB into the last free component (.y).
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kristian Høgsberg Kristensen [Thu, 10 Dec 2015 20:10:28 +0000 (12:10 -0800)]
i965: Assert that SYSTEM_VALUE_VERTEX_ID gets lowered
fs_visitor::emit_vs_system_value() looks like it's trying to handle
SYSTEM_VALUE_VERTEX_ID, but we should never see that value in the
backend.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kristian Høgsberg Kristensen [Thu, 10 Dec 2015 20:07:43 +0000 (12:07 -0800)]
mesa: Add core mesa support for GL_ARB_shader_draw_parameters
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kristian Høgsberg Kristensen [Thu, 10 Dec 2015 20:06:17 +0000 (12:06 -0800)]
mesa/vbo: Add draw_id field to struct _mesa_prim
The drivers will need this for passing in gl_DrawIDARB. For indirect
multidraw calls, we get the prim array and prim[i].draw_id == i and is
redundant. But for non-indirect calls, we get one primitive at a time
and need the draw_id field.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Aaron Watry [Tue, 29 Dec 2015 16:51:54 +0000 (10:51 -0600)]
nir: Remove function overload in control flow test
Fixes make check.
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Jason Ekstrand [Tue, 29 Dec 2015 17:39:19 +0000 (09:39 -0800)]
gen7/8/pipeline: s/vb_used/elements in emit_vertex_input
Nicolai Hähnle [Tue, 15 Dec 2015 01:41:15 +0000 (20:41 -0500)]
radeonsi: add RADEON_REPLACE_SHADERS debug option
This option allows replacing a single shader by a pre-compiled ELF object
as generated by LLVM's llc, for example. This can be useful for debugging a
deterministically occuring error in shaders (and has in fact helped find
the causes of https://bugs.freedesktop.org/show_bug.cgi?id=93264).
v2: drop the debug flag, use DEBUG_GET_ONCE_OPTION instead
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 15 Dec 2015 00:34:45 +0000 (19:34 -0500)]
radeonsi: count compilations in si_compile_llvm
This changes the count slightly (because of si_generate_gs_copy_shader), but
this is only relevant for the driver-specific num-compilations query. It sets
the stage for the next commit.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 21 Dec 2015 21:11:37 +0000 (16:11 -0500)]
gallium/util: add DEBUG_GET_ONCE_OPTION
This is analogous to the alreading existing macros for BOOL, NUM, and FLAGS.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Grazvydas Ignotas [Tue, 22 Dec 2015 02:12:07 +0000 (04:12 +0200)]
r600: fix constant buffer size programming
When buffer size is less than 16, zero ends up being programmed as
size, which prevents the hardware from fetching the correct values.
Fix it by combining shift and align so that the value is always
rounded up.
Cc: "11.1 11.0 10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92229
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Kristian Høgsberg Kristensen [Mon, 21 Dec 2015 08:03:28 +0000 (00:03 -0800)]
vk: Fill out buffer surface state when updating descriptor set
We can do this when we update the descriptor set instead of on the
fly.
Kristian Høgsberg Kristensen [Mon, 21 Dec 2015 06:58:38 +0000 (22:58 -0800)]
vk: Unstub VkSemaphore implementation
There really is nothing to do for us here, at least with the current
kernel interface.
Jason Ekstrand [Thu, 24 Dec 2015 09:10:51 +0000 (01:10 -0800)]
gen7/pipeline: Actually use inputs_read from the VS for laying out inputs
Jason Ekstrand [Thu, 24 Dec 2015 07:33:18 +0000 (23:33 -0800)]
gen8/pipeline: Actually use inputs_read from the VS for laying out inputs
Jason Ekstrand [Thu, 24 Dec 2015 07:32:55 +0000 (23:32 -0800)]
anv/meta: Fix the pos_out location for the vertex shader
Jason Ekstrand [Mon, 28 Dec 2015 23:46:20 +0000 (15:46 -0800)]
nir/spirv: Add GLSL.std.450.h
It accidentally got removed during the mass rename.
Jason Ekstrand [Mon, 28 Dec 2015 21:26:49 +0000 (13:26 -0800)]
anv/device: Set device->info sooner in CreateDevice
anv_block_pool_init calls anv_block_pool_grow which checks
device->info.has_llc to see if it needs to set caching parameters.
If we don't set device->info early enough, this reads an undefined value
which is probably 0 and not what we want on llc platforms.
Found with valgrind.
Jason Ekstrand [Mon, 28 Dec 2015 21:22:09 +0000 (13:22 -0800)]
nir/lower_returns: Fix a bug in loop lowering
Kenneth Graunke [Fri, 25 Dec 2015 01:19:14 +0000 (17:19 -0800)]
docs: Mark ARB_tessellation_shader as done on all i965 platforms.
We now support all Intel GPUs which can do tessellation.
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Thu, 26 Nov 2015 01:56:33 +0000 (17:56 -0800)]
i965: Enable ARB_tessellation_shader on Gen7-7.5.
We've resolved all the GPU hangs, and everything seems to be working.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Thu, 24 Dec 2015 21:09:26 +0000 (13:09 -0800)]
i965: Don't set interleave or complete on TCS EOT message.
Setting interleave on the TCS EOT message causes Ivybridge hardware to
GPU hang like crazy. Individual tests would pass, but running even a
simple test like nop.shader_test in a loop would hang within 1-3 runs.
Adding sleep delays worked around the problem, somehow.
Interleave doesn't make much sense given that we only have one patch
URB handle, not two. Complete doesn't seem useful either.
There's no reason to actually set those bits. We were just being lazy.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Thu, 26 Nov 2015 01:54:22 +0000 (17:54 -0800)]
i965: Relase input URB Handles on Gen7/7.5 when TCS threads finish.
Pre-Broadwell hardware requires us to manually release the ICP Handles
by issuing URB read messages with the "Complete" bit set. We can do
this in pairs to use fewer URB read messages.
Based heavily on work from Chris Forbes.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Thu, 24 Dec 2015 23:26:55 +0000 (15:26 -0800)]
i965: Use proper TCS barrier ID bits for Ivybridge/Baytrail.
Gen7 uses bits 15:12 while Gen7+ uses bits 16:13.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Thu, 26 Nov 2015 07:27:02 +0000 (23:27 -0800)]
i965: Use proper TCS Instance ID bits for Ivybridge/Baytrail.
Gen7 uses 22:16 while Gen7.5+ uses 23:17.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Tue, 17 Nov 2015 09:30:35 +0000 (01:30 -0800)]
i965: Port tessellation evaluation shaders to vec4 mode.
This can be used on Broadwell by setting INTEL_SCALAR_TES=0.
More importantly, it will be used for Ivybridge and Haswell.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Thu, 26 Nov 2015 01:18:50 +0000 (17:18 -0800)]
i965: Emit a real 3DSTATE_DS on Gen7.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Thu, 26 Nov 2015 01:12:17 +0000 (17:12 -0800)]
i965: Emit a real 3DSTATE_HS on Gen7.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Wed, 2 Dec 2015 06:41:32 +0000 (22:41 -0800)]
i965: Add the TCS/TES state upload atoms to the gen7_atoms list.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Mon, 28 Dec 2015 19:49:33 +0000 (11:49 -0800)]
nir/spirv: Move to its own directory
Jason Ekstrand [Mon, 28 Dec 2015 18:56:31 +0000 (10:56 -0800)]
Merge remote-tracking branch 'mesa-public/master' into vulkan
This pulls in the removal of nir_function_overload
Jason Ekstrand [Mon, 28 Dec 2015 18:35:18 +0000 (10:35 -0800)]
nir/spirv: Use nir_build_alu for alu instructions
Jason Ekstrand [Sat, 26 Dec 2015 18:00:47 +0000 (10:00 -0800)]
nir: Get rid of function overloads
When Connor originally drafted NIR, he copied the same function+overload
system that GLSL IR had with a few names changed. However, this
double-indirection is not really needed and has only served to confuse
people. Instead, let's just have functions which may not have unique names
and may or may not have an implementation. If someone wants to do overload
resolving, they can hav a hash table based function+overload system in the
overload resolving pass. There's no good reason to keep it in core NIR.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
ir3 bits are
Reviewed-by: Rob Clark <robclark@gmail.com>
Jason Ekstrand [Mon, 28 Dec 2015 07:23:05 +0000 (23:23 -0800)]
Merge remote-tracking branch 'mesa-public/master' into vulkan
This pulls in tessellation and the store_var changes that go with it.
Jason Ekstrand [Mon, 28 Dec 2015 06:50:45 +0000 (22:50 -0800)]
nir/lower_returns: Better algorithm as per connor
Jason Ekstrand [Mon, 28 Dec 2015 06:50:14 +0000 (22:50 -0800)]
nir: Add a cursor helper for getting a cursor after any phi nodes
Ilia Mirkin [Mon, 28 Dec 2015 01:44:01 +0000 (20:44 -0500)]
nvc0: don't forget to reset VTX_TMP bufctx slot after blit completion
Also release the scratch allocation if any.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Sun, 27 Dec 2015 20:13:21 +0000 (15:13 -0500)]
nv50,nvc0: add a note when converting vertex elements using CPU
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Jason Ekstrand [Tue, 27 Oct 2015 03:56:06 +0000 (20:56 -0700)]
nir/gather_info: Handle multi-slot variables in io bitfields
Jason Ekstrand [Tue, 27 Oct 2015 18:32:34 +0000 (11:32 -0700)]
nir: Add a helper for getting the bitmask for a variable's location
Jason Ekstrand [Tue, 27 Oct 2015 02:45:30 +0000 (19:45 -0700)]
nir/types: Expose glsl_type::count_attribute_slots()
Jason Ekstrand [Thu, 24 Dec 2015 07:45:47 +0000 (23:45 -0800)]
nir/lower_return: Do it for real this time
Jason Ekstrand [Thu, 24 Dec 2015 02:10:08 +0000 (18:10 -0800)]
nir/cf: Make extracting or re-inserting nothing a no-op
Jason Ekstrand [Thu, 24 Dec 2015 02:09:42 +0000 (18:09 -0800)]
nir: Add a function for comparing cursors
Connor Abbott [Sun, 20 Dec 2015 16:42:56 +0000 (11:42 -0500)]
gallium/auxiliary: don't build NIR sources with MSVC2008 flags
NIR has never been built with MSVC2008, so we shouldn't add
MSVC2008_COMPAT_CFLAGS to anything that uses it. This allows us to get
rid of the pragma in tgsi_to_nir.c.
Build tested with freedreno.
v2: Use MSVC2013_COMPAT_CLFAGS instead.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Wed, 23 Dec 2015 22:14:39 +0000 (14:14 -0800)]
nir/spirv: Add support for undefs in vtn_ssa_value()
Jason Ekstrand [Wed, 23 Dec 2015 21:17:18 +0000 (13:17 -0800)]
nir/spirv: Properly handle vector times matrix
Jason Ekstrand [Wed, 23 Dec 2015 21:17:00 +0000 (13:17 -0800)]
nir/spirv: Create the correct type if a matrix-vector multiply produces a vector
Jason Ekstrand [Wed, 23 Dec 2015 21:13:54 +0000 (13:13 -0800)]
nir/spirv: Fix some mem_ctx issues with create_vec
Jason Ekstrand [Wed, 23 Dec 2015 20:45:13 +0000 (12:45 -0800)]
nir/spirv: Better document vtn_ssa_value.transposed
Jason Ekstrand [Wed, 23 Dec 2015 19:25:35 +0000 (11:25 -0800)]
anv/descriptor_set: Use anv_foreach_stage
Jason Ekstrand [Wed, 23 Dec 2015 19:24:23 +0000 (11:24 -0800)]
anv: Mask out invalid stages in foreach_stage
Jason Ekstrand [Wed, 23 Dec 2015 19:11:58 +0000 (11:11 -0800)]
nir/spirv: Handle LogicalNot
Jason Ekstrand [Wed, 23 Dec 2015 19:10:58 +0000 (11:10 -0800)]
nir/spirv: Handle derefs in vtn_ssa_value
This is kind of a hack, but it makes vtn_ssa_value insert a load if the
value requested is actually a deref. This shouldn't happen normally but,
thanks to the impedence mismatch of the NIR function parameter model vs.
the SPIR-V model, this can happen for function arguments.
Jason Ekstrand [Wed, 23 Dec 2015 19:10:13 +0000 (11:10 -0800)]
nir/spirv: Do boolean fixup on block loads
We used to do it for variable loads on things of type "uniform" but that
never got ported to block loads.
Jason Ekstrand [Tue, 22 Dec 2015 05:20:50 +0000 (21:20 -0800)]
spirv/nir: Handle non-vector extractions in vtn_composite_extract
Jason Ekstrand [Fri, 18 Dec 2015 23:07:16 +0000 (15:07 -0800)]
nir/spirv: Handle function calls
Jason Ekstrand [Fri, 18 Dec 2015 23:06:02 +0000 (15:06 -0800)]
nir: Create the params array in function_impl_create
Jason Ekstrand [Fri, 18 Dec 2015 19:28:57 +0000 (11:28 -0800)]
i965/nir: Remove return handling
This was added because we were getting spurrious returns coming out of
SPIR-V. Now that we're calling lower_returns, we don't need this.
Jason Ekstrand [Fri, 18 Dec 2015 19:28:21 +0000 (11:28 -0800)]
anv/pipeline: Run lower_returns and inline_functions after spirv_to_nir
Jason Ekstrand [Fri, 18 Dec 2015 20:17:29 +0000 (12:17 -0800)]
nir: Add a function inlining pass
Jason Ekstrand [Fri, 18 Dec 2015 20:16:45 +0000 (12:16 -0800)]
nir/builder: Add a copy_deref_var helper
Jason Ekstrand [Fri, 18 Dec 2015 19:45:59 +0000 (11:45 -0800)]
nir: move nir_copy_var from anv_nir_builder to nir_builder
Jason Ekstrand [Wed, 28 Oct 2015 04:44:27 +0000 (21:44 -0700)]
nir/clone: Add support for cloning a single function_impl
This will be useful for things such as function inlining.
Jason Ekstrand [Wed, 28 Oct 2015 04:34:56 +0000 (21:34 -0700)]
nir: Add a helper for creating a "bare" nir_function_impl
This is useful if you want to clone a single function_impl if, for
instance, you wanted to do function inlining.
Jason Ekstrand [Fri, 18 Dec 2015 19:27:00 +0000 (11:27 -0800)]
nir/control_flow: Handle relinking top-level blocks
This can happen if a function ends in a return instruction and you remove
the return.