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Simon Pilgrim [Sun, 11 Mar 2018 11:19:19 +0000 (11:19 +0000)]
[X86][AVX512] createVariablePermute - Non-VLX targets can widen v4i64/v8f64 variable permutes to v8i64/v8f64
Permutes in the upper elements will be undefined, but they will be discarded anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327238
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Simon Pilgrim [Sun, 11 Mar 2018 10:50:48 +0000 (10:50 +0000)]
[x86][SSE] Add widenSubVector helper. NFCI.
Helper function to insert a subvector into the bottom elements of a larger zero/undef vector with the same scalar type.
I've converted a couple of INSERT_SUBVECTOR calls to use it, there are plenty more although in some cases I was worried it might make the code more ambiguous.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327236
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George Burgess IV [Sun, 11 Mar 2018 04:16:12 +0000 (04:16 +0000)]
[MemorySSA] Fix comment + remove redundant dyn_casts; NFC
StartingAccess is already a MemoryUseOrDef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327235
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Michael Bedy [Sun, 11 Mar 2018 03:27:50 +0000 (03:27 +0000)]
Test commit - change comment slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327234
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Nico Weber [Sun, 11 Mar 2018 03:17:34 +0000 (03:17 +0000)]
Add REQUIRES: arm-registered-target to test using an arm-apple-ios triple.
Else, the test fails in LLVM_TARGETS_TO_BUILD=X86 builds like so:
bin/llvm-mc: : error: unable to get target for 'arm64-apple-ios7.0.0'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327233
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Andrea Di Biagio [Sun, 11 Mar 2018 00:51:33 +0000 (00:51 +0000)]
[TargetSchedule] Minor refactor in computeInstrLatency. NFC
The intent of revision r300311 was to add a check for invalid scheduling class
descriptors. However, it ended up adding a redundant call in a basic block that
should not be reachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327231
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George Burgess IV [Sat, 10 Mar 2018 23:22:46 +0000 (23:22 +0000)]
Revert r327199: "Clean up a temp file on the buildbots"
"I'll revert this tomorrow," I said yesterday. This should've reached
all the bots it can by now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327230
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Craig Topper [Sat, 10 Mar 2018 21:30:46 +0000 (21:30 +0000)]
[X86] Add comments to the end of FMA3 instructions to make the operation clear
Summary:
There are 3 different operand orders for FMA instructions so figuring out the exact operation being performed requires a lot of thought.
This patch adds a comment to the end of the assembly line to print the exact operation.
I think I've got all the instructions in here except the ones with builtin rounding.
I didn't update all tests, but I assume we can get them as we regenerate tests in the future.
Reviewers: spatel, v_klochkov, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44345
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327225
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Andrea Di Biagio [Sat, 10 Mar 2018 20:52:59 +0000 (20:52 +0000)]
[llvm-mca] Fix use-of-uninitialized-value error reported by the MemorySanitizer.
This should make the buildbots green again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327223
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Simon Pilgrim [Sat, 10 Mar 2018 19:49:59 +0000 (19:49 +0000)]
[X86][XOP] createVariablePermute - use VPERMIL2 for v8i32/v4i64 variable permutes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327222
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Martin Storsjo [Sat, 10 Mar 2018 19:05:21 +0000 (19:05 +0000)]
[AArch64] Implement native TLS for Windows
Differential Revision: https://reviews.llvm.org/D43971
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327220
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Mandeep Singh Grang [Sat, 10 Mar 2018 18:59:14 +0000 (18:59 +0000)]
[ADT] Shuffle containers before sorting to uncover non-deterministic behavior
Summary:
std::sort and array_pod_sort both use non-stable sorting algorithms.
This means that the relative order of elements with the same key is
undefined. This patch is an attempt to uncover such scenarios by
randomly shuffling all containers before sorting, if EXPENSIVE_CHECKS
is enabled.
Here's the bugzilla for this: https://bugs.llvm.org/show_bug.cgi?id=35135
Reviewers: dblaikie, dexonsmith, chandlerc, efriedma, RKSimon
Reviewed By: RKSimon
Subscribers: fhahn, davide, RKSimon, vsk, mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D39245
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327219
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Simon Pilgrim [Sat, 10 Mar 2018 18:33:29 +0000 (18:33 +0000)]
[X86][XOP] createVariablePermute - use VPPERM for v16i16 variable permutes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327218
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Simon Pilgrim [Sat, 10 Mar 2018 18:12:35 +0000 (18:12 +0000)]
[X86][SSE] createVariablePermute - create index scaling helper. NFCI.
This will help in some future changes for custom lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327217
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Andrea Di Biagio [Sat, 10 Mar 2018 17:40:25 +0000 (17:40 +0000)]
[llvm-mca] BackendStatistics: early exit from method printSchedulerUsage if the
no scheduler resources were consumed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327215
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Andrea Di Biagio [Sat, 10 Mar 2018 16:55:07 +0000 (16:55 +0000)]
[llvm-mca] Views are now independent from resource masks. NFCI
This change removes method Backend::getProcResourceMasks() and simplifies some
logic in the Views. This effectively removes yet another dependency between the
views and the Backend.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327214
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Simon Pilgrim [Sat, 10 Mar 2018 16:51:45 +0000 (16:51 +0000)]
[X86][XOP] createVariablePermute - use VPPERM for v32i8 variable permutes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327213
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Sanjay Patel [Sat, 10 Mar 2018 16:51:28 +0000 (16:51 +0000)]
[InstSimplify] fp_binop X, undef --> NaN
The variable operand could be NaN, so it's always safe to propagate NaN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327212
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Sanjay Patel [Sat, 10 Mar 2018 16:39:59 +0000 (16:39 +0000)]
[AMDGPU] fix tests to be independent of FP undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327211
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Sanjay Patel [Sat, 10 Mar 2018 16:14:05 +0000 (16:14 +0000)]
[PowerPC] fix tests to be independent of FP undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327210
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Matt Arsenault [Sat, 10 Mar 2018 16:05:35 +0000 (16:05 +0000)]
AMDGPU: Fix crash when constant folding with physreg operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327209
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Sanjay Patel [Sat, 10 Mar 2018 15:56:25 +0000 (15:56 +0000)]
[ConstantFold] fp_binop AnyConstant, undef --> NaN
With the updated LangRef ( D44216 / rL327138 ) in place, we can proceed with more constant folding.
I'm intentionally taking the conservative path here: no matter what the constant or the FMF, we can
always fold to NaN. This is because the undef operand can be chosen as NaN, and in our simplified
default FP env, nothing else happens - NaN just propagates to the result. If we find some way/need
to propagate undef instead, that can be added subsequently.
The tests show that we always choose the same quiet NaN constant (0x7FF8000000000000 in IR text).
There were suggestions to improve that with a 'NaN' string token or not always print a 64-bit hex
value, but those are independent changes. We might also consider setting/propagating the payload of
NaN constants as an enhancement.
Differential Revision: https://reviews.llvm.org/D44308
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327208
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Florian Hahn [Sat, 10 Mar 2018 14:53:44 +0000 (14:53 +0000)]
[PartialInlining] Use isInlineViable to detect constructs preventing inlining.
Use isInlineViable to prevent inlining of functions with non-inlinable
constructs, in case cost analysis is skipped.
Reviewers: efriedma, sfertile, davide, davidxl
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D42846
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327207
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Craig Topper [Sat, 10 Mar 2018 06:05:13 +0000 (06:05 +0000)]
[X86] Add a missing EVEX instruction to EmitAnyX86InstComments.
The equivalent SSE and VEX instruction are already there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327205
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Sam Clegg [Sat, 10 Mar 2018 05:34:04 +0000 (05:34 +0000)]
[WebAssembly] Object: Add accessor for wasm symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327203
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Craig Topper [Sat, 10 Mar 2018 05:15:22 +0000 (05:15 +0000)]
[X86] Move the AC_EVEX_2_VEX AsmComments enum to X86InstrInfo.h from X86InstComments.h.
X86InstComments.h is used by tools that only have the MC layer. We shouldn't be importing a file from CodeGen into this.
X86InstrInfo.h isn't a great place, but I couldn't find a better one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327202
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George Burgess IV [Sat, 10 Mar 2018 03:34:43 +0000 (03:34 +0000)]
[AliasAnalysis] Shrink AliasResults; NFC
We're persisting AliasResults in some places in MemorySSA, so the size
of these now matters a little bit (well, 8 regular-sized bits, to be
precise).
Do the same for ModRefInfo for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327201
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Craig Topper [Sat, 10 Mar 2018 03:12:00 +0000 (03:12 +0000)]
[X86] Rewrite printMasking code in X86InstComments to use TSFlags to determine whether the instruction is masked.
This should have been NFC, but it looks like we were missing PUNPCKLHQDQ/PUNPCKLQDQ instructions in there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327200
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George Burgess IV [Sat, 10 Mar 2018 02:51:10 +0000 (02:51 +0000)]
Clean up a temp file on the buildbots.
r327100 made us stop producing vecreduce-propagate-sd-flags.s, but it's
still sticking around on some bots. This makes the bots unhappy.
I'll revert this tomorrow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327199
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Rafael Espindola [Sat, 10 Mar 2018 02:42:14 +0000 (02:42 +0000)]
Go back to sometimes assuming intristics are local.
This fixes pr36674.
While it is valid for shouldAssumeDSOLocal to return false anytime,
always returning false for intrinsics is not optimal on i386 and also
hits a bug in the backend.
To use a plt, the caller must first setup ebx to handle the case of
that file being linked into a PIE executable or shared library. In
those cases the generated PLT uses ebx.
Currently we can produce "calll expf@plt" without setting ebx. We
could fix that by correctly setting ebx, but this would produce worse
code for the case where the runtime library is statically linked. It
would also required other tools to handle R_386_PLT32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327198
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Nirav Dave [Sat, 10 Mar 2018 02:16:15 +0000 (02:16 +0000)]
Revert: r327172 "Correct load-op-store cycle detection analysis"
r327171 "Improve Dependency analysis when doing multi-node Instruction Selection"
r328170 "[DAG] Enforce stricter NodeId invariant during Instruction selection"
Reverting patch as NodeId invariant change is causing pathological
increases in compile time on PPC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327197
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Craig Topper [Fri, 9 Mar 2018 23:36:58 +0000 (23:36 +0000)]
[TwoAddressInstructionPass] Improve tryInstructionCommute of X86 FMA and vpternlog instructions
These instructions have 3 operands that can be commuted. The first commute we find may not be the best. So we should keep searching if we performed an aggressive commute. There may still be an operand that is killed or a physical register constraint that might be better.
Differential Revision: https://reviews.llvm.org/D44324
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327188
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Heejin Ahn [Fri, 9 Mar 2018 23:29:06 +0000 (23:29 +0000)]
[WebAssembly] Add EVT::getEVTString() for except_ref type
Summary: This was missing in D43706 (rL326985).
Reviewers:
Subscribers: jfb, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D44325
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327187
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Peter Collingbourne [Fri, 9 Mar 2018 22:52:22 +0000 (22:52 +0000)]
ADT: Make MapVector::value_type and MapVector::size_type public. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327180
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Craig Topper [Fri, 9 Mar 2018 22:24:12 +0000 (22:24 +0000)]
[TargetLowering] Remove redundant term in two ifs in SimplifySetCC. NFC
If we get into the right hand side of the OR, we know that isOpaque is true since the left hand size is just a check that it's false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327179
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Ulrich Weigand [Fri, 9 Mar 2018 22:00:10 +0000 (22:00 +0000)]
Revert "[Debug] Retain both sets of debug intrinsics in HoistThenElseCodeToIf"
This reverts commit r327175 as problems in debug info generation were shown.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327176
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Ulrich Weigand [Fri, 9 Mar 2018 21:37:07 +0000 (21:37 +0000)]
[Debug] Retain both sets of debug intrinsics in HoistThenElseCodeToIf
When hoisting common code from the "then" and "else" branches of a condition
to before the "if", there is no need to require that debug intrinsics match
before moving them (and merging them). Instead, we can simply always keep
all debug intrinsics from both sides of the "if".
This fixes PR36410, which describes a problem where as a result of the attempt
to merge debug locations for two debug intrinsics we end up with an invalid
intrinsic, where the scope indicated in the !dbg location no longer matches
the scope of the variable tracked by the intrinsic.
In addition, this has the benefit that we no longer throw away information
that is actually still valid, helping to generate better debug data.
Reviewed By: vsk
Differential Revision: https://reviews.llvm.org/D44312
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327175
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Stefan Pintilie [Fri, 9 Mar 2018 21:08:35 +0000 (21:08 +0000)]
[Power9] Code Cleaup and adding Comments for Power 9 Scheduler
Did some code cleanup up removing ItinRW that are not needed and resource types
that are no longer used.
Also added more comments to the td files related to the Power 9 sheduler model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327174
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Renato Golin [Fri, 9 Mar 2018 21:05:58 +0000 (21:05 +0000)]
[NFC] Consolidate six getPointerOperand() utility functions into one place
There are six separate instances of getPointerOperand() utility.
LoopVectorize.cpp has one of them,
and I don't want to create a 7th one while I'm trying to move
LoopVectorizationLegality into a separate file
(eventual objective is to move it to Analysis tree).
See http://lists.llvm.org/pipermail/llvm-dev/2018-February/120999.html
for llvm-dev discussions
Closes D43323.
Patch by Hideki Saito <hideki.saito@intel.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327173
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Nirav Dave [Fri, 9 Mar 2018 20:58:07 +0000 (20:58 +0000)]
Correct load-op-store cycle detection analysis
Add missing cycle dependency checks in load-op-store fusion.
Fixes PR36274.
Reviewers: craig.topper, bogner
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D43154
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327172
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Nirav Dave [Fri, 9 Mar 2018 20:57:42 +0000 (20:57 +0000)]
Improve Dependency analysis when doing multi-node Instruction Selection
Relanding after fixing NodeId Invariant.
Cleanup cycle/validity checks in ISel (IsLegalToFold,
HandleMergeInputChains) and X86 (isFusableLoadOpStore). Now do a full
search for cycles / dependencies pruning the search when topological
property of NodeId allows.
As part of this propogate the NodeId-based cutoffs to narrow
hasPreprocessorHelper searches.
Reviewers: craig.topper, bogner
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D41293
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327171
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Nirav Dave [Fri, 9 Mar 2018 20:57:15 +0000 (20:57 +0000)]
[DAG] Enforce stricter NodeId invariant during Instruction selection
Instruction Selection makes use of the topological ordering of nodes
by node id (a node's operands have smaller node id than it) when doing
cycle detection. During selection we may violate this property as a
selection of multiple nodes may induce a use dependence (and thus a
node id restriction) between two unrelated nodes. If a selected node
has an unselected successor this may allow us to miss a cycle in
detection an invalid selection.
This patch fixes this by marking all unselected successors of a
selected node have negated node id. We avoid pruning on such negative
ids but still can reconstruct the original id for pruning.
In-tree targets have been updated to replace DAG-level replacements
with ISel-level ones which enforce this property.
This preemptively fixes PR36312 before triggering commit r324359 relands
Reviewers: craig.topper, bogner, jyknight
Subscribers: arsenm, nhaehnle, javed.absar, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D43198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327170
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Nirav Dave [Fri, 9 Mar 2018 20:56:51 +0000 (20:56 +0000)]
Make early exit hasPredecessorHelper return true. NFCI.
All uses conservatively assume in early exit case that it will be a
predecessor. Changing default removes checking code in all uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327169
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Rafael Auler [Fri, 9 Mar 2018 19:13:44 +0000 (19:13 +0000)]
[llvm-objdump] Support disassembling by symbol name
Summary:
Add a new option -df to llvm-objdump that takes function names
as arguments and instructs the disassembler to only dump those function
contents. Based on code originally written by Bill Nell.
Reviewers: espindola, JDevlieghere
Differential Revision: https://reviews.llvm.org/D44224
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327164
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Peter Collingbourne [Fri, 9 Mar 2018 19:11:44 +0000 (19:11 +0000)]
Use branch funnels for virtual calls when retpoline mitigation is enabled.
The retpoline mitigation for variant 2 of CVE-2017-5715 inhibits the
branch predictor, and as a result it can lead to a measurable loss of
performance. We can reduce the performance impact of retpolined virtual
calls by replacing them with a special construct known as a branch
funnel, which is an instruction sequence that implements virtual calls
to a set of known targets using a binary tree of direct branches. This
allows the processor to speculately execute valid implementations of the
virtual function without allowing for speculative execution of of calls
to arbitrary addresses.
This patch extends the whole-program devirtualization pass to replace
certain virtual calls with calls to branch funnels, which are
represented using a new llvm.icall.jumptable intrinsic. It also extends
the LowerTypeTests pass to recognize the new intrinsic, generate code
for the branch funnels (x86_64 only for now) and lay out virtual tables
as required for each branch funnel.
The implementation supports full LTO as well as ThinLTO, and extends the
ThinLTO summary format used for whole-program devirtualization to
support branch funnels.
For more details see RFC:
http://lists.llvm.org/pipermail/llvm-dev/2018-January/120672.html
Differential Revision: https://reviews.llvm.org/D42453
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327163
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Alina Sbirlea [Fri, 9 Mar 2018 18:48:20 +0000 (18:48 +0000)]
Avoid creating a Constant for each value in a ConstantDataSequential.
Summary: We create a ConstantDataSequential (ConstantDataArray or ConstantDataVector) to avoid creating a Constant for each element in an array of constants. But them in AsmPrinter, we do create a ConstantFP for each element in the ConstantDataSequential. This triggers excessive memory use when generating large global FP constants.
Reviewers: bogner, lhames, t.p.northover
Subscribers: jlebar, sanjoy, llvm-commits
Differential Revision: https://reviews.llvm.org/D44277
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327161
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Rafael Espindola [Fri, 9 Mar 2018 18:42:25 +0000 (18:42 +0000)]
Delay creating an alias for @@@.
With this we only create an alias for @@@ once we know if it should
use @ or @@. This avoids last minutes renames and hacks to handle MS
names.
This only handles the ELF writer. LTO still has issues with @@@
aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327160
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Simon Pilgrim [Fri, 9 Mar 2018 18:37:56 +0000 (18:37 +0000)]
[X86][AVX] createVariablePermute - fix v2i64/v2f64 VPERMILPD index creation.
The input indices vector will put the index in bit0, but VPERMILPD actually selects off bit1 - so we need to scale accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327159
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Nicolai Haehnle [Fri, 9 Mar 2018 18:32:04 +0000 (18:32 +0000)]
TableGen: Remove space at EOL in TGLexer.{h,cpp}
Change-Id: Ica5f39470174e85f173d3b6db95789033f75ce17
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327158
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Simon Pilgrim [Fri, 9 Mar 2018 18:08:08 +0000 (18:08 +0000)]
[X86][SSE] createVariablePermute - move source vector canonicalization to top of function. NFCI.
This is to make it easier to return early from the switch statement with custom lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327157
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Renato Golin [Fri, 9 Mar 2018 18:02:36 +0000 (18:02 +0000)]
[LV] Adding test for r327109
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327155
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Farhana Aleen [Fri, 9 Mar 2018 17:41:39 +0000 (17:41 +0000)]
[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
Summary: Starting from GCN 2nd generation, ISA supports ds_read_b128 on top of ds_read_b64.
This patch supports ds_read_b128 instruction pattern and generation of this instruction.
In the vectorizer, this patch also widen the vector length so that vectorizer generates
128 bit loads for local address-space which gets translated to ds_read_b128.
Since the performance benefit is not clear; compiler generates ds_read_b128 under -amdgpu-ds128.
Author: FarhanaAleen
Reviewed By: rampitec, arsenm
Subscribers: llvm-commits, AMDGPU
Differential Revision: https://reviews.llvm.org/D44210
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327153
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Aditya Nandakumar [Fri, 9 Mar 2018 17:31:51 +0000 (17:31 +0000)]
[GISel]: Add helpers for easy building G_FCONSTANT along with matchers
Added helpers to build G_FCONSTANT, along with matching ConstantFP and
unit tests for the same.
Sample usage.
auto MIB = Builder.buildFConstant(s32, 0.5); // Build IEEESingle
For Matching the above
const ConstantFP* Tmp;
mi_match(DstReg, MRI, m_GFCst(Tmp));
https://reviews.llvm.org/D44128
reviewed by: volkan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327152
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Chad Rosier [Fri, 9 Mar 2018 16:43:46 +0000 (16:43 +0000)]
[JumpThreading] Don't restrict cast-traversal to i1
In r263618, JumpThreading learned to look trough simple cast instructions, but
only if the source of those cast instructions was a phi/cmp i1 (in an effort to
limit compile time effects). I think this condition is too restrictive. For
switches with limited value range, InstCombine will readily introduce an extra
trunc instruction to a smaller integer type (e.g. from i8 to i2), leaving us in
the somewhat perverse situation that jump-threading would work before running
instcombine, but not after. Since instcombine produces this pattern, I think we
need to consider it canonical and support it in JumpThreading. In general,
for limiting recursion, I think the existing restriction to phi and cmp nodes
should be sufficient to avoid looking through unprofitable chains of
instructions.
Patch by Keno Fischer!
Differential Revision: https://reviews.llvm.org/D42262
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327150
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Adrian Prantl [Fri, 9 Mar 2018 16:42:05 +0000 (16:42 +0000)]
Move generic test to the Generic directory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327148
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Sanjay Patel [Fri, 9 Mar 2018 16:33:34 +0000 (16:33 +0000)]
[AMDGPU] fix test to be independent of FP undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327147
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Nicholas Wilson [Fri, 9 Mar 2018 16:30:44 +0000 (16:30 +0000)]
[WebAssembly] Disallow weak undefined globals in the object format
This implements https://github.com/WebAssembly/tool-conventions/pull/47
Differential Revision: https://reviews.llvm.org/D44201
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327146
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Sanjay Patel [Fri, 9 Mar 2018 16:14:02 +0000 (16:14 +0000)]
[InstSimplify] fix FP infinite hex constant values in tests; NFC
Really should improve this...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327144
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Stefan Pintilie [Fri, 9 Mar 2018 16:08:55 +0000 (16:08 +0000)]
Revert "[PowerPC] LSR tunings for PowerPC"
Revert the rest of the LST tune commit.
It seems that the LSR tune commit breaks internal tests.
Reverting the commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327143
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Stefan Pintilie [Fri, 9 Mar 2018 16:08:48 +0000 (16:08 +0000)]
Revert "[PowerPC] Move test to correct location."
Revert part of the LSR tune commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327142
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Simon Pilgrim [Fri, 9 Mar 2018 15:50:09 +0000 (15:50 +0000)]
Tidyup comment that was destroyed by clang-format. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327141
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Simon Pilgrim [Fri, 9 Mar 2018 15:48:56 +0000 (15:48 +0000)]
[X86][SSE] createVariablePermute - move index vector canonicalization to top of function. NFCI.
This is to make it easier to return early from the switch statement with custom lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327140
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Tim Northover [Fri, 9 Mar 2018 15:44:59 +0000 (15:44 +0000)]
Try to fix Windows bot by forcing "rm".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327139
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Sanjay Patel [Fri, 9 Mar 2018 15:27:48 +0000 (15:27 +0000)]
[LangRef] make it clear that FP instructions do not have side effects
Also, fix the undef vs. UB example to use 'sdiv' because that can trigger div-by-zero UB.
The existing text for the constrained intrinsics says:
"By default, LLVM optimization passes assume that the rounding mode is round-to-nearest
and that floating point exceptions will not be monitored. Constrained FP intrinsics are
used to support non-default rounding modes and accurately preserve exception behavior
without compromising LLVM’s ability to optimize FP code when the default behavior is
used."
...so the additional text with the normal FP opcodes should make the different modes
clear.
Differential Revision: https://reviews.llvm.org/D44216
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327138
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Jonas Devlieghere [Fri, 9 Mar 2018 15:22:42 +0000 (15:22 +0000)]
[dsymutil] Unify error handling and add color
We improved the handling of errors and warnings in dwarfdump's verifier
in rL314498. This patch does the same thing for dsymutil.
Differential revision: https://reviews.llvm.org/D44052
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327137
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Hans Wennborg [Fri, 9 Mar 2018 14:46:44 +0000 (14:46 +0000)]
CMake: Make libxml2 show up in --system-libs (PR36660)
lib/WindowsManifest/CMakeLists.txt adds it to LLVM_SYSTEM_LIBS on that
target, but it was never getting picked up in
tools/llvm-config/CMakeLists.txt.
Differential Revision: https://reviews.llvm.org/D44302
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327135
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Sebastian Pop [Fri, 9 Mar 2018 14:29:21 +0000 (14:29 +0000)]
[x86][aarch64] ask the backend whether it has a vector blend instruction
The code to match and produce more x86 vector blends was enabled for all
architectures even though the transform may pessimize the code for other
architectures that do not provide a vector blend instruction.
Added an aarch64 testcase to check that a VZIP instruction is generated instead
of byte movs.
Differential Revision: https://reviews.llvm.org/D44118
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327132
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Andrea Di Biagio [Fri, 9 Mar 2018 13:52:03 +0000 (13:52 +0000)]
[llvm-mca] Move the logic that prints the summary into its own view. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327128
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Andrea Di Biagio [Fri, 9 Mar 2018 12:50:42 +0000 (12:50 +0000)]
[llvm-mca] Run clang-format on the source code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327125
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Nicolai Haehnle [Fri, 9 Mar 2018 12:24:42 +0000 (12:24 +0000)]
TableGen: Add a defset statement
Allows capturing a list of concrete instantiated defs.
This can be combined with foreach to create parallel sets of def
instantiations with less repetition in the source. This purpose is
largely also served by multiclasses, but in some cases multiclasses
can't be used.
The motivating example for this change is having a large set of
intrinsics, which are generated from the IntrinsicsBackend.td file
included by Intrinsics.td, and a corresponding set of instruction
selection patterns, which are generated via the backend's .td files.
Multiclasses cannot be used to eliminate the redundancy in this case,
because a multiclass cannot span both LLVM's common .td files and
the backend .td files at the same time.
Change-Id: I879e35042dceea542a5e6776fad23c5e0e69e76b
Differential revision: https://reviews.llvm.org/D44109
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327121
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Nicolai Haehnle [Fri, 9 Mar 2018 12:24:30 +0000 (12:24 +0000)]
TableGen: Allow arbitrary list values as ranges of foreach
The changes to FieldInit are required to make field references (Def.field)
work inside a ForeachDeclaration: previously, Def.field wasn't resolved
immediately when Def was already a fully resolved DefInit.
Change-Id: I9875baec2fc5aac8c2b249e45b9cf18c65ae699b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327120
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Nicolai Haehnle [Fri, 9 Mar 2018 12:24:20 +0000 (12:24 +0000)]
TableGen: Remove unused ParseForeachMode
Use the default ParseValueMode instead of ParseForeachMode when
parsing the rule
ForeachDeclaration ::= ID '=' '[' ValueList ']'
because the only difference between the two is how an open brace '{'
is handled at the end. In the context of foreach, the 'in' keyword
will appear after the ForeachDeclaration, so this special handling
of '{' is not required.
Change-Id: I4d86bb73bab9ec26752e1273e5213df77cf28d1d
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327119
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Nicolai Haehnle [Fri, 9 Mar 2018 12:24:14 +0000 (12:24 +0000)]
TableGen: More helpful error messages
Change-Id: Ic78afd0cd765fdb4cf1b7ecfb6bba22653ce6d29
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327118
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Nicolai Haehnle [Fri, 9 Mar 2018 12:24:06 +0000 (12:24 +0000)]
TableGen: add !isa operation
Change-Id: Iddb724c3ae706d82933a2d82c91d07e0e36b30e3
Differential revision: https://reviews.llvm.org/D44105
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327117
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Pavel Labath [Fri, 9 Mar 2018 11:58:59 +0000 (11:58 +0000)]
[DebugInfo/AccelTable] Fix inconsistency in getDIEOffset implementations
Summary:
Even though the getDIEOffset offset function was common for the two
accelerator table implementations, it was doing two different things:
for the Apple tables, it was returning the die offset relative to the
start of the section, whereas for DWARF v5 tables, it was relative to
the start of the CU.
I resolve this by renaming the function to getDIESectionOffset to make
it obvious what the function returns, and change the DWARF
implementation to return the section offset. I also keep the CU-relative
accessor, but only in the DWARF implementation (there is no way to get
this information for the Apple tables). This was not caught by existing
tests because the hand-written inputs also erroneously used section
offsets instead of CU-relative ones.
While looking at this, I noticed that the Apple implementation was not
fully correct either -- the header contains a DIEOffsetBase field, which
should be added to offsets encoded with the DW_FORM_ref*** family, but
this was not being used. This went unnoticed because all current writers
set this field to zero anyway. I fix this as well and add a hand-written
test which demonstrates the issue.
Reviewers: JDevlieghere, dblaikie
Subscribers: aprantl, llvm-commits
Differential Revision: https://reviews.llvm.org/D44202
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327116
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Renato Golin [Fri, 9 Mar 2018 10:31:31 +0000 (10:31 +0000)]
[LV] Fix vectorizer's isUniform() abuse triggers assert in SCEV
Fixes PR36311.
See more detailed analysis in
https://bugs.llvm.org/show_bug.cgi?id=36311.
isUniform() information is recomputed after LV started transforming the
underlying IR and that triggered an assert in SCEV.
From vectorizer's architectural perspective, such information, while
still useful in vector code gen, should not be recomputed after the
start of transforming the LLVM IR. Instead, we should collect and cache
such information during the analysis phase of LV and use the cached info
during code gen.
From the symptom perspective, this assert as it stands right now is not
very useful. Legality already rejected loops that would trigger the
assert. As such, commenting out the assert is NFC from vectorizer's
functionality perspective. On top of that, just above the assertion, we
check for unit-strided load/store or
gather scatter. Addresses can't be uniform below that check.
From vectorization theory point of view, we don't have to reject all
cases of stores to uniform addresses. Eventually, we should support
safe/profitable cases.
This patch resolves the issue by removing the useless assertion that is
invoking LAA's isUniform() that requires up-to-date DomTree ---- once
vector code gen starts modifying CFG, we don't have an up-to-date
DomTree.
Patch by Hideki Saito <hideki.saito@intel.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327109
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Jonas Devlieghere [Fri, 9 Mar 2018 09:56:24 +0000 (09:56 +0000)]
[Support] Move syntax highlighting into support
Move the DWARF syntax highlighting into support. This has several
advantages, most notably that this makes the WithColor RAII wrapper
available outside libDebugInfo. Furthermore, several projects all have
their own code for handling colored output. This provides a place to
centralize it.
Differential revision: https://reviews.llvm.org/D44215
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327108
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Martin Storsjo [Fri, 9 Mar 2018 09:45:37 +0000 (09:45 +0000)]
[AArch64] Fix use of a regex in the win-alloca.ll test. NFC.
Check that the variable actually is the same as the one previously
matched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327107
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Stanislav Mekhanoshin [Fri, 9 Mar 2018 07:21:43 +0000 (07:21 +0000)]
[AMDGPU] Fixed V_DIV_FIXUP_F16 selection on GFX9
GFX9 should select opsel version.
Differential Revision: https://reviews.llvm.org/D44279
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327106
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Craig Topper [Fri, 9 Mar 2018 05:42:44 +0000 (05:42 +0000)]
[X86] Remove duplicate isel pattern. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327104
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Rafael Espindola [Fri, 9 Mar 2018 03:13:37 +0000 (03:13 +0000)]
Don't treat .symver as a regular alias definition.
This patch starts simplifying the handling of .symver.
For now it just moves the responsibility for creating an alias down to
the streamer. With that the asm streamer can pass a .symver unchanged,
which is nice since gas cannot parse "foo@bar = zed".
In a followup I hope to move the handling down to the writer so that
we don't need special hacks for avoiding breaking names with @@@ on
windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327101
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Matt Morehouse [Fri, 9 Mar 2018 02:04:30 +0000 (02:04 +0000)]
Attempt to fix vecreduce-propagate-sd-flags.ll test.
Buildbots have been failing since r327079.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327100
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Eric Christopher [Fri, 9 Mar 2018 01:25:18 +0000 (01:25 +0000)]
Revert "[ThinLTO] Keep available_externally symbols live"
This reverts commit r327041 and the followup attempts at fixing the testcase as they're still failing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327094
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Craig Topper [Fri, 9 Mar 2018 01:22:31 +0000 (01:22 +0000)]
[X86] Remove SRAs from v16i8 multiply lowering on sse2 targets
Previously we unpacked the even bytes of each input into the high byte of 16-bit elements then did an v8i16 arithmetic shift right by 8 bits to fill the upper bits of each word with sign bits. Then we did the v8i16 multiply and then masked to zero the upper 8-bits of each result. The similar was done for all the odd bytes. The results are then packed together with packuswb
Since we are masking each multiply result element to 8-bits, and those 8-bits are determined only by the lower 8-bits of each of the inputs, we don't need to fill the upper bits with sign bits. So we can just unpack into the low byte of each element and treat the upper bits as garbage. This is what gcc also does.
Differential Revision: https://reviews.llvm.org/D44267
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327093
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Adrian Prantl [Fri, 9 Mar 2018 00:45:04 +0000 (00:45 +0000)]
LowerDbgDeclare: ignore dbg.declares for allocas with volatile access
There is no point in lowering a dbg.declare describing an alloca that
has volatile loads or stores as users, since the alloca cannot be
elided. Lowering the dbg.declare will result in larger debug info that
may also have worse coverage than just describing the alloca.
rdar://problem/
34496278
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327092
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Eric Christopher [Fri, 9 Mar 2018 00:23:35 +0000 (00:23 +0000)]
Fix header comment on SHA1 code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327086
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Paul Robinson [Fri, 9 Mar 2018 00:11:54 +0000 (00:11 +0000)]
Revert "[DWARF] Fix mixing assembler -g with DWARF .file directives."
This reverts commit
d6d9ac1ab5039ba1fe0f63c36eac2bdd9f0a79c9.
aka r327073
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327083
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Saleem Abdulrasool [Fri, 9 Mar 2018 00:06:10 +0000 (00:06 +0000)]
utils: add a helper class to lit for captured substitutions
On Windows, if the substitution contains a back reference, it would
removed due to the replacement of the escape character in lit. Create a
helper class to avoid this which will simply ignore the replacement and
mark the substitution as having capture groups being referenced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327082
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Sameer AbuAsal [Thu, 8 Mar 2018 23:41:40 +0000 (23:41 +0000)]
Propagate flags to SDValue in SplitVecOp_VECREDUCE
This patch is a fix for PR36642.
While legalizing long vector types, make sure the smaller types get the
flags of the wider type.
link: https://bugs.llvm.org/show_bug.cgi?id=36642
Change-Id: I0c2829639f094c862c10a6b51b342d4c2563e1fa
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327079
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Kevin Enderby [Thu, 8 Mar 2018 23:10:38 +0000 (23:10 +0000)]
For llvm-objdump and Mach-O files, update the printing of some thread states
from core files. I tested this against the couple of core files that were
getting errors about unknown thread flavors and it now produce the same output as
the Xcode otool-classic(1) tool. Since the core files are huge I didn’t include
them as test cases.
rdar://
38216356
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327077
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Paul Robinson [Thu, 8 Mar 2018 22:39:47 +0000 (22:39 +0000)]
[DWARF] Fix mixing assembler -g with DWARF .file directives.
We were effectively overriding an explicit '.file' directive with info
for the assembler source. That shouldn't happen.
Fixes PR36636.
Differential Revision: https://reviews.llvm.org/D44265
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327073
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Matt Davis [Thu, 8 Mar 2018 22:22:26 +0000 (22:22 +0000)]
[DebugInfo] Add DW_AT_byte_size to vectors
Summary:
This patch adds the DW_AT_byte_size dwarf attribute to vectors.
This fixes PR21924
LLVM will round a vector up to the next alignable address, which can result in
the vector's representation in the object file being larger than what the
debugger will calculate via NumberOfElements * ElementSize. In such a case calling sizeof(MyVec) in the source will result in a different value than what a debugger might present. This situation can occur because LLVM permits non-power of two 'vector_size' attributes.
Reviewers: echristo, dexonsmith, aprantl
Reviewed By: aprantl
Subscribers: probinson, aprantl, llvm-commits, JDevlieghere
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D44048
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327072
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Sanjay Patel [Thu, 8 Mar 2018 22:05:27 +0000 (22:05 +0000)]
[Reassociate] fix test to be independent of FP undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327071
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Benjamin Kramer [Thu, 8 Mar 2018 21:54:30 +0000 (21:54 +0000)]
[Support] Pacify -Wsign-compare in unit test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327070
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Craig Topper [Thu, 8 Mar 2018 21:53:36 +0000 (21:53 +0000)]
[TargetLowering] Remove redundant if condition in SimplifySetcc. NFC
We were checking the condition code a second time when we were already in a block with this same condition code check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327069
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Benjamin Kramer [Thu, 8 Mar 2018 21:31:10 +0000 (21:31 +0000)]
[DebugInfo] Move RangeListEntries instead of copying.
This is needed for correctness as RangeListEntry is not copy-assignable,
which std::vector might rely on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327067
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Sanjay Patel [Thu, 8 Mar 2018 21:30:56 +0000 (21:30 +0000)]
[AMDGPU] fix test to survive more FP undef constant folding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327066
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Philip Reames [Thu, 8 Mar 2018 21:25:30 +0000 (21:25 +0000)]
[NFC] Factor out a helper function for checking if a block has a potential early implicit exit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327065
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Zachary Turner [Thu, 8 Mar 2018 21:07:30 +0000 (21:07 +0000)]
Fix compilation failure with MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327063
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Kuba Mracek [Thu, 8 Mar 2018 21:02:18 +0000 (21:02 +0000)]
[asan] Fix a false positive ODR violation due to LTO ConstantMerge pass [llvm part, take 3]
This fixes a false positive ODR violation that is reported by ASan when using LTO. In cases, where two constant globals have the same value, LTO will merge them, which breaks ASan's ODR detection.
Differential Revision: https://reviews.llvm.org/D43959
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327061
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