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Jonas Devlieghere [Thu, 31 May 2018 17:01:42 +0000 (17:01 +0000)]
[ADT] Make escaping fn conform to coding guidelines
As noted by Adrian on llvm-commits, PrintHTMLEscaped and PrintEscaped in
StringExtras did not conform to the LLVM coding guidelines. This commit
rectifies that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333669
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David Bolvansky [Thu, 31 May 2018 16:39:27 +0000 (16:39 +0000)]
[SimplifyLibcalls] [NFC] Cleanup, improvements
Summary:
* Use "find('%')" instead of loop to find '%' char (we already uses find('%') in optimizePrintFString..)
* Convert getParent() chains to getModule()/getFunction()
Reviewers: lebedev.ri, spatel
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47397
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333668
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Francis Visoiu Mistrih [Thu, 31 May 2018 16:33:26 +0000 (16:33 +0000)]
[MC] Fallback on DWARF when generating compact unwind on AArch64
Instead of asserting when using the def_cfa directive with a register
different from fp, fallback on DWARF.
Easily triggered with:
.cfi_def_cfa x1, 32;
rdar://
40249694
Differential Revision: https://reviews.llvm.org/D47593
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333667
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Roman Tereshin [Thu, 31 May 2018 16:16:49 +0000 (16:16 +0000)]
[GlobalISel][Mips] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call for Mips
Reviewers: aemerson, qcolombet
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D46339
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333665
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Roman Tereshin [Thu, 31 May 2018 16:16:48 +0000 (16:16 +0000)]
[GlobalISel][AMDGPU] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call for AMDGPU
Reviewers: aemerson, qcolombet
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D46339
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333664
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Roman Tereshin [Thu, 31 May 2018 16:16:48 +0000 (16:16 +0000)]
[GlobalISel][ARM] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call and fixing bugs exposed
Reviewers: aemerson, qcolombet
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D46339
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333663
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Roman Tereshin [Thu, 31 May 2018 16:16:47 +0000 (16:16 +0000)]
[GlobalISel][X86] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call and fixing bugs exposed
Reviewers: aemerson, qcolombet
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D46339
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333662
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Simon Pilgrim [Thu, 31 May 2018 15:47:17 +0000 (15:47 +0000)]
[X86][SSE] Recognise splat rotations and expand back to shift ops.
Noticed while fixing PR37426, for splat rotations (rotation by an uniform value) its better to just expand back to shift ops than performing as a general non-uniform rotation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333661
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Simon Pilgrim [Thu, 31 May 2018 15:15:49 +0000 (15:15 +0000)]
[X86][AVX] Add peekThroughEXTRACT_SUBVECTORs helper (NFCI)
We often need this for AVX1 128-bit integer ops as they may have been split from a 256-bit source.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333660
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Aditya Kumar [Thu, 31 May 2018 15:15:33 +0000 (15:15 +0000)]
make GlobalValueSummary::getOriginalName() a const function
Differential Revision: https://reviews.llvm.org/D46962
Reviewers: craig.topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333659
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David Green [Thu, 31 May 2018 14:55:29 +0000 (14:55 +0000)]
[DA] Fix direction vectors for weakZeroSrcSIV
Both weakZeroSrcSIV and weakZeroDstSIV are currently giving the same
direction vectors. Fix weakZeroSrcSIVtest by flipping the directions
it gives.
Differential Revision: https://reviews.llvm.org/D46678
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333658
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Clement Courbet [Thu, 31 May 2018 14:22:01 +0000 (14:22 +0000)]
[X86] Introduce WriteFLDC for x87 constant loads.
Summary:
{FLDL2E, FLDL2T, FLDLG2, FLDLN2, FLDPI} were using WriteMicrocoded.
- I've measured the values for Broadwell, Haswell, SandyBridge, Skylake.
- For ZnVer1 and Atom, values were transferred form InstRWs.
- For SLM and BtVer2, I've guessed some values :(
Reviewers: RKSimon, craig.topper, andreadb
Subscribers: gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D47585
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333656
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Nico Weber [Thu, 31 May 2018 13:41:04 +0000 (13:41 +0000)]
Use -Wextra spelling instead of -W
No difference in behavior, but a bit easier to search for.
https://reviews.llvm.org/D47490
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333651
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Andrea Di Biagio [Thu, 31 May 2018 13:30:42 +0000 (13:30 +0000)]
[MCSchedule] Add the ability to compute the latency and throughput information for MCInst.
This patch extends the MCSchedModel API with new methods that can be used to
obtain the latency and reciprocal througput information for an MCInst.
Scheduling models have recently gained the ability to resolve variant scheduling
classes associated with MCInst objects. Before, models were only able to resolve
a variant scheduling class from a MachineInstr object.
This patch is mainly required by D47374 to avoid regressing a pair of x86
specific -print-schedule tests for btver2. Patch D47374 introduces a new variant
class to teach the btver scheduling model (x86 target) how to correctly compute
the latency profile for some zero-idioms using the new scheduling predicates.
The new methods added by this patch would be mainly used by llc when flag
-print-schedule is specified. In particular, tests that contain inline assembly
require that code is parsed at code emission stage into a sequence of MCInst.
That forces the print-schedule functionality to query the latency/rthroughput
information for MCInst instructions too. If we don't expose this new API, then
we lose "-print-schedule" test coverage as soon as variant scheduling classes
are added to the x86 models.
The tablegen SubtargetEmitter changes teaches how to query latency profile
information using a object that derives from TargetSubtargetInfo. Note that this
should really have been part of r333286. To avoid code duplication, the logic
that "resolves" variant scheduling classes for MCInst, has been moved to a
common place in MC. That logic is used by the "resolveVariantSchedClass" methods
redefined in override by the tablegen'd GenSubtargetInfo classes.
Differential Revision: https://reviews.llvm.org/D47536
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333650
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Benjamin Kramer [Thu, 31 May 2018 13:29:58 +0000 (13:29 +0000)]
Extend the GlobalObject metadata interface
- Make eraseMetadata return whether it changed something
- Wire getMetadata for a single MDNode efficiently into the attachment
map
- Add hasMetadata, which is less weird than checking getMetadata ==
nullptr on a multimap.
Use it to simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333649
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Simon Dardis [Thu, 31 May 2018 12:47:01 +0000 (12:47 +0000)]
[mips] Guard all short instructions correctly.
Reviewers: smaksimovic, atanasyan, abeserminji
Differential Revision: https://reviews.llvm.org/D47533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333645
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Alexandros Lamprineas [Thu, 31 May 2018 12:19:18 +0000 (12:19 +0000)]
[InstCombine, ARM] Convert vld1 to llvm load
Convert a vector load intrinsic into an llvm load instruction.
This is beneficial when the underlying object being addressed
comes from a constant, since we get constant-folding for free.
Differential Revision: https://reviews.llvm.org/D46273
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333643
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Clement Courbet [Thu, 31 May 2018 11:41:27 +0000 (11:41 +0000)]
[X86] Extract latency of fldz/fld1 in separate classes.
Summary:
- I've measured the values for Broadwell, Haswell, SandyBridge, Skylake.
- For ZnVer1 and Atom, values were transferred form `InstRW`s.
- For SLM and BtVer2, values are from Agner.
This is split off from https://reviews.llvm.org/D47377
Reviewers: RKSimon, andreadb
Subscribers: gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D47523
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333642
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Simon Pilgrim [Thu, 31 May 2018 11:25:16 +0000 (11:25 +0000)]
[X86][SSE] Add support for detecting SUB(SPLAT_BV, SPLAT) cases for shift-rotate patterns.
This improves splat rotations (rotation by an uniform value), to avoid having to use the generic non-uniform shift code (extension to PR37426).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333641
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Pavel Labath [Thu, 31 May 2018 08:47:00 +0000 (08:47 +0000)]
DWARFAcceleratorTable: fix equal_range iterators
Summary:
Both (Apple and DWARF5) implementations of the iterators had bugs which
resulted in crashes if one attempted to iterate through the accelerator
tables all the way.
For the Apple tables, the issue was that we did not clear the DataOffset
field when we reached the end, which made our iterator compare unequal
to the "end" iterator. For the Dwarf5 tables, the problem was that we
incremented the CurrentIndex pointer and then used the incremented
(possibly invalid) pointer to check whether we have reached the end of
the index list.
The reason these bugs went undetected is because their only user
(dwarfdump) only ever searched for the first match. Besides allowing us
to test this fix, changing llvm-dwarfdump --find to display all matches
seems like a good improvement (it makes the behavior consistent with the
--name option), so I change llvm-dwarfdump to do that.
The existing tests would be sufficient to test this fix with the new
llvm-dwarfdump behavior, but I add a special test that demonstrates that
the tool indeed displays multiple results. The find.test test needed to
be tweaked a bit as the tool now does not print the ".debug_info
contents" header (also consistent with how --name works).
Reviewers: JDevlieghere, aprantl, dblaikie
Subscribers: mgrang, llvm-commits
Differential Revision: https://reviews.llvm.org/D47543
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333635
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Luke Geeson [Thu, 31 May 2018 08:27:53 +0000 (08:27 +0000)]
[AArch64] Reverted rL333427 fixing Clang UnitTest Failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333634
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Max Kazantsev [Thu, 31 May 2018 08:08:34 +0000 (08:08 +0000)]
[NFC] Factor out a method for further extension
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333633
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Roman Lebedev [Thu, 31 May 2018 07:08:26 +0000 (07:08 +0000)]
[llvm-exegesis][NFCI] Counter::Counter(): more useful msg on event open error
Summary:
I'm slowly looking into a new X86 scheduler model,
for AMD Bulldozer CPU, model 2 (bdver2, Piledriver).
And naturally, i have hit that assert :)
I happened to know what it meant, and how to fix it,
but that is not too common knowledge.
Reviewers: courbet, RKSimon
Reviewed By: courbet
Subscribers: tschuett, llvm-commits, craig.topper
Differential Revision: https://reviews.llvm.org/D47572
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333632
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Roman Lebedev [Thu, 31 May 2018 06:00:36 +0000 (06:00 +0000)]
Revert rL333106 / D46814: [InstCombine] Fold unfolded masked merge pattern with variable mask!
In post-commit review, Eric Christopher notes that many
new MSan warnings are being observed with this patch.
The probable reason is: if 'y' is undef here and we could
evaluate it twice and get different results.
We can't increase the number of uses of a value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333631
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Joel E. Denny [Thu, 31 May 2018 05:48:33 +0000 (05:48 +0000)]
[lit] Fix windows cmd.exe test config for r333620
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333630
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Stanislav Mekhanoshin [Thu, 31 May 2018 05:36:04 +0000 (05:36 +0000)]
[AMDGPU] Track occupancy in MFI
Keep track of achieved occupancy in SIMachineFunctionInfo.
At the moment we have a lot of duplicated or even missed code to
query and maintain occupancy info. Record it in the MFI and
query in a single call. Interfaces:
- getOccupancy() - returns current recorded achieved occupancy.
- getMinAllowedOccupancy() - returns lesser of the achieved occupancy
and the lowest occupancy we are ready to tolerate. For example if
a kernel is memory bound we are ready to tolerate 4 waves.
- limitOccupancy() - record occupancy level if we have to lower it.
- increaseOccupancy() - record occupancy if scheduler managed to
increase the occupancy.
MFI takes care of integrating different checks affecting occupancy,
including LDS use and waves-per-eu attribute. Note that scheduler
starts with not yet known register pressure, so has to record either
limit or increase in occupancy after it is done. Later passes can
just query a resulting value.
New interface is used in the active scheduler and NFC wrt its work.
Changes are also made to experimental schedulers to use it and record
an occupancy after they are done. Before the change waves-per-eu was
ignored by experimental schedulers and tolerance window for memory
bound kernels was not used.
Differential Revision: https://reviews.llvm.org/D47509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333629
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Jan Vesely [Thu, 31 May 2018 04:08:08 +0000 (04:08 +0000)]
AMDGPU/R600: Make sure functions are cacheline aligned
v2: use "ensureAlignment"
make functions cache line aligned
Fixes GPU hangs since r333219:
"AMDGPU: Split R600 AsmPrinter code into its own class"
Differential Revision: https://reviews.llvm.org/D47516
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333622
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Joel E. Denny [Thu, 31 May 2018 03:40:37 +0000 (03:40 +0000)]
[lit] Terminate ": RUN at line N" with ";" not "&&"
This fixes projects/compiler-rt/test/fuzzer/sigusr.test, which was
broken by r333614. The trouble was that "&&" changes the command for
which "$!" gives the pid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333620
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Roman Tereshin [Thu, 31 May 2018 01:56:07 +0000 (01:56 +0000)]
[GlobalISel][Legalizer] LegalizerInfo verifier: Making LegalizerInfo::verify(...) errors fatal
Reviewers: aemerson, qcolombet
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D46339
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333619
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Roman Tereshin [Thu, 31 May 2018 01:56:05 +0000 (01:56 +0000)]
[GlobalISel][AArch64] LegalizerInfo verifier: Fixing bugs exposed by LegalizerInfo::verify(...)
Reviewers: aemerson, qcolombet
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D46339
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333618
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Joel E. Denny [Thu, 31 May 2018 00:55:32 +0000 (00:55 +0000)]
[lit] Report line number for failed RUN command
(Relands r333584, reverted in 333592.)
When debugging test failures with -vv (or -v in the case of the
internal shell), this makes it easier to locate the RUN line that
failed. For example, clang's test/Driver/linux-ld.c has 892 total RUN
lines, and clang's test/Driver/arm-cortex-cpus.c has 424 RUN lines
after concatenation for line continuations.
When reading the generated shell script, this also makes it easier to
locate the RUN line that produced each command.
To support reporting RUN line numbers in the case of the internal
shell, this patch extends the internal shell to support the null
command, ":", except pipelines are not supported.
To support reporting RUN line numbers in the case of windows cmd.exe
as the external shell, this patch extends -vv to set "echo on" instead
of "echo off" in bat files. (Support for windows cmd.exe as a lit
external shell will likely be dropped later, but I found out too
late.)
Reviewed By: delcypher, asmith, stella.stamenova, jmorse, lebedev.ri, rnk
Differential Revision: https://reviews.llvm.org/D44598
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333614
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Sanjay Patel [Thu, 31 May 2018 00:16:58 +0000 (00:16 +0000)]
[InstCombine] don't change the size of a select if it would mismatch its condition operands' sizes
Don't always:
cast (select (cmp x, y), z, C) --> select (cmp x, y), (cast z), C'
This is something that came up as far back as D26556, and I lost track of it.
I suspect that this transform is part of the underlying problem that is
inspiring some of the recent proposals that seek to match larger patterns
that include a cast op. Even if that's not true, this transform causes
problems for codegen (particularly with vector types).
A transform to actively match the size of cmp and select operand sizes should
follow. This patch just removes the harmful canonicalization in the other
direction.
Differential Revision: https://reviews.llvm.org/D47163
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333611
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Sanjay Patel [Wed, 30 May 2018 23:55:12 +0000 (23:55 +0000)]
[InstCombine] don't negate constant expression with fsub (PR37605)
X + (-C) would be transformed back into X - C, so infinite loop:
https://bugs.llvm.org/show_bug.cgi?id=37605
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333610
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Vedant Kumar [Wed, 30 May 2018 23:35:14 +0000 (23:35 +0000)]
[llvm-cov] Use the new PrintHTMLEscaped utility
This removes some duplicate logic to escape characters in HTML output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333608
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Tom Stellard [Wed, 30 May 2018 22:55:35 +0000 (22:55 +0000)]
AMDGPU: Split AMDGPUTTI into GCNTTI and R600TTI
Reviewers: arsenm, nhaehnle
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D47359
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333605
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Vlad Tsyrklevich [Wed, 30 May 2018 22:39:52 +0000 (22:39 +0000)]
[LowerTypeTests] Discard extern_weak linkage for definitions
Summary:
Fix PR37625. It's possible for an extern_weak declaration to be emitted
to the merged module when a definition exists in the ThinLTO portion of
the build; discard the linkage on the declaration in that case.
(otherwise we copy the linkage to the alias to the jumptable and fail)
Reviewers: pcc
Reviewed By: pcc
Subscribers: mehdi_amini, llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D47494
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333604
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George Burgess IV [Wed, 30 May 2018 22:24:08 +0000 (22:24 +0000)]
[NewGVN] Fix set comparison; reflow comment
Looks like we intended to compare this->Members with Other->Members
here, but ended up comparing this->Members with this->Members. Oops. :)
Since CongruenceClass::Members is a SmallPtrSet anyway, we can probably
skip building std::sets if we're willing to write a bit more code.
This appears to be no functional change (for sufficiently lax values of
"no"): this equality check was only being called inside of an assert.
So, worst case, we'll catch more bugs in the form of assertion failures.
Thanks to d0k for noting this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333601
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Roman Tereshin [Wed, 30 May 2018 22:10:04 +0000 (22:10 +0000)]
[GlobalISel][AArch64] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call w/o fixing bugs
This is to make it clear what kind of bugs the LegalizerInfo::verifier
is able to catch and test its output
Reviewers: aemerson, qcolombet
Reviewed By: aemerson
Differential Revision: https://reviews.llvm.org/D46338
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333597
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Joel E. Denny [Wed, 30 May 2018 21:07:27 +0000 (21:07 +0000)]
Revert r333584: [lit] Report line number for failed RUN command
It breaks test-suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333592
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Florian Hahn [Wed, 30 May 2018 21:00:18 +0000 (21:00 +0000)]
[TableGen] Avoid leaking TreePatternNodes by using shared_ptr.
By using std::shared_ptr for TreePatternNode, we can avoid leaking them.
Reviewers: craig.topper, dsanders, stoklund, tstellar, zturner
Reviewed By: dsanders
Differential Revision: https://reviews.llvm.org/D47463
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333591
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Jonas Devlieghere [Wed, 30 May 2018 20:47:18 +0000 (20:47 +0000)]
[ADT] Add unit test for PrintHTMLEscaped
Add unit tests for PrintHTMLEscaped which was added in r333565.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333590
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Daniel Neilson [Wed, 30 May 2018 20:02:56 +0000 (20:02 +0000)]
[IRBuilder] Add APIs for creating calls to atomic memmove and memset intrinsics. (NFC)
Summary:
Creating the IRBuilder methods:
CreateElementUnorderedAtomicMemSet
CreateElementUnorderedAtomicMemMove
These mirror the methods that create calls to the regular (non-atomic) memmove and
memset intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333588
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Simon Pilgrim [Wed, 30 May 2018 19:50:26 +0000 (19:50 +0000)]
Fix Wdocumentation warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333586
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Joel E. Denny [Wed, 30 May 2018 19:42:27 +0000 (19:42 +0000)]
[lit] Report line number for failed RUN command
(Relands r330755 (reverted in r330848) with fix for PR37239.)
When debugging test failures with -vv (or -v in the case of the
internal shell), this makes it easier to locate the RUN line that
failed. For example, clang's test/Driver/linux-ld.c has 892 total RUN
lines, and clang's test/Driver/arm-cortex-cpus.c has 424 RUN lines
after concatenation for line continuations.
When reading the generated shell script, this also makes it easier to
locate the RUN line that produced each command.
To support reporting RUN line numbers in the case of the internal
shell, this patch extends the internal shell to support the null
command, ":", except pipelines are not supported.
To support reporting RUN line numbers in the case of windows cmd.exe
as the external shell, this patch extends -vv to set "echo on" instead
of "echo off" in bat files. (Support for windows cmd.exe as a lit
external shell will likely be dropped later, but I found out too
late.)
Reviewed By: delcypher, asmith, stella.stamenova, jmorse, lebedev.ri, rnk
Differential Revision: https://reviews.llvm.org/D44598
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333584
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Benjamin Kramer [Wed, 30 May 2018 19:31:11 +0000 (19:31 +0000)]
[CalledValuePropagation] Just use a sorted vector instead of a set.
The set properties are never used, so a vector is enough. No
functionality change intended.
While there add some std::moves to SparseSolver.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333582
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Peter Collingbourne [Wed, 30 May 2018 19:30:39 +0000 (19:30 +0000)]
llvm-objcopy: Set sh_link to 0 on unrecognized symtab-linked sections.
Per discussion on the generic-abi mailing list:
https://groups.google.com/forum/#!topic/generic-abi/MPr8TVtnVn4
An object file manipulation tool must either write out a symbol
table with the same number of entries as the original symbol table
and in the same order, or if this is impossible, refuse to operate
on the object file if it has unrecognized sections that are linked
to the symtab section. However, existing tools (namely GNU strip,
GNU objcopy and ld.{bfd,gold,lld} -r) do not comply with this at
present: they change symbol table indexes and set sh_link to 0 on
the unrecognized symtab-linked sections.
We intend to use the latter as a (temporary) signal that a tool has
operated on a proposed new symtab-linked section and invalidated the
symbol table indexes. However, llvm-objcopy currently keeps sh_link
pointing to the new symtab section. This patch changes llvm-objcopy
to set sh_link to 0 to match the behaviour of the other tools.
Differential Revision: https://reviews.llvm.org/D47404
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333581
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Simon Pilgrim [Wed, 30 May 2018 19:16:59 +0000 (19:16 +0000)]
[X86][SSE] Pulled out splat detection helper from LowerScalarVariableShift (NFCI)
Created the IsSplatValue helper from the splat detection code in LowerScalarVariableShift as a first NFC step towards improving support for splat rotations, which is an extension of PR37426.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333580
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Galina Kistanova [Wed, 30 May 2018 18:51:08 +0000 (18:51 +0000)]
Reverted r333424 as it broke multiple build bots and left unfixed for a long time
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333578
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Roman Tereshin [Wed, 30 May 2018 18:45:32 +0000 (18:45 +0000)]
[GlobalISel][Legalizer] LegalizerInfo verifier: check rules cover type indices
This commit adds a simple verifier that tracks type indices being
touched by legalization rules' builders.
Every target will now have an opportunity to call
LegalizerInfo::verify(...) at the end of its derived LegalizerInfo's
constructor and check there are no obvious mistakes like checking only
first type for an opcode that has more than one type index and therefore
implicitly declaring any type for the second (and higher) type index
legal.
The check is only ran in assert builds and should have very minor
performance impact in assert builds and none in release builds.
This commit does not add LegalizerInfo::verify(...) calls to
target-specific legalizers, look for separate commits for that.
This commit also doesn't make the verification errors fatal, only
produces an error message, look for a later commit that does.
Reviewers: aemerson, qcolombet
Reviewed By: aemerson
Differential Revision: https://reviews.llvm.org/D46338
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333576
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Craig Topper [Wed, 30 May 2018 18:30:44 +0000 (18:30 +0000)]
[X86] Update the fast-isel tests for _mm_rcp_ss, _mm_rsqrt_ss, and _mm_sqrt_ss to match clang codegen after r333572.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333573
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Jonas Devlieghere [Wed, 30 May 2018 17:47:11 +0000 (17:47 +0000)]
[dsymutil] Escape HTML special characters in plist.
When printing string in the Plist, we weren't escaping the characters
which lead to invalid XML. This patch adds the escape logic to
StringExtras.
rdar://
39785334
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333565
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Roman Tereshin [Wed, 30 May 2018 16:54:01 +0000 (16:54 +0000)]
[GlobalISel][Legalizer] NFC mostly reducing LegalizeRuleSet's methods' inter-dependecies
Making LegalizeRuleSet's implementation a little more dumb and
straightforward to make it easier to read and change, in particular in
order to add the initial version of LegalizerInfo verifier
Reviewers: aemerson, qcolombet
Reviewed By: aemerson
Differential Revision: https://reviews.llvm.org/D46338
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333562
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Simon Pilgrim [Wed, 30 May 2018 16:29:06 +0000 (16:29 +0000)]
[X86][AVX512BW] Fixed check prefix copy+paste typo in avx512bw-intrinsics.ll
Prefix was for AVX512F instead of AVX512BW
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333560
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Mark Searles [Wed, 30 May 2018 16:27:57 +0000 (16:27 +0000)]
[AMDGPU][Waitcnt] Fix build error: unused variable 'SWaitInst'
https://reviews.llvm.org/rL333556 caused a buildbot failure.
See http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/21876/steps/build_Lld/logs/stdio
/Users/buildslave/as-bldslv9/lld-x86_64-darwin13/llvm.src/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:2007:10: error: unused variable 'SWaitInst' [-Werror,-Wunused-variable]
auto SWaitInst = BuildMI(EntryBB, EntryBB.getFirstNonPHI(),
The unused variable was for debugging purposes; removing that piece of code
to fix the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333559
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Matt Arsenault [Wed, 30 May 2018 16:17:51 +0000 (16:17 +0000)]
AMDGPU: Use better alignment for kernarg lowering
This was just emitting loads with the ABI alignment
for the raw type. The true alignment is often better,
especially when an illegal vector type was scalarized.
The better alignment allows using a scalar load
more often.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333558
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Karl-Johan Karlsson [Wed, 30 May 2018 15:56:46 +0000 (15:56 +0000)]
[ValueTracking] Fix endless recursion in isKnownNonZero()
Summary:
The isKnownNonZero() function have checks that abort the recursion when
it reaches the specified max depth. However one of the recursive calls
was placed before the max depth check was done, resulting in a endless
recursion that eventually triggered a segmentation fault.
Fixed the problem by moving the max depth check above the first
recursive call.
Reviewers: Prazek, nlopes, spatel, craig.topper, hfinkel
Reviewed By: hfinkel
Subscribers: hfinkel, bjope, llvm-commits
Differential Revision: https://reviews.llvm.org/D47531
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333557
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Mark Searles [Wed, 30 May 2018 15:47:45 +0000 (15:47 +0000)]
[AMDGPU][Waitcnt] Fix handling of loops with many bottom blocks
In terms of waitcnt insertion/if necessary, the waitcnt pass forces convergence
for a loop. Previously, that kicked if greater than 2 passes over a loop, which
doesn't account for loop with many bottom blocks. So, increase the threshold to
(n+1), where n is the number of bottom blocks. This gives the pass an
opportunity to consider the contribution of each bottom block, to the overall
loop, before the forced convergence potentially kicks in.
Differential Revision: https://reviews.llvm.org/D47488
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333556
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Gabor Buella [Wed, 30 May 2018 15:25:16 +0000 (15:25 +0000)]
[X86] Lowering FMA intrinsics to native IR (LLVM part)
Support for Clang lowering of fused intrinsics. This patch:
1. Removes bindings to clang fma intrinsics.
2. Introduces new LLVM unmasked intrinsics with rounding mode:
int_x86_avx512_vfmadd_pd_512
int_x86_avx512_vfmadd_ps_512
int_x86_avx512_vfmaddsub_pd_512
int_x86_avx512_vfmaddsub_ps_512
supported with a new intrinsic type (INTR_TYPE_3OP_RM).
3. Introduces new x86 fmaddsub/fmsubadd folding.
4. Introduces new tests for code emitted by sequentions introduced in Clang part.
Patch by tkrupa
Reviewers: craig.topper, sroland, spatel, RKSimon
Reviewed By: craig.topper, RKSimon
Differential Revision: https://reviews.llvm.org/D47443
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333554
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Daniel Neilson [Wed, 30 May 2018 14:43:39 +0000 (14:43 +0000)]
[AliasSet] Teach the alias set how to handle atomic memcpy/memmove/memset
Summary:
The atomic variants of the memcpy/memmove/memset intrinsics can be treated
the same was as the regular forms, with respect to aliasing. Update the
AliasSetTracker to treat the atomic forms the same was as the regular forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333551
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Alexandros Lamprineas [Wed, 30 May 2018 14:38:50 +0000 (14:38 +0000)]
[InstCombine, ARM, AArch64] Convert table lookup to shuffle vector
Turning a table lookup intrinsic into a shuffle vector instruction
can be beneficial. If the mask used for the lookup is the constant
vector {7,6,5,4,3,2,1,0}, then the back-end generates byte reverse
instructions instead.
Differential Revision: https://reviews.llvm.org/D46133
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333550
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Simon Pilgrim [Wed, 30 May 2018 14:36:41 +0000 (14:36 +0000)]
[X86][AVX512] Replace -cpu=knl with -mattr=+avx512f for avx512-intrinsics tests
It was noticed on D47377 that these tests were being unnecessarily affected by scheduler changes.
This adds vzeroupper at the end of some tests as we lose the 'FeatureFastPartialYMMorZMMWrite' feature from KNL, since Skylake+ don't support this its probably better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333549
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Simon Pilgrim [Wed, 30 May 2018 14:11:57 +0000 (14:11 +0000)]
[X86][SSE] Remove unnecessary -cpu from sttni tests
It was noticed on D47377 that these tests (for PR37246) were being unnecessarily affected by scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333546
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Simon Pilgrim [Wed, 30 May 2018 14:01:21 +0000 (14:01 +0000)]
[X86][SSE] Replace -cpu with equivalent -mattr for vec_cast tests
It was noticed on D47377 that these tests were being unnecessarily affected by scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333545
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Amaury Sechet [Wed, 30 May 2018 13:45:43 +0000 (13:45 +0000)]
[ARM] Remove code handling ADDC/ADDE/SUBC/SUBE
Summary: This code is now dead as the ARM backend uses ADDCARRY/SUBCARRY/SETCCCARRY .
Reviewers: rogfer01, efriedma, rengolin, javed.absar
Subscribers: kristof.beyls, chrib, llvm-commits
Differential Revision: https://reviews.llvm.org/D47413
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333544
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Krzysztof Parzyszek [Wed, 30 May 2018 13:45:34 +0000 (13:45 +0000)]
[Hexagon] Use vector align-left when shift amount fits in 3 bits
This saves an instruction because for align-right the shift amount
would need to be put in a register first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333543
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Simon Dardis [Wed, 30 May 2018 13:21:13 +0000 (13:21 +0000)]
[mips] Correct the definition of CTC2/CFC2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333542
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Simon Dardis [Wed, 30 May 2018 13:16:17 +0000 (13:16 +0000)]
[mips] Correct the predicates of microMIPS compact branch instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333541
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Simon Dardis [Wed, 30 May 2018 12:40:53 +0000 (12:40 +0000)]
[mips] Sink PredicateControl further down the class hierarchy.
Previously PredicateControl in some cases was a member of <X>Inst classes
for some X (DSP, EVA) or was in more irregular place in the hierarchry
for any given instruction.
This patch moves PredicateControl down to the root so that it is consistently
available. Then correct the base class of microMIPS instructions as using
EncodingPredicates instead of the general Predicates field of Instruction.
Reviewers: smaksimovic, abeserminji, atanasyan
Differential Revision: https://reviews.llvm.org/D47526
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333536
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Simon Dardis [Wed, 30 May 2018 11:33:35 +0000 (11:33 +0000)]
[mips] Correct the predicates of arithmetic and logic instructions.
As part of this effort, duplicate and correct the predicates of some
aliases. Also disable code generation of some short form instructions
for FastISel, as it would otherwise reject them.
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D47075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333530
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Ilya Biryukov [Wed, 30 May 2018 10:40:11 +0000 (10:40 +0000)]
[YAML] Quote multiline string scalars
Summary:
Otherwise, the YAML parser breaks when trying to read them back in
'key: multiline_string_value' cases.
This patch fixes a problem when serializing structs which contain multi-line strings.
E.g., if we try to serialize the following struct
```
{ "key1": "first line\nsecond line",
"key2": "another string" }`
```
Before this patch, we got the YAML output that failed to parse:
```
key1: first line
second line
key2: another string
```
After the patch, we get:
```
key1: 'first line
second line'
key2: another string
```
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47468
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333527
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Tim Northover [Wed, 30 May 2018 09:54:59 +0000 (09:54 +0000)]
AArch64: print correct annotation for ADRP addresses.
The immediate on an ADRP MCInst needs to be multiplied by 0x1000 to obtain the
actual PC-offset that will be calculated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333525
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Sander de Smalen [Wed, 30 May 2018 09:54:19 +0000 (09:54 +0000)]
[AArch64][AsmParser] Fix segfault on illegal fpimm.
Floating point immediate combining a negative sign and
a hexadecimal number, e.g. #-0x0 caused the compiler to crash.
Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar
Reviewed By: javed.absar
Differential Revision: https://reviews.llvm.org/D47483
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333524
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Daniel Cederman [Wed, 30 May 2018 09:52:18 +0000 (09:52 +0000)]
[Sparc] Treat %fxx registers with value type Other as single precision
They get type Other when used in the clobber list in inline assembly.
This fixes tests fp128.ll and float.ll that failed after r333512.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333523
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Hans Wennborg [Wed, 30 May 2018 09:04:57 +0000 (09:04 +0000)]
Set underlying type for enum with GNU_PROPERTY_X86_FEATURE_1_AND constant
The constant was causing a -Wc++11-narrowing error when compiled with
clang-cl (see PR30776).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333520
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Serge Pavlov [Wed, 30 May 2018 09:01:12 +0000 (09:01 +0000)]
Revert commit 333506
It looks like this commit is responsible for the fail:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/24382.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333518
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Daniel Cederman [Wed, 30 May 2018 06:07:55 +0000 (06:07 +0000)]
[Sparc] Select correct register class for FP register constraints
Summary: The fX version of floating-point registers only supports
single precision. We need to map the name to dX for doubles and qX
for long doubles if we want getRegForInlineAsmConstraint() to be
able to pick the correct register class.
Reviewers: jyknight, venkatra
Reviewed By: jyknight
Subscribers: eraman, fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D47258
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333512
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Craig Topper [Wed, 30 May 2018 05:25:59 +0000 (05:25 +0000)]
[X86] Add unmasked AVX512VNNI instrinsics. Use a select in IR instead.
A future patch will remove the old masked intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333508
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Serge Pavlov [Wed, 30 May 2018 05:13:19 +0000 (05:13 +0000)]
Use uniform mechanism for OOM errors handling
This is a recommit of r333390, which was reverted in r333395, because it
caused cyclic dependency when building shared library `LLVMDemangle.so`.
In this commit `ItaniumDemangler.cpp` was not changed.
The original commit message is below.
In r325551 many calls of malloc/calloc/realloc were replaces with calls of
their safe counterparts defined in the namespace llvm. There functions
generate crash if memory cannot be allocated, such behavior facilitates
handling of out of memory errors on Windows.
If the result of *alloc function were checked for success, the function was
not replaced with the safe variant. In these cases the calling function made
the error handling, like:
T *NewElts = static_cast<T*>(malloc(NewCapacity*sizeof(T)));
if (NewElts == nullptr)
report_bad_alloc_error("Allocation of SmallVector element failed.");
Actually knowledge about the function where OOM occurred is useless. Moreover
having a single entry point for OOM handling is convenient for investigation
of memory problems. This change removes custom OOM errors handling and
replaces them with calls to functions `llvm::safe_*alloc`.
Declarations of `safe_*alloc` are moved to a separate include file, to avoid
cyclic dependency in SmallVector.h
Differential Revision: https://reviews.llvm.org/D47440
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333506
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Hiroshi Inoue [Wed, 30 May 2018 04:48:29 +0000 (04:48 +0000)]
[PowerPC] fix broken JIT-compiled code with tail call optimization
The relocation for branch instructions in the dynamic loader of ExecutionEngine assumes branch instructions with R_PPC64_REL24 relocation type are only bl. However, with the tail call optimization, b instructions can be also used to jump into another function.
This patch makes the relocation to keep bits in the branch instruction other than the jump offset to avoid relocation rewrites a b instruction into bl.
Differential Revision: https://reviews.llvm.org/D47456
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333502
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Sam Clegg [Wed, 30 May 2018 03:37:26 +0000 (03:37 +0000)]
MC: Remove redundant substr() call
Differential Revision: https://reviews.llvm.org/D47047
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333496
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Sam Clegg [Wed, 30 May 2018 03:26:28 +0000 (03:26 +0000)]
Fix use of `echo` command in test script
On win32 we use lit's executeBuiltinEcho to implement the
echo command and this version only currently supports flags
that are separate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333495
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Sam Clegg [Wed, 30 May 2018 02:57:20 +0000 (02:57 +0000)]
[WebAssembly] MC: Add compile-twice test and fix corresponding bug
Differential Revision: https://reviews.llvm.org/D47398
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333494
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Chandler Carruth [Wed, 30 May 2018 02:46:45 +0000 (02:46 +0000)]
[PM/LoopUnswitch] When using the new SimpleLoopUnswitch pass, schedule
loop-cleanup passes at the beginning of the loop pass pipeline, and
re-enqueue loops after even trivial unswitching.
This will allow us to much more consistently avoid simplifying code
while doing trivial unswitching. I've also added a test case that
specifically shows effective iteration using this technique.
I've unconditionally updated the new PM as that is always using the
SimpleLoopUnswitch pass, and I've made the pipeline changes for the old
PM conditional on using this new unswitch pass. I added a bunch of
comments to the loop pass pipeline in the old PM to make it more clear
what is going on when reviewing.
Hopefully this will unblock doing *partial* unswitching instead of just
full unswitching.
Differential Revision: https://reviews.llvm.org/D47408
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333493
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Lang Hames [Wed, 30 May 2018 02:40:40 +0000 (02:40 +0000)]
[ORC] Fix an ambiguous make_unique call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333492
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Lang Hames [Wed, 30 May 2018 01:57:45 +0000 (01:57 +0000)]
[ORC] Update JITCompileCallbackManager to support multi-threaded code.
Previously JITCompileCallbackManager only supported single threaded code. This
patch embeds a VSO (see include/llvm/ExecutionEngine/Orc/Core.h) in the callback
manager. The VSO ensures that the compile callback is only executed once and that
the resulting address cached for use by subsequent re-entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333490
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Shiva Chen [Wed, 30 May 2018 01:16:36 +0000 (01:16 +0000)]
[RISCV] Support resolving fixup_riscv_call and add to MCFixupKindInfo table
Resolving fixup_riscv_call by assembler when the linker relaxation diabled
and the function and callsite within the same compile unit.
And also adding static_assert after Infos array declaration
to avoid missing any new fixup in MCFixupKindInfo in the future.
Differential Revision: https://reviews.llvm.org/D47126
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333487
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Diego Caballero [Tue, 29 May 2018 23:10:44 +0000 (23:10 +0000)]
[VPlan] Replace LLVM_ATTRIBUTE_USED with ifndef NDEBUG
Minor replacement. LLVM_ATTRIBUTE_USED was introduced to silence
a warning but using #ifndef NDEBUG makes more sense in this case.
Reviewers: dblaikie, fhahn, hsaito
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D47498
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333476
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Craig Topper [Tue, 29 May 2018 22:52:09 +0000 (22:52 +0000)]
[X86] Remove some of the extractelts from the new MOVSS+FMA patterns.
We only need the extractelt that corresponds to the register we're trying to insert back into. We can't guarantee the others haven't been optimized out depending on how those operands were produced.
So instead just look for an FR32/FR64 input and emit a COPY_TO_REGCLASS to VR128 in the output pattern. This matches what we do for ADD/SUB/MUL/DIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333473
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Craig Topper [Tue, 29 May 2018 20:46:27 +0000 (20:46 +0000)]
[X86] Use VR128X instead of VR128 in EVEX instruction patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333464
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Craig Topper [Tue, 29 May 2018 20:46:26 +0000 (20:46 +0000)]
[X86] Rename the operands in the recently introduced MOVSS+FMA patterns so that the operand names in the output pattern are always in 1, 2, 3 order since those are the operand names in the instruction.
The order should be controlled in the input pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333463
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Sam Clegg [Tue, 29 May 2018 20:16:47 +0000 (20:16 +0000)]
Fix build error introduced in rL333459
The DEBUG macro was renamed LLVM_DEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333462
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Chandler Carruth [Tue, 29 May 2018 20:15:38 +0000 (20:15 +0000)]
[LoopInstSimplify] Re-implement the core logic of loop-instsimplify to
be both simpler and substantially more efficient.
Rather than use a hand-rolled iteration technique that isn't quite the
same as RPO, use the pre-built RPO loop body traversal utility.
Once visiting the loop body in RPO, we can assert that we visit defs
before uses reliably. When this is the case, the only need to iterate is
when simplifying a def that is used by a PHI node along a back-edge.
With this patch, the first pass over the loop body is just a complete
simplification of every instruction across the loop body. When we
encounter a use of a simplified instruction that stems from a PHI node
in the loop body that has already been visited (due to some cyclic CFG,
potentially the loop itself, or a nested loop, or unstructured control
flow), we recall that specific PHI node for the second iteration.
Nothing else needs to be preserved from iteration to iteration.
On the second and later iterations, only instructions known to have
simplified inputs are considered, each time starting from a set of PHIs
that had simplified inputs along the backedges.
Dead instructions are collected along the way, but deleted in a batch at
the end of each iteration making the iterations themselves substantially
simpler. This uses a new batch API for recursively deleting dead
instructions.
This alsa changes the routine to visit subloops. Because simplification
is fundamentally transitive, we may need to visit the entire loop body,
including subloops, to handle knock-on simplification.
I've added a basic test file that helps demonstrate that all of these
changes work. It includes both straight-forward loops with
simplifications as well as interesting PHI-structures, CFG-structures,
and a nested loop case.
Differential Revision: https://reviews.llvm.org/D47407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333461
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Craig Topper [Tue, 29 May 2018 20:04:10 +0000 (20:04 +0000)]
[X86] Fix a potential crash that occur after r333419.
The code could issue a truncate from a small type to larger type. We need to extend in that case instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333460
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Sam Clegg [Tue, 29 May 2018 19:58:59 +0000 (19:58 +0000)]
[WebAssembly] Add more error checking to object file parsing
This should address some of the assert failures the fuzzer has been
finding such as:
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=6719
Differential Revision: https://reviews.llvm.org/D47086
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333459
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Matt Arsenault [Tue, 29 May 2018 19:35:53 +0000 (19:35 +0000)]
AMDGPU: Fix broken check lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333458
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Matt Arsenault [Tue, 29 May 2018 19:35:46 +0000 (19:35 +0000)]
AMDGPU: Fix typo in option description
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333457
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Matt Arsenault [Tue, 29 May 2018 19:35:00 +0000 (19:35 +0000)]
AMDGPU: Round up kernel argument allocation size
AFAIK the driver's allocation will actually have to round this
up anyway. It is useful to track the rounded up size, so that
the end of the kernel segment is known to be dereferencable so
a wider s_load_dword can be used for a short argument at the end
of the segment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333456
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Sameer AbuAsal [Tue, 29 May 2018 19:34:54 +0000 (19:34 +0000)]
[RISCV] Add peepholes for Global Address lowering patterns
Summary:
Base and offset are always separated when a GlobalAddress node is lowered
(rL332641) as an optimization to reduce instruction count. However, this
optimization is not profitable if the Global Address ends up being used in only
instruction.
This patch adds peephole optimizations that merge an offset of
an address calculation into the LUI %%hi and ADD %lo of the lowering sequence.
The peephole handles three patterns:
1) ADDI (ADDI (LUI %hi(global)) %lo(global)), offset
--->
ADDI (LUI %hi(global + offset)) %lo(global + offset).
This generates:
lui a0, hi (global + offset)
add a0, a0, lo (global + offset)
Instead of
lui a0, hi (global)
addi a0, hi (global)
addi a0, offset
This pattern is for cases when the offset is small enough to fit in the
immediate filed of ADDI (less than 12 bits).
2) ADD ((ADDI (LUI %hi(global)) %lo(global)), (LUI hi_offset))
--->
offset = hi_offset << 12
ADDI (LUI %hi(global + offset)) %lo(global + offset)
Which generates the ASM:
lui a0, hi(global + offset)
addi a0, lo(global + offset)
Instead of:
lui a0, hi(global)
addi a0, lo(global)
lui a1, (offset)
add a0, a0, a1
This pattern is for cases when the offset doesn't fit in an immediate field
of ADDI but the lower 12 bits are all zeros.
3) ADD ((ADDI (LUI %hi(global)) %lo(global)), (ADDI lo_offset, (LUI hi_offset)))
--->
offset = global + offhi20<<12 + offlo12
ADDI (LUI %hi(global + offset)) %lo(global + offset)
Which generates the ASM:
lui a1, %hi(global + offset)
addi a1, %lo(global + offset)
Instead of:
lui a0, hi(global)
addi a0, lo(global)
lui a1, (offhi20)
addi a1, (offlo12)
add a0, a0, a1
This pattern is for cases when the offset doesn't fit in an immediate field
of ADDI and both the lower 1 bits and high 20 bits are non zero.
Reviewers: asb
Reviewed By: asb
Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, apazos,
niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333455
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Daniel Neilson [Tue, 29 May 2018 19:23:50 +0000 (19:23 +0000)]
[BasicAA] Teach the analysis about atomic memcpy
Summary:
A simple change to derive mod/ref info from the atomic memcpy
intrinsic in the same way as from the regular memcpy intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333454
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Douglas Yung [Tue, 29 May 2018 19:21:22 +0000 (19:21 +0000)]
Update CodeView register names in a test that was missed in r333421.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333453
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