OSDN Git Service
Craig Topper [Sun, 22 Oct 2017 06:18:23 +0000 (06:18 +0000)]
[X86] Add VEX_WIG to applicable AVX512 instructions.
This should be NFC. Will be used in future patches to fix disassembler bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316284
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 22 Oct 2017 06:18:20 +0000 (06:18 +0000)]
[X86] Add VEX_WIG to VROUNDSSrr/VROUNDSSrm/VROUNDSDrr/VROUNDSDrm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316283
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 22 Oct 2017 04:32:30 +0000 (04:32 +0000)]
[X86] Don't allow gather/scatter to disassembler if memory operand does not use a SIB byte.
Fixes PR34998.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316282
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 21 Oct 2017 20:40:49 +0000 (20:40 +0000)]
Strip trailing whitespace. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316277
91177308-0d34-0410-b5e6-
96231b3b80d8
Aaron Ballman [Sat, 21 Oct 2017 20:38:15 +0000 (20:38 +0000)]
Reverting r316270 due to failing build bots.
http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules-2/builds/12899
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/7951
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316276
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 21 Oct 2017 20:19:48 +0000 (20:19 +0000)]
[X86][SSE] Add extractps/pextrd equivalence to domain tables
Differential Revision: https://reviews.llvm.org/D39135
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316274
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 21 Oct 2017 20:03:20 +0000 (20:03 +0000)]
[X86] Fix disassembling of EVEX instructions to stop accidentally decoding the SIB index register as an XMM/YMM/ZMM register.
This introduces a new operand type to encode the whether the index register should be XMM/YMM/ZMM. And new code to fixup the results created by readSIB.
This has the nice effect of removing a bunch of code that hard coded the name of every GATHER and SCATTER instruction to map the index type.
This fixes PR32807.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316273
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 21 Oct 2017 17:23:04 +0000 (17:23 +0000)]
Fix MSVC 'result of 32-bit shift implicitly converted to 64 bits' warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316271
91177308-0d34-0410-b5e6-
96231b3b80d8
Fangrui Song [Sat, 21 Oct 2017 16:59:40 +0000 (16:59 +0000)]
[PPC CodeGen] Fix the bitreverse.i64 intrinsic.
Summary: The two 32-bit words were swapped.
Subscribers: nemanjai, kbarton
Differential Revision: https://reviews.llvm.org/D38705
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316270
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 21 Oct 2017 16:35:41 +0000 (16:35 +0000)]
[ValueTracking] Remove unnecessary temporary APInt from computeNumSignBitsVectorConstant.
We can just use getNumSignBits instead of inverting negative numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316266
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 21 Oct 2017 16:35:39 +0000 (16:35 +0000)]
[ValueTracking] Simplify the known bits code for constant vectors a little.
Neither of these cases really require a temporary APInt outside the loop. For the ConstantDataSequential case the APInt will never be larger than 64-bits so its fine to just call getElementAsAPInt. For ConstantVector we can get the APInt by reference and only make a copy where the inversion is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316265
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 21 Oct 2017 14:35:09 +0000 (14:35 +0000)]
[X86][SSE] Add missing extractps scheduling test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316262
91177308-0d34-0410-b5e6-
96231b3b80d8
David Green [Sat, 21 Oct 2017 13:58:37 +0000 (13:58 +0000)]
[LoopInterchange] Fix phi node ordering miscompile.
The way that splitInnerLoopHeader splits blocks requires that
the induction PHI will be the first PHI in the inner loop
header. This makes sure that is actually the case when there
are both IV and reduction phis.
Differential Revision: https://reviews.llvm.org/D38682
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316261
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Sat, 21 Oct 2017 05:37:10 +0000 (05:37 +0000)]
[SelectionDAG] Use dyn_cast without cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316258
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Sat, 21 Oct 2017 04:57:03 +0000 (04:57 +0000)]
[SelectionDAG] Use isa to silence unused variable warning (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316257
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 21 Oct 2017 03:22:13 +0000 (03:22 +0000)]
[SelectionDAG] Don't subject ConstantSDNodes to the depth limit in computeKnownBits and ComputeNumSignBits.
We don't need to do any additional recursion, we just need to analyze the APInt stored in the node. This matches what the ValueTracking versions do for IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316256
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 21 Oct 2017 02:27:19 +0000 (02:27 +0000)]
[SelectionDAG] Don't subject ISD:Constant to the depth limit in TargetLowering::SimplifyDemandedBits.
Summary:
We shouldn't recurse any further but it doesn't mean we shouldn't be able to give the known bits for a constant. The caller would probably like that we always return the right answer for a constant RHS. This matches what InstCombine does in this case.
I don't have a test case because this showed up while trying to revive D31724.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: arsenm, llvm-commits
Differential Revision: https://reviews.llvm.org/D38967
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316255
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 21 Oct 2017 02:26:00 +0000 (02:26 +0000)]
[X86] Do not generate __multi3 for mul i128 on X86
Summary: __multi3 is not available on x86 (32-bit). Setting lib call name for MULI_128 to nullptr forces DAGTypeLegalizer::ExpandIntRes_MUL to generate instructions for 128-bit multiply instead of a call to an undefined function. This fixes PR20871 though it may be worth looking at why licm and indvars combine to generate 65-bit multiplies in that test.
Patch by Riyaz V Puthiyapurayil
Reviewers: craig.topper, schweitz
Reviewed By: craig.topper, schweitz
Subscribers: RKSimon, llvm-commits
Differential Revision: https://reviews.llvm.org/D38668
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316254
91177308-0d34-0410-b5e6-
96231b3b80d8
Eugene Zelenko [Sat, 21 Oct 2017 00:57:46 +0000 (00:57 +0000)]
[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316253
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Fri, 20 Oct 2017 22:08:40 +0000 (22:08 +0000)]
[Packetizer] Add function to check for aliasing between instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316243
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 20 Oct 2017 21:55:23 +0000 (21:55 +0000)]
[utils, x86] add regex for retl/retq to reduce duplicated FileChecking (PR35003)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316242
91177308-0d34-0410-b5e6-
96231b3b80d8
Eugene Zelenko [Fri, 20 Oct 2017 21:47:29 +0000 (21:47 +0000)]
[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316241
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Clegg [Fri, 20 Oct 2017 21:28:38 +0000 (21:28 +0000)]
[WebAssembly] MC: Fix crash when -g specified.
At this point we don't output any debug sections or thier
relocations.
Differential Revision: https://reviews.llvm.org/D39076
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316240
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Fri, 20 Oct 2017 20:55:29 +0000 (20:55 +0000)]
[globalisel][tablegen] Fix small spelling nits. NFC
ComplexRendererFn -> ComplexRendererFns
Corrected a couple lingering references to tied operands that were missed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316237
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Fri, 20 Oct 2017 20:24:44 +0000 (20:24 +0000)]
[Hexagon] Report error instead of crashing on wrong inline-asm constraints
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316236
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Fri, 20 Oct 2017 19:48:26 +0000 (19:48 +0000)]
COFF: Add type server pdb files to linkrepro tar file.
Differential Revision: https://reviews.llvm.org/D38977
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316233
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Fri, 20 Oct 2017 19:33:12 +0000 (19:33 +0000)]
[Hexagon] Reorganize and update instruction patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316228
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 20 Oct 2017 19:29:01 +0000 (19:29 +0000)]
[X86][SSE] Add missing _mm_extract_ps fast-isel test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316226
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 20 Oct 2017 18:35:32 +0000 (18:35 +0000)]
[x86] avoid FileCheck assert duplication with retl/retq regex; NFC
This was suggested in PR35003:
https://bugs.llvm.org/show_bug.cgi?id=35003
32-bit checks may be identical to 64-bit (if we avoid those pesky scalar params!).
I'll check in the script change shortly assuming this doesn't anger any bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316223
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 20 Oct 2017 18:07:50 +0000 (18:07 +0000)]
[X86][SSE] getTargetShuffleMask - check shuffle input value types. NFCI.
To help identify shuffle combine issues
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316222
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Clegg [Fri, 20 Oct 2017 17:41:12 +0000 (17:41 +0000)]
[WebAssembly] MC: Handle (ignore) MCSA_Protected symbol attribute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316220
91177308-0d34-0410-b5e6-
96231b3b80d8
Dave Lee [Fri, 20 Oct 2017 17:04:43 +0000 (17:04 +0000)]
Make x86 __ehhandler comdat if parent function is
Summary:
This change comes from using lld for i686-windows-msvc. Before this change, lld
emits an error of:
error: relocation against symbol in discarded section: .xdata
It's possible that this could be addressed in lld, but I think this change is
reasonable on its own.
At a high level, this is being generated:
A (.text comdat) -> B (.text) -> C (.xdata comdat)
Where A is a C++ inline function, which references B, an exception handler
thunk, which references C, the exception handling info.
With this structure, lld will error when applying relocations to B if the C it
references has been discarded (some other C has been selected).
This change checks if A is comdat, and if so places the exception registration
thunk (B) in the comdata group of A (and B).
It appears that MSVC makes the __ehhandler function comdat.
Is it possible that duplicate thunks are being emitted into the final binary
with other linkers, or are they stripping the unused thunks?
Reviewers: rnk, majnemer, compnerd, smeenai
Reviewed By: rnk, compnerd
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316219
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Fri, 20 Oct 2017 16:56:33 +0000 (16:56 +0000)]
[Hexagon] Allow redefinition with immediates for hw loop conversion
Normally, if the registers holding the induction variable's bounds
are redefined inside of the loop's body, the loop cannot be converted
to a hardware loop. However, if the redefining instruction is actually
loading an immediate value into the register, this conversion is both
possible and legal (since the immediate itself will be used in the
loop setup in the preheader).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316218
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 20 Oct 2017 16:55:51 +0000 (16:55 +0000)]
[X86] Check all CPU target names.
We ignore the 32-bit/64-bit triple but I've tried to use i686 triples for CPUs that don't support x86_64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316217
91177308-0d34-0410-b5e6-
96231b3b80d8
Zvi Rackover [Fri, 20 Oct 2017 15:32:14 +0000 (15:32 +0000)]
X86 Tests: Add tests for vector permutes with variable indices. NFC.
Basic tests which are the equivalent of single-source shufflevector with variable mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316216
91177308-0d34-0410-b5e6-
96231b3b80d8
Aleksandar Beserminji [Fri, 20 Oct 2017 14:35:41 +0000 (14:35 +0000)]
Revert "[mips] Reordering callseq* nodes to be linear"
This reverts commit r314507, because the original patch is causing test
failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316215
91177308-0d34-0410-b5e6-
96231b3b80d8
Eugene Leviant [Fri, 20 Oct 2017 14:29:17 +0000 (14:29 +0000)]
[ARM] Use post-RA MI scheduler when +use-misched is set
Differential revision: https://reviews.llvm.org/D39100
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316214
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 20 Oct 2017 14:13:02 +0000 (14:13 +0000)]
[X86][AVX512] Regenerate regcall tests.
As part of tracking down machine verifier issues (PR27481)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316213
91177308-0d34-0410-b5e6-
96231b3b80d8
Nikolai Bozhenov [Fri, 20 Oct 2017 10:08:47 +0000 (10:08 +0000)]
[ValueTracking] Enabling ValueTracking patch by default
(recommit #2 after checking for timeout issue).
The original patch was an improvement to IR ValueTracking on
non-negative integers. It has been checked in to trunk (D18777,
r284022). But was disabled by default due to performance regressions.
Perf impact has improved. The patch would be enabled by default.
Reviewers: reames, hfinkel
Differential Revision: https://reviews.llvm.org/D34101
Patch by: Olga Chupina <olga.chupina@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316208
91177308-0d34-0410-b5e6-
96231b3b80d8
Max Kazantsev [Fri, 20 Oct 2017 06:40:48 +0000 (06:40 +0000)]
Add test case for LoopSink pass
This test checks that load from constant memory will be sunk regardless of
aliasing stores in the loop.
Patch by Daniil Suchkov!
Differential Revision: https://reviews.llvm.org/D39113
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316207
91177308-0d34-0410-b5e6-
96231b3b80d8
Dylan McKay [Fri, 20 Oct 2017 04:17:14 +0000 (04:17 +0000)]
[AVR] Fix the select-mbb-placement-bug.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316205
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Fri, 20 Oct 2017 01:18:00 +0000 (01:18 +0000)]
[ExecutionEngine] Temporarily remove the ExecutionEngine tls tests.
Will re-enable once I figure out why the necessary runtime functions are
missing on some bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316203
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Fri, 20 Oct 2017 00:53:16 +0000 (00:53 +0000)]
[ExecutionEngine] After a heroic dev-meeting hack session, the JIT supports TLS.
Turns on EmulatedTLS support by default in EngineBuilder. ;)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316200
91177308-0d34-0410-b5e6-
96231b3b80d8
Nemanja Ivanovic [Fri, 20 Oct 2017 00:36:46 +0000 (00:36 +0000)]
Disabling the transformation introduced in r315888
The commit at https://reviews.llvm.org/rL315888 is causing some failures
with internal testing. Disabling this code until we can resolve the issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316199
91177308-0d34-0410-b5e6-
96231b3b80d8
Keith Wyss [Thu, 19 Oct 2017 22:35:09 +0000 (22:35 +0000)]
[XRay] [docs] Document how to generate flamegraphs from xray traces.
Summary:
Updated the XRayExample docs with instructions for using the llvm-xray stacks
command.
Reviewers: dberris
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39106
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316192
91177308-0d34-0410-b5e6-
96231b3b80d8
Eugene Zelenko [Thu, 19 Oct 2017 22:07:16 +0000 (22:07 +0000)]
[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316190
91177308-0d34-0410-b5e6-
96231b3b80d8
Alex Bradbury [Thu, 19 Oct 2017 21:43:29 +0000 (21:43 +0000)]
[RISCV] Add missing hunk from r316188
r316188 didn't set guessInstructionProperties=1 as it should have done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316189
91177308-0d34-0410-b5e6-
96231b3b80d8
Alex Bradbury [Thu, 19 Oct 2017 21:37:38 +0000 (21:37 +0000)]
[RISCV] Initial codegen support for ALU operations
This adds the minimum necessary to support codegen for simple ALU operations
on RV32. Prolog and epilog insertion, support for memory operations etc etc
follow in future patches.
Leave guessInstructionProperties=1 until https://reviews.llvm.org/D37065 is
reviewed and lands.
Differential Revision: https://reviews.llvm.org/D29933
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316188
91177308-0d34-0410-b5e6-
96231b3b80d8
Eugene Zelenko [Thu, 19 Oct 2017 21:21:30 +0000 (21:21 +0000)]
[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316187
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Thu, 19 Oct 2017 20:59:41 +0000 (20:59 +0000)]
[SelectionDAG] Add a check to getVectorShuffle to ensure that the only negative index we allow is -1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316183
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Thu, 19 Oct 2017 20:59:40 +0000 (20:59 +0000)]
[X86] Remove LowerEXTRACT_SUBVECTOR handler. All EXTRACT_SUBVECTORs are marked as legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316182
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 19 Oct 2017 19:05:04 +0000 (19:05 +0000)]
[X86][AES] Test AES intrinsics on 32/64-bit targets with/without VEX encoding
Don't just test on 32-bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316176
91177308-0d34-0410-b5e6-
96231b3b80d8
Graham Yiu [Thu, 19 Oct 2017 18:16:31 +0000 (18:16 +0000)]
The cost of splitting a large vector instruction is not being taken into account by the getUserCost function. This was leading to some loops being over unrolled. The cost of a vector instruction is now being multiplied by the cost of the type legalization. This will return a more accurate cost.
Committing on behalf on Brad Nemanich (brad.nemanich@ibm.com)
Differential Revision: https://reviews.llvm.org/D38961
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316174
91177308-0d34-0410-b5e6-
96231b3b80d8
Konstantin Zhuravlyov [Thu, 19 Oct 2017 17:12:55 +0000 (17:12 +0000)]
AMDGPU/Docs: Fix unreadable characters
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316171
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Thu, 19 Oct 2017 16:59:22 +0000 (16:59 +0000)]
[Hexagon] Fix store conversion from rr to io in optimize addressing modes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316170
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Thu, 19 Oct 2017 16:57:40 +0000 (16:57 +0000)]
ExecutionEngine: adjust COFF i386 tautological asserts
Modify static_casts to not be tautological in some COFF i386
relocations.
Patch by Alex Langford!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316169
91177308-0d34-0410-b5e6-
96231b3b80d8
Alex Bradbury [Thu, 19 Oct 2017 16:22:51 +0000 (16:22 +0000)]
[RISCV] RISCVAsmParser: early exit if RISCVOperand isn't immediate as expected
This is necessary to avoid an assertion in the included test case and similar
assembler inputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316168
91177308-0d34-0410-b5e6-
96231b3b80d8
Alex Bradbury [Thu, 19 Oct 2017 16:09:20 +0000 (16:09 +0000)]
[RISCV][NFC] Drop unused parameter from createImm helper in RISCVAsmParser
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316167
91177308-0d34-0410-b5e6-
96231b3b80d8
Nikolai Bozhenov [Thu, 19 Oct 2017 15:36:18 +0000 (15:36 +0000)]
Revert r315992 because of a found miscompilation failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316164
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 19 Oct 2017 15:02:24 +0000 (15:02 +0000)]
[X86] Replace custom scalar integer absolute matching with ISD::ABS lowering.
x86 has its own copy of integer absolute pattern matching to combine directly to a SUB+CMOV.
This patch removes the x86 combine and adds custom lowering support for ISD::ABS instead, allowing us to use the DAGCombiner version.
Additional test cases are already covered by iabs.ll (rL315706 and rL315711).
Differential Revision: https://reviews.llvm.org/D38895
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316162
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 19 Oct 2017 15:00:31 +0000 (15:00 +0000)]
Fix MSVC signed/unsigned comparison warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316161
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Thu, 19 Oct 2017 14:59:26 +0000 (14:59 +0000)]
[X86] Add scalar (abs (abs x)) -> (abs x) combine test.
Before landing D38895
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316160
91177308-0d34-0410-b5e6-
96231b3b80d8
Alex Bradbury [Thu, 19 Oct 2017 14:29:03 +0000 (14:29 +0000)]
[RISCV] Prepare for the use of variable-sized register classes
While parameterising by XLen, also take the opportunity to clean up the
formatting of the RISCV .td files.
This commit unifies the in-tree code with my patchset at
<https://github.com/lowrisc/riscv-llvm>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316159
91177308-0d34-0410-b5e6-
96231b3b80d8
Max Kazantsev [Thu, 19 Oct 2017 12:22:39 +0000 (12:22 +0000)]
Revert rL316156 due to failure on APFloatTest.fromToStringSpecials
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316158
91177308-0d34-0410-b5e6-
96231b3b80d8
Serguei Katkov [Thu, 19 Oct 2017 11:16:03 +0000 (11:16 +0000)]
Fix APFloat from string conversion for Inf
The method IEEEFloat::convertFromStringSpecials() does not recognize
the "+Inf" and "-Inf" strings but these strings are printed for
the double Infinities by the IEEEFloat::toString().
This patch adds the "+Inf" and "-Inf" strings to the list of recognized
patterns in IEEEFloat::convertFromStringSpecials().
Reviewers: sberg, bogner, majnemer, timshen, rnk, skatkov, gottesmm, bkramer, scanon
Reviewed By: skatkov
Subscribers: apilipenko, reames, llvm-commits
Differential Revision: https://reviews.llvm.org/D38030
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316156
91177308-0d34-0410-b5e6-
96231b3b80d8
Diana Picus [Thu, 19 Oct 2017 09:28:19 +0000 (09:28 +0000)]
[ARM GlobalISel] Fix liveins in test. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316155
91177308-0d34-0410-b5e6-
96231b3b80d8
Diana Picus [Thu, 19 Oct 2017 08:50:28 +0000 (08:50 +0000)]
[ARM GlobalISel] Remove redundant tests
These test cases don't really add anything that isn't covered by other
tests as well, so we can safely remove them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316154
91177308-0d34-0410-b5e6-
96231b3b80d8
Vassil Vassilev [Thu, 19 Oct 2017 08:44:19 +0000 (08:44 +0000)]
Revert 316150 which reinstated r316025.
It fails on some bots and now we know how to reproduce it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316153
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam McCall [Thu, 19 Oct 2017 08:13:49 +0000 (08:13 +0000)]
Const fix for YAMLParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316151
91177308-0d34-0410-b5e6-
96231b3b80d8
Vassil Vassilev [Thu, 19 Oct 2017 08:04:22 +0000 (08:04 +0000)]
Reinstate r316025, reverted in r316029.
Original commit message:
"[cmake] Use find_package to discover zlib
This allows us to use standard cmake utilities to point to non-system zlib
locations.
Patch by Oksana Shadura and me (D39002)."
The new patch brings back the old behavior in the cases where find_package
cannot find zlib.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316150
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Thu, 19 Oct 2017 06:16:23 +0000 (06:16 +0000)]
[Coverage] Simplify r316141. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316147
91177308-0d34-0410-b5e6-
96231b3b80d8
Max Kazantsev [Thu, 19 Oct 2017 05:33:28 +0000 (05:33 +0000)]
[NFC][IRCE] Filter out empty ranges early
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316146
91177308-0d34-0410-b5e6-
96231b3b80d8
whitequark [Thu, 19 Oct 2017 04:47:48 +0000 (04:47 +0000)]
[MergeFunctions] Don't blindly RAUW a GlobalValue with a ConstantExpr.
MergeFunctions uses (through FunctionComparator) a map of GlobalValues
to identifiers because it needs to compare functions and globals
do not have an inherent total order. Thus, FunctionComparator
(through GlobalNumberState) has a ValueMap<GlobalValue *>.
r315852 added a RAUW on globals that may have been previously
encountered by the FunctionComparator, which would replace
a GlobalValue * key with a ConstantExpr *, which is illegal.
This commit adjusts that code path to remove the function being
replaced from the ValueMap as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316145
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 19 Oct 2017 01:32:18 +0000 (01:32 +0000)]
Simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316144
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 19 Oct 2017 01:25:48 +0000 (01:25 +0000)]
Fix buffer overflow.
We were reading past the end of the buffer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316143
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Thu, 19 Oct 2017 00:43:48 +0000 (00:43 +0000)]
[CMake] Allow parent projects to use in-source builds
LLVM checks if it is performing an in-source build and then stop the
build. However, this check is also triggered if LLVM is being build as
part of a parent project, which prevents the parent project itself from
using in-source builds. For example, CMake allows a parent project to
specify the output of its subproject:
add_subdirectory(llvm llvm_build)
This tells CMake to conduct an out-tree build of LLVM, which without
this patch will still fails because what is being tested is the parent
project, not LLVM. This is fixed by using the "CURRENT" variable, which
is only concerned by the CMakeLists that is actually bein processed at
the moment.
Tests:
Ran `make check-llvm`.
Patch by Henrique Jung <henriquenj_AT_gmail_DOT_com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316142
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Wed, 18 Oct 2017 23:58:28 +0000 (23:58 +0000)]
[llvm-cov] Move LineCoverageIterator to libCoverage. NFC.
LineCoverageIterator makes it easy for clients of coverage data to
determine line execution counts for a file or function. The coverage
iteration logic is tricky enough that it really pays not to have
multiple copies of it. Hopefully having just one implementation in LLVM
will make the iteration logic easier to test, reuse, and update.
This commit is NFC but I've added a unit test to go along with it just
because it's easy to do now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316141
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Wed, 18 Oct 2017 23:58:27 +0000 (23:58 +0000)]
[llvm-cov] Use the coverage namespace. NFC.
This is a simple code cleanup. It will facilitate moving
LineCoverageIterator to libCoverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316140
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 18 Oct 2017 23:33:31 +0000 (23:33 +0000)]
GISel: Canonicalize select tests using update_mir_test_checks
This runs `udpate_mir_test_checks --add-vreg-checks` on the tests taht
are already more or less in the format that generates, so that there
will be less churn in some upcoming changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316139
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 18 Oct 2017 23:26:24 +0000 (23:26 +0000)]
AArch64/GISel: Modernize the localizer test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316138
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 18 Oct 2017 23:18:12 +0000 (23:18 +0000)]
Canonicalize a large number of mir tests using update_mir_test_checks
This converts a large and somewhat arbitrary set of tests to use
update_mir_test_checks. I ran the script on all of the tests I expect
to need to modify for an upcoming mir syntax change and kept the ones
that obviously didn't change the tests in ways that might make it
harder to understand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316137
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Wed, 18 Oct 2017 22:42:36 +0000 (22:42 +0000)]
[PM] Refactor the bounds checking pass to remove a method only called in
one place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316135
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 18 Oct 2017 22:39:55 +0000 (22:39 +0000)]
update_mir_test_checks: Support adding checks for vreg classes
This is a temporary hack to support adding checks for the "registers:"
block of mir functions. This is necessary to convert a number of tests
so that there's less churn when we change the MIR printer to put the
vreg classes on defs instead of in their own block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316134
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 18 Oct 2017 22:36:08 +0000 (22:36 +0000)]
update_mir_test_checks: Improve message when updating fails
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316133
91177308-0d34-0410-b5e6-
96231b3b80d8
Tony Tye [Wed, 18 Oct 2017 22:16:55 +0000 (22:16 +0000)]
[AMDGPU] Corrections to memory model description.
- Add description on nontemporal support.
- Correct OpenCL sequentially consistent and fence code sequences.
- Minor test cleanup.
Differential Revision: https://reviews.llvm.org/D39073
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316131
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Wed, 18 Oct 2017 22:00:57 +0000 (22:00 +0000)]
Revert "[ScalarEvolution] Handling for ICmp occuring in the evolution chain."
This reverts commit r316054. There was some confusion over the review process:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20171016/495884.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316129
91177308-0d34-0410-b5e6-
96231b3b80d8
Eugene Zelenko [Wed, 18 Oct 2017 21:46:47 +0000 (21:46 +0000)]
[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316128
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Clegg [Wed, 18 Oct 2017 20:46:05 +0000 (20:46 +0000)]
Fix lit.site.cfg.py.in after rL316123
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316126
91177308-0d34-0410-b5e6-
96231b3b80d8
Dylan McKay [Wed, 18 Oct 2017 20:04:57 +0000 (20:04 +0000)]
[AVR] Fix the select_mbb_placement_bug.ll test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316124
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Clegg [Wed, 18 Oct 2017 19:37:30 +0000 (19:37 +0000)]
Don't set static-libs test feature when using LLVM_LINK_LLVM_DYLIB
This was causing execname-options.ll to fail on the wasm
waterfall.
Differential Revision: https://reviews.llvm.org/D39022
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316123
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Wed, 18 Oct 2017 18:52:29 +0000 (18:52 +0000)]
[llvm-cov] Suppress sub-line highlights in simple cases
llvm-cov tends to highlight too many regions because its policy is to
highlight all region entry segments. This can look confusing to users:
not all region entry segments are interesting and deserve highlighting.
Emitting these highlights only when the region count differs from the
line count is a more user-friendly policy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316109
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Wed, 18 Oct 2017 18:52:28 +0000 (18:52 +0000)]
[llvm-cov] Pass LineCoverageStats in SourceCoverageView. NFC.
Instead of copying around the wrapped segment and the list of line
segments, just pass a reference to a LineCoverageStats object. This
simplifies the interface. It also makes an upcoming change to suppress
distracting highlights possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316108
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Wed, 18 Oct 2017 18:52:27 +0000 (18:52 +0000)]
[llvm-cov] Highlight gaps in consecutive uncovered regions
llvm-cov typically doesn't highlight gap segments, but it should if the
gap occurs after an uncovered region in order to preserve continuity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316107
91177308-0d34-0410-b5e6-
96231b3b80d8
Sumanth Gundapaneni [Wed, 18 Oct 2017 18:07:07 +0000 (18:07 +0000)]
[Hexagon] New HVX target features.
This patch lets the llvm tools handle the new HVX target features that
are added by frontend (clang). The target-features are of the form
"hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX.
"hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated.
The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}.
Eg: "+hvxv62"
For the correct HVX code generation, the user must use the following
target features.
For 64B mode: "+hvxv62" "+hvx-length64b"
For 128B mode: "+hvxv62" "+hvx-length128b"
Clang picks a default length if none is specified. If for some reason,
no hvx-length is specified to llvm, the compilation will bail out.
There is a corresponding clang patch.
Differential Revision: https://reviews.llvm.org/D38851
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316101
91177308-0d34-0410-b5e6-
96231b3b80d8
Konstantin Zhuravlyov [Wed, 18 Oct 2017 17:59:20 +0000 (17:59 +0000)]
AMDGPU/Docs: Make target naming consistent
- R600 Arch: Use Radeon HD XXXX Series
- GCN Arch: Use GFXX
Differential Revision: https://reviews.llvm.org/D39019
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316100
91177308-0d34-0410-b5e6-
96231b3b80d8
Sumanth Gundapaneni [Wed, 18 Oct 2017 17:45:22 +0000 (17:45 +0000)]
[Hexagon] Update Hexagon ArchEnum and sync some downstream changes(NFC)
Differential Revision: https://reviews.llvm.org/D38850
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316099
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Wed, 18 Oct 2017 17:36:46 +0000 (17:36 +0000)]
[Hexagon] Mark vector loads as predicable, update instruction mappings
All loads of form V6_vL32b_{,cur,nt,tmp,nt_cur,nt_tmp}_{ai,pi,ppu} are
predicable on v62 (but not on v60). Mark them all as predicable in the
instruction definitions, and handle the v60 case in HII::isPredicable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316098
91177308-0d34-0410-b5e6-
96231b3b80d8
Konstantin Zhuravlyov [Wed, 18 Oct 2017 17:31:09 +0000 (17:31 +0000)]
AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consistency
Differential Revision: https://reviews.llvm.org/D38957
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316097
91177308-0d34-0410-b5e6-
96231b3b80d8
Alex Bradbury [Wed, 18 Oct 2017 16:11:31 +0000 (16:11 +0000)]
[RISCV] Bugfix createRISCVELFObjectWriter
r315275 set the IsLittleEndian parameter incorrectly. This patch corrects
this, and adds a test to ensure such mistakes will be caught in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316091
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Wed, 18 Oct 2017 15:38:56 +0000 (15:38 +0000)]
update_mir_test_checks: Handle empty liveins
An empty livein block doesn't make much sense (why not just omit it?)
but they're legal and some tests have them, so its best to handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316089
91177308-0d34-0410-b5e6-
96231b3b80d8