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David Collins [Mon, 28 Mar 2016 18:58:29 +0000 (11:58 -0700)]
ARM: dts: msm: reduce CPU LDO headroom voltage for msm8996pro
Hardware characterization has shown that the CPU LDOs can
operate safely with less than 150 mV of headroom voltage.
Reduce the CPU LDO minimum allowed headroom voltage for both the
power cluster and the performance cluster in order to save power
by allowing LDO usage in more situations.
Change-Id: I72f28569d4719540fc84cf65d8783bbfec9435ad
CRs-Fixed: 989555
Signed-off-by: David Collins <collinsd@codeaurora.org>
Tirupathi Reddy [Fri, 28 Oct 2016 11:10:56 +0000 (16:40 +0530)]
ARM: dts: msm: update APCC/GFX CPR regulator configuration for msm8996pro
As per the hardware documentation, update the regulator
configuration for apc0, apc1, gfx CPR regulators to support new
speed bins in msm8996pro.
CRs-Fixed:
1083423
Change-Id: I97b9b98305e3478012664b636df26299eca66f26
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Linux Build Service Account [Wed, 5 Apr 2017 09:00:39 +0000 (02:00 -0700)]
Merge "ARM: dts: msm: add VDD_APCC speed bin 1 CPR boost corner for msm8996pro" into dev/msm-4.4-8996au
Linux Build Service Account [Wed, 5 Apr 2017 09:00:37 +0000 (02:00 -0700)]
Merge "ARM: dts: msm: change the VDD_APCC CPR MinSVS fuse corner for msm8996pro" into dev/msm-4.4-8996au
Linux Build Service Account [Wed, 5 Apr 2017 09:00:36 +0000 (02:00 -0700)]
Merge "ARM: dts: msm: update VDD_GFX CPR voltage adjustments for msm8996pro" into dev/msm-4.4-8996au
Linux Build Service Account [Wed, 5 Apr 2017 09:00:35 +0000 (02:00 -0700)]
Merge "ARM: dts: msm: update VDD_APCC CPR voltage adjustments for msm8996pro" into dev/msm-4.4-8996au
Linux Build Service Account [Wed, 5 Apr 2017 09:00:33 +0000 (02:00 -0700)]
Merge "ARM: dts: msm: Add APC CPR configuration for MSM8996 speed-bin 2" into dev/msm-4.4-8996au
David Collins [Mon, 2 May 2016 22:45:57 +0000 (15:45 -0700)]
ARM: dts: msm: add VDD_APCC speed bin 1 CPR boost corner for msm8996pro
Add a VDD_APCC CPR boost corner of 1996.8 MHz for the power
cluster on MSM8996-Pro speed bin 1 parts.
Change-Id: I9bf29cdba47918770dbef5cd1f2631afccf26221
CRs-Fixed:
1010722
Signed-off-by: David Collins <collinsd@codeaurora.org>
David Collins [Fri, 15 Apr 2016 23:31:07 +0000 (16:31 -0700)]
ARM: dts: msm: change the VDD_APCC CPR MinSVS fuse corner for msm8996pro
Change the MinSVS fuse corner to virtual corner mapping for the
power cluster and performance cluster on MSM8996-Pro chips with
CPR fuse revision 2 or greater.
Change the mapping according to the following:
Power cluster: 1 (307.2 MHz) --> 3 (460.8 MHz)
Perf cluster: 1 (307.2 MHz) --> 4 (537.6 MHz)
Change-Id: I6b6ee6225d43605ad0f5ae1e16061acf12b49927
CRs-Fixed:
1004373
Signed-off-by: David Collins <collinsd@codeaurora.org>
David Collins [Mon, 14 Mar 2016 16:28:07 +0000 (09:28 -0700)]
ARM: dts: msm: update VDD_GFX CPR voltage adjustments for msm8996pro
Update the VDD_GFX CPR open-loop and closed-loop voltage
adjustments for MSM8996-Pro chips based upon characterization
results. This ensures stability and minimum power consumption.
Change-Id: I89b79f92bcb4cc54a050f8b0ba17f76ff471838f
CRs-Fixed: 989555
Signed-off-by: David Collins <collinsd@codeaurora.org>
David Collins [Mon, 14 Mar 2016 15:58:08 +0000 (08:58 -0700)]
ARM: dts: msm: update VDD_APCC CPR voltage adjustments for msm8996pro
Update the VDD_APCC CPR open-loop and closed-loop voltage
adjustments for MSM8996-Pro based upon characterization results.
This ensures stability and minimum power consumption. Reuse the
CPR revision 1 adjustment values for future CPR revisions (2 - 7)
for forward compatibility.
Change-Id: I42f7b696987102a38db324a1c515f1c6f01e6d45
CRs-Fixed: 989555
Signed-off-by: David Collins <collinsd@codeaurora.org>
Anirudh Ghayal [Mon, 14 Nov 2016 10:47:16 +0000 (16:17 +0530)]
ARM: dts: msm: Add APC CPR configuration for MSM8996 speed-bin 2
Speed-bin 2 supports same CPR fusing scheme as speed-bin 0,
add CPR configuration for all APC cpr regulators.
Change-Id: I3a7c826b0dd6d73f877b4cd23288a820d85ba24d
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Tirupathi Reddy [Fri, 15 Apr 2016 12:59:52 +0000 (18:29 +0530)]
power: qcom: Modify APM timeout value for msm8953
As per msm8953 design, APM state machine could take more
than 200us for mode switching. Increase SW timeout constraint
value to 500us.
Also, update the mask used to check APM switch status.
CRs-Fixed: 992695
Change-Id: Ie0f8733fb5b39172fb14547292cbd05689a50230
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Linux Build Service Account [Wed, 5 Apr 2017 08:40:19 +0000 (01:40 -0700)]
Merge "regulator: spm-regulator: Fix the usage of the 'uV' variable" into dev/msm-4.4-8996au
Linux Build Service Account [Wed, 5 Apr 2017 08:40:18 +0000 (01:40 -0700)]
Merge "regulator: spm-regulator: Add additional settling delay for FTS2.5 SMPS" into dev/msm-4.4-8996au
Subbaraman Narayanamurthy [Thu, 13 Oct 2016 19:46:50 +0000 (12:46 -0700)]
regulator: cpr3-mmss: Increase fuse combo count
To accommodate speed bin 2 and fuse revisions associated with it
increase the fuse combo count from 16 to 24. At present, this is
needed for msm8996proAU SOC.
Change-Id: Ie781ffda433d491a38695caa5e55ec1ec7ff9b4a
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Subbaraman Narayanamurthy [Thu, 13 Oct 2016 19:49:23 +0000 (12:49 -0700)]
regulator: cpr3-hmss: Increase fuse combo count
To accommodate speed bin 2 and fuse revisions associated with it
increase the fuse combo count from 16 to 24. At present, this is
needed for msm8996proAU SOC.
Change-Id: I8555162eab2c6bfead2e0762f28525e0aa56cf10
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Tirupathi Reddy [Mon, 4 Jul 2016 04:23:14 +0000 (09:53 +0530)]
regulator: cpr3: Update temp based adjustments config
Temp_adj_en instantaneously reduces the voltage and quotient
when temperature enters into corresponding band which may cause
an aggressive reduction in voltage. Avoid this by not configuring
temp_adj_en bit, this only reduces the quotient and allows CPR to
react to the reduced quotient. Use temp_adj_en bit only when both
temperature based and core count based adjustments are desired.
CRs-Fixed:
1051076
Change-Id: Ia42dbdd095e51bf9b9b7e865c104dcbe8f4219da
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Linux Build Service Account [Wed, 5 Apr 2017 06:13:05 +0000 (23:13 -0700)]
Merge "regulator: cpr3: Use scaled gate count for aging measurements" into dev/msm-4.4-8996au
Honghao Liu [Tue, 4 Apr 2017 21:41:22 +0000 (17:41 -0400)]
ASoC: msm: support up to 8 channel capture on MM1
Update Multimedia1 FE to support up to 8 channel audio capture.
CRs-fixed:
2028896
Change-Id: I838ecd690fcdeef411d35a5facbe9c40a76b68c3
Signed-off-by: Honghao Liu <honghaol@codeaurora.org>
Anirudh Ghayal [Tue, 12 Jul 2016 03:01:57 +0000 (08:31 +0530)]
regulator: spm-regulator: Fix the usage of the 'uV' variable
The commit
639277b6c73c ("regulator: spm-regulator: Add additional
settling delay for FTS2.5 SMPS") incorrectly changed the usage
of 'uV' variable. The local 'uV' variable holds the correct voltage
level to be scaled up/down. Use it instead of vreg->uV.
CRs-Fixed:
1036738
Change-Id: I52540237a4db79c149409c6017ffc750b5abddd2
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Anirudh Ghayal [Thu, 30 Jun 2016 11:40:31 +0000 (17:10 +0530)]
regulator: spm-regulator: Add additional settling delay for FTS2.5 SMPS
Based on characterization add 70us settling delay on the voltage UP
to account for warm-up time and ramp-up delays for 0-10% and 90-100%
of the voltage value.
On the voltage ramp-down side add the stepper slew-rate delay and
and an additional 70us margin to avoid voltage updates while the
stepper is in progress. This could lead to voltage over/undershoot
due to buck-internal synchronization failure.
CRs-Fixed:
1036738
Change-Id: Id4230be9c4c981758bbf6860bab1f487a3b57f85
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Tirupathi Reddy [Thu, 26 May 2016 11:06:28 +0000 (16:36 +0530)]
regulator: cpr3: Use scaled gate count for aging measurements
Use scaled gate count (GCNT) for aging measurements to reduce
the noise effect on aging data. The amount of scaling depends
on the noise effect observed in characterization results. Use
a selected scaling factor value to derive the gate count (GCNT)
used for aging measurements.
CRs-Fixed:
1025832
Change-Id: I0eb3fb08d51ddca5cd4c08e26bc83eb9f66fd3ed
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Srivatsa Vaddagiri [Fri, 31 Mar 2017 09:38:31 +0000 (02:38 -0700)]
Merge "ARM: dts: msm: Update clock frequencies for msm8996AU" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Fri, 31 Mar 2017 09:17:57 +0000 (02:17 -0700)]
Merge "mmc: bus: Handle error in case bus_ops suspend fails" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Fri, 31 Mar 2017 09:15:35 +0000 (02:15 -0700)]
Merge changes I63d7ce3e,I6fda5ed9 into dev/msm-4.4-8996au
* changes:
clk: msm: clock-cpu-8996: Allow interrupts during alt_pll set_rate
clk: msm: clock-alpha-pll: Allow interrupts to be enabled during set_rate
Srivatsa Vaddagiri [Fri, 31 Mar 2017 07:53:46 +0000 (00:53 -0700)]
Merge "ARM: dts: msm: Add support for speed bin 2 for MSM8996Pro" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Fri, 31 Mar 2017 06:55:47 +0000 (23:55 -0700)]
Merge "can: Merge rh850.c from 3.18" into dev/msm-4.4-8996au
Bruce Wu [Fri, 31 Mar 2017 02:49:40 +0000 (10:49 +0800)]
can: Merge rh850.c from 3.18
1.can: Don't sent fw_br command
Older versions of rh850 get stuck when
fw_br command received.
2.can: Fix buffer calculation
3.can: rh850 support for CAN FD
This change enables dual mode for CAN raw frames and also CAN FD for property transfer with up to
64 bytes payload for both transmit and receive.
4.can: rh850 CAN FD backward compatibility
This change enables backward compatibility for previous versions of VNW framework to use legacy raw frame mode.
5.can: rh850 support for AMB mode
This enables the AMB driver mode to support
CAN FD frames sent while driver mode is AMB
Change-Id: I0b6939f29ebabeebe2fd32a26fcc67c4386a6cb4
Signed-off-by: Bruce Wu <brucewu@codeaurora.org>
Odelu Kukatla [Wed, 19 Oct 2016 11:13:53 +0000 (16:43 +0530)]
ARM: dts: msm: Add support for speed bin 2 for MSM8996Pro
Add speed-bin 2 to support the fmax of 1.9GHz and 1.59GHz
for perf and power clusters respectively.
Also add speed-bin 2 to support the fmax of 510MHz for GPU clock.
Change-Id: I085d816474fff3a6d76db1fdb969b6a762867df7
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Deepak Katragadda [Wed, 15 Jun 2016 00:23:53 +0000 (17:23 -0700)]
ARM: dts: msm: Update clock frequencies for msm8996AU
Add the CPU and GPU clock frequency tables in device tree
to support MSM8996 auto. These overrides apply for both
v3 and pro based msm8996AU.
CRs-Fixed:
1039602
Change-Id: I092c0767570cf500886b75823f24346097676473
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Honghao Liu [Fri, 10 Mar 2017 21:41:39 +0000 (16:41 -0500)]
ASoC: msm: add support for TERT_TDM_RX_4 BE
Add TERT_TDM_RX_4 BE DAI link into automotive sound card
DAI link array. Add kcontrols for channel and bit format
configuration for TERT_TDM_RX_4 BE.
CRs-fixed:
2018097
Change-Id: I1fef2f6a799aeeee0752f3ae2462dcd26a1d66c9
Signed-off-by: Honghao Liu <honghaol@codeaurora.org>
Arun Ks [Thu, 30 Mar 2017 12:05:23 +0000 (05:05 -0700)]
Merge "devfreq_spdm: Handle spurious interrupts during bootup" into dev/msm-4.4-8996au
Arun Ks [Thu, 30 Mar 2017 12:03:56 +0000 (05:03 -0700)]
Merge "msm: msm_bus: fix the memory leak issue" into dev/msm-4.4-8996au
Arun Ks [Thu, 30 Mar 2017 12:02:17 +0000 (05:02 -0700)]
Merge "msm: msm_bus: initialize the local variable" into dev/msm-4.4-8996au
Arun Ks [Thu, 30 Mar 2017 11:59:21 +0000 (04:59 -0700)]
Merge "ARM: dts: msm: add speed bin 1 CPU clock boost frequency for msm8996pro" into dev/msm-4.4-8996au
Honghao Liu [Thu, 9 Mar 2017 22:43:38 +0000 (17:43 -0500)]
ARM: dts: msm: support TERT_TDM_RX_4 DAI on msm8996 adp/cdp
Add TERT_TDM_RX_4 DAI in the TDM TERT RX entry and automotive
sound card entry for msm8996 automotive ADP/CDP platforms.
CRs-fixed:
2018097
Change-Id: Icbb2e9622fb58995fd063965a108d3e5fbaf42ea
Signed-off-by: Honghao Liu <honghaol@codeaurora.org>
Arun Ks [Thu, 30 Mar 2017 09:27:27 +0000 (02:27 -0700)]
Merge changes I933d5aa2,I887b33d2 into dev/msm-4.4-8996au
* changes:
ASoC: msm: support 5 and 7 channel for TDM hw param
ASoC: msm: add support for customized sound card
Arun Ks [Thu, 30 Mar 2017 09:25:46 +0000 (02:25 -0700)]
Merge "ASoC: msm: qdsp6v2: add route for TERT_TDM_RX_4 playback" into dev/msm-4.4-8996au
Arun Ks [Thu, 30 Mar 2017 09:18:37 +0000 (02:18 -0700)]
Merge "ARM: dts: msm: Add support for speed-bin 2 for MSM8996v3" into dev/msm-4.4-8996au
Deepak Katragadda [Thu, 24 Mar 2016 22:15:54 +0000 (15:15 -0700)]
clk: msm: clock-gcc-8996: Add additional frequencies for QSPI clock
Add support for additional frequencies for the qspi_ser_clk_src
on msm8996.
Change-Id: I4efa0ad4dc3f68a0c54bd4cf7ee77b4c78be4be1
CRs-Fixed: 994014
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Arun Ks [Thu, 30 Mar 2017 09:09:03 +0000 (02:09 -0700)]
Merge "clk: msm: gcc-8996: Add pinctrl clk for ln_bb_clk" into dev/msm-4.4-8996au
Arun Ks [Thu, 30 Mar 2017 02:45:07 +0000 (19:45 -0700)]
Merge "can: Add firmware flashing support" into dev/msm-4.4-8996au
Arun Ks [Thu, 30 Mar 2017 02:27:14 +0000 (19:27 -0700)]
Merge "drm/sde: add bridge chip support for drm driver" into dev/msm-4.4-8996au
Honghao Liu [Fri, 17 Mar 2017 14:45:15 +0000 (10:45 -0400)]
ASoC: msm: support 5 and 7 channel for TDM hw param
Add support for 5 and 7 channel for TDM hw param configuration.
CRs-fixed:
2021342
Change-Id: I933d5aa29c5c5578c884a3533772747db721fc0f
Signed-off-by: Honghao Liu <honghaol@codeaurora.org>
Honghao Liu [Wed, 8 Mar 2017 21:36:35 +0000 (16:36 -0500)]
ASoC: msm: add support for customized sound card
Add support for customized sound card that uses customized
TDM slot mapping and DAI links for automotive platform.
CRs-fixed:
2020063
Change-Id: I887b33d23d2af8af61cf15b499d14afbc9544e37
Signed-off-by: Honghao Liu <honghaol@codeaurora.org>
Honghao Liu [Fri, 10 Mar 2017 22:09:03 +0000 (17:09 -0500)]
ASoC: msm: qdsp6v2: add route for TERT_TDM_RX_4 playback
Add route from Multimedia FE to TERT_TDM_RX_4 BE.
CRs-fixed:
2018097
Change-Id: I22de6c7059ae40956d82176edc130047bd2921f4
Signed-off-by: Honghao Liu <honghaol@codeaurora.org>
Devesh Jhunjhunwala [Wed, 31 Aug 2016 00:26:30 +0000 (17:26 -0700)]
clk: msm: gcc-8996: Add pinctrl clk for ln_bb_clk
Add the pinctrl clock for ln_bb_clk to the GCC driver
for MSM8996.
CRs-Fixed:
1063062
Change-Id: If85a0dbb26e350588cbd6614c032bf208a205be2
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
Vikram Mulukutla [Mon, 11 Jan 2016 19:56:27 +0000 (11:56 -0800)]
clk: msm: clock-cpu-8996: Allow interrupts during alt_pll set_rate
The CPU that is disabling the alternate PLL may also need to
handle CPR interrupts. Allow the CPU to handle interrupts
during the set_rate operation.
CRs-Fixed: 960701
Change-Id: I63d7ce3e3dd2b559c4db383b64faa9335c404576
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Vikram Mulukutla [Mon, 11 Jan 2016 19:54:04 +0000 (11:54 -0800)]
clk: msm: clock-alpha-pll: Allow interrupts to be enabled during set_rate
Some PLL implementations depend on the CPU being able to handle
certain interrupts in order for the set_rate operation to
complete. Allow interrupts to be handled in the set_rate op.
CRs-Fixed: 960701
Change-Id: I6fda5ed9eb7d6f2e2cd91c58ebabfd7bc1c8a2fc
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Odelu Kukatla [Sun, 13 Nov 2016 07:15:07 +0000 (12:45 +0530)]
ARM: dts: msm: Add support for speed-bin 2 for MSM8996v3
Add speed-bin 2 to support the fmax of 1.9GHz and 1.5GHz
for perf and power clusters respectively.
Also add speed-bin 2 to support the fmax of 560MHz for GPU clock.
Change-Id: I9bc547b0f8a2f2c7cad04ec8c967ed580755ae75
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Dilip Kota [Wed, 16 Dec 2015 12:29:36 +0000 (17:59 +0530)]
devfreq_spdm: Handle spurious interrupts during bootup
Terminate the interrupts triggered before the intitalisation
itself.
Change-Id: I7c005134ecbdae38b58e4312f9e294f5b59c2510
Signed-off-by: Dilip Kota <dkota@codeaurora.org>
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
David Collins [Mon, 2 May 2016 22:52:57 +0000 (15:52 -0700)]
ARM: dts: msm: add speed bin 1 CPU clock boost frequency for msm8996pro
Update the frequency plan for the MSM8996-Pro CPU clocks in order
to include the new 1996.8 MHz power cluster boost frequency.
Change-Id: I289f5910d21bd0e97ceff39d6ca09ba8b5f2aea4
CRs-Fixed:
1010722
Signed-off-by: David Collins <collinsd@codeaurora.org>
Odelu Kukatla [Thu, 23 Mar 2017 16:36:07 +0000 (22:06 +0530)]
msm: msm_bus: fix the memory leak issue
Client name allocated dynamically during the registration
is not freed at the time of unregistration. This is
leading to memory leak issue. This patch fixes the issue
by freeing up the client name during unregistartion time.
Change-Id: I0fe75ce71fdf0ee9a1268d52ac244047cc3413d7
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Odelu Kukatla [Thu, 23 Mar 2017 16:50:44 +0000 (22:20 +0530)]
msm: msm_bus: initialize the local variable
Initialize the local variable 'ret' which is returned
from the function.
Change-Id: Ie82e74ce55b622db924e353a6ea98323c7642fa6
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Alex Yakavenka [Fri, 3 Jun 2016 18:48:45 +0000 (11:48 -0700)]
can: Add firmware flashing support
Modifications are required to support new ioctls
and send them using messages over spi.
CRs-Fixed:
1025945
Change-Id: Ibc41a1f0a8a7d0bd929209069869ae65fba75c70
Signed-off-by: Alex Yakavenka <ayakav@codeaurora.org>
Signed-off-by: Bruce Wu <brucewu@codeaurora.org>
Tony Truong [Sat, 7 Jan 2017 00:23:14 +0000 (16:23 -0800)]
msm: pcie: add the checking of userspace input length
Add the checking of the input length from userspace so kernel
space will not copy any content outside the input buffer.
Change-Id: I114ac005f5305d863bfc0d0fc2db7b5e6d683834
Signed-off-by: Tony Truong <truong@codeaurora.org>
Srivatsa Vaddagiri [Mon, 27 Mar 2017 11:55:13 +0000 (04:55 -0700)]
Merge "ARM: dts: msm: Add blsp2_qup2 to list of bypass wakeup interrupts for 8996" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Mon, 27 Mar 2017 11:54:18 +0000 (04:54 -0700)]
Merge "ARM: dts: msm: Update the interrupt list with camera irq" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Mon, 27 Mar 2017 11:53:34 +0000 (04:53 -0700)]
Merge "ARM: msm: dts: Add camera interrupts as bypass for msm8996" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Mon, 27 Mar 2017 11:51:49 +0000 (04:51 -0700)]
Merge "ARM: dts: msm: Map MPM pins for DP&DM to hs_phy_irq for msm8996" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Mon, 27 Mar 2017 11:20:01 +0000 (04:20 -0700)]
Merge "leds: qpnp-flash: Fix Use-after-free(UAF) for debugfs" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Mon, 27 Mar 2017 11:18:03 +0000 (04:18 -0700)]
Merge "net: rmnet_data: Add support to configure custom device name" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Mon, 27 Mar 2017 11:14:55 +0000 (04:14 -0700)]
Merge "ARM: dts: msm: Push C4 with PSCI to 11.5ms for MSM8996" into dev/msm-4.4-8996au
Mohammed Khajapasha [Wed, 11 Jan 2017 11:35:51 +0000 (17:05 +0530)]
ARM: dts: msm: Add use_32bit_app_setting in bootargs for msm8996
Enable 32 bit app settings, using bootargs, for msm8996
and msm8996pro to set app specific settings.
Change-Id: I9537e8022fb550e94fcba21709572372d024a701
Signed-off-by: Mohammed Khajapasha <mkhaja@codeaurora.org>
[ztu@codeaurora.org: Resolved conflicts]
Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
Imran Khan [Tue, 10 Jan 2017 12:01:53 +0000 (17:31 +0530)]
arm64: Modify support for 32bit app specific settings
Change support for 32bit app specific settings. The
change made earlier was not correct for 8996pro devices
so correct it to include all variants of 8996.
Change-Id: Id6afad04ad316dd7a41743821b7cfd513db227e5
Signed-off-by: Imran Khan <kimran@codeaurora.org>
Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
Imran Khan [Wed, 17 Aug 2016 15:48:14 +0000 (21:18 +0530)]
arm64: Add support for 32 bit app specific settings
Add support to enable app specific settings, whenever
a 32 bit application is running.
Change-Id: I0cf40e8ea6e3f9e62258a44ccdd959e9eae09d88
Signed-off-by: Imran Khan <kimran@codeaurora.org>
Zhiqiang Tu [Thu, 23 Mar 2017 08:47:53 +0000 (16:47 +0800)]
defconfig: arm64: Enable app specific setting for MSM8996 on automotive
Enable support for app specific setting on MSM8996. This
is required for providing an interface so that app specific
settings can be applied / cleared.
Change-Id: I2dc533aae99b3898db2d61f99c4c99877eb575d0
Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
Srivatsa Vaddagiri [Mon, 27 Mar 2017 10:06:00 +0000 (03:06 -0700)]
Merge "arm64: Add support for app specific settings" into dev/msm-4.4-8996au
Sergio Frades Ruiz De Sola [Wed, 13 Apr 2016 23:20:37 +0000 (16:20 -0700)]
ethernet: device tree and defconfig changes for neutrino
This change is needed to initialize the power rails
and GPIO configuration for neutrino driver.
fix the conflict.
Change-Id: Ib2bb328c4e657232e75724a0cd9673a8d9b8ba06
CRs-Fixed:
1003103
Signed-off-by: Sergio Frades Ruiz De Sola <csfrade@codeaurora.org>
Signed-off-by: Zou Shunxiang <shunxian@codeaurora.org>
Maulik Shah [Mon, 13 Mar 2017 06:14:02 +0000 (11:44 +0530)]
defconfig: msm: Enable config for SPM and Event timer
Enable L2 spm and event timer config.
Change-Id: I643797e3de5c43e6d111ea099b476c82c0f827c3
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Srivatsa Vaddagiri [Mon, 27 Mar 2017 09:56:17 +0000 (02:56 -0700)]
Merge "rh850: Add filters support" into dev/msm-4.4-8996au
Alex Yakavenka [Mon, 9 May 2016 19:38:52 +0000 (12:38 -0700)]
rh850: Add filters support
Add data buffering and receive filters support
Resolve build failure by fixing code style
issue.
CRs-Fixed:
1013185
Change-Id: I926de382d6e813c288fb7e9388f42585a4ce4670
Signed-off-by: Alex Yakavenka <ayakav@codeaurora.org>
Signed-off-by: Zou Shunxiang <shunxian@codeaurora.org>
Sriharsha Allenki [Tue, 21 Mar 2017 13:50:05 +0000 (19:20 +0530)]
arm: boot: dts: Fix incorrect IRQ numbers for MSM8996 ADP
The interrupt numbers in the usb3 node of MSM8996 ADP dtsi
file mismatches with the msm8996 SOC dt file. Hence fix by
removing all the hs_phy_irq and pwr_event_irq from usb3 node
in MSM8996 ADP dtsi file.
Add extcon phandle to support extcon based VBUS and ID detection
for MSM8996 Automotive kernel v4.4.
Move the pmic_id_irq to usb_detect label to support ID detection
using extcon framework. The interrupts cell of pmic_id_irq
requires 4 attributes according to the updated interrupt-cells
in spmi_bus node.
Change-Id: I4c77efa923ac1ae4a1f55a6729738e48852c7c15
Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
Sriharsha Allenki [Tue, 21 Mar 2017 13:16:16 +0000 (18:46 +0530)]
platform: msm: Support ID detection using extcon framework
Support ID detection for dual role USB port on 8996 automotive
kernel v4.4 using extcon framework.
Change-Id: I3f523f9a52dc8e2e8458c661ff11c93156e1c232
Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
Sriharsha Allenki [Tue, 21 Mar 2017 12:12:50 +0000 (17:42 +0530)]
platform: msm: Support VBUS detection using extcon framework
The 8996 automotive using kernel v3.18 supports gpio based
VBUS detection using Power supply object framework. In kernel
v4.4 the VBUS detection is supported using extcon framework.
The 8996 automotive is being ported to kernel v4.4.
Hence add support for gpio based VBUS using extcon framework.
Change-Id: Ic63b5f84d57d18325cc6c8db24157d835284257f
Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
Srivatsa Vaddagiri [Mon, 27 Mar 2017 04:52:29 +0000 (21:52 -0700)]
Merge "fb: msm_dba: fix issue in dba driver" into dev/msm-4.4-8996au
Sriharsha Allenki [Tue, 21 Mar 2017 11:10:07 +0000 (16:40 +0530)]
defconfig: arm64: msm: Enables host only mode on 8996 automotive
Enables host only mode USB 2.0 controller on 8996 automotive kernel
v4.4 by enabling CONFIG_NOP_USB_XCEIV in the msm-auto_defconfig and
msm-auto-perf_defconfig.
Change-Id: I528ebd6a900da8bce97790047b8c01936d09631c
Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
Srivatsa Vaddagiri [Mon, 27 Mar 2017 04:46:41 +0000 (21:46 -0700)]
Merge "video: fbdev: msm: build msm driver when dba is enabled" into dev/msm-4.4-8996au
Girish Mahadevan [Mon, 22 Aug 2016 19:52:04 +0000 (13:52 -0600)]
ARM: dts: msm: Add blsp2_qup2 to list of bypass wakeup interrupts for 8996
Add blsp2_qup2 to the list of bypass wakeup interrupts in the MPM
pin mappings to allow msm8996 to enter deep sleep.
Change-Id: I4187a59116ca9d278017e81e815e5bbcd3a921e2
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Signed-off-by: Atul Raut <araut@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Shubhraprakash Das [Mon, 27 Jun 2016 22:32:59 +0000 (15:32 -0700)]
ARM: dts: msm: Update the interrupt list with camera irq
Add missing camera irq to the interrupt list without which
the system does not go into shutdown.
Change-Id: I86450b3626d6ed9580b91b2e71f2a320e6df5b3a
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Mahesh Sivasubramanian [Wed, 4 Nov 2015 23:02:34 +0000 (16:02 -0700)]
ARM: msm: dts: Add camera interrupts as bypass for msm8996
When camera subsystem is active the system wouldn't enter XO shutdown and
is safe to mark as bypass so as to allow system to go int XO when camera
isn't active.
Change-Id: Iac7b4f8f4791e9f7dfadf920f24f65ad122e25c3
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Vijayavardhan Vennapusa [Fri, 13 May 2016 07:07:45 +0000 (12:37 +0530)]
ARM: dts: msm: Map MPM pins for DP&DM to hs_phy_irq for msm8996
MPM driver supports mapping multiple MPM pins to single irq for remote
wakeup. Hence map both MPM pins for DP and DM line state changes to
hs_phy_irq.
Change-Id: I018e4258cf0820328c6b77cd32e0d32a0de57582
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Mahesh Sivasubramanian [Tue, 2 Feb 2016 22:03:29 +0000 (15:03 -0700)]
ARM: dts: msm: Push C4 with PSCI to 11.5ms for MSM8996
C4 with psci overhead is four times that of C4 without psci state.
Based on power profile across system wide usecase, C4 with psci
proves to be costly as the number of pre-mature wakeups from
fpc is huge.
This change pushes C4 with psci state to 11.5ms breakeven point. The
idea is to exercise C4 without psci till that point and allow C4 with
psci only for D4 case.
Change-Id: I81902ac2ff0a0e99efc21d169be472952dcfd3e2
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Girish S Ghongdemath <girishsg@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Subash Abhinov Kasiviswanathan [Fri, 24 Feb 2017 01:24:42 +0000 (18:24 -0700)]
net: rmnet_data: Add support to configure custom device name
rmnet_data assigns device name by the order they are created.
This causes problems which multiple processes are trying to
create devices and leads to random device names.
Assign device name as specified by user.
CRs-Fixed:
2018785
Change-Id: Iab8e053c6ccacbeedaa7763e760d0c12e756b5d0
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
Ankit Sharma [Thu, 9 Feb 2017 10:53:09 +0000 (16:23 +0530)]
leds: qpnp-flash: Fix Use-after-free(UAF) for debugfs
Fix UAF where two threads can open and close the same file. Second
open will cause the private data for the first file to be overwritten.
When the first file is closed and the private data is freed, this makes
the now-shared private data OOB for the second thread.
CRs-Fixed:
1109763
Change-Id: I1c4618d5be99e140abf0f3ea0d7f485897db5ab2
Signed-off-by: Ankit Sharma <ansharma@codeaurora.org>
Sarangdhar Joshi [Fri, 12 Feb 2016 00:39:46 +0000 (16:39 -0800)]
arm64: Add support for app specific settings
Add support to provide an interface that can be used from
userspace to decide whether app specific settings need to
be applied / cleared when particular processes are running.
CRs-Fixed: 981519 997757
Change-Id: Id81f8b70de64f291a8586150f4d2c7c8f8b4420f
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
[satyap@codeaurora.org: trivial merge conflict resolution and pull
fixes for CR: 997757]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
[ztu@codeaurora.org: Resolved conflicts]
Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
Sanrio Alvares [Fri, 29 Jan 2016 01:10:34 +0000 (17:10 -0800)]
arm64: fpsimd: add support to enable/disable fpsimd_settings.
Add support to enable/disable fpsimd_settings at runtime through
kernel command line.
fpsimd.fpsimd_settings=0 should disable it.
Change-Id: I14bf5f20e36ec4547aad45382cfffc91666a2ff4
Signed-off-by: Sanrio Alvares <salvares@codeaurora.org>
Zhiqiang Tu [Thu, 23 Mar 2017 08:04:49 +0000 (16:04 +0800)]
defconfig: arm64: Enable FP settings for msm8996 on automotive
Enable FP(Floating Point) and SIMD settings required
during execution of AArch32 processes.
Change-Id: I935d91778954937a7fd7cb5a959290a147220a06
Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
Se Wang (Patrick) Oh [Sat, 17 Oct 2015 07:57:45 +0000 (00:57 -0700)]
arm64: fpsimd: Enable FP(floating-point) settings for msm8996
Enable FP and SIMD settings for the MSM8996 during the execution
of the AArch32 processes and disable these settings when you switch
to the AArch64 processes.
This commit also adds CONFIG_ENABLE_FP_SIMD_SETTINGS to support
FP and SIMD settings.
CRs-Fixed: 952837
Change-Id: If9537ca7390d8f08a6b48fb8865d1b349a93bcee
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
[ztu@codeaurora.org: Resolved conflicts]
Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
Rajkumar Subbiah [Fri, 17 Feb 2017 20:05:08 +0000 (15:05 -0500)]
msm: mdss: handle synchronization issues during DSI debugfs read/write
Handle race condition during read/write operations to DSI debugfs nodes
related to DSI panel ON/OFF commands.
Change-Id: I29c4ad74bf21d4cb5362565e902a682fe7263147
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
Srivatsa Vaddagiri [Thu, 23 Mar 2017 12:23:13 +0000 (05:23 -0700)]
Merge "can: bitrate setting for RH850" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Thu, 23 Mar 2017 12:21:36 +0000 (05:21 -0700)]
Merge "ASoC: msm: qdsp6v2: add memset of adm open before usage" into dev/msm-4.4-8996au
Derek Chen [Fri, 6 Jan 2017 23:20:32 +0000 (18:20 -0500)]
ARM: dts: msm: add support for secondary TDM on msm8996 adp/cdp
Add secondary TDM TX DAI in the automotive sound card entry for
msm8996 automotive ADP/CDP platforms.
Change-Id: I3ffc82c7e826fb7e97e1d34e0498637d5d55afd0
CRs-fixed:
1108597
Signed-off-by: Derek Chen <chenche@codeaurora.org>
Srivatsa Vaddagiri [Thu, 23 Mar 2017 12:13:09 +0000 (05:13 -0700)]
Merge "ARM: dts: msm: add PCIe PHY sequence for MSM8996 agave" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Thu, 23 Mar 2017 12:04:43 +0000 (05:04 -0700)]
Merge "ARM: dts: msm: disable L1/L1ss for all PCIe on MSM8996 AUTO" into dev/msm-4.4-8996au
Srivatsa Vaddagiri [Thu, 23 Mar 2017 12:00:58 +0000 (05:00 -0700)]
Merge "defconfig: msm: Enable profiler driver for MSM8996 auto" into dev/msm-4.4-8996au
Sergio Frades Ruiz De Sola [Wed, 11 May 2016 00:54:00 +0000 (17:54 -0700)]
can: bitrate setting for RH850
Bitrate config can be read for all
channels of RH850 and sent down to device
Change-Id: Id3f28f9fd024f7768fb04faef6a31efb8bfb85b2
CRs-Fixed:
1018330
Signed-off-by: Sergio Frades Ruiz De Sola <csfrade@codeaurora.org>
Tony Truong [Wed, 25 May 2016 01:52:01 +0000 (18:52 -0700)]
ARM: dts: msm: add PCIe PHY sequence for MSM8996 agave
Add PHY init sequence based on new settings so that PCIe
PHY can be brought up on MSM8996 agave.
Change-Id: Iece881346523cf3f5b06314f38fc65d5afdb2986
Signed-off-by: Tony Truong <truong@codeaurora.org>
Tony Truong [Fri, 20 May 2016 19:11:49 +0000 (12:11 -0700)]
ARM: dts: msm: disable L1/L1ss for all PCIe on MSM8996 AUTO
Link state L1 and L1ss is not supported on MSM8996 AUTO
platforms. Thus, disable L1 and L1ss for all PCIe cores
on these platforms.
Change-Id: Ifd95e1bba9c895ea35e50545bd6ad93e42fca5e6
Signed-off-by: Tony Truong <truong@codeaurora.org>