OSDN Git Service
George Burgess IV [Fri, 5 Feb 2016 00:42:02 +0000 (00:42 +0000)]
Add a test for MemorySSA. NFC.
We don't currently have many tests that deal with operations on multiple
local MemoryLocations. This new test helps out a bit in that regard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259854
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Amaury Sechet [Fri, 5 Feb 2016 00:19:50 +0000 (00:19 +0000)]
Add Support to llvm-c-test dependancies
Summary: As per title. It is required and don't get linked in in some builds.
Reviewers: chapuni, joker.eph
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D16903
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259853
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Xinliang David Li [Thu, 4 Feb 2016 23:59:09 +0000 (23:59 +0000)]
Function name change /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259851
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Easwaran Raman [Thu, 4 Feb 2016 23:34:31 +0000 (23:34 +0000)]
Refactor profile summary support code. NFC.
Summary computation is not just for instrumented profiling and so I have moved
the ProfileSummary class to ProfileCommon.h (named so to allow code unrelated
to summary but common to instrumented and sampled profiling to be placed there)
Differential Revision: http://reviews.llvm.org/D16661
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259846
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Amaury Sechet [Thu, 4 Feb 2016 23:26:19 +0000 (23:26 +0000)]
Improve testing for the C API
Summary:
This basically add an echo test case in C. The support is limited right now, but full support would just be too much to review at once.
The echo test case simply get a module as input and try to output the same exact module. This allow to check the both reading and writing API are working as expected.
I want to improve this test over time to support more and more of the API, in order to improve coverage (coverage is quite poor right now).
Test Plan: Run the test.
Reviewers: chandlerc, bogner
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D10725
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259844
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Nemanja Ivanovic [Thu, 4 Feb 2016 23:14:42 +0000 (23:14 +0000)]
Fix for PR 26356
Using the load immediate only when the immediate (whether signed or unsigned)
can fit in a 16-bit signed field. Namely, from -32768 to 32767 for signed and
0 to 65535 for unsigned. This patch also ensures that we sign-extend under the
right conditions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259840
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Evandro Menezes [Thu, 4 Feb 2016 23:07:57 +0000 (23:07 +0000)]
Fix typo and test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259839
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Nemanja Ivanovic [Thu, 4 Feb 2016 22:36:10 +0000 (22:36 +0000)]
Provide a test case for rl259798
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259835
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Chad Rosier [Thu, 4 Feb 2016 21:26:02 +0000 (21:26 +0000)]
[AArch64] Bound the number of instructions we scan when searching for updates.
This only impacts the creation of pre-/post-index instructions. The bound was
set high enough such that it did not change code generation for SPEC200X.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259828
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Vedant Kumar [Thu, 4 Feb 2016 20:42:43 +0000 (20:42 +0000)]
[docs] Fix typo in YamlIO.rst
Patch by Mario Lang!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259825
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Niels Ole Salscheider [Thu, 4 Feb 2016 20:08:19 +0000 (20:08 +0000)]
Install cmake files to lib/cmake/llvm
This is the right location for platform-specific files.
On some distributions (e. g. Exherbo), a package can be installed for several
architectures in parallel, but the architecture-independent files are shared.
Therefore, we must not install architecture-dependent files (like the CMake
config and export files) to share/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259821
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Simon Pilgrim [Thu, 4 Feb 2016 19:27:51 +0000 (19:27 +0000)]
[X86][SSE] Select domain for 32/64-bit partial loads for EltsFromConsecutiveLoads
Choose between MOVD/MOVSS and MOVQ/MOVSD depending on the target vector type.
This has a lot fewer test changes than trying to add this to X86InstrInfo::setExecutionDomain.....
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259816
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Wei Mi [Thu, 4 Feb 2016 19:17:33 +0000 (19:17 +0000)]
Fix a regression for r259736.
When SCEV expansion tries to reuse an existing value, it is needed to ensure
that using the Value at the InsertPt will not break LCSSA. The fix adds a
check that InsertPt is either inside the candidate Value's parent loop, or
the candidate Value's parent loop is nullptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259815
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Xinliang David Li [Thu, 4 Feb 2016 19:14:10 +0000 (19:14 +0000)]
Fix format in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259814
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Xinliang David Li [Thu, 4 Feb 2016 19:11:43 +0000 (19:11 +0000)]
[PGO] Add interfaces to annotate instr with VP data
Add interfaces to do value profile data IR annnotation
and read. Needed by both FE and IR based PGO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259813
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Chad Rosier [Thu, 4 Feb 2016 18:59:49 +0000 (18:59 +0000)]
[AArch64] Improve load/store optimizer to handle LDUR + LDR (take 3).
This patch allows the mixing of scaled and unscaled load/stores to form
load/store pairs.
PR24465
http://reviews.llvm.org/D12116
Many thanks to Ahmed and Michael for fixes and code review.
This is a reapplication of r246769 and r259790. The tramp3d failure was caused
by an incorrect refactoring in the patch. Specifically, we weren't always
properly clearing the SExtIdx flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259812
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Sanjoy Das [Thu, 4 Feb 2016 18:21:54 +0000 (18:21 +0000)]
[SCEV] Add boolean accessors for NSW, NUW and NW; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259809
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David Majnemer [Thu, 4 Feb 2016 17:57:12 +0000 (17:57 +0000)]
Correctly handle {Always,Never}StepIntoLine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259806
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David Majnemer [Thu, 4 Feb 2016 17:37:30 +0000 (17:37 +0000)]
Add support for S_DEFRANGE and S_DEFRANGE_SUBFIELD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259805
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David Majnemer [Thu, 4 Feb 2016 17:29:13 +0000 (17:29 +0000)]
Make the dumper's output for variable ranges easier to read
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259804
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Sanjay Patel [Thu, 4 Feb 2016 17:00:35 +0000 (17:00 +0000)]
use 'auto' for iterators; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259802
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Silviu Baranga [Thu, 4 Feb 2016 16:47:09 +0000 (16:47 +0000)]
[AArch64] Multiply extended 32-bit ints with `[U|S]MADDL'
During instruction selection, the AArch64 backend can recognise the
following pattern and generate an [U|S]MADDL instruction, i.e. a
multiply of two 32-bit operands with a 64-bit result:
(mul (sext i32), (sext i32))
However, when one of the operands is constant, the sign extension
gets folded into the constant in SelectionDAG::getNode(). This means
that the instruction selection sees this:
(mul (sext i32), i64)
...which doesn't match the pattern. Sign-extension and 64-bit
multiply instructions are generated, which are slower than one 32-bit
multiply.
Add a pattern to match this and generate the correct instruction, for
both signed and unsigned multiplies.
Patch by Chris Diamand!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259800
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Benjamin Kramer [Thu, 4 Feb 2016 16:21:38 +0000 (16:21 +0000)]
The canonical way to XFAIL a test for all targets is XFAIL: *, not XFAIL:
Fix the lit bug that enabled this "feature" (empty triple is substring
of all possible target triples) and change the two outliers to use the
documented * syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259799
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Nemanja Ivanovic [Thu, 4 Feb 2016 16:18:08 +0000 (16:18 +0000)]
Enable the %s modifier in inline asm template string
This patch corresponds to review:
http://reviews.llvm.org/D16847
There are some files in glibc that use the output operand modifier even though
it was deprecated in GCC. This patch just adds support for it to prevent issues
with such files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259798
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Renato Golin [Thu, 4 Feb 2016 16:14:59 +0000 (16:14 +0000)]
[PPC] Move PPC test to a PPC-specific dir
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259797
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Simon Pilgrim [Thu, 4 Feb 2016 16:12:56 +0000 (16:12 +0000)]
[X86][SSE] Add general 32-bit LOAD + VZEXT_MOVL support to EltsFromConsecutiveLoads
This patch adds support for consecutive (load/undef elements) 32-bit loads, followed by trailing undef/zero elements to be combined to a single MOVD load.
Differential Revision: http://reviews.llvm.org/D16729
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259796
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Chad Rosier [Thu, 4 Feb 2016 16:01:40 +0000 (16:01 +0000)]
Revert "[AArch64] Improve load/store optimizer to handle LDUR + LDR."
This reverts commit r259790. tramp3d-v4 is still having problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259795
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Simon Pilgrim [Thu, 4 Feb 2016 15:51:55 +0000 (15:51 +0000)]
[X86][SSE] Added i686 target tests to make sure we are correctly loading consecutive entries as 64-bit integers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259794
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Elena Demikhovsky [Thu, 4 Feb 2016 15:11:11 +0000 (15:11 +0000)]
AVX-512: Fixed a bug in FMA instruction selection on KNL
The FMA instruction was selected from AVX2 set instead of AVX-512
Differential Revision: http://reviews.llvm.org/D16884
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259792
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Petar Jovanovic [Thu, 4 Feb 2016 14:43:50 +0000 (14:43 +0000)]
[Power PC] softening long double type
This patch implements softening of long double type (ppcf128) on ppc32
architecture and enables operations for this type for soft float.
Patch by Strahinja Petrovic.
Differential Revision: http://reviews.llvm.org/D15811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259791
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Chad Rosier [Thu, 4 Feb 2016 14:42:55 +0000 (14:42 +0000)]
[AArch64] Improve load/store optimizer to handle LDUR + LDR.
This patch allows the mixing of scaled and unscaled load/stores to form
load/store pairs.
PR24465
http://reviews.llvm.org/D12116
Many thanks to Ahmed and Michael for fixes and code review.
This is a reapplication of r246769, which was reverted in r246782 due to a
test-suite failure. I'm unable to reproduce the issue at this time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259790
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Michael Zuckerman [Thu, 4 Feb 2016 14:41:08 +0000 (14:41 +0000)]
[AVX512] add vfmadd132ss and vfmadd132sd Intrinsic
Differential Revision: http://reviews.llvm.org/D16589
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259789
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Simon Pilgrim [Thu, 4 Feb 2016 14:06:19 +0000 (14:06 +0000)]
[X86] Add AVX512 vector zext tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259786
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Jonas Paulsson [Thu, 4 Feb 2016 13:08:48 +0000 (13:08 +0000)]
[ScheduleDagInstrs] Improved comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259783
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Simon Pilgrim [Thu, 4 Feb 2016 09:27:19 +0000 (09:27 +0000)]
[X86] Moved SEXT -> SIGN_EXTEND_VECTOR_INREG combine into helper. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259771
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Andrey Turetskiy [Thu, 4 Feb 2016 08:57:03 +0000 (08:57 +0000)]
[X86] Use hash table in LEA optimization pass.
Use hash table (key is a memory operand) to store found LEA instructions to reduce compile time.
Differential Revision: http://reviews.llvm.org/D16404
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259770
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Justin Bogner [Thu, 4 Feb 2016 07:28:30 +0000 (07:28 +0000)]
cmake: Add a flag to enable LTO
This adds -DLLVM_ENABLE_LTO, rather than forcing people to manually
add -flto to the various _FLAGS variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259766
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Craig Topper [Thu, 4 Feb 2016 06:51:41 +0000 (06:51 +0000)]
[Support] Use range-based for loop. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259763
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Craig Topper [Thu, 4 Feb 2016 06:51:38 +0000 (06:51 +0000)]
[Support] Use hexdigit instead of manually coding the same thing. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259762
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Xinliang David Li [Thu, 4 Feb 2016 05:29:51 +0000 (05:29 +0000)]
[PGO] Profile interface cleanup
- Remove unused valuemapper parameter
- add totalcount optional parameter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259756
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Jingyue Wu [Thu, 4 Feb 2016 04:15:36 +0000 (04:15 +0000)]
[NVPTX] Disable performance optimizations when OptLevel==None
Reviewers: jholewinski, tra, eliben
Subscribers: jholewinski, llvm-commits
Differential Revision: http://reviews.llvm.org/D16874
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259749
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Nemanja Ivanovic [Thu, 4 Feb 2016 01:58:20 +0000 (01:58 +0000)]
Test case for PR 26381
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259740
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Wei Mi [Thu, 4 Feb 2016 01:27:38 +0000 (01:27 +0000)]
[SCEV] Try to reuse existing value during SCEV expansion
Current SCEV expansion will expand SCEV as a sequence of operations
and doesn't utilize the value already existed. This will introduce
redundent computation which may not be cleaned up throughly by
following optimizations.
This patch introduces an ExprValueMap which is a map from SCEV to the
set of equal values with the same SCEV. When a SCEV is expanded, the
set of values is checked and reused whenever possible before generating
a sequence of operations.
The original commit triggered regressions in Polly tests. The regressions
exposed two problems which have been fixed in current version.
1. Polly will generate a new function based on the old one. To generate an
instruction for the new function, it builds SCEV for the old instruction,
applies some tranformation on the SCEV generated, then expands the transformed
SCEV and insert the expanded value into new function. Because SCEV expansion
may reuse value cached in ExprValueMap, the value in old function may be
inserted into new function, which is wrong.
In SCEVExpander::expand, there is a logic to check the cached value to
be used should dominate the insertion point. However, for the above
case, the check always passes. That is because the insertion point is
in a new function, which is unreachable from the old function. However
for unreachable node, DominatorTreeBase::dominates thinks it will be
dominated by any other node.
The fix is to simply add a check that the cached value to be used in
expansion should be in the same function as the insertion point instruction.
2. When the SCEV is of scConstant type, expanding it directly is cheaper than
reusing a normal value cached. Although in the cached value set in ExprValueMap,
there is a Constant type value, but it is not easy to find it out -- the cached
Value set is not sorted according to the potential cost. Existing reuse logic
in SCEVExpander::expand simply chooses the first legal element from the cached
value set.
The fix is that when the SCEV is of scConstant type, don't try the reuse
logic. simply expand it.
Differential Revision: http://reviews.llvm.org/D12090
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259736
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Richard Smith [Thu, 4 Feb 2016 01:21:16 +0000 (01:21 +0000)]
Fix undefined behavior when compiling in C++14 mode (with sized deletion
enabled): ensure that we do not invoke the sized deallocator for MemoryBuffer
subclasses that have tail-allocated data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259735
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Reid Kleckner [Thu, 4 Feb 2016 00:21:42 +0000 (00:21 +0000)]
[codeview] Don't attempt a cross-section label diff
This only comes up when we're trying to find the next .cv_loc label.
Fixes PR26467
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259733
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Kostya Serebryany [Thu, 4 Feb 2016 00:12:28 +0000 (00:12 +0000)]
[libFuzzer] hot fix a test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259732
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Kostya Serebryany [Thu, 4 Feb 2016 00:02:17 +0000 (00:02 +0000)]
[libFuzzer] don't write the test unit when a leak is detected (since we don't know which unit causes the leak)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259731
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Gerolf Hoflehner [Wed, 3 Feb 2016 23:54:25 +0000 (23:54 +0000)]
[SimplifyCFG] Fix for "endless" loop after dead code removal (Alternative to
D16251)
Summary:
This is a simpler fix to the problem than the dominator approach in
http://reviews.llvm.org/D16251. It adds only values into the gather() while loop
that have been seen before.
The actual endless loop is in the constant compare gather() routine in
Utils/SimplifyCFG.cpp. The same value ret.0.off0.i is pushed back into the
queue:
%.ret.0.off0.i = or i1 %.ret.0.off0.i, %cmp10.i
Here is what happens at the IR level:
for.cond.i: ; preds = %if.end6.i,
%if.end.i54
%ix.0.i = phi i32 [ 0, %if.end.i54 ], [ %inc.i55, %if.end6.i ]
%ret.0.off0.i = phi i1 [false, %if.end.i54], [%.ret.0.off0.i, %if.end6.i] <<<
%cmp2.i = icmp ult i32 %ix.0.i, %11
br i1 %cmp2.i, label %for.body.i, label %LBJ_TmpSimpleNeedExt.exit
if.end6.i: ; preds = %for.body.i
%cmp10.i = icmp ugt i32 %conv.i, %add9.i
%.ret.0.off0.i = or i1 %ret.0.off0.i, %cmp10.i <<<
When if.end.i54 gets eliminated which removes the definition of ret.0.off0.i.
The result is the expression %.ret.0.off0.i = or i1 %.ret.0.off0.i, %cmp10.i
(Note the first ‘or’ operand is now %.ret.0.off0.i, and *NOT* %ret.0.off0.i).
And
now there is use of .ret.0.off0.i before a definition which triggers the
“endless” loop in gather():
while(!DFT.empty()) {
V = DFT.pop_back_val(); // V is .ret.0.off0.i
if (Instruction *I = dyn_cast<Instruction>(V)) {
// If it is a || (or && depending on isEQ), process the operands.
if (I->getOpcode() == (isEQ ? Instruction::Or : Instruction::And)) {
DFT.push_back(I->getOperand(1)); // This is now .ret.0.off0.i also
DFT.push_back(I->getOperand(0));
continue; // “endless loop” for .ret.0.off0.i
}
Reviewers: reames, ahatanak
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D16839
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259730
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Vedant Kumar [Wed, 3 Feb 2016 23:22:43 +0000 (23:22 +0000)]
[InstrProfiling] Fix a comment (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259727
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David L Kreitzer [Wed, 3 Feb 2016 23:17:32 +0000 (23:17 +0000)]
Unify the target opcode enum in TargetOpcodes.h and the FixedInstrs array in
CodeGenTarget.cpp to avoid the ordering dependence. NFCI.
Differential Revision: http://reviews.llvm.org/D16826
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259726
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Junmo Park [Wed, 3 Feb 2016 23:16:39 +0000 (23:16 +0000)]
Minor code cleanups. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259725
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David Majnemer [Wed, 3 Feb 2016 22:45:21 +0000 (22:45 +0000)]
Print the OffsetStart field's relocation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259723
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Sanjay Patel [Wed, 3 Feb 2016 22:44:14 +0000 (22:44 +0000)]
rangify; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259722
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Sanjay Patel [Wed, 3 Feb 2016 22:37:37 +0000 (22:37 +0000)]
clean up; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259720
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David Majnemer [Wed, 3 Feb 2016 22:36:46 +0000 (22:36 +0000)]
[llvm-readobj] Add support for dumping S_DEFRANGE symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259719
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Reid Kleckner [Wed, 3 Feb 2016 21:45:39 +0000 (21:45 +0000)]
Replace static const int with enum to fix obnoxious linker errors about a missing definition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259712
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Reid Kleckner [Wed, 3 Feb 2016 21:41:24 +0000 (21:41 +0000)]
[unittests] Move TargetRegistry test from Support to MC
This removes the dependency from SupportTests to all of the LLVM
backends, and makes it link faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259705
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Reid Kleckner [Wed, 3 Feb 2016 21:41:12 +0000 (21:41 +0000)]
Silence -Wsign-conversion issue in ProgramTest.cpp
Unfortunately, ProgramInfo::ProcessId is signed on Unix and unsigned on
Windows, breaking the standard fix of using '0U' in the gtest
expectation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259704
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Ana Pazos [Wed, 3 Feb 2016 21:34:39 +0000 (21:34 +0000)]
Fix pointers to go on the right hand side. NFC.
Summary:
Fixed pointers to go on the right hand side following coding guidelines. NFC.
Patch by Mandeep Singh Grang.
Reviewers: majnemer, arsenm, sanjoy
Differential Revision: http://reviews.llvm.org/D16866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259703
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David Majnemer [Wed, 3 Feb 2016 21:30:34 +0000 (21:30 +0000)]
[LoopStrengthReduce] Don't rewrite PHIs with incoming values from CatchSwitches
Bail out if we have a PHI on an EHPad that gets a value from a
CatchSwitchInst. Because the CatchSwitchInst cannot be split, there is
no good place to stick any instructions.
This fixes PR26373.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259702
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David Majnemer [Wed, 3 Feb 2016 21:30:31 +0000 (21:30 +0000)]
[ScalarEvolutionExpander] Simplify findInsertPointAfter
No functional change is intended. The loop could only execute, at most,
once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259701
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Reid Kleckner [Wed, 3 Feb 2016 21:24:42 +0000 (21:24 +0000)]
[codeview] Remove EmitLabelDiff in favor emitAbsoluteSymbolDiff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259700
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Reid Kleckner [Wed, 3 Feb 2016 21:15:48 +0000 (21:15 +0000)]
[codeview] Use the MCStreamer interface directly instead of AsmPrinter
This is mostly about having shorter lines and standardizing on one
interface, but it also avoids some needless indirection.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259697
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Keno Fischer [Wed, 3 Feb 2016 21:13:33 +0000 (21:13 +0000)]
[DWARFDebug] Fix another case of overlapping ranges
Summary:
In r257979, I added code to ensure that we wouldn't merge DebugLocEntries if
the pieces they describe overlap. Unfortunately, I failed to cover the case,
where there may have multiple active Expressions in the entry, in which case we
need to make sure that no two values overlap before we can perform the merge.
This fixed PR26148.
Reviewers: aprantl
Differential Revision: http://reviews.llvm.org/D16742
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259696
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Todd Fiala [Wed, 3 Feb 2016 21:13:23 +0000 (21:13 +0000)]
Address NDEBUG-related linkage issues for Value::assertModuleIsMaterialized()
The IR/Value class had a linkage issue present when LLVM was built
as a library, and the LLVM library build time had different settings
for NDEBUG than the client of the LLVM library. Clients could get
into a state where the LLVM lib expected
Value::assertModuleIsMaterialized() to be inline-defined in the header
but clients expected that method to be defined in the LLVM library.
See this llvm-commits thread for more details:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20160201/329667.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259695
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Tim Shen [Wed, 3 Feb 2016 20:58:55 +0000 (20:58 +0000)]
[SelectionDAG] Fix CombineToPreIndexedLoadStore O(n^2) behavior
This patch consists of two parts: a performance fix in DAGCombiner.cpp
and a correctness fix in SelectionDAG.cpp.
The test case tests the bug that's uncovered by the performance fix, and
fixed by the correctness fix.
The performance fix keeps the containers required by the
hasPredecessorHelper (which is a lazy DFS) and reuse them. Since
hasPredecessorHelper is called in a loop, the overall efficiency reduced
from O(n^2) to O(n), where n is the number of SDNodes.
The correctness fix keeps iterating the neighbor list even if it's time
to early return. It will return after finishing adding all neighbors to
Worklist, so that no neighbors are discarded due to the original early
return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259691
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Reid Kleckner [Wed, 3 Feb 2016 19:34:28 +0000 (19:34 +0000)]
Minor performance tweaks to llvm-tblgen (and a few that might be a good idea)
Summary:
This patch adds a reserve call to an expensive function
(`llvm::LoadIntrinsics`), and may fix a few other low hanging
performance fruit (I've put them in comments for now, so we can
discuss).
**Motivation:**
As I'm sure other developers do, when I build LLVM, I build the entire
project with the same config (`Debug`, `MinSizeRel`, `Release`, or
`RelWithDebInfo`). However, the `Debug` config also builds llvm-tblgen
in `Debug` mode. Later build steps that run llvm-tblgen then can
actually be the slowest steps in the entire build. Nobody likes slow
builds.
Reviewers: rnk, dblaikie
Differential Revision: http://reviews.llvm.org/D16832
Patch by Alexander G. Riccio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259683
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Saleem Abdulrasool [Wed, 3 Feb 2016 18:21:59 +0000 (18:21 +0000)]
ARM: support TLS for WoA
Add support for TLS access for Windows on ARM. This generates a similar access
to MSVC for ARM.
The changes to the tablegen data is needed to support loading an external symbol
global that is not for a call. The adjustments to the DAG to DAG transforms are
needed to preserve the 32-bit move.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259676
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Wei Mi [Wed, 3 Feb 2016 18:05:57 +0000 (18:05 +0000)]
Revert r259662, which caused regressions on polly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259675
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Quentin Colombet [Wed, 3 Feb 2016 18:04:13 +0000 (18:04 +0000)]
[InstCombine] Revert r238452: Fold IntToPtr and PtrToInt into preceding loads.
According to git bisect, this is the root cause of a miscompile for Regex in
libLLVMSupport. I am still working on reducing a test case.
The actual bug may be elsewhere and this commit just exposed it.
Anyway, at the moment, to reproduce, follow these steps:
1. Build clang and libLTO in release mode.
2. Create a new build directory <stage2> and cd into it.
3. Use clang and libLTO from #1 to build llvm-extract in Release mode + asserts
using -O2 -flto
4. Run llvm-extract -ralias '.*bar' -S test/Other/extract-alias.ll
Result:
program doesn't contain global named '.*bar'!
Expected result:
@a0a0bar = alias void ()* @bar
@a0bar = alias void ()* @bar
declare void @bar()
Note: In step #3, if you don't use lto or asserts, the miscompile disappears.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259674
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Jonas Paulsson [Wed, 3 Feb 2016 17:52:29 +0000 (17:52 +0000)]
[ScheduleDAGInstrs::buildSchedGraph()] Handling of memory dependecies rewritten.
Recommited, after some fixing with test cases.
Updated test cases:
test/CodeGen/AArch64/arm64-misched-memdep-bug.ll
test/CodeGen/AArch64/tailcall_misched_graph.ll
Temporarily disabled test cases:
test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
test/CodeGen/PowerPC/ppc64-fastcc.ll (partially updated)
test/CodeGen/PowerPC/vsx-fma-m.ll
test/CodeGen/PowerPC/vsx-fma-sp.ll
http://reviews.llvm.org/D8705
Reviewers: Hal Finkel, Andy Trick.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259673
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Xinliang David Li [Wed, 3 Feb 2016 17:51:16 +0000 (17:51 +0000)]
Fix comments /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259672
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Joseph Tremoulet [Wed, 3 Feb 2016 17:11:24 +0000 (17:11 +0000)]
[Unittest] Clean up formatting, NFC
Summary:
Use an early return to reduce indentation.
Remove unused local.
Reviewers: dblaikie, lhames
Subscribers: lhames, llvm-commits
Differential Revision: http://reviews.llvm.org/D16513
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259663
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Wei Mi [Wed, 3 Feb 2016 17:05:12 +0000 (17:05 +0000)]
[SCEV] Try to reuse existing value during SCEV expansion
Current SCEV expansion will expand SCEV as a sequence of operations
and doesn't utilize the value already existed. This will introduce
redundent computation which may not be cleaned up throughly by
following optimizations.
This patch introduces an ExprValueMap which is a map from SCEV to the
set of equal values with the same SCEV. When a SCEV is expanded, the
set of values is checked and reused whenever possible before generating
a sequence of operations.
Differential Revision: http://reviews.llvm.org/D12090
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259662
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Renato Golin [Wed, 3 Feb 2016 16:10:54 +0000 (16:10 +0000)]
[ARM] Move GNUEABI divmod to __aeabi_divmod*
The GNU toolchain emits __aeabi_divmod for soft-divide on ARM cores
which happens to be a lot faster than __divsi3/__modsi3 when the core
has hardware divide instructions. Do the same here.
Fixes PR26450.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259657
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Jun Bum Lim [Wed, 3 Feb 2016 15:56:27 +0000 (15:56 +0000)]
[MachineCopyPropagation] Fix comment. NFC
Reviewers: MatzeB, qcolombet, jmolloy, mcrosier
Subscribers: llvm-commits, mcrosier
Differential Revision: http://reviews.llvm.org/D16806
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259656
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Daniel Sanders [Wed, 3 Feb 2016 15:54:12 +0000 (15:54 +0000)]
[mips] Remove redundant inclusions of MipsAnalyzeImmediate.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259655
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James Molloy [Wed, 3 Feb 2016 15:05:06 +0000 (15:05 +0000)]
[DemandedBits] Revert r249687 due to PR26071
This regresses a test in LoopVectorize, so I'll need to go away and think about how to solve this in a way that isn't broken.
From the writeup in PR26071:
What's happening is that ComputeKnownZeroes is telling us that all bits except the LSB are zero. We're then deciding that only the LSB needs to be demanded from the icmp's inputs.
This is where we're wrong - we're assuming that after simplification the bits that were known zero will continue to be known zero. But they're not - during trivialization the upper bits get changed (because an XOR isn't shrunk), so the icmp fails.
The fault is in demandedbits - its contract does clearly state that a non-demanded bit may either be zero or one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259649
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Nemanja Ivanovic [Wed, 3 Feb 2016 12:53:38 +0000 (12:53 +0000)]
Fix for PR 26381
Simple fix - Constant values were not being sign extended in FastIsel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259645
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Simon Atanasyan [Wed, 3 Feb 2016 11:50:22 +0000 (11:50 +0000)]
[mips] Add SHF_MIPS_GPREL flag to the MIPS .sbss and .sdata sections
MIPS ABI states that .sbss and .sdata sections must have SHF_MIPS_GPREL
flag. See Figure 4–7 on page 69 in the following document:
ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf.
Differential Revision: http://reviews.llvm.org/D15740
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259641
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Dylan McKay [Wed, 3 Feb 2016 10:30:16 +0000 (10:30 +0000)]
[TableGen] Add 'register alternative name matching' support
Summary:
This adds a new attribute which targets can set in TableGen which causes a function to be generated which matches register alternative names. This is very similar to `ShouldEmitMatchRegisterName`, except it works on alt names.
This patch is currently used by the out of tree part of the AVR backend. It reduces code duplication greatly, and has the effect that you do not need to hardcode altname to register mappings in C++.
It will not work on targets which have registers which share the same aliases.
Reviewers: stoklund, arsenm, dsanders, hfinkel, vkalintiris
Subscribers: hfinkel, dylanmckay, llvm-commits
Differential Revision: http://reviews.llvm.org/D16312
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259636
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Simon Pilgrim [Wed, 3 Feb 2016 09:41:59 +0000 (09:41 +0000)]
[X86][AVX] Add support for 64-bit VZEXT_LOAD of 256/512-bit vectors to EltsFromConsecutiveLoads
Follow up to D16217 and D16729
This change uncovered an odd pattern where VZEXT_LOAD v4i64 was being lowered to a load of the lower v2i64 (so the 2nd i64 destination element wasn't being zeroed), I can't find any use/reason for this and have removed the pattern and replaced it so only the 1st i64 element is loaded and the upper bits all zeroed. This matches the description for X86ISD::VZEXT_LOAD
Differential Revision: http://reviews.llvm.org/D16768
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259635
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Xinliang David Li [Wed, 3 Feb 2016 06:27:38 +0000 (06:27 +0000)]
Add a compatibility test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259632
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Xinliang David Li [Wed, 3 Feb 2016 06:24:11 +0000 (06:24 +0000)]
Fix a typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259631
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Xinliang David Li [Wed, 3 Feb 2016 06:23:16 +0000 (06:23 +0000)]
Fix uninitiazed variable use problem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259630
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Xinliang David Li [Wed, 3 Feb 2016 04:08:18 +0000 (04:08 +0000)]
[PGO] Profile summary reader/writer support
With this patch, the profile summary data will be available in indexed
profile data file so that profiler reader/compiler optimizer can start
to make use of.
Differential Revision: http://reviews.llvm.org/D16258
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259626
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Peter Collingbourne [Wed, 3 Feb 2016 03:48:46 +0000 (03:48 +0000)]
LowerBitSets: Don't bother to do any work if the llvm.bitset.test intrinsic is unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259625
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Peter Collingbourne [Wed, 3 Feb 2016 03:16:37 +0000 (03:16 +0000)]
Add #include "llvm/Support/raw_ostream.h" to fix Windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259623
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Peter Collingbourne [Wed, 3 Feb 2016 02:51:00 +0000 (02:51 +0000)]
Transforms: Move GlobalOpt's Evaluator to Utils where it can be reused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259621
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Nick Lewycky [Wed, 3 Feb 2016 02:15:49 +0000 (02:15 +0000)]
Fix typo in comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259620
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Peter Collingbourne [Wed, 3 Feb 2016 02:01:08 +0000 (02:01 +0000)]
docs: Document how bitsets may be used to encode type information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259619
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Kyle Butt [Wed, 3 Feb 2016 01:41:09 +0000 (01:41 +0000)]
Codegen: [PPC] Fix PPCVSXFMAMutate to handle duplicates.
The purpose of PPCVSXFMAMutate is to elide copies by changing FMA forms
on PPC.
%vreg6<def> = COPY %vreg96
%vreg6<def,tied1> = XSMADDASP %vreg6<tied0>, %vreg5<kill>, %vreg7
;v6 = v6 + v5 * v7
is replaced by
%vreg5<def,tied1> = XSMADDMSP %vreg5<tied0>, %vreg7, %vreg96
;v5 = v5 * v7 + v96
This was broken in the case where the target register was also used as a
multiplicand. Fix this case by checking for it and replacing both uses
with the copied register.
%vreg6<def> = COPY %vreg96
%vreg6<def,tied1> = XSMADDASP %vreg6<tied0>, %vreg5<kill>, %vreg6
;v6 = v6 + v5 * v6
is replaced by
%vreg5<def,tied1> = XSMADDMSP %vreg5<tied0>, %vreg96, %vreg96
;v5 = v5 * v96 + v96
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259617
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Yunzhong Gao [Wed, 3 Feb 2016 01:25:12 +0000 (01:25 +0000)]
Revert r259576: Disable the vzeroupper insertion pass on PS4.
Will re-implement based on review feedback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259615
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Marcello Maggioni [Wed, 3 Feb 2016 00:22:32 +0000 (00:22 +0000)]
RegCoalescer: Making sure re-materialization defines all subranges
The register coalescer can rematerialize constants that define
more of a register than the copy it is going to replace was going
to do.
This is valid in the case the register was undef before the
copy happened.
This patch makes sure that all the subranges defined by the new
rematerialization instructions have at least a dead def.
Review: http://reviews.llvm.org/D16693
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259614
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NAKAMURA Takumi [Wed, 3 Feb 2016 00:09:22 +0000 (00:09 +0000)]
DiagnosticInfoWithDebugLocBase: Appease Twine for now.
FIXME: We should get rid of Twine in the record.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259612
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Adam Nemet [Wed, 3 Feb 2016 00:06:10 +0000 (00:06 +0000)]
[LoopVersioning] Expose loop versioning as a pass too
Summary:
LoopVersioning is a transform utility that transform passes can use to
run-time disambiguate may-aliasing accesses. I'd like to also expose as
pass to allow it to be unit-tested.
I am planning to add support for non-aliasing annotation in
LoopVersioning and I'd like to be able to write tests directly using
this pass.
(After that feature is done, the pass could also be used to look for
optimization opportunities that are hidden behind incomplete alias
information at compile time.)
The pass drives LoopVersioning in its default way which is to fully
disambiguate may-aliasing accesses no matter how many checks are
required.
Reviewers: hfinkel, ashutosh.nema, sbaranga
Subscribers: zzheng, mssimpso, llvm-commits, sanjoy
Differential Revision: http://reviews.llvm.org/D16612
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259610
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George Burgess IV [Tue, 2 Feb 2016 23:26:01 +0000 (23:26 +0000)]
Attempt #2 to unbreak r259595.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259602
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David Majnemer [Tue, 2 Feb 2016 23:18:23 +0000 (23:18 +0000)]
[codeview] Improve readability of codeview assembly output
Strictly speaking, this is not an improvement in functionality per se
but a usability improvement to those debugging codeview.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259601
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Kostya Serebryany [Tue, 2 Feb 2016 23:17:45 +0000 (23:17 +0000)]
[libFuzzer] don't create too many trace-based mutations as it may be too slow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259600
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George Burgess IV [Tue, 2 Feb 2016 23:15:26 +0000 (23:15 +0000)]
Attempt to fix builds broken by r259595.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259599
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