OSDN Git Service

android-x86/external-llvm.git
5 years ago[X86] Add test case for report_fatal_error added in r352699.
Craig Topper [Mon, 4 Feb 2019 21:24:15 +0000 (21:24 +0000)]
[X86] Add test case for report_fatal_error added in r352699.

r352699 replaced an llvm_unreachable with a report_fatal_error. This patch adds a test case for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353096 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CodeGen][ARC][SystemZ][WebAssembly] Use MachineInstr::isInlineAsm in more places...
Craig Topper [Mon, 4 Feb 2019 21:24:13 +0000 (21:24 +0000)]
[CodeGen][ARC][SystemZ][WebAssembly] Use MachineInstr::isInlineAsm in more places instead of just comparing opcode. NFCI

I'm looking at adding a second INLINEASM opcode for better modeling asm-goto
as a terminator. Using the existing predicate will reduce teh number of
places that will need to use the new opcode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353095 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Windows: use a more standard format for PDB filenames
David Major [Mon, 4 Feb 2019 21:20:25 +0000 (21:20 +0000)]
gn build: Windows: use a more standard format for PDB filenames

The current build was producing names like llvm-undname.exe.pdb, which looks unusual to me at least. This switches them to the more common llvm-undname.pdb style.

Differential Revision: https://reviews.llvm.org/D57613

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353094 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Windows: write PDBs when is_debug
David Major [Mon, 4 Feb 2019 21:13:43 +0000 (21:13 +0000)]
gn build: Windows: write PDBs when is_debug

Without /DEBUG, the /Zi doesn't on its own create PDB files.

And since ninja runs multiple compilations in parallel, we need /FS to prevent contention on PDBs.

Differential Revision: https://reviews.llvm.org/D57612

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353093 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Tablegen][DAG]: Fix build breakage when LLVM_ENABLE_DAGISEL_COV=1
Aditya Nandakumar [Mon, 4 Feb 2019 21:06:24 +0000 (21:06 +0000)]
[Tablegen][DAG]: Fix build breakage when LLVM_ENABLE_DAGISEL_COV=1

LLVM_ENABLE_DAGISEL_COV can be used to instrument DAGISel tablegen
selection code to show which patterns along with Complex patterns were
used when selecting instructions. Unfortunately this is turned off by
default and was broken but never tested.
This required a simple fix (missing new line) to get it to build again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353091 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NewPM][MSan] Add Options Handling
Philip Pfaffe [Mon, 4 Feb 2019 21:02:49 +0000 (21:02 +0000)]
[NewPM][MSan] Add Options Handling

Summary: This patch enables passing options to msan via the passes pipeline, e.e., -passes=msan<recover;kernel;track-origins=4>.

Reviewers: chandlerc, fedor.sergeev, leonardchan

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57640

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353090 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DEBUGINFO] Reposting r352642: Handle restore instructions in LiveDebugValues
Wolfgang Pieb [Mon, 4 Feb 2019 20:42:45 +0000 (20:42 +0000)]
[DEBUGINFO] Reposting r352642: Handle restore instructions in LiveDebugValues

The LiveDebugValues pass recognizes spills but not restores, which can
cause large gaps in location information for some variables, depending
on control flow. This patch make LiveDebugValues recognize restores and
generate appropriate DBG_VALUE instructions.

This patch was posted previously with r352642 and reverted in r352666 due
to buildbot errors. A missing return statement was the cause for the
failures.

Reviewers: aprantl, NicolaPrica

Differential Revision: https://reviews.llvm.org/D57271

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353089 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Support emitting GOT relocations for function calls
Scott Linder [Mon, 4 Feb 2019 20:00:07 +0000 (20:00 +0000)]
[AMDGPU] Support emitting GOT relocations for function calls

Differential Revision: https://reviews.llvm.org/D57416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353083 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WarnMissedTransforms] Do not warn about already vectorized loops.
Michael Kruse [Mon, 4 Feb 2019 19:55:59 +0000 (19:55 +0000)]
[WarnMissedTransforms] Do not warn about already vectorized loops.

LoopVectorize adds llvm.loop.isvectorized, but leaves
llvm.loop.vectorize.enable. Do not consider such a loop for user-forced
vectorization since vectorization already happened -- by prioritizing
llvm.loop.isvectorized except for TM_SuppressedByUser.

Fixes http://llvm.org/PR40546

Differential Revision: https://reviews.llvm.org/D57542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353082 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Fix CheckMachineFunction passing if ReadCheckFile files
Matt Arsenault [Mon, 4 Feb 2019 19:53:22 +0000 (19:53 +0000)]
GlobalISel: Fix CheckMachineFunction passing if ReadCheckFile files

This could be tested, but the FileCheck library spams the error
message to the console.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353081 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Allow constructing SrcOp/DstOp from MachineOperand
Matt Arsenault [Mon, 4 Feb 2019 19:53:19 +0000 (19:53 +0000)]
GlobalISel: Allow constructing SrcOp/DstOp from MachineOperand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353080 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Fix parameter name in documentation
Matt Arsenault [Mon, 4 Feb 2019 19:16:58 +0000 (19:16 +0000)]
GlobalISel: Fix parameter name in documentation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353078 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Fix CSE handling of buildConstant
Matt Arsenault [Mon, 4 Feb 2019 19:15:50 +0000 (19:15 +0000)]
GlobalISel: Fix CSE handling of buildConstant

This fixes two problems with CSE done in buildConstant. First, this
would hit an assert when used with a vector result type. Solve this by
allowing CSE on the vector elements, but not on the result vector for
now.

Second, this was also performing the CSE based on the input
ConstantInt pointer. The underlying buildConstant could potentially
convert the constant depending on the result type, giving in a
different ConstantInt*. Stop allowing the APInt and ConstantInt forms
from automatically casting to the result type to avoid any similar
problems in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353077 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] clang-tidy (NFC)
Heejin Ahn [Mon, 4 Feb 2019 19:13:39 +0000 (19:13 +0000)]
[WebAssembly] clang-tidy (NFC)

Summary:
This patch fixes clang-tidy warnings on wasm-only files.
The list of checks used is:
`-*,clang-diagnostic-*,llvm-*,misc-*,-misc-unused-parameters,readability-identifier-naming,modernize-*`
(LLVM's default .clang-tidy list is the same except it does not have
`modernize-*`. But I've seen in multiple CLs in LLVM the modernize style
was recommended and code was fixed based on the style, so I added it as
well.)

The common fixes are:
- Variable names start with an uppercase letter
- Function names start with a lowercase letter
- Use `auto` when you use casts so the type is evident
- Use inline initialization for class member variables
- Use `= default` for empty constructors / destructors
- Use `using` in place of `typedef`

Reviewers: sbc100, tlively, aardappel

Subscribers: dschuff, sunfish, jgravelle-google, yurydelendik, kripken, MatzeB, mgorny, rupprecht, llvm-commits

Differential Revision: https://reviews.llvm.org/D57500

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353075 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy][NFC] simplify an error return
Jordan Rupprecht [Mon, 4 Feb 2019 19:09:20 +0000 (19:09 +0000)]
[llvm-objcopy][NFC] simplify an error return

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353074 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] X86DAGToDAGISel::matchBitExtract(): prepare 'control' in 32 bits
Roman Lebedev [Mon, 4 Feb 2019 19:04:26 +0000 (19:04 +0000)]
[X86] X86DAGToDAGISel::matchBitExtract(): prepare 'control' in 32 bits

Summary:
Noticed while looking at D56052.
```
  // The 'control' of BEXTR has the pattern of:
  // [15...8 bit][ 7...0 bit] location
  // [ bit count][     shift] name
  // I.e. 0b000000011'00000001 means  (x >> 0b1) & 0b11
```
I.e. we do not care about any of the bits aside from the low 16 bits.
So there is no point in doing the `slh`,`or` in 64 bits,
let's just do everything in 32 bits, and anyext if needed.

We could do that in 16 even, but we intentionally don't
zext to i16 (longer encoding IIRC),
so i'm guessing the same applies here.

Reviewers: craig.topper, andreadb, RKSimon

Reviewed By: craig.topper

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D56715

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353073 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Improve gtest usage
Matt Arsenault [Mon, 4 Feb 2019 18:58:27 +0000 (18:58 +0000)]
GlobalISel: Improve gtest usage

Don't unnecessarily use ASSERT_*, and print the MachineFunction
on failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353072 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdjust cardinality of internal inliner thresholds
David Callahan [Mon, 4 Feb 2019 18:46:25 +0000 (18:46 +0000)]
Adjust cardinality of internal inliner thresholds

Summary:
While compiling openJDK11 (also other workloads), some make files would pass both  CFLAGS  and LDFLAGS at link step ; resulting in duplicate options on the command line when one is using LTO and trying to influence the inliner. Most of the internal flags are ZeroOrMore, this diff changes the remaining ones.

Reviewers: david2050, twoh, modocache

Reviewed By: twoh

Subscribers: mehdi_amini, dexonsmith, eraman, haicheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57537

Patch by: Abdoul-Kader Keita

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353071 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add ST0 as an implicit def/use of x87 load/store instructions during FP stackif...
Craig Topper [Mon, 4 Feb 2019 18:43:55 +0000 (18:43 +0000)]
[X86] Add ST0 as an implicit def/use of x87 load/store instructions during FP stackifying.

These instructions implicitly operate on ST0, but we don't currently add that information to the MachineInstr. We also don't add it the tablegen definitions either.

For the most part this doesn't cause any problems because the stackifying occurs after register allocation. All the instructions are marked as having side effects so the postRA scheduler won't reorder them amongst themselves.

But nothing stops inline assembly using X87 instructions from being reordered around other x87 instructions if that inline assembly wasn't marked volatile.

The two test cases I've identified so far in PR40539 involve loads and stores used to set up the inline assembly or capture the results of the inline assembly ending up in the wrong order.

This patch adds implicit ST0 uses/defs to the load/store instructions to prevent this from happening.

I plan to fix all of the FP instructions, but the binops are bit trickier to get right. So I've chosen fixing the known test cases as a good first step.

I think we also need to update the tablegen descriptions so MS inline assembly infers the right clobbers, but I haven't checked that yet.

Differential Revision: https://reviews.llvm.org/D57644

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353070 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Fix moreElementsToNextPow2
Matt Arsenault [Mon, 4 Feb 2019 18:42:24 +0000 (18:42 +0000)]
GlobalISel: Fix moreElementsToNextPow2

This was completely broken. The condition was inverted, and changed
the element type for vectors of pointers.

Fixes bug 40592.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353069 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy][NFC] Use StringSaver for --keep-global-symbols
Jordan Rupprecht [Mon, 4 Feb 2019 18:38:00 +0000 (18:38 +0000)]
[llvm-objcopy][NFC] Use StringSaver for --keep-global-symbols

Summary: Use StringSaver/BumpPtrAlloc when parsing lines from --keep-global-symbols files. This allows us to consistently use StringRef for driver options, which avoids copying the full strings for each object copied, as well as simplifies part of D57517.

Reviewers: jhenderson, evgeny777, alexshap

Subscribers: jakehehrlich

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57617

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353068 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Make segment/size/type directives optional in asm
Wouter van Oortmerssen [Mon, 4 Feb 2019 18:03:11 +0000 (18:03 +0000)]
[WebAssembly] Make segment/size/type directives optional in asm

Summary:
These were "boilerplate" that repeated information already present
in .functype and end_function, that needed to be repeated to Please
the particular way our object writing works, and missing them would
generate errors.

Instead, we generate the information for these automatically so the
user can concern itself with writing more canonical wasm functions
that always work as expected.

Reviewers: dschuff, sbc100

Subscribers: jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D57546

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353067 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[GlobalISel] Introduce a generic floating point floor opcode, G_FFLOOR"
Jessica Paquette [Mon, 4 Feb 2019 17:32:47 +0000 (17:32 +0000)]
Revert "[GlobalISel] Introduce a generic floating point floor opcode, G_FFLOOR"

This reverts commit b05ecba6d687fcb3078509220c67458bf1d77a2e.

Apparently adding floor breaks AMDGPU somehow, so I have to back this out
while I look into it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353065 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[GlobalISel] Add IRTranslator support for G_FFLOOR"
Jessica Paquette [Mon, 4 Feb 2019 17:32:43 +0000 (17:32 +0000)]
Revert "[GlobalISel] Add IRTranslator support for G_FFLOOR"

This reverts commit 8bbd570fd5205a04d88d2e5513a6e4adbd028039.

Apparently adding ffloor breaks AMDGPU somehow, so I need to back this out
while I look into it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353064 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Merge r352944
Nico Weber [Mon, 4 Feb 2019 17:32:36 +0000 (17:32 +0000)]
gn build: Merge r352944

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353063 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Rename relocations from R_WEBASSEMBLY_ to R_WASM_
Sam Clegg [Mon, 4 Feb 2019 17:28:46 +0000 (17:28 +0000)]
[WebAssembly] Rename relocations from R_WEBASSEMBLY_ to R_WASM_

See https://github.com/WebAssembly/tool-conventions/pull/95.

This is less typing and IMHO more readable, and it also fits with
our naming around the binary format which tends to use the short name.
e.g.

include/llvm/BinaryFormat/Wasm.h
tools/llvm-objdump/WasmDump.cpp
etc..

Differential Revision: https://reviews.llvm.org/D57611

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353062 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments...
Craig Topper [Mon, 4 Feb 2019 17:28:18 +0000 (17:28 +0000)]
[X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st.

All of these instructions consume one encoded register and the other register is %st. They either write the result to %st or the encoded register. Previously we printed both arguments when the encoded register was written. And we printed one argument when the result was written to %st. For the stack popping forms the encoded register is always the destination and we didn't print both operands. This was inconsistent with gcc and objdump and just makes the output assembly code harder to read.

This patch changes things to always print both operands making us consistent with gcc and objdump. The parser should still be able to handle the single register forms just as it did before. This also matches the GNU assembler behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353061 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Remove redundant namespaces qualifiers. NFC.
Sam Clegg [Mon, 4 Feb 2019 17:26:22 +0000 (17:26 +0000)]
[WebAssembly] Remove redundant namespaces qualifiers. NFC.

Differential Revision: https://reviews.llvm.org/D57610

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353060 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Intrinsic] Unsigned Fixed Point Multiplication Intrinsic
Leonard Chan [Mon, 4 Feb 2019 17:18:11 +0000 (17:18 +0000)]
[Intrinsic] Unsigned Fixed Point Multiplication Intrinsic

Add an intrinsic that takes 2 unsigned integers with the scale of them
provided as the third argument and performs fixed point multiplication on
them.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D55625

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353059 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GlobalISel] Add IRTranslator support for G_FFLOOR
Jessica Paquette [Mon, 4 Feb 2019 17:15:34 +0000 (17:15 +0000)]
[GlobalISel] Add IRTranslator support for G_FFLOOR

Follow-up to https://reviews.llvm.org/D57484

Adds G_FFLOOR to translateKnownIntrinsic and update arm64-irtranslator.ll.

Differential Revision: https://reviews.llvm.org/D57485

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353058 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GlobalISel] Introduce a generic floating point floor opcode, G_FFLOOR
Jessica Paquette [Mon, 4 Feb 2019 17:10:55 +0000 (17:10 +0000)]
[GlobalISel] Introduce a generic floating point floor opcode, G_FFLOOR

This introduces a generic opcode for floating point floor, working towards
selecting @llvm.floor.

Differential Revision: https://reviews.llvm.org/D57484

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353057 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CGP] use IRBuilder to simplify code
Sanjay Patel [Mon, 4 Feb 2019 16:30:46 +0000 (16:30 +0000)]
[CGP] use IRBuilder to simplify code

This is no-functional-change-intended although there could
be intermediate variations caused by a difference in the
debug info produced by setting that from the builder's
insertion point.

I'm updating the IR test file associated with this code just
to show that the naming differences from using the builder
are visible.

The motivation for adding a helper function is that we are
likely to extend this code to deal with other overflow ops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353056 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CommandLine] Don't print empty sentinel values from EnumValN lists in help text
James Henderson [Mon, 4 Feb 2019 16:17:57 +0000 (16:17 +0000)]
[CommandLine] Don't print empty sentinel values from EnumValN lists in help text

In order to make an option value truly optional, both the ValueOptional
attribute and an empty-named value are required. Prior to this change,
this empty-named value appears in the command-line help text:

-some-option - some help text
  =v1        - description 1
  =v2        - description 2
  =          -

This change improves the help text for these sort of options in a number
of ways:

1) ValueOptional options with an empty-named value now print their help
   text twice: both without and then with '=<value>' after the name. The
   latter version then lists the allowed values after it.
2) Empty-named values with no help text in ValueOptional options are not
   listed in the permitted values.

-some-option         - some help text
-some-option=<value> - some help text
  =v1                - description 1
  =v2                - description 2

3) Otherwise empty-named options are printed as =<empty> rather than
   simply '='.
4) Option values without help text do not have the '-' separator
   printed.

-some-option=<value> - some help text
  =v1                - description 1
  =v2
  =<empty>           - description

It also tweaks the llvm-symbolizer -functions help text to not print a
trailing ':' as that looks bad combined with 1) above.

This is mostly a reland of r353048 which in turn was a reland of
r352750.

Reviewed by: ruiu, thopre, mstorsjo

Differential Revision: https://reviews.llvm.org/D57030

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353053 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] SimplifyDemandedBitsForTargetNode - PCMPGT(0,X) sign mask
Simon Pilgrim [Mon, 4 Feb 2019 15:43:36 +0000 (15:43 +0000)]
[X86][SSE] SimplifyDemandedBitsForTargetNode - PCMPGT(0,X) sign mask

For PCMPGT(0, X) patterns where we only demand the sign bit (e.g. BLENDV or MOVMSK) then we can use X directly.

Differential Revision: https://reviews.llvm.org/D57667

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353051 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r353048.
James Henderson [Mon, 4 Feb 2019 15:09:58 +0000 (15:09 +0000)]
Revert r353048.

It was causing unexpected unit test failures on build bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353050 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CommandLine] Don't print empty sentinel values from EnumValN lists in help text
James Henderson [Mon, 4 Feb 2019 14:48:33 +0000 (14:48 +0000)]
[CommandLine] Don't print empty sentinel values from EnumValN lists in help text

In order to make an option value truly optional, both the ValueOptional
attribute and an empty-named value are required. Prior to this change,
this empty-named value appears in the command-line help text:

-some-option - some help text
  =v1        - description 1
  =v2        - description 2
  =          -

This change improves the help text for these sort of options in a number
of ways:

1) ValueOptional options with an empty-named value now print their help
   text twice: both without and then with '=<value>' after the name. The
   latter version then lists the allowed values after it.
2) Empty-named values with no help text in ValueOptional options are not
   listed in the permitted values.

-some-option         - some help text
-some-option=<value> - some help text
  =v1                - description 1
  =v2                - description 2

3) Otherwise empty-named options are printed as =<empty> rather than
   simply '='.
4) Option values without help text do not have the '-' separator
   printed.

-some-option=<value> - some help text
  =v1                - description 1
  =v2
  =<empty>           - description

It also tweaks the llvm-symbolizer -functions help text to not print a
trailing ':' as that looks bad combined with 1) above.

This is mostly a reland of r352750.

Reviewed by: ruiu, thopre, mstorsjo

Differential Revision: https://reviews.llvm.org/D57030

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353048 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Fix formatting of debug output
Matt Arsenault [Mon, 4 Feb 2019 14:05:33 +0000 (14:05 +0000)]
GlobalISel: Fix formatting of debug output

There was a missing space before the instruction name, and the newline
is redundant since MI::print by default adds one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353046 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/GlobalISel: Legalize select for v4s16
Matt Arsenault [Mon, 4 Feb 2019 14:04:52 +0000 (14:04 +0000)]
AMDGPU/GlobalISel: Legalize select for v4s16

Also add some more select tests to help show future legalization
changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353045 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombine] Add ADD(SUB,SUB) combines
Simon Pilgrim [Mon, 4 Feb 2019 13:44:49 +0000 (13:44 +0000)]
[DAGCombine] Add ADD(SUB,SUB) combines

Noticed while investigating PR40483, and fixes the basic test case from the bug - but not a more general case.

We're pretty weak at dealing with ADD/SUB combines compared to the SimplifyAssociativeOrCommutative/SimplifyUsingDistributiveLaws abilities that InstCombine can manage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353044 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AsmPrinter] Remove hidden flag -print-schedule.
Andrea Di Biagio [Mon, 4 Feb 2019 12:51:26 +0000 (12:51 +0000)]
[AsmPrinter] Remove hidden flag -print-schedule.

This patch removes hidden codegen flag -print-schedule effectively reverting the
logic originally committed as r300311
(https://llvm.org/viewvc/llvm-project?view=revision&revision=300311).

Flag -print-schedule was originally introduced by r300311 to address PR32216
(https://bugs.llvm.org/show_bug.cgi?id=32216). That bug was about adding "Better
testing of schedule model instruction latencies/throughputs".

These days, we can use llvm-mca to test scheduling models. So there is no longer
a need for flag -print-schedule in LLVM. The main use case for PR32216 is
now addressed by llvm-mca.
Flag -print-schedule is mainly used for debugging purposes, and it is only
actually used by x86 specific tests. We already have extensive (latency and
throughput) tests under "test/tools/llvm-mca" for X86 processor models. That
means, most (if not all) existing -print-schedule tests for X86 are redundant.

When flag -print-schedule was first added to LLVM, several files had to be
modified; a few APIs gained new arguments (see for example method
MCAsmStreamer::EmitInstruction), and MCSubtargetInfo/TargetSubtargetInfo gained
a couple of getSchedInfoStr() methods.

Method getSchedInfoStr() had to originally work for both MCInst and
MachineInstr. The original implmentation of getSchedInfoStr() introduced a
subtle layering violation (reported as PR37160 and then fixed/worked-around by
r330615).
In retrospect, that new API could have been designed more optimally. We can
always query MCSchedModel to get the latency and throughput. More importantly,
the "sched-info" string should not have been generated by the subtarget.
Note, r317782 fixed an issue where "print-schedule" didn't work very well in the
presence of inline assembly. That commit is also reverted by this change.

Differential Revision: https://reviews.llvm.org/D57244

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353043 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add a couple of missed ADD combine tests
Simon Pilgrim [Mon, 4 Feb 2019 12:37:38 +0000 (12:37 +0000)]
[X86] Add a couple of missed ADD combine tests

Noticed while investigating PR40483

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353042 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoUse auto for dyn_cast case to save a line. NFCI.
Simon Pilgrim [Mon, 4 Feb 2019 12:32:39 +0000 (12:32 +0000)]
Use auto for dyn_cast case to save a line. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353041 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Mark 255 and 65535 as cheap for Thumb1 "And"
David Green [Mon, 4 Feb 2019 11:58:48 +0000 (11:58 +0000)]
[ARM] Mark 255 and 65535 as cheap for Thumb1 "And"

This prevents Constant Hoisting from pulling the constant out of the block,
allowing us to still produce LDRH/UXTH nodes. LDRB/UXTB (255) is already cheap
by the default getIntImmCost, but I've added it for clarity.

Differential Revision: https://reviews.llvm.org/D57671

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353040 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Add testcases for D57671. NFC
David Green [Mon, 4 Feb 2019 11:50:14 +0000 (11:50 +0000)]
[ARM] Add testcases for D57671. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353039 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Make a check in GuardWidening more obvious
Max Kazantsev [Mon, 4 Feb 2019 10:41:17 +0000 (10:41 +0000)]
[NFC] Make a check in GuardWidening more obvious

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353038 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoCommit tests for changes in revision D41608
Dmitry Venikov [Mon, 4 Feb 2019 10:32:07 +0000 (10:32 +0000)]
Commit tests for changes in revision D41608

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353037 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Rename variables to reflect the actual status of GuardWidening
Max Kazantsev [Mon, 4 Feb 2019 10:31:18 +0000 (10:31 +0000)]
[NFC] Rename variables to reflect the actual status of GuardWidening

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353036 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy][NFC] Fix trailing semicolon warning.
Clement Courbet [Mon, 4 Feb 2019 10:24:42 +0000 (10:24 +0000)]
[llvm-objcopy][NFC] Fix trailing semicolon warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353035 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Remove redundant parameters for better readability
Max Kazantsev [Mon, 4 Feb 2019 10:20:51 +0000 (10:20 +0000)]
[NFC] Remove redundant parameters for better readability

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353034 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Replace equivalent condition for better readability
Max Kazantsev [Mon, 4 Feb 2019 09:55:18 +0000 (09:55 +0000)]
[NFC] Replace equivalent condition for better readability

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353032 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] Add a BaseIndexOffset::print() method for debugging.
Clement Courbet [Mon, 4 Feb 2019 09:30:43 +0000 (09:30 +0000)]
[SelectionDAG] Add a BaseIndexOffset::print() method for debugging.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353028 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-exegesis] Cut run time of analysis mode by another -35% (*sic*) (YamlContext...
Roman Lebedev [Mon, 4 Feb 2019 09:12:25 +0000 (09:12 +0000)]
[llvm-exegesis] Cut run time of analysis mode by another -35% (*sic*) (YamlContext::getRegNo())

Summary:

Together with the previous patch, it's an -90% improvement,
or roughly -96% improvement if you look starting with rL347204

```
$ perf stat -r 9 ./bin/llvm-exegesis -mode=analysis -analysis-epsilon=1.0 -benchmarks-file=/tmp/benchmarks-inverse_throughput-onefull.yaml -analysis-clusters-output-file="" -analysis-inconsistencies-output-file=/tmp/clusters-bew.html
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 14656 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-bew.html'
...
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 14656 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-bew.html'

 Performance counter stats for './bin/llvm-exegesis -mode=analysis -analysis-epsilon=1.0 -benchmarks-file=/tmp/benchmarks-inverse_throughput-onefull.yaml -analysis-clusters-output-file= -analysis-inconsistencies-output-file=/tmp/clusters-bew.html' (9 runs):

           1483.18 msec task-clock                #    0.999 CPUs utilized            ( +-  0.10% )
                68      context-switches          #   46.085 M/sec                    ( +- 22.62% )
                 0      cpu-migrations            #    0.000 K/sec
             11641      page-faults               # 7850.880 M/sec                    ( +-  0.62% )
        5943246799      cycles                    # 4008184.428 GHz                   ( +-  0.10% )  (83.28%)
         442869514      stalled-cycles-frontend   #    7.45% frontend cycles idle     ( +-  0.41% )  (83.29%)
        1443375663      stalled-cycles-backend    #   24.29% backend cycles idle      ( +-  0.47% )  (33.43%)
        7714006752      instructions              #    1.30  insn per cycle
                                                  #    0.19  stalled cycles per insn  ( +-  0.07% )  (50.17%)
        1977242936      branches                  # 1333472193.855 M/sec              ( +-  0.07% )  (66.79%)
          32624220      branch-misses             #    1.65% of all branches          ( +-  0.18% )  (83.34%)

           1.48438 +- 0.00143 seconds time elapsed  ( +-  0.10% )
```
```
$ perf stat -r 9 ./bin/llvm-exegesis -mode=analysis -analysis-epsilon=1.0 -benchmarks-file=/tmp/benchmarks-inverse_throughput-onefull.yaml -analysis-clusters-output-file="" -analysis-inconsistencies-output-file=/tmp/clusters-newer.html
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 14656 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-newer.html'
...
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 14656 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-newer.html'

 Performance counter stats for './bin/llvm-exegesis -mode=analysis -analysis-epsilon=1.0 -benchmarks-file=/tmp/benchmarks-inverse_throughput-onefull.yaml -analysis-clusters-output-file= -analysis-inconsistencies-output-file=/tmp/clusters-newer.html' (9 runs):

            963.28 msec task-clock                #    0.999 CPUs utilized            ( +-  0.37% )
                12      context-switches          #   12.695 M/sec                    ( +- 52.79% )
                 0      cpu-migrations            #    0.000 K/sec
             11599      page-faults               # 12046.971 M/sec                   ( +-  0.59% )
        3860122322      cycles                    # 4009359.596 GHz                   ( +-  0.37% )  (83.19%)
         380300669      stalled-cycles-frontend   #    9.85% frontend cycles idle     ( +-  0.34% )  (83.30%)
        1071910340      stalled-cycles-backend    #   27.77% backend cycles idle      ( +-  1.30% )  (33.51%)
        4773418224      instructions              #    1.24  insn per cycle
                                                  #    0.22  stalled cycles per insn  ( +-  0.15% )  (50.17%)
        1106990316      branches                  # 1149787979.919 M/sec              ( +-  0.11% )  (66.80%)
          23632231      branch-misses             #    2.13% of all branches          ( +-  0.18% )  (83.33%)

           0.96389 +- 0.00356 seconds time elapsed  ( +-  0.37% )
```
```
$ sha512sum /tmp/clusters-*
db4bbd904fe8840853b589b032c5041bc060b91bcd9c27b914b56581fbc473550eea74b852238c79963b5adf2419f379e9f5db76784048b48e3937f9f3e732bf  /tmp/clusters-bew.html
db4bbd904fe8840853b589b032c5041bc060b91bcd9c27b914b56581fbc473550eea74b852238c79963b5adf2419f379e9f5db76784048b48e3937f9f3e732bf  /tmp/clusters-newer.html
db4bbd904fe8840853b589b032c5041bc060b91bcd9c27b914b56581fbc473550eea74b852238c79963b5adf2419f379e9f5db76784048b48e3937f9f3e732bf  /tmp/clusters-old.html
```

Reviewers: courbet, gchatelet

Reviewed By: courbet

Subscribers: tschuett, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57658

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353025 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-exegesis] Cut run time of analysis mode by -84% (*sic*) (YamlContext::getInstrO...
Roman Lebedev [Mon, 4 Feb 2019 09:12:21 +0000 (09:12 +0000)]
[llvm-exegesis] Cut run time of analysis mode by -84% (*sic*) (YamlContext::getInstrOpcode())

Summary:
```
$ perf stat -r 9 ./bin/llvm-exegesis -mode=analysis -analysis-epsilon=1.0 -benchmarks-file=/tmp/benchmarks-inverse_throughput-onefull.yaml -analysis-clusters-output-file="" -analysis-inconsistencies-output-file=/tmp/clusters-old.html
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 14656 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-old.html'
...
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 14656 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-old.html'

 Performance counter stats for './bin/llvm-exegesis -mode=analysis -analysis-epsilon=1.0 -benchmarks-file=/tmp/benchmarks-inverse_throughput-onefull.yaml -analysis-clusters-output-file= -analysis-inconsistencies-output-file=/tmp/clusters-old.html' (9 runs):

           9465.46 msec task-clock                #    1.000 CPUs utilized            ( +-  0.05% )
                60      context-switches          #    6.363 M/sec                    ( +- 79.45% )
                 0      cpu-migrations            #    0.000 K/sec
             11364      page-faults               # 1200.697 M/sec                    ( +-  0.60% )
       37935623543      cycles                    # 4008083.912 GHz                   ( +-  0.05% )  (83.32%)
        2371625356      stalled-cycles-frontend   #    6.25% frontend cycles idle     ( +-  0.37% )  (83.32%)
        8476077875      stalled-cycles-backend    #   22.34% backend cycles idle      ( +-  0.18% )  (33.36%)
       41822439158      instructions              #    1.10  insn per cycle
                                                  #    0.20  stalled cycles per insn  ( +-  0.02% )  (50.03%)
       11607658944      branches                  # 1226405861.486 M/sec              ( +-  0.01% )  (66.69%)
         210864633      branch-misses             #    1.82% of all branches          ( +-  0.06% )  (83.34%)

           9.46636 +- 0.00441 seconds time elapsed  ( +-  0.05% )
```
```
$ perf stat -r 9 ./bin/llvm-exegesis -mode=analysis -analysis-epsilon=1.0 -benchmarks-file=/tmp/benchmarks-inverse_throughput-onefull.yaml -analysis-clusters-output-file="" -analysis-inconsistencies-output-file=/tmp/clusters-bew.html
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 14656 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-bew.html'
...
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 14656 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-bew.html'

 Performance counter stats for './bin/llvm-exegesis -mode=analysis -analysis-epsilon=1.0 -benchmarks-file=/tmp/benchmarks-inverse_throughput-onefull.yaml -analysis-clusters-output-file= -analysis-inconsistencies-output-file=/tmp/clusters-bew.html' (9 runs):

           1480.66 msec task-clock                #    1.000 CPUs utilized            ( +-  0.19% )
                13      context-switches          #    8.483 M/sec                    ( +- 83.10% )
                 0      cpu-migrations            #    0.075 M/sec                    ( +-100.00% )
             11596      page-faults               # 7834.247 M/sec                    ( +-  0.59% )
        5933732194      cycles                    # 4008977.535 GHz                   ( +-  0.19% )  (83.22%)
         438111928      stalled-cycles-frontend   #    7.38% frontend cycles idle     ( +-  0.37% )  (83.25%)
        1454969705      stalled-cycles-backend    #   24.52% backend cycles idle      ( +-  0.94% )  (33.53%)
        7724218604      instructions              #    1.30  insn per cycle
                                                  #    0.19  stalled cycles per insn  ( +-  0.07% )  (50.14%)
        1979796413      branches                  # 1337599858.945 M/sec              ( +-  0.06% )  (66.74%)
          32641638      branch-misses             #    1.65% of all branches          ( +-  0.18% )  (83.31%)

           1.48128 +- 0.00284 seconds time elapsed  ( +-  0.19% )

$ sha512sum /tmp/clusters-*
db4bbd904fe8840853b589b032c5041bc060b91bcd9c27b914b56581fbc473550eea74b852238c79963b5adf2419f379e9f5db76784048b48e3937f9f3e732bf  /tmp/clusters-bew.html
db4bbd904fe8840853b589b032c5041bc060b91bcd9c27b914b56581fbc473550eea74b852238c79963b5adf2419f379e9f5db76784048b48e3937f9f3e732bf  /tmp/clusters-old.html
```

Reviewers: courbet, gchatelet

Reviewed By: courbet

Subscribers: tschuett, llvm-commits, RKSimon

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57657

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353024 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-exegesis] Throughput support in analysis mode
Roman Lebedev [Mon, 4 Feb 2019 09:12:17 +0000 (09:12 +0000)]
[llvm-exegesis] Throughput support in analysis mode

Summary:
D57000 / [[ https://bugs.llvm.org/show_bug.cgi?id=37698 | PR37698 ]] added support for measuring of the inverse throughput.
But the support for the analysis was not added.
This attempts to fix that. (analysis done o bdver2 / piledriver)

First, small-scale experiment:
```
$ ./bin/llvm-exegesis -num-repetitions=10000 -mode=inverse_throughput -opcode-name=BSF64rr
Check generated assembly with: /usr/bin/objdump -d /tmp/snippet-d0acdd.o
---
mode:            inverse_throughput
key:
  instructions:
    - 'BSF64rr RAX RDX'
  config:          ''
  register_initial_values:
    - 'RDX=0x0'
cpu_name:        bdver2
llvm_triple:     x86_64-unknown-linux-gnu
num_repetitions: 10000
measurements:
  - { key: inverse_throughput, value: 3.0278, per_snippet_value: 3.0278 }
error:           ''
info:            instruction has no tied variables picking Uses different from defs
assembled_snippet: 48BA0000000000000000480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2480FBCC2C3
...
```
If we plug `bsfq %r12, %r10` into llvm-mca:
https://godbolt.org/z/ZtOyhJ
```
Dispatch Width:    4
uOps Per Cycle:    3.00
IPC:               0.50
Block RThroughput: 2.0
```
So RThroughput mismatch exists.

Now, let's upscale and analyse:
{F8207148}
`$ ./bin/llvm-exegesis -mode=analysis -analysis-epsilon=1.0 -benchmarks-file=/tmp/benchmarks-inverse_throughput.yaml -analysis-inconsistencies-output-file=/tmp/clusters.html`:
{F8207172}
{F8207197}
And if we now look at https://www.agner.org/optimize/instruction_tables.pdf,
`Reciprocal throughput` for `BSF r,r` is listed as `3`.
Yay?

Reviewers: courbet, gchatelet

Reviewed By: courbet

Subscribers: tschuett, RKSimon, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57647

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353023 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-exegesis] deserializeMCInst(): bump SmallVector small size up to 16
Roman Lebedev [Mon, 4 Feb 2019 09:12:13 +0000 (09:12 +0000)]
[llvm-exegesis] deserializeMCInst(): bump SmallVector small size up to 16

Summary:
... from 8.
`VALIGNDZ128rmbik XMM0 XMM0 K1 XMM3 RDI i_0x1  i_0x0  i_0x1` instruction already has 9 components.
It does not matter much in terms of performance, but avoiding allocation seems to come with low cost here..

Reviewers: courbet, gchatelet

Reviewed By: courbet

Subscribers: tschuett, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57654

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353022 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-exegesis] Don't default to running&dumping all analyses to '-'
Roman Lebedev [Mon, 4 Feb 2019 09:12:08 +0000 (09:12 +0000)]
[llvm-exegesis] Don't default to running&dumping all analyses to '-'

Summary:
Up until the point i have looked in the source, i didn't even understood that
i can disable 'cluster' output. I have always silenced it via ` &> /dev/null`.
(And hoped it wasn't contributing much of the run time.)

While i expect that it has it's use-cases i never once needed it so far.
If i forget to silence it, console is completely flooded with that output.

How about not expecting users to opt-out of analyses,
but to explicitly specify the analyses that should be performed?

Reviewers: courbet, gchatelet

Reviewed By: courbet

Subscribers: tschuett, RKSimon, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57648

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353021 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SCEV] Do not bother creating separate SCEVUnknown for unreachable nodes
Max Kazantsev [Mon, 4 Feb 2019 05:04:19 +0000 (05:04 +0000)]
[SCEV] Do not bother creating separate SCEVUnknown for unreachable nodes

Currently, SCEV creates SCEVUnknown for every node of unreachable code. If we
have a huge amounts of such code, we will be littering SE with these nodes. We could
just state that they all are undef and save some memory.

Differential Revision: https://reviews.llvm.org/D57567
Reviewed By: sanjoy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353017 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRecommit r352660 "[X86] Mark EMMS and FEMMS as clobbering MM0-7 and ST0-7."
Craig Topper [Mon, 4 Feb 2019 04:44:20 +0000 (04:44 +0000)]
Recommit r352660 "[X86] Mark EMMS and FEMMS as clobbering MM0-7 and ST0-7."

We now print ST0 as 'st' when generating the clobber list for MS inline assembly in clang. This matches what the gcc reg name list expects.

Original commit message:

This fixes the test case in PR35982 by preventing MMX instructions that read MM0-7 from being moved below EMMS/FEMMS by the post RA scheduler.

Though as discussed in bugzilla, this is not a complete fix. There is still the possibility of reordering in IR or by the pre-RA scheduler.

Differential Revision: https://reviews.llvm.org/D57298

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353016 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Print %st(0) as %st when its implicit to the instruction. Continue printing...
Craig Topper [Mon, 4 Feb 2019 04:15:10 +0000 (04:15 +0000)]
[X86] Print %st(0) as %st when its implicit to the instruction. Continue printing it as %st(0) when its encoded in the instruction.

This is a step back from the change I made in r352985. This appears to be more consistent with gcc and objdump behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353015 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Regenerate test to drop 'End function' comments some other other regex updates.
Craig Topper [Mon, 4 Feb 2019 04:15:04 +0000 (04:15 +0000)]
[X86] Regenerate test to drop 'End function' comments some other other regex updates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353014 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r352985 "[X86] Print %st(0) as %st to match what gcc inline asm uses as the...
Craig Topper [Mon, 4 Feb 2019 04:15:02 +0000 (04:15 +0000)]
Revert r352985 "[X86] Print %st(0) as %st to match what gcc inline asm uses as the clobber name to make MS inline asm work correctly"

Looking into gcc and objdump behavior more this was overly aggressive. If the register is encoded in the instruction we should print %st(0), if its implicit we should print %st.

I'll be making a more directed change in a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353013 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agotests: loosen restriction
Saleem Abdulrasool [Mon, 4 Feb 2019 00:09:32 +0000 (00:09 +0000)]
tests: loosen restriction

The MachO tests can run on any target, but require that the x86 backend
is available.  Broaden the coverage of the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353012 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoCompute the correct symbol size in llvm-nm even without --print-size
Sunil Srivastava [Sun, 3 Feb 2019 22:40:01 +0000 (22:40 +0000)]
Compute the correct symbol size in llvm-nm even without --print-size

In llvm-nm, the symbol size was being computed only with --print-size option,
even though it was being printed in other cases, such as with --format=posix.

This patch simply removes the guard, so that the size is computed
independently of the later decision to print it or not.

Fixes PR39997.

Differential Revision: https://reviews.llvm.org/D57599

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353011 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs] Recommend assertions when testing.
Davide Italiano [Sun, 3 Feb 2019 20:37:13 +0000 (20:37 +0000)]
[docs] Recommend assertions when testing.

Pointed out by Shoaib Meenai.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353008 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LoopIdiomRecognize] @llvm.dbg values shouldn't affect the transformation.
Davide Italiano [Sun, 3 Feb 2019 20:33:20 +0000 (20:33 +0000)]
[LoopIdiomRecognize] @llvm.dbg values shouldn't affect the transformation.

Summary: PR40564

Reviewers: aprantl, rnk

Subscribers: llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57629

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353007 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Make vector types legal in UREM test
Simon Pilgrim [Sun, 3 Feb 2019 19:38:15 +0000 (19:38 +0000)]
[NFC] Make vector types legal in UREM test

As discussed in D50222, this changes the vector types in tests required for that revision to ones legal for X86.

Patch by @hermord (Dmytro Shynkevych)

Differential Revision: https://reviews.llvm.org/D56372

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353004 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC] adjust test for uaddo change in rL353001
Sanjay Patel [Sun, 3 Feb 2019 18:10:16 +0000 (18:10 +0000)]
[PowerPC] adjust test for uaddo change in rL353001

We don't need a mtctr/bctr for this test now; a regular
conditional branch is fine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353002 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CGP] adjust target constraints for forming uaddo
Sanjay Patel [Sun, 3 Feb 2019 17:53:09 +0000 (17:53 +0000)]
[CGP] adjust target constraints for forming uaddo

There are 2 changes visible here:
1. There's no reason to limit this transform based on number
   of condition registers. That diff allows PPC to produce
   slightly better (dot-instructions should be generally good)
   code.
   Note: someone that cares about PPC codegen might want to
   look closer at that output because it seems like we could
   still improve this.

2. We (probably?) should not bother trying to form uaddo (or
   other overflow ops) when there's no target support for such
   an op. This goes beyond checking whether the op is expanded
   because both PPC and AArch64 show better codegen for standard
   types regardless of whether the op is legal/custom.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353001 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][AVX] Support shuffle combining for VBROADCAST with smaller vector sources
Simon Pilgrim [Sun, 3 Feb 2019 16:51:33 +0000 (16:51 +0000)]
[X86][AVX] Support shuffle combining for VBROADCAST with smaller vector sources

getTargetShuffleMask can only do this safely if we're extracting the lowest subvector from a vector of the same result type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352999 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PatternMatch] add special-case uaddo matching for increment-by-one (2nd try)
Sanjay Patel [Sun, 3 Feb 2019 16:16:48 +0000 (16:16 +0000)]
[PatternMatch] add special-case uaddo matching for increment-by-one (2nd try)

This is the most important uaddo problem mentioned in PR31754:
https://bugs.llvm.org/show_bug.cgi?id=31754
...but that was overcome in x86 codegen with D57637.

That patch also corrects the inc vs. add regressions seen with the  previous attempt at this.

Still, we want to make this matcher complete, so we can potentially canonicalize the pattern
even if it's an 'add 1' operation.
Pattern matching, however, shouldn't assume that we have canonicalized IR, so we match 4
commuted variants of uaddo.

There's also a test with a crazy type to show that the existing CGP transform based on this
matcher is not limited by target legality checks.

I'm not sure if the Hexagon diff means the test is no longer testing what it intended to
test, but that should be solvable in a follow-up.

Differential Revision: https://reviews.llvm.org/D57516

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352998 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][AVX] Support shuffle combining for VPMOVZX with smaller vector sources
Simon Pilgrim [Sun, 3 Feb 2019 16:10:18 +0000 (16:10 +0000)]
[X86][AVX] Support shuffle combining for VPMOVZX with smaller vector sources

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352997 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][AVX] More aggressively simplify BROADCAST source operand
Simon Pilgrim [Sun, 3 Feb 2019 14:39:41 +0000 (14:39 +0000)]
[X86][AVX] More aggressively simplify BROADCAST source operand

Aim to use scalar source or lowest 128-bit vector directly.

We're still missing some VZMOVL_LOAD combines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352994 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[x86] add CGP uaddo test with weird type; NFC
Sanjay Patel [Sun, 3 Feb 2019 14:22:43 +0000 (14:22 +0000)]
[x86] add CGP uaddo test with weird type; NFC

There's probably no reason to try this transform
for an obviously unsupported op.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352993 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CGP] move test file to prevent bot failures
Sanjay Patel [Sun, 3 Feb 2019 14:19:45 +0000 (14:19 +0000)]
[CGP] move test file to prevent bot failures

The test specifiies the triple, so it needs to be in the
x86 directory in case a bot has been configured without
the x86 target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352992 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CGP] refactor optimizeCmpExpression (NFCI)
Sanjay Patel [Sun, 3 Feb 2019 13:48:03 +0000 (13:48 +0000)]
[CGP] refactor optimizeCmpExpression (NFCI)

This is not truly NFC because we are bailing out without
a TLI now. That should not be a real concern though because
there should be a TLI in any real-world scenario.

That seems better than passing around a pointer and then
checking it for null-ness all over the place.

The motivation is to fix what appears to be an unintended
restriction on the uaddo transform -
hasMultipleConditionRegisters() shouldn't be reason to limit
the transform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352988 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC] add tests for saturating add; NFC
Sanjay Patel [Sun, 3 Feb 2019 12:42:54 +0000 (12:42 +0000)]
[PowerPC] add tests for saturating add; NFC

This is copied from the existing test files for x86/AArch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352987 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DA][NewPM] Handle transitive dependencies in the new-pm version of DA
Philip Pfaffe [Sun, 3 Feb 2019 12:25:41 +0000 (12:25 +0000)]
[DA][NewPM] Handle transitive dependencies in the new-pm version of DA

Summary:
The analysis result of DA caches pointers to AA, SCEV, and LI, but it
never checks for their invalidation. Fix that.

Reviewers: chandlerc, dmgreen, bogner

Reviewed By: dmgreen

Subscribers: hiraditya, bollu, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D56381

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352986 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Print %st(0) as %st to match what gcc inline asm uses as the clobber name to...
Craig Topper [Sun, 3 Feb 2019 07:53:39 +0000 (07:53 +0000)]
[X86] Print %st(0) as %st to match what gcc inline asm uses as the clobber name to make MS inline asm work correctly

Summary:
When calculating clobbers for MS style inline assembly we fail if the asm clobbers stack top because we print st(0) and try to pass it through the gcc register name check. This was found with when I attempted to make a emms/femms clobber all ST registers. If you use emms/femms in MS inline asm we would try to use st(0) as the clobber name but clang would think that wasn't a valid clobber name.

This also matches what objdump disassembly prints. It's also what is printed by gcc -S.

Reviewers: RKSimon, rnk, efriedma, spatel, andreadb, lebedev.ri

Reviewed By: rnk

Subscribers: eraman, gbedwell, lebedev.ri, llvm-commits

Differential Revision: https://reviews.llvm.org/D57621

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352985 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Lower ISD::UADDO to use the Z flag instead of C flag when the RHS is a constant...
Craig Topper [Sun, 3 Feb 2019 07:25:06 +0000 (07:25 +0000)]
[X86] Lower ISD::UADDO to use the Z flag instead of C flag when the RHS is a constant 1 to encourage INC formation.

Summary:
Add an additional combine to combineCarryThroughADD to reverse it back to the C flag to avoid regressions.

I believe this catches the cases that D57547 got.

Reviewers: RKSimon, spatel

Reviewed By: spatel

Subscribers: javed.absar, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57637

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352984 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Fix -Wunused-variable after rL352978
Fangrui Song [Sun, 3 Feb 2019 03:51:52 +0000 (03:51 +0000)]
[AMDGPU] Fix -Wunused-variable after rL352978

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352982 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] Missed optimization in math expression: log10(pow(10.0,x)) == x, log2...
Dmitry Venikov [Sun, 3 Feb 2019 03:48:30 +0000 (03:48 +0000)]
[InstSimplify] Missed optimization in math expression: log10(pow(10.0,x)) == x, log2(pow(2.0,x)) == x

Summary: This patch enables folding following instructions under -ffast-math flag: log10(pow(10.0,x)) -> x, log2(pow(2.0,x)) -> x

Reviewers: hfinkel, spatel, efriedma, craig.topper, zvi, majnemer, lebedev.ri

Reviewed By: spatel, lebedev.ri

Subscribers: lebedev.ri, llvm-commits

Differential Revision: https://reviews.llvm.org/D41940

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352981 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Implement widenScalar for G_UNMERGE_VALUES
Matt Arsenault [Sun, 3 Feb 2019 00:07:33 +0000 (00:07 +0000)]
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES

For the scalar case only.

Also move the similar G_MERGE_VALUES handling to a separate function
and cleanup to make them look more similar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352979 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Implement widenScalar for G_EXTRACT vector sources
Matt Arsenault [Sat, 2 Feb 2019 23:56:00 +0000 (23:56 +0000)]
GlobalISel: Implement widenScalar for G_EXTRACT vector sources

Handle the basic element extract case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352978 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/GlobalISel: Avoid reporting illegal extloads as legal
Matt Arsenault [Sat, 2 Feb 2019 23:39:13 +0000 (23:39 +0000)]
AMDGPU/GlobalISel: Avoid reporting illegal extloads as legal

This avoids breaking a test in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352977 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/GlobalISel: Legalize icmp for pointer types
Matt Arsenault [Sat, 2 Feb 2019 23:35:15 +0000 (23:35 +0000)]
AMDGPU/GlobalISel: Legalize icmp for pointer types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352976 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/GlobalISel: Legalize constant for pointer types
Matt Arsenault [Sat, 2 Feb 2019 23:33:49 +0000 (23:33 +0000)]
AMDGPU/GlobalISel: Legalize constant for pointer types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352975 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/GlobalISel: Legalize select for pointer types
Matt Arsenault [Sat, 2 Feb 2019 23:31:50 +0000 (23:31 +0000)]
AMDGPU/GlobalISel: Legalize select for pointer types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352974 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Legalization for inttoptr/ptrtoint
Matt Arsenault [Sat, 2 Feb 2019 23:29:55 +0000 (23:29 +0000)]
GlobalISel: Legalization for inttoptr/ptrtoint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352973 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add another test case for PR40539. NFC
Craig Topper [Sat, 2 Feb 2019 22:01:41 +0000 (22:01 +0000)]
[X86] Add another test case for PR40539. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352967 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][AVX] Enable INSERT_SUBVECTOR(SRC0, SHUFFLE(SRC1)) shuffle combining
Simon Pilgrim [Sat, 2 Feb 2019 18:08:04 +0000 (18:08 +0000)]
[X86][AVX] Enable INSERT_SUBVECTOR(SRC0, SHUFFLE(SRC1)) shuffle combining

Push the insert_subvector up through the shuffle operands to help find more cross-lane shuffles.

The is exposes a couple of minor issues that will be fixed shortly:
Missed broadcast folds - we have a mixture of vzext_load lengths that need cleaning up
combine-sdiv.ll - AVX1 SimplifyDemandedVectorElts failure (hits max depth due to a couple of extra bitcasts).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352963 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SDAG] Add SDNode/SDValue getConstantOperandAPInt helper. NFCI.
Simon Pilgrim [Sat, 2 Feb 2019 17:35:06 +0000 (17:35 +0000)]
[SDAG] Add SDNode/SDValue getConstantOperandAPInt helper. NFCI.

We already have the getConstantOperandVal helper which returns a uint64_t, but along comes the fuzzer and inserts a i128 -1 constant or something and the whole thing asserts.......

I've updated a few obvious cases, and tried to make use of the const reference where possible, but there's more to do. A number of existing oss-fuzz tickets should be fixed if we start using APInt and perform value clamping where necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352961 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LCSSA] Handle case with single new PHI faster.
Florian Hahn [Sat, 2 Feb 2019 15:26:05 +0000 (15:26 +0000)]
[LCSSA] Handle case with single new PHI faster.

If there is only a single available value, all uses must be dominated by
the single value and there is no need to search for a reaching
definition.

This drastically speeds up LCSSA in some cases. For the test case
from PR37202, it speeds up LCSSA construction by 4 times.

Time-passes without this patch for test case from PR37202:

    Total Execution Time: 29.9285 seconds (29.9276 wall clock)

    ---User Time---   --System Time--   --User+System--   ---Wall Time---  --- Name ---
    5.2786 ( 17.7%)   0.0021 (  1.2%)   5.2806 ( 17.6%)   5.2808 ( 17.6%)  Unswitch loops
    4.3739 ( 14.7%)   0.0303 ( 18.1%)   4.4042 ( 14.7%)   4.4042 ( 14.7%)  Loop-Closed SSA Form Pass
    4.2658 ( 14.3%)   0.0192 ( 11.5%)   4.2850 ( 14.3%)   4.2851 ( 14.3%)  Loop-Closed SSA Form Pass #2
    2.2307 (  7.5%)   0.0013 (  0.8%)   2.2320 (  7.5%)   2.2318 (  7.5%)  Loop Invariant Code Motion
    2.0888 (  7.0%)   0.0012 (  0.7%)   2.0900 (  7.0%)   2.0897 (  7.0%)  Unroll loops
    1.6761 (  5.6%)   0.0013 (  0.8%)   1.6774 (  5.6%)   1.6774 (  5.6%)  Value Propagation
    1.3686 (  4.6%)   0.0029 (  1.8%)   1.3716 (  4.6%)   1.3714 (  4.6%)  Induction Variable Simplification
    1.1457 (  3.8%)   0.0010 (  0.6%)   1.1468 (  3.8%)   1.1468 (  3.8%)  Loop-Closed SSA Form Pass #4
    1.1384 (  3.8%)   0.0005 (  0.3%)   1.1389 (  3.8%)   1.1389 (  3.8%)  Loop-Closed SSA Form Pass #6
    1.1360 (  3.8%)   0.0027 (  1.6%)   1.1387 (  3.8%)   1.1387 (  3.8%)  Loop-Closed SSA Form Pass #5
    1.1331 (  3.8%)   0.0010 (  0.6%)   1.1341 (  3.8%)   1.1340 (  3.8%)  Loop-Closed SSA Form Pass #3

Time passes with this patch

  Total Execution Time: 19.2802 seconds (19.2813 wall clock)

   ---User Time---   --System Time--   --User+System--   ---Wall Time---  --- Name ---
   4.4234 ( 23.2%)   0.0038 (  2.0%)   4.4272 ( 23.0%)   4.4273 ( 23.0%)  Unswitch loops
   2.3828 ( 12.5%)   0.0020 (  1.1%)   2.3848 ( 12.4%)   2.3847 ( 12.4%)  Unroll loops
   1.8714 (  9.8%)   0.0020 (  1.1%)   1.8734 (  9.7%)   1.8735 (  9.7%)  Loop Invariant Code Motion
   1.7973 (  9.4%)   0.0022 (  1.2%)   1.7995 (  9.3%)   1.8003 (  9.3%)  Value Propagation
   1.4010 (  7.3%)   0.0033 (  1.8%)   1.4043 (  7.3%)   1.4044 (  7.3%)  Induction Variable Simplification
   0.9978 (  5.2%)   0.0244 ( 13.1%)   1.0222 (  5.3%)   1.0224 (  5.3%)  Loop-Closed SSA Form Pass #2
   0.9611 (  5.0%)   0.0257 ( 13.8%)   0.9868 (  5.1%)   0.9868 (  5.1%)  Loop-Closed SSA Form Pass
   0.5856 (  3.1%)   0.0015 (  0.8%)   0.5871 (  3.0%)   0.5869 (  3.0%)  Unroll loops #2
   0.4132 (  2.2%)   0.0012 (  0.7%)   0.4145 (  2.1%)   0.4143 (  2.1%)  Loop Invariant Code Motion #3

Reviewers: efriedma, davide, mzolotukhin

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D57033

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352960 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LCSSA] Add expensive verification of LCSSA form for sub-loops.
Florian Hahn [Sat, 2 Feb 2019 14:42:27 +0000 (14:42 +0000)]
[LCSSA] Add expensive verification of LCSSA form for sub-loops.

This assertion makes sure all sub-loops are in LCSSA form before
bringing their parent in LCSSA form. This precondition was added to
formLCSSA in D56848.

Reviewers: davide, efriedma, mzolotukhin

Reviewed By: davide

Differential Revision: https://reviews.llvm.org/D56921

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352958 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC>
Craig Topper [Sat, 2 Feb 2019 06:21:54 +0000 (06:21 +0000)]
[X86][SSE]: Adding full coverage of MC encoding tests for the SSE isa sets.<NFC>

Summary:
NFC.
Adding MC regressions tests to cover all the SSE ISA sets as follows:
SSE, SSE2, SSE3, SSE4, SSE42, SSEMXCSR, SSE_PREFETCH, SSSE3

This patch is part of a larger task to cover MC encoding of all X86 ISA Sets.
See revision: https://reviews.llvm.org/D39952

Patch by Gadi Haber and Wang Tianqing

Reviewers: RKSimon, zvi, craig.topper, AndreiGrischenko, gadi.haber, LuoYuanke

Reviewed By: craig.topper

Subscribers: jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D40387

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352955 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "Bump minimum toolchain version"
JF Bastien [Sat, 2 Feb 2019 06:01:12 +0000 (06:01 +0000)]
Revert "Bump minimum toolchain version"

Reverting D57264 again, it looks like we're down to two bots that need fixing:

polly-amd64-linux
polly-arm-linux

They both have old versions of libstdc++ and recent clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352954 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[BPF] [BTF] Process FileName with absolute path correctly
Yonghong Song [Sat, 2 Feb 2019 05:54:59 +0000 (05:54 +0000)]
[BPF] [BTF] Process FileName with absolute path correctly

In IR, sometimes the following attributes for DIFile may be
generated:
  filename: /home/yhs/test.c
  directory: /tmp
The /tmp may represent the working directory of the compilation
process.

In such cases, since filename is with absolute path,
the directory should be ignored by BTF. The filename alone is
enough to get the source.

Acked-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352952 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoBump minimum toolchain version
JF Bastien [Sat, 2 Feb 2019 05:15:34 +0000 (05:15 +0000)]
Bump minimum toolchain version

Summary:
The RFC on moving past C++11 got good traction:
  http://lists.llvm.org/pipermail/llvm-dev/2019-January/129452.html

This patch therefore bumps the toolchain versions according to our policy:
  llvm.org/docs/DeveloperPolicy.html#toolchain

Subscribers: mgorny, jkorous, dexonsmith, llvm-commits, mehdi_amini, jyknight, rsmith, chandlerc, smeenai, hans, reames, lattner, lhames, erichkeane

Differential Revision: https://reviews.llvm.org/D57264

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352951 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] Temporarily limit one test to darwin
Alexander Shaposhnikov [Sat, 2 Feb 2019 05:01:00 +0000 (05:01 +0000)]
[llvm-objcopy] Temporarily limit one test to darwin

Some triples in llvm-mc appear to be unavailable on some buildbots.
To please those buildbots we temporarily limit the test to darwin
(where the required triple is guranteed to be available)
until we find the right solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352950 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ASan] Do not instrument other runtime functions with `__asan_handle_no_return`
Julian Lettner [Sat, 2 Feb 2019 02:05:16 +0000 (02:05 +0000)]
[ASan] Do not instrument other runtime functions with `__asan_handle_no_return`

Summary:
Currently, ASan inserts a call to `__asan_handle_no_return` before every
`noreturn` function call/invoke. This is unnecessary for calls to other
runtime funtions. This patch changes ASan to skip instrumentation for
functions calls marked with `!nosanitize` metadata.

Reviewers: TODO

Differential Revision: https://reviews.llvm.org/D57489

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352948 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] Fix triples in macho tests.
Alexander Shaposhnikov [Sat, 2 Feb 2019 02:04:09 +0000 (02:04 +0000)]
[llvm-objcopy] Fix triples in macho tests.

Update triples used by the macho tests to fix some buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352947 91177308-0d34-0410-b5e6-96231b3b80d8