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6 years agoGo back to sometimes assuming intristics are local.
Rafael Espindola [Sat, 10 Mar 2018 02:42:14 +0000 (02:42 +0000)]
Go back to sometimes assuming intristics are local.

This fixes pr36674.

While it is valid for shouldAssumeDSOLocal to return false anytime,
always returning false for intrinsics is not optimal on i386 and also
hits a bug in the backend.

To use a plt, the caller must first setup ebx to handle the case of
that file being linked into a PIE executable or shared library. In
those cases the generated PLT uses ebx.

Currently we can produce "calll expf@plt" without setting ebx. We
could fix that by correctly setting ebx, but this would produce worse
code for the case where the runtime library is statically linked. It
would also required other tools to handle R_386_PLT32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327198 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert: r327172 "Correct load-op-store cycle detection analysis"
Nirav Dave [Sat, 10 Mar 2018 02:16:15 +0000 (02:16 +0000)]
Revert: r327172 "Correct load-op-store cycle detection analysis"
        r327171 "Improve Dependency analysis when doing multi-node Instruction Selection"
        r328170 "[DAG] Enforce stricter NodeId invariant during Instruction selection"

Reverting patch as NodeId invariant change is causing pathological
increases in compile time on PPC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327197 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TwoAddressInstructionPass] Improve tryInstructionCommute of X86 FMA and vpternlog...
Craig Topper [Fri, 9 Mar 2018 23:36:58 +0000 (23:36 +0000)]
[TwoAddressInstructionPass] Improve tryInstructionCommute of X86 FMA and vpternlog instructions

These instructions have 3 operands that can be commuted. The first commute we find may not be the best. So we should keep searching if we performed an aggressive commute. There may still be an operand that is killed or a physical register constraint that might be better.

Differential Revision: https://reviews.llvm.org/D44324

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327188 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Add EVT::getEVTString() for except_ref type
Heejin Ahn [Fri, 9 Mar 2018 23:29:06 +0000 (23:29 +0000)]
[WebAssembly] Add EVT::getEVTString() for except_ref type

Summary: This was missing in D43706 (rL326985).

Reviewers:

Subscribers: jfb, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D44325

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327187 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoADT: Make MapVector::value_type and MapVector::size_type public. NFC.
Peter Collingbourne [Fri, 9 Mar 2018 22:52:22 +0000 (22:52 +0000)]
ADT: Make MapVector::value_type and MapVector::size_type public. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327180 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TargetLowering] Remove redundant term in two ifs in SimplifySetCC. NFC
Craig Topper [Fri, 9 Mar 2018 22:24:12 +0000 (22:24 +0000)]
[TargetLowering] Remove redundant term in two ifs in SimplifySetCC. NFC

If we get into the right hand side of the OR, we know that isOpaque is true since the left hand size is just a check that it's false.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327179 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[Debug] Retain both sets of debug intrinsics in HoistThenElseCodeToIf"
Ulrich Weigand [Fri, 9 Mar 2018 22:00:10 +0000 (22:00 +0000)]
Revert "[Debug] Retain both sets of debug intrinsics in HoistThenElseCodeToIf"

This reverts commit r327175 as problems in debug info generation were shown.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327176 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Debug] Retain both sets of debug intrinsics in HoistThenElseCodeToIf
Ulrich Weigand [Fri, 9 Mar 2018 21:37:07 +0000 (21:37 +0000)]
[Debug] Retain both sets of debug intrinsics in HoistThenElseCodeToIf

When hoisting common code from the "then" and "else" branches of a condition
to before the "if", there is no need to require that debug intrinsics match
before moving them (and merging them).  Instead, we can simply always keep
all debug intrinsics from both sides of the "if".

This fixes PR36410, which describes a problem where as a result of the attempt
to merge debug locations for two debug intrinsics we end up with an invalid
intrinsic, where the scope indicated in the !dbg location no longer matches
the scope of the variable tracked by the intrinsic.

In addition, this has the benefit that we no longer throw away information
that is actually still valid, helping to generate better debug data.

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D44312

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327175 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Power9] Code Cleaup and adding Comments for Power 9 Scheduler
Stefan Pintilie [Fri, 9 Mar 2018 21:08:35 +0000 (21:08 +0000)]
[Power9] Code Cleaup and adding Comments for Power 9 Scheduler

Did some code cleanup up removing ItinRW that are not needed and resource types
that are no longer used.

Also added more comments to the td files related to the Power 9 sheduler model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327174 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC] Consolidate six getPointerOperand() utility functions into one place
Renato Golin [Fri, 9 Mar 2018 21:05:58 +0000 (21:05 +0000)]
[NFC] Consolidate six getPointerOperand() utility functions into one place

There are six separate instances of getPointerOperand() utility.
LoopVectorize.cpp has one of them,
and I don't want to create a 7th one while I'm trying to move
LoopVectorizationLegality into a separate file
(eventual objective is to move it to Analysis tree).

See http://lists.llvm.org/pipermail/llvm-dev/2018-February/120999.html
for llvm-dev discussions

Closes D43323.

Patch by Hideki Saito <hideki.saito@intel.com>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327173 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCorrect load-op-store cycle detection analysis
Nirav Dave [Fri, 9 Mar 2018 20:58:07 +0000 (20:58 +0000)]
Correct load-op-store cycle detection analysis

Add missing cycle dependency checks in load-op-store fusion.

Fixes PR36274.

Reviewers: craig.topper, bogner

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D43154

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327172 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoImprove Dependency analysis when doing multi-node Instruction Selection
Nirav Dave [Fri, 9 Mar 2018 20:57:42 +0000 (20:57 +0000)]
Improve Dependency analysis when doing multi-node Instruction Selection

Relanding after fixing NodeId Invariant.

Cleanup cycle/validity checks in ISel (IsLegalToFold,
HandleMergeInputChains) and X86 (isFusableLoadOpStore). Now do a full
search for cycles / dependencies pruning the search when topological
property of NodeId allows.

As part of this propogate the NodeId-based cutoffs to narrow
hasPreprocessorHelper searches.

Reviewers: craig.topper, bogner

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D41293

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327171 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAG] Enforce stricter NodeId invariant during Instruction selection
Nirav Dave [Fri, 9 Mar 2018 20:57:15 +0000 (20:57 +0000)]
[DAG] Enforce stricter NodeId invariant during Instruction selection

Instruction Selection makes use of the topological ordering of nodes
by node id (a node's operands have smaller node id than it) when doing
cycle detection.  During selection we may violate this property as a
selection of multiple nodes may induce a use dependence (and thus a
node id restriction) between two unrelated nodes. If a selected node
has an unselected successor this may allow us to miss a cycle in
detection an invalid selection.

This patch fixes this by marking all unselected successors of a
selected node have negated node id.  We avoid pruning on such negative
ids but still can reconstruct the original id for pruning.

In-tree targets have been updated to replace DAG-level replacements
with ISel-level ones which enforce this property.

This preemptively fixes PR36312 before triggering commit r324359 relands

Reviewers: craig.topper, bogner, jyknight

Subscribers: arsenm, nhaehnle, javed.absar, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D43198

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327170 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMake early exit hasPredecessorHelper return true. NFCI.
Nirav Dave [Fri, 9 Mar 2018 20:56:51 +0000 (20:56 +0000)]
Make early exit hasPredecessorHelper return true. NFCI.

All uses conservatively assume in early exit case that it will be a
predecessor. Changing default removes checking code in all uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327169 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-objdump] Support disassembling by symbol name
Rafael Auler [Fri, 9 Mar 2018 19:13:44 +0000 (19:13 +0000)]
[llvm-objdump] Support disassembling by symbol name

Summary:
Add a new option -df to llvm-objdump that takes function names
as arguments and instructs the disassembler to only dump those function
contents. Based on code originally written by Bill Nell.

Reviewers: espindola, JDevlieghere

Differential Revision: https://reviews.llvm.org/D44224

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327164 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUse branch funnels for virtual calls when retpoline mitigation is enabled.
Peter Collingbourne [Fri, 9 Mar 2018 19:11:44 +0000 (19:11 +0000)]
Use branch funnels for virtual calls when retpoline mitigation is enabled.

The retpoline mitigation for variant 2 of CVE-2017-5715 inhibits the
branch predictor, and as a result it can lead to a measurable loss of
performance. We can reduce the performance impact of retpolined virtual
calls by replacing them with a special construct known as a branch
funnel, which is an instruction sequence that implements virtual calls
to a set of known targets using a binary tree of direct branches. This
allows the processor to speculately execute valid implementations of the
virtual function without allowing for speculative execution of of calls
to arbitrary addresses.

This patch extends the whole-program devirtualization pass to replace
certain virtual calls with calls to branch funnels, which are
represented using a new llvm.icall.jumptable intrinsic. It also extends
the LowerTypeTests pass to recognize the new intrinsic, generate code
for the branch funnels (x86_64 only for now) and lay out virtual tables
as required for each branch funnel.

The implementation supports full LTO as well as ThinLTO, and extends the
ThinLTO summary format used for whole-program devirtualization to
support branch funnels.

For more details see RFC:
http://lists.llvm.org/pipermail/llvm-dev/2018-January/120672.html

Differential Revision: https://reviews.llvm.org/D42453

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327163 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAvoid creating a Constant for each value in a ConstantDataSequential.
Alina Sbirlea [Fri, 9 Mar 2018 18:48:20 +0000 (18:48 +0000)]
Avoid creating a Constant for each value in a ConstantDataSequential.

Summary: We create a ConstantDataSequential (ConstantDataArray or ConstantDataVector) to avoid creating a Constant for each element in an array of constants. But them in AsmPrinter, we do create a ConstantFP for each element in the ConstantDataSequential. This triggers excessive memory use when generating large global FP constants.

Reviewers: bogner, lhames, t.p.northover

Subscribers: jlebar, sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D44277

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327161 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDelay creating an alias for @@@.
Rafael Espindola [Fri, 9 Mar 2018 18:42:25 +0000 (18:42 +0000)]
Delay creating an alias for @@@.

With this we only create an alias for @@@ once we know if it should
use @ or @@. This avoids last minutes renames and hacks to handle MS
names.

This only handles the ELF writer. LTO still has issues with @@@
aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327160 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX] createVariablePermute - fix v2i64/v2f64 VPERMILPD index creation.
Simon Pilgrim [Fri, 9 Mar 2018 18:37:56 +0000 (18:37 +0000)]
[X86][AVX] createVariablePermute - fix v2i64/v2f64 VPERMILPD index creation.

The input indices vector will put the index in bit0, but VPERMILPD actually selects off bit1 - so we need to scale accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327159 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTableGen: Remove space at EOL in TGLexer.{h,cpp}
Nicolai Haehnle [Fri, 9 Mar 2018 18:32:04 +0000 (18:32 +0000)]
TableGen: Remove space at EOL in TGLexer.{h,cpp}

Change-Id: Ica5f39470174e85f173d3b6db95789033f75ce17

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327158 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] createVariablePermute - move source vector canonicalization to top of...
Simon Pilgrim [Fri, 9 Mar 2018 18:08:08 +0000 (18:08 +0000)]
[X86][SSE] createVariablePermute - move source vector canonicalization to top of function. NFCI.

This is to make it easier to return early from the switch statement with custom lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327157 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LV] Adding test for r327109
Renato Golin [Fri, 9 Mar 2018 18:02:36 +0000 (18:02 +0000)]
[LV] Adding test for r327109

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327155 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address...
Farhana Aleen [Fri, 9 Mar 2018 17:41:39 +0000 (17:41 +0000)]
[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.

Summary: Starting from GCN 2nd generation, ISA supports ds_read_b128 on top of ds_read_b64.
         This patch supports ds_read_b128 instruction pattern and generation of this instruction.
         In the vectorizer, this patch also widen the vector length so that vectorizer generates
         128 bit loads for local address-space which gets translated to ds_read_b128.
         Since the performance benefit is not clear; compiler generates ds_read_b128 under -amdgpu-ds128.

Author: FarhanaAleen

Reviewed By: rampitec, arsenm

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D44210

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327153 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GISel]: Add helpers for easy building G_FCONSTANT along with matchers
Aditya Nandakumar [Fri, 9 Mar 2018 17:31:51 +0000 (17:31 +0000)]
[GISel]: Add helpers for easy building G_FCONSTANT along with matchers

Added helpers to build G_FCONSTANT, along with matching ConstantFP and
unit tests for the same.

Sample usage.

auto MIB = Builder.buildFConstant(s32, 0.5); // Build IEEESingle
For Matching the above

const ConstantFP* Tmp;
mi_match(DstReg, MRI, m_GFCst(Tmp));

https://reviews.llvm.org/D44128
reviewed by: volkan

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327152 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[JumpThreading] Don't restrict cast-traversal to i1
Chad Rosier [Fri, 9 Mar 2018 16:43:46 +0000 (16:43 +0000)]
[JumpThreading] Don't restrict cast-traversal to i1

In r263618, JumpThreading learned to look trough simple cast instructions, but
only if the source of those cast instructions was a phi/cmp i1 (in an effort to
limit compile time effects). I think this condition is too restrictive. For
switches with limited value range, InstCombine will readily introduce an extra
trunc instruction to a smaller integer type (e.g. from i8 to i2), leaving us in
the somewhat perverse situation that jump-threading would work before running
instcombine, but not after. Since instcombine produces this pattern, I think we
need to consider it canonical and support it in JumpThreading.  In general,
for limiting recursion, I think the existing restriction to phi and cmp nodes
should be sufficient to avoid looking through unprofitable chains of
instructions.

Patch by Keno Fischer!
Differential Revision: https://reviews.llvm.org/D42262

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327150 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMove generic test to the Generic directory
Adrian Prantl [Fri, 9 Mar 2018 16:42:05 +0000 (16:42 +0000)]
Move generic test to the Generic directory

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327148 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] fix test to be independent of FP undef
Sanjay Patel [Fri, 9 Mar 2018 16:33:34 +0000 (16:33 +0000)]
[AMDGPU] fix test to be independent of FP undef

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327147 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Disallow weak undefined globals in the object format
Nicholas Wilson [Fri, 9 Mar 2018 16:30:44 +0000 (16:30 +0000)]
[WebAssembly] Disallow weak undefined globals in the object format

This implements https://github.com/WebAssembly/tool-conventions/pull/47

Differential Revision: https://reviews.llvm.org/D44201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327146 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstSimplify] fix FP infinite hex constant values in tests; NFC
Sanjay Patel [Fri, 9 Mar 2018 16:14:02 +0000 (16:14 +0000)]
[InstSimplify] fix FP infinite hex constant values in tests; NFC

Really should improve this...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327144 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[PowerPC] LSR tunings for PowerPC"
Stefan Pintilie [Fri, 9 Mar 2018 16:08:55 +0000 (16:08 +0000)]
Revert "[PowerPC] LSR tunings for PowerPC"

Revert the rest of the LST tune commit.
It seems that the LSR tune commit breaks internal tests.
Reverting the commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327143 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[PowerPC] Move test to correct location."
Stefan Pintilie [Fri, 9 Mar 2018 16:08:48 +0000 (16:08 +0000)]
Revert "[PowerPC] Move test to correct location."

Revert part of the LSR tune commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327142 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTidyup comment that was destroyed by clang-format. NFCI.
Simon Pilgrim [Fri, 9 Mar 2018 15:50:09 +0000 (15:50 +0000)]
Tidyup comment that was destroyed by clang-format. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327141 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] createVariablePermute - move index vector canonicalization to top of funct...
Simon Pilgrim [Fri, 9 Mar 2018 15:48:56 +0000 (15:48 +0000)]
[X86][SSE] createVariablePermute - move index vector canonicalization to top of function. NFCI.

This is to make it easier to return early from the switch statement with custom lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327140 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTry to fix Windows bot by forcing "rm".
Tim Northover [Fri, 9 Mar 2018 15:44:59 +0000 (15:44 +0000)]
Try to fix Windows bot by forcing "rm".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327139 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LangRef] make it clear that FP instructions do not have side effects
Sanjay Patel [Fri, 9 Mar 2018 15:27:48 +0000 (15:27 +0000)]
[LangRef] make it clear that FP instructions do not have side effects

Also, fix the undef vs. UB example to use 'sdiv' because that can trigger div-by-zero UB.

The existing text for the constrained intrinsics says:
"By default, LLVM optimization passes assume that the rounding mode is round-to-nearest
and that floating point exceptions will not be monitored. Constrained FP intrinsics are
used to support non-default rounding modes and accurately preserve exception behavior
without compromising LLVM’s ability to optimize FP code when the default behavior is
used."
...so the additional text with the normal FP opcodes should make the different modes
clear.

Differential Revision: https://reviews.llvm.org/D44216

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327138 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[dsymutil] Unify error handling and add color
Jonas Devlieghere [Fri, 9 Mar 2018 15:22:42 +0000 (15:22 +0000)]
[dsymutil] Unify error handling and add color

We improved the handling of errors and warnings in dwarfdump's verifier
in rL314498. This patch does the same thing for dsymutil.

Differential revision: https://reviews.llvm.org/D44052

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327137 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCMake: Make libxml2 show up in --system-libs (PR36660)
Hans Wennborg [Fri, 9 Mar 2018 14:46:44 +0000 (14:46 +0000)]
CMake: Make libxml2 show up in --system-libs (PR36660)

lib/WindowsManifest/CMakeLists.txt adds it to LLVM_SYSTEM_LIBS on that
target, but it was never getting picked up in
tools/llvm-config/CMakeLists.txt.

Differential Revision: https://reviews.llvm.org/D44302

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327135 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86][aarch64] ask the backend whether it has a vector blend instruction
Sebastian Pop [Fri, 9 Mar 2018 14:29:21 +0000 (14:29 +0000)]
[x86][aarch64] ask the backend whether it has a vector blend instruction

The code to match and produce more x86 vector blends was enabled for all
architectures even though the transform may pessimize the code for other
architectures that do not provide a vector blend instruction.

Added an aarch64 testcase to check that a VZIP instruction is generated instead
of byte movs.

Differential Revision: https://reviews.llvm.org/D44118

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327132 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-mca] Move the logic that prints the summary into its own view. NFCI
Andrea Di Biagio [Fri, 9 Mar 2018 13:52:03 +0000 (13:52 +0000)]
[llvm-mca] Move the logic that prints the summary into its own view. NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327128 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-mca] Run clang-format on the source code. NFC
Andrea Di Biagio [Fri, 9 Mar 2018 12:50:42 +0000 (12:50 +0000)]
[llvm-mca] Run clang-format on the source code. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327125 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTableGen: Add a defset statement
Nicolai Haehnle [Fri, 9 Mar 2018 12:24:42 +0000 (12:24 +0000)]
TableGen: Add a defset statement

Allows capturing a list of concrete instantiated defs.

This can be combined with foreach to create parallel sets of def
instantiations with less repetition in the source. This purpose is
largely also served by multiclasses, but in some cases multiclasses
can't be used.

The motivating example for this change is having a large set of
intrinsics, which are generated from the IntrinsicsBackend.td file
included by Intrinsics.td, and a corresponding set of instruction
selection patterns, which are generated via the backend's .td files.

Multiclasses cannot be used to eliminate the redundancy in this case,
because a multiclass cannot span both LLVM's common .td files and
the backend .td files at the same time.

Change-Id: I879e35042dceea542a5e6776fad23c5e0e69e76b

Differential revision: https://reviews.llvm.org/D44109

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327121 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTableGen: Allow arbitrary list values as ranges of foreach
Nicolai Haehnle [Fri, 9 Mar 2018 12:24:30 +0000 (12:24 +0000)]
TableGen: Allow arbitrary list values as ranges of foreach

The changes to FieldInit are required to make field references (Def.field)
work inside a ForeachDeclaration: previously, Def.field wasn't resolved
immediately when Def was already a fully resolved DefInit.

Change-Id: I9875baec2fc5aac8c2b249e45b9cf18c65ae699b

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327120 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTableGen: Remove unused ParseForeachMode
Nicolai Haehnle [Fri, 9 Mar 2018 12:24:20 +0000 (12:24 +0000)]
TableGen: Remove unused ParseForeachMode

Use the default ParseValueMode instead of ParseForeachMode when
parsing the rule

  ForeachDeclaration ::= ID '=' '[' ValueList ']'

because the only difference between the two is how an open brace '{'
is handled at the end. In the context of foreach, the 'in' keyword
will appear after the ForeachDeclaration, so this special handling
of '{' is not required.

Change-Id: I4d86bb73bab9ec26752e1273e5213df77cf28d1d

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327119 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTableGen: More helpful error messages
Nicolai Haehnle [Fri, 9 Mar 2018 12:24:14 +0000 (12:24 +0000)]
TableGen: More helpful error messages

Change-Id: Ic78afd0cd765fdb4cf1b7ecfb6bba22653ce6d29

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327118 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTableGen: add !isa operation
Nicolai Haehnle [Fri, 9 Mar 2018 12:24:06 +0000 (12:24 +0000)]
TableGen: add !isa operation

Change-Id: Iddb724c3ae706d82933a2d82c91d07e0e36b30e3

Differential revision: https://reviews.llvm.org/D44105

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327117 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo/AccelTable] Fix inconsistency in getDIEOffset implementations
Pavel Labath [Fri, 9 Mar 2018 11:58:59 +0000 (11:58 +0000)]
[DebugInfo/AccelTable] Fix inconsistency in getDIEOffset implementations

Summary:
Even though the getDIEOffset offset function was common for the two
accelerator table implementations, it was doing two different things:
for the Apple tables, it was returning the die offset relative to the
start of the section, whereas for DWARF v5 tables, it was relative to
the start of the CU.

I resolve this by renaming the function to getDIESectionOffset to make
it obvious what the function returns, and change the DWARF
implementation to return the section offset. I also keep the CU-relative
accessor, but only in the DWARF implementation (there is no way to get
this information for the Apple tables). This was not caught by existing
tests because the hand-written inputs also erroneously used section
offsets instead of CU-relative ones.

While looking at this, I noticed that the Apple implementation was not
fully correct either -- the header contains a DIEOffsetBase field, which
should be added to offsets encoded with the DW_FORM_ref*** family, but
this was not being used. This went unnoticed because all current writers
set this field to zero anyway. I fix this as well and add a hand-written
test which demonstrates the issue.

Reviewers: JDevlieghere, dblaikie

Subscribers: aprantl, llvm-commits

Differential Revision: https://reviews.llvm.org/D44202

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327116 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LV] Fix vectorizer's isUniform() abuse triggers assert in SCEV
Renato Golin [Fri, 9 Mar 2018 10:31:31 +0000 (10:31 +0000)]
[LV] Fix vectorizer's isUniform() abuse triggers assert in SCEV

Fixes PR36311.

See more detailed analysis in
https://bugs.llvm.org/show_bug.cgi?id=36311.

isUniform() information is recomputed after LV started transforming the
underlying IR and that triggered an assert in SCEV.

From vectorizer's architectural perspective, such information, while
still useful in vector code gen, should not be recomputed after the
start of transforming the LLVM IR. Instead, we should collect and cache
such information during the analysis phase of LV and use the cached info
during code gen.

From the symptom perspective, this assert as it stands right now is not
very useful. Legality already rejected loops that would trigger the
assert. As such, commenting out the assert is NFC from vectorizer's
functionality perspective. On top of that, just above the assertion, we
check for unit-strided load/store or
gather scatter. Addresses can't be uniform below that check.

From vectorization theory point of view, we don't have to reject all
cases of stores to uniform addresses. Eventually, we should support
safe/profitable cases.

This patch resolves the issue by removing the useless assertion that is
invoking LAA's isUniform() that requires up-to-date DomTree ---- once
vector code gen starts modifying CFG, we don't have an up-to-date
DomTree.

Patch by Hideki Saito <hideki.saito@intel.com>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327109 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Support] Move syntax highlighting into support
Jonas Devlieghere [Fri, 9 Mar 2018 09:56:24 +0000 (09:56 +0000)]
[Support] Move syntax highlighting into support

Move the DWARF syntax highlighting into support. This has several
advantages, most notably that this makes the WithColor RAII wrapper
available outside libDebugInfo. Furthermore, several projects all have
their own code for handling colored output. This provides a place to
centralize it.

Differential revision: https://reviews.llvm.org/D44215

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327108 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Fix use of a regex in the win-alloca.ll test. NFC.
Martin Storsjo [Fri, 9 Mar 2018 09:45:37 +0000 (09:45 +0000)]
[AArch64] Fix use of a regex in the win-alloca.ll test. NFC.

Check that the variable actually is the same as the one previously
matched.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327107 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] Fixed V_DIV_FIXUP_F16 selection on GFX9
Stanislav Mekhanoshin [Fri, 9 Mar 2018 07:21:43 +0000 (07:21 +0000)]
[AMDGPU] Fixed V_DIV_FIXUP_F16 selection on GFX9

GFX9 should select opsel version.

Differential Revision: https://reviews.llvm.org/D44279

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327106 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove duplicate isel pattern. NFC
Craig Topper [Fri, 9 Mar 2018 05:42:44 +0000 (05:42 +0000)]
[X86] Remove duplicate isel pattern. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327104 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDon't treat .symver as a regular alias definition.
Rafael Espindola [Fri, 9 Mar 2018 03:13:37 +0000 (03:13 +0000)]
Don't treat .symver as a regular alias definition.

This patch starts simplifying the handling of .symver.

For now it just moves the responsibility for creating an alias down to
the streamer. With that the asm streamer can pass a .symver unchanged,
which is nice since gas cannot parse "foo@bar = zed".

In a followup I hope to move the handling down to the writer so that
we don't need special hacks for avoiding breaking names with @@@ on
windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327101 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAttempt to fix vecreduce-propagate-sd-flags.ll test.
Matt Morehouse [Fri, 9 Mar 2018 02:04:30 +0000 (02:04 +0000)]
Attempt to fix vecreduce-propagate-sd-flags.ll test.

Buildbots have been failing since r327079.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327100 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[ThinLTO] Keep available_externally symbols live"
Eric Christopher [Fri, 9 Mar 2018 01:25:18 +0000 (01:25 +0000)]
Revert "[ThinLTO] Keep available_externally symbols live"

This reverts commit r327041 and the followup attempts at fixing the testcase as they're still failing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327094 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove SRAs from v16i8 multiply lowering on sse2 targets
Craig Topper [Fri, 9 Mar 2018 01:22:31 +0000 (01:22 +0000)]
[X86] Remove SRAs from v16i8 multiply lowering on sse2 targets

Previously we unpacked the even bytes of each input into the high byte of 16-bit elements then did an v8i16 arithmetic shift right by 8 bits to fill the upper bits of each word with sign bits. Then we did the v8i16 multiply and then masked to zero the upper 8-bits of each result. The similar was done for all the odd bytes. The results are then packed together with packuswb

Since we are masking each multiply result element to 8-bits, and those 8-bits are determined only by the lower 8-bits of each of the inputs, we don't need to fill the upper bits with sign bits. So we can just unpack into the low byte of each element and treat the upper bits as garbage. This is what gcc also does.

Differential Revision: https://reviews.llvm.org/D44267

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327093 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoLowerDbgDeclare: ignore dbg.declares for allocas with volatile access
Adrian Prantl [Fri, 9 Mar 2018 00:45:04 +0000 (00:45 +0000)]
LowerDbgDeclare: ignore dbg.declares for allocas with volatile access

There is no point in lowering a dbg.declare describing an alloca that
has volatile loads or stores as users, since the alloca cannot be
elided. Lowering the dbg.declare will result in larger debug info that
may also have worse coverage than just describing the alloca.

rdar://problem/34496278

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327092 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix header comment on SHA1 code.
Eric Christopher [Fri, 9 Mar 2018 00:23:35 +0000 (00:23 +0000)]
Fix header comment on SHA1 code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327086 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[DWARF] Fix mixing assembler -g with DWARF .file directives."
Paul Robinson [Fri, 9 Mar 2018 00:11:54 +0000 (00:11 +0000)]
Revert "[DWARF] Fix mixing assembler -g with DWARF .file directives."

This reverts commit d6d9ac1ab5039ba1fe0f63c36eac2bdd9f0a79c9.
aka r327073

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327083 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoutils: add a helper class to lit for captured substitutions
Saleem Abdulrasool [Fri, 9 Mar 2018 00:06:10 +0000 (00:06 +0000)]
utils: add a helper class to lit for captured substitutions

On Windows, if the substitution contains a back reference, it would
removed due to the replacement of the escape character in lit. Create a
helper class to avoid this which will simply ignore the replacement and
mark the substitution as having capture groups being referenced.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327082 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoPropagate flags to SDValue in SplitVecOp_VECREDUCE
Sameer AbuAsal [Thu, 8 Mar 2018 23:41:40 +0000 (23:41 +0000)]
Propagate flags to SDValue in SplitVecOp_VECREDUCE

 This patch is a fix for PR36642.

 While legalizing long vector types, make sure the smaller types get the
 flags of the wider type.

link: https://bugs.llvm.org/show_bug.cgi?id=36642
Change-Id: I0c2829639f094c862c10a6b51b342d4c2563e1fa

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327079 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFor llvm-objdump and Mach-O files, update the printing of some thread states
Kevin Enderby [Thu, 8 Mar 2018 23:10:38 +0000 (23:10 +0000)]
For llvm-objdump and Mach-O files, update the printing of some thread states
from core files.  I tested this against the couple of core files that were
getting errors about unknown thread flavors and it now produce the same output as
the Xcode otool-classic(1) tool.  Since the core files are huge I didn’t include
them as test cases.

rdar://38216356

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327077 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DWARF] Fix mixing assembler -g with DWARF .file directives.
Paul Robinson [Thu, 8 Mar 2018 22:39:47 +0000 (22:39 +0000)]
[DWARF] Fix mixing assembler -g with DWARF .file directives.

We were effectively overriding an explicit '.file' directive with info
for the assembler source.  That shouldn't happen.

Fixes PR36636.

Differential Revision: https://reviews.llvm.org/D44265

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327073 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo] Add DW_AT_byte_size to vectors
Matt Davis [Thu, 8 Mar 2018 22:22:26 +0000 (22:22 +0000)]
[DebugInfo] Add DW_AT_byte_size to vectors

Summary:
This patch adds the DW_AT_byte_size dwarf attribute to vectors.
This fixes PR21924

LLVM will round a vector up to the next alignable address, which can result in
the vector's representation in the object file being larger than what the
debugger will calculate via NumberOfElements * ElementSize. In such a case calling sizeof(MyVec) in the source will result in a different value than what a debugger might present. This situation can occur because LLVM permits non-power of two 'vector_size' attributes.

Reviewers: echristo, dexonsmith, aprantl

Reviewed By: aprantl

Subscribers: probinson, aprantl, llvm-commits, JDevlieghere

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D44048

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327072 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Reassociate] fix test to be independent of FP undef
Sanjay Patel [Thu, 8 Mar 2018 22:05:27 +0000 (22:05 +0000)]
[Reassociate] fix test to be independent of FP undef

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327071 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Support] Pacify -Wsign-compare in unit test.
Benjamin Kramer [Thu, 8 Mar 2018 21:54:30 +0000 (21:54 +0000)]
[Support] Pacify -Wsign-compare in unit test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327070 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TargetLowering] Remove redundant if condition in SimplifySetcc. NFC
Craig Topper [Thu, 8 Mar 2018 21:53:36 +0000 (21:53 +0000)]
[TargetLowering] Remove redundant if condition in SimplifySetcc. NFC

We were checking the condition code a second time when we were already in a block with this same condition code check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327069 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo] Move RangeListEntries instead of copying.
Benjamin Kramer [Thu, 8 Mar 2018 21:31:10 +0000 (21:31 +0000)]
[DebugInfo] Move RangeListEntries instead of copying.

This is needed for correctness as RangeListEntry is not copy-assignable,
which std::vector might rely on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327067 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] fix test to survive more FP undef constant folding
Sanjay Patel [Thu, 8 Mar 2018 21:30:56 +0000 (21:30 +0000)]
[AMDGPU] fix test to survive more FP undef constant folding

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327066 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC] Factor out a helper function for checking if a block has a potential early...
Philip Reames [Thu, 8 Mar 2018 21:25:30 +0000 (21:25 +0000)]
[NFC] Factor out a helper function for checking if a block has a potential early implicit exit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327065 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix compilation failure with MSVC.
Zachary Turner [Thu, 8 Mar 2018 21:07:30 +0000 (21:07 +0000)]
Fix compilation failure with MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327063 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[asan] Fix a false positive ODR violation due to LTO ConstantMerge pass [llvm part...
Kuba Mracek [Thu, 8 Mar 2018 21:02:18 +0000 (21:02 +0000)]
[asan] Fix a false positive ODR violation due to LTO ConstantMerge pass [llvm part, take 3]

This fixes a false positive ODR violation that is reported by ASan when using LTO. In cases, where two constant globals have the same value, LTO will merge them, which breaks ASan's ODR detection.

Differential Revision: https://reviews.llvm.org/D43959

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327061 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix signed-unsigned comparison warning.
Zachary Turner [Thu, 8 Mar 2018 20:57:37 +0000 (20:57 +0000)]
Fix signed-unsigned comparison warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327060 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DWARF v5] Support for verbose dumping of .debug_rnglist entries
Wolfgang Pieb [Thu, 8 Mar 2018 20:52:35 +0000 (20:52 +0000)]
[DWARF v5] Support for verbose dumping of .debug_rnglist entries

Adding verbose dumping to the recent implementation of dumping of v5 range list entries.
We're capturing the entries as is as they come in during extraction, including their file offset,
so we can dump them in more detail.
The offset table entries which are table-relative are shown as is (as in non-verbose mode)
and with the actual file offset they map to.

Reviewers: dblaikie, aprantl, jdevlieghere, jhenderson

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43366

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327059 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ConstantFold] fp_binop undef, undef --> undef
Sanjay Patel [Thu, 8 Mar 2018 20:42:49 +0000 (20:42 +0000)]
[ConstantFold] fp_binop undef, undef --> undef

These are uncontroversial and independent of a proposed LangRef edits (D44216).

I tried to fix tests that would fold away:
rL327004
rL327028
rL327030
rL327034

I'm not sure if the Reassociate tests are meaningless yet, but they probably will be
as we add more folds, so if anyone has suggestions or wants to fix those, please do.

Differential Revision: https://reviews.llvm.org/D44258

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327058 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Support] Add WriteThroughMemoryBuffer.
Zachary Turner [Thu, 8 Mar 2018 20:34:47 +0000 (20:34 +0000)]
[Support] Add WriteThroughMemoryBuffer.

This is like MemoryBuffer (read-only) and WritableMemoryBuffer
(writable private), but where the underlying file can be modified
after writing.  This is useful when you want to open a file, make
some targeted edits, and then write it back out.

Differential Revision: https://reviews.llvm.org/D44230

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327057 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-mca] Fix handling of zero-latency instructions.
Andrea Di Biagio [Thu, 8 Mar 2018 20:21:55 +0000 (20:21 +0000)]
[llvm-mca] Fix handling of zero-latency instructions.

This patch fixes a problem found when testing zero latency instructions on
target AArch64 -mcpu=exynos-m3 / -mcpu=exynos-m1.

On Exynos-m3/m1, direct branches are zero-latency instructions that don't consume
any processor resources.  The DispatchUnit marks zero-latency instructions as
"executed", so that no scheduling is required.  The event of instruction
executed is then notified to all the listeners, and the reorder buffer (managed
by the RetireControlUnit) is updated. In particular, the entry associated to the
zero-latency instruction in the reorder buffer is marked as executed.

Before this patch, the DispatchUnit forgot to assign a retire control unit token
(RCUToken) to the zero-latency instruction. As a consequence, the RCUToken was
used uninitialized. This was causing a crash in the RetireControlUnit logic.

Fixes PR36650.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327056 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r327053.
Kuba Mracek [Thu, 8 Mar 2018 20:13:39 +0000 (20:13 +0000)]
Revert r327053.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327055 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX] Pull out variable permute creation from LowerBUILD_VECTORAsVariablePermute...
Simon Pilgrim [Thu, 8 Mar 2018 20:07:06 +0000 (20:07 +0000)]
[X86][AVX] Pull out variable permute creation from LowerBUILD_VECTORAsVariablePermute. NFCI.

This will make it easier to handle more complex cases than basic scaling or index masks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327054 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[asan] Fix a false positive ODR violation due to LTO ConstantMerge pass [llvm part...
Kuba Mracek [Thu, 8 Mar 2018 20:05:45 +0000 (20:05 +0000)]
[asan] Fix a false positive ODR violation due to LTO ConstantMerge pass [llvm part, take 2]

This fixes a false positive ODR violation that is reported by ASan when using LTO. In cases, where two constant globals have the same value, LTO will merge them, which breaks ASan's ODR detection.

Differential Revision: https://reviews.llvm.org/D43959

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327053 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSpecify that test from r327041 requires asserts
Vlad Tsyrklevich [Thu, 8 Mar 2018 19:46:19 +0000 (19:46 +0000)]
Specify that test from r327041 requires asserts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327051 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix detection of COFF executable files.
Zachary Turner [Thu, 8 Mar 2018 19:45:20 +0000 (19:45 +0000)]
Fix detection of COFF executable files.

One overload of this function would try to identify a file
by opening it and using the first 32 bytes to identify the magic
of the file.  This didn't work properly when more than 32 bytes
is actually needed for magic detection to succeed.  So now we
have this overload read in the entire file.

Differential Revision: https://reviews.llvm.org/D44225

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327050 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo] Add verifier for DICompositeType vector
Matt Davis [Thu, 8 Mar 2018 19:31:37 +0000 (19:31 +0000)]
[DebugInfo] Add verifier for DICompositeType vector

Summary:
This patch adds verification logic for DICompositeType vectors, ensuring that they only have one element, and that element is of type subrange.

This patch complements https://reviews.llvm.org/D44048

Reviewers: aprantl

Reviewed By: aprantl

Subscribers: JDevlieghere, llvm-commits

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D44262

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327048 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix test failure introduced in r327041
Vlad Tsyrklevich [Thu, 8 Mar 2018 19:20:08 +0000 (19:20 +0000)]
Fix test failure introduced in r327041

The "Assertion: `...' failed" error message format is not identical
across platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327047 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MemorySSA] Split PtrIntPair as this fails on win/arm.
Alina Sbirlea [Thu, 8 Mar 2018 19:15:00 +0000 (19:15 +0000)]
[MemorySSA] Split PtrIntPair as this fails on win/arm.

Summary: Split PtrIntPair into Instruction and OptionalAlias<Result>. The latter needs 3 bits, which appear unavailable on certain archs.

Subscribers: sanjoy, jlebar, Prazek, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D44268

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327046 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ThinLTO] Keep available_externally symbols live
Vlad Tsyrklevich [Thu, 8 Mar 2018 18:48:03 +0000 (18:48 +0000)]
[ThinLTO] Keep available_externally symbols live

Summary:
This change fixes PR36483. The bug was originally introduced by a change
that marked non-prevailing symbols dead. This broke LowerTypeTests
handling of available_externally functions, which are non-prevailing.
LowerTypeTests uses liveness information to avoid emitting thunks for
unused functions.

Marking available_externally functions dead is incorrect, the functions
are used though the function definitions are not. This change keeps them
live, and lets the EliminateAvailableExternally/GlobalDCE passes remove
them later instead.

I've also enabled EliminateAvailableExternally for all optimization
levels, I believe it being disabled for O1 was an oversight.

Reviewers: pcc, tejohnson

Reviewed By: tejohnson

Subscribers: grimar, mehdi_amini, inglorion, eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D43690

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327041 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] add min/max tests with not ops; NFC
Sanjay Patel [Thu, 8 Mar 2018 18:34:23 +0000 (18:34 +0000)]
[InstCombine] add min/max tests with not ops; NFC

These are based on:
https://bugs.llvm.org/show_bug.cgi?id=35875
It's not clear if/how instcombine can reduce these,
but we should have the tests here either way to
document current behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327039 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Ignore indexed loads when handling unaligned loads
Krzysztof Parzyszek [Thu, 8 Mar 2018 18:15:13 +0000 (18:15 +0000)]
[Hexagon] Ignore indexed loads when handling unaligned loads

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327037 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Tests] Remove empty test file that causes the test suite to fail
David Zarzycki [Thu, 8 Mar 2018 18:03:15 +0000 (18:03 +0000)]
[Tests] Remove empty test file that causes the test suite to fail

This empty file was "created" by r327033, which attempted to revert
r327029, which introduced the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327036 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoExpose must/may alias info in MemorySSA.
Alina Sbirlea [Thu, 8 Mar 2018 18:03:14 +0000 (18:03 +0000)]
Expose must/may alias info in MemorySSA.

Summary:
Building MemorySSA gathers alias information for Defs/Uses.
Store and expose this information when optimizing uses (when building MemorySSA),
and when optimizing defs or updating uses (getClobberingMemoryAccess).
Current patch does not propagate alias information through MemoryPhis.

Reviewers: gbiv, dberlin

Subscribers: Prazek, sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D38569

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327035 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] fix test to survive the most basic undef constant folding
Sanjay Patel [Thu, 8 Mar 2018 17:34:25 +0000 (17:34 +0000)]
[AMDGPU] fix test to survive the most basic undef constant folding

This will likely need to be changed again for anything more than:
fmul undef, undef -> undef

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327034 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r327029
Kuba Mracek [Thu, 8 Mar 2018 17:32:00 +0000 (17:32 +0000)]
Revert r327029

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327033 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86] fix test to be independent of FP undef
Sanjay Patel [Thu, 8 Mar 2018 17:24:30 +0000 (17:24 +0000)]
[x86] fix test to be independent of FP undef

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327030 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[asan] Fix a false positive ODR violation due to LTO ConstantMerge pass [llvm part]
Kuba Mracek [Thu, 8 Mar 2018 17:24:06 +0000 (17:24 +0000)]
[asan] Fix a false positive ODR violation due to LTO ConstantMerge pass [llvm part]

This fixes a false positive ODR violation that is reported by ASan when using LTO. In cases, where two constant globals have the same value, LTO will merge them, which breaks ASan's ODR detection.

Differential Revision: https://reviews.llvm.org/D43959

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327029 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[StructurizeCFG] fix test to be independent of FP undef
Sanjay Patel [Thu, 8 Mar 2018 17:13:57 +0000 (17:13 +0000)]
[StructurizeCFG] fix test to be independent of FP undef

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327028 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-mca] add override keyword to method ResourcePressureView::printView().
Andrea Di Biagio [Thu, 8 Mar 2018 17:02:28 +0000 (17:02 +0000)]
[llvm-mca] add override keyword to method ResourcePressureView::printView().
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327027 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86] regenerate checks; NFC
Sanjay Patel [Thu, 8 Mar 2018 16:56:49 +0000 (16:56 +0000)]
[x86] regenerate checks; NFC

This test will fail if we fix FP undef constant folding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327026 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-mca] HWEventListener is a class, not struct.
Andrea Di Biagio [Thu, 8 Mar 2018 16:34:19 +0000 (16:34 +0000)]
[llvm-mca] HWEventListener is a class, not struct.

This should appease the buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327025 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agomerge-request.sh: Update 6.0 metabug for 6.0.1
Tom Stellard [Thu, 8 Mar 2018 16:29:08 +0000 (16:29 +0000)]
merge-request.sh: Update 6.0 metabug for 6.0.1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327024 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[StructurizeCFG] auto-generate full checks; NFC
Sanjay Patel [Thu, 8 Mar 2018 16:25:37 +0000 (16:25 +0000)]
[StructurizeCFG] auto-generate full checks; NFC

Not sure what the intent of this test is, but this will change when we fix FP undef constant folding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327022 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Power9] Add more missing instructions to the Power 9 scheduler
Stefan Pintilie [Thu, 8 Mar 2018 16:24:33 +0000 (16:24 +0000)]
[Power9] Add more missing instructions to the Power 9 scheduler

With this patch we should be able to mark the Power 9 model as complete.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327021 91177308-0d34-0410-b5e6-96231b3b80d8