OSDN Git Service
Ian Rogers [Fri, 23 May 2014 18:18:07 +0000 (18:18 +0000)]
Merge "ART: API to dex instructions"
Ian Rogers [Fri, 23 May 2014 18:14:40 +0000 (18:14 +0000)]
Merge "Make the specification of when we need precise constants more precise."
Ian Rogers [Fri, 23 May 2014 18:03:11 +0000 (18:03 +0000)]
Merge "ART: Added print indices back to BitVector Dumper"
Ian Rogers [Fri, 23 May 2014 17:54:28 +0000 (17:54 +0000)]
Merge "x86_64: Fix 079-Phantom hang with QCG enabled"
Vladimir Marko [Fri, 23 May 2014 17:45:19 +0000 (17:45 +0000)]
Merge "Fix style issue."
Vladimir Marko [Fri, 23 May 2014 17:43:51 +0000 (18:43 +0100)]
Fix style issue.
Change-Id: I2044e01c68265c33e7fa6057efa7b6c7ac41ada4
Ian Rogers [Fri, 23 May 2014 17:43:43 +0000 (10:43 -0700)]
Make the specification of when we need precise constants more precise.
Means that oatdump output showing values for deoptimization actually reflects
what we see at runtime.
Also, doesn't do precise in the case of determining methods and fields for the
quickened case, which may be an occasional performance win.
Change-Id: I62c7fb244f7996ba9d52e7a7ce75c046b663fa17
Vladimir Marko [Fri, 23 May 2014 17:22:59 +0000 (17:22 +0000)]
Merge "Rewrite BitVector index iterator."
Jean Christophe Beyler [Thu, 22 May 2014 22:43:50 +0000 (15:43 -0700)]
ART: Added print indices back to BitVector Dumper
- Added an API to get the indices set instead of 001...0 format
Change-Id: I75841e41ca9b7ef77a0717715669dbe12506d6a1
Signed-Off-By: Jean Christophe Beyler <jean.christophe.beyler@intel.com>
Vladimir Marko [Fri, 23 May 2014 14:16:44 +0000 (15:16 +0100)]
Rewrite BitVector index iterator.
The BitVector::Iterator was not iterating over the bits but
rather over indexes of the set bits. Therefore, we rename it
to IndexIterator and provide a BitVector::Indexes() to get
a container-style interface with begin() and end() for range
based for loops.
Also, simplify InsertPhiNodes where the tmp_blocks isn't
needed since the phi_nodes and input_blocks cannot lose any
blocks in subsequent iterations, so we can do the Union()
directly in those bit vectors and we need to repeat the loop
only if we have new input_blocks, rather than on phi_nodes
change. And move the temporary bit vectors to scoped arena.
Change-Id: I6cb87a2f60724eeef67c6aaa34b36ed5acde6d43
Vladimir Marko [Fri, 23 May 2014 15:44:19 +0000 (15:44 +0000)]
Merge "Remove obsolete pass_driver.cc ."
Vladimir Marko [Fri, 23 May 2014 15:39:12 +0000 (16:39 +0100)]
Remove obsolete pass_driver.cc .
Obsoleted by https://android-review.googlesource.com/93433 .
Change-Id: I01865d17160fdc698f43c61fa4f5642d0f1391d9
Bill Buzbee [Fri, 23 May 2014 12:20:13 +0000 (12:20 +0000)]
Merge "x86_64: Disable optimizations on x86_64"
Bill Buzbee [Fri, 23 May 2014 12:19:59 +0000 (12:19 +0000)]
Merge "x86_64: Disable all intrinsics"
Vladimir Marko [Fri, 23 May 2014 10:50:39 +0000 (10:50 +0000)]
Merge "Fix InternTable::Lookup()/Remove() for hash code collisions."
Nicolas Geoffray [Fri, 23 May 2014 09:41:38 +0000 (09:41 +0000)]
Merge "Add virtual destructor to please one of our compilers."
Nicolas Geoffray [Fri, 23 May 2014 09:40:42 +0000 (10:40 +0100)]
Add virtual destructor to please one of our compilers.
Change-Id: I931d130caa75ab90b677e14f1a2d0c438c43ed4f
Calin Juravle [Fri, 23 May 2014 09:38:09 +0000 (09:38 +0000)]
Merge "Fix profile-backoff usage message"
Dmitry Petrochenko [Fri, 16 May 2014 06:24:40 +0000 (13:24 +0700)]
x86_64: Fix 079-Phantom hang with QCG enabled
The 079 test creates "sWatcher" thread. In case of unexpected failure
(e.g. Exception thrown) the sWatcher thread remains alive and it
blocks VM shutdown. We mark the sWarcher thread as daemon and
let VM to stop that thread during shutdown cause by unexpected error.
Change-Id: I0cb0b8bbeb15de47b72ddae1a32fcfea3ef8720e
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Dmitry Petrochenko [Thu, 8 May 2014 05:20:24 +0000 (12:20 +0700)]
x86_64: Disable all intrinsics
Intrinsics are subject to rework for x86_64 and disabled for now.
Change-Id: Ice67db083fe43dc4faa9276faf02234a4a24f207
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Dmitry Petrochenko [Fri, 16 May 2014 11:36:39 +0000 (18:36 +0700)]
x86_64: Disable optimizations on x86_64
This patch disables all QCG optimizations as ARM64 does.
Optimizations are subject to step-by-step enabling according
to test results.
Change-Id: Idd6e10f3b67e8c0f1f029bb26a0e9bf40061aeac
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Nicolas Geoffray [Fri, 23 May 2014 09:15:16 +0000 (09:15 +0000)]
Merge "Forgot these files from last commit."
Nicolas Geoffray [Fri, 23 May 2014 09:14:19 +0000 (10:14 +0100)]
Forgot these files from last commit.
Change-Id: I9ab7975daa5ed7aae6bff8730bb63fb48a798ea8
Nicolas Geoffray [Fri, 23 May 2014 09:03:36 +0000 (09:03 +0000)]
Merge "Import Dart's parallel move resolver."
Nicolas Geoffray [Thu, 22 May 2014 17:32:45 +0000 (18:32 +0100)]
Import Dart's parallel move resolver.
And write a few tests while at it.
A parallel move resolver will be needed for performing multiple moves
that are conceptually parallel, for example moves at a block
exit that branches to a block with phi nodes.
Change-Id: Ib95b247b4fc3f2c2fcab3b8c8d032abbd6104cd7
Sebastien Hertz [Fri, 23 May 2014 08:36:20 +0000 (08:36 +0000)]
Merge "Add a check for null thread before trying to suspend"
Bill Buzbee [Fri, 23 May 2014 05:27:41 +0000 (05:27 +0000)]
Merge "x86: For integer ALU operation handle v+=v case"
Serguei Katkov [Mon, 19 May 2014 08:45:42 +0000 (15:45 +0700)]
x86: For integer ALU operation handle v+=v case
When destination and operand are the same Virtual Register
we should ensure that destination RegLocation is updated after
operand is loaded with LoadValue in physical register.
Change-Id: I59da106471b0c494203af01c99583f51dbc0f9ee
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Bill Buzbee [Fri, 23 May 2014 02:56:02 +0000 (02:56 +0000)]
Merge "Create two CompilerTemp for a wide compiler temp"
Chao-ying Fu [Fri, 23 May 2014 00:25:02 +0000 (17:25 -0700)]
Create two CompilerTemp for a wide compiler temp
We create a new CompilerTemp for the high part of
a wide compiler temp to fix counting compiler temps.
Otherwise, assertion failures may happen inside
GetNumUsedCompilerTemps(), if there are any wide compiler temps.
Previously, we never ask for a wide compiler temp, such that
we don't hit the issue.
Change-Id: I9e79ad15e4192665b9d8a9dae5a5453496e48a79
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Brian Carlstrom [Thu, 22 May 2014 22:51:11 +0000 (22:51 +0000)]
Merge "Update dump-oat-* and oatdump for new image file layout"
Bill Buzbee [Thu, 22 May 2014 22:37:49 +0000 (22:37 +0000)]
Merge "AArch64: Enable LONG_* and INT_* opcodes."
Mathieu Chartier [Thu, 22 May 2014 22:07:37 +0000 (22:07 +0000)]
Merge "Revert "Fix an outstanding compaction bug in interpreter.""
Mathieu Chartier [Thu, 22 May 2014 22:06:51 +0000 (22:06 +0000)]
Revert "Fix an outstanding compaction bug in interpreter."
This reverts commit
e09ae0920be57760fb390b6944bce420fa0b5582.
Change-Id: I48036306130d5ccfec683d0dc3e9a642a02ee9c1
Mathieu Chartier [Thu, 22 May 2014 21:57:59 +0000 (21:57 +0000)]
Merge "Move SetMonitorEnterObject outside of blocked thread state change."
Mathieu Chartier [Thu, 22 May 2014 21:43:37 +0000 (14:43 -0700)]
Move SetMonitorEnterObject outside of blocked thread state change.
Race condition:
Thread is suspended in monitor kBlocked, GC decides to run the
checkpoint on it. The GC sees that the object is non null, and goes
to mark it, but then the thread does SetMonitorObject(nullptr).
Which causes a null object to be marked.
Change-Id: Ie8a5074112947ec07d01ccb813ca2c1bb9ac7066
Christopher Ferris [Thu, 22 May 2014 21:41:01 +0000 (21:41 +0000)]
Merge "Add support for jemalloc instead of dlmalloc."
Christopher Ferris [Tue, 13 May 2014 21:47:50 +0000 (14:47 -0700)]
Add support for jemalloc instead of dlmalloc.
Bug: 981363
Change-Id: I226ce3249c0d982eb1a9fdb9d04b25737f77345d
Bill Buzbee [Thu, 22 May 2014 20:15:39 +0000 (20:15 +0000)]
Merge "ART: Topological Sort Traversal Implementation"
Brian Carlstrom [Thu, 22 May 2014 18:54:18 +0000 (11:54 -0700)]
Update dump-oat-* and oatdump for new image file layout
Bug:
11997009
Change-Id: I30c356f3ea62b1850d17b5c6bf4af4080a466858
Johnnie Birch [Thu, 15 May 2014 18:31:14 +0000 (11:31 -0700)]
Add a check for null thread before trying to suspend
The patch fixes a jpda test failure due to a failed
assertion in SuspendThreadByThreadId. There should be
a check for a null thread before the assertion check.
This was the behavior of previous code (4.4.2) where
this test passes, but this check was removed during
some refactoring of the code.
Change-Id: Ia63de5f159ce1e51110bf9dc604011d07b2f048e
Signed-off-by: Johnnie Birch <johnnie.l.birch.jr@intel.com>
Jean Christophe Beyler [Tue, 6 May 2014 04:09:40 +0000 (21:09 -0700)]
ART: API to dex instructions
- Added the GetConstant function call in DecodedInstruction.
- Added a few rewriter helper functions for later higher level rewriting.
- Added Setter/Getter data and query functions.
- Added Clobber memory/Const/Call/Cast data and query functions.
- Added expression information (add, multiply, ...).
- Added a IsLinear function for additions and subtractions.
- Added an empty constructor for the DecodedInstruction:
- Useful for the creation of a MIR constructor too.
- Added the IsConditionalBranch utility function.
Signed-off-by: Jean Christophe Beyler <jean.christophe.beyler@intel.com>
Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com>
Signed-off-by: Yixin Shou <yixin.shou@intel.com>
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Signed-off-by: Udayan Banerji <udayan.banerji@intel.com>
Change-Id: Ie21f2a7779b38c1b383334f04126c2d792cae462
Jean Christophe Beyler [Tue, 29 Apr 2014 21:40:41 +0000 (14:40 -0700)]
ART: Topological Sort Traversal Implementation
- Added a topological sort implementation for traversal.
- Useful for traversals that require traversing the predecessors first.
- Added a function to BasicBlock to detect if it is an exception block.
Change-Id: I573da1768a635c6fd0259573dbb46b112132e129
Signed-off-by: Jean Christophe Beyler <jean.christophe.beyler@intel.com>
Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com>
Signed-off-by: Yixin Shou <yixin.shou@intel.com>
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Signed-off-by: Udayan Banerji <udayan.banerji@intel.com>
Mathieu Chartier [Thu, 22 May 2014 17:57:52 +0000 (17:57 +0000)]
Merge "Fix an outstanding compaction bug in interpreter."
Ian Rogers [Thu, 22 May 2014 17:50:20 +0000 (17:50 +0000)]
Merge "Move modify_ldt_lock into global lock order."
Mathieu Chartier [Thu, 15 May 2014 19:39:19 +0000 (12:39 -0700)]
Fix an outstanding compaction bug in interpreter.
Fixed a bug in DoFieldPut where the FieldHelper GetType could cause
thread suspension which would result in a stale obj.
Added more handles in the class linker to facilitate moving fiels
and methods in the future.
Removed un-necessarly passing handle references since these are value
types and don't need to be passed by reference.
Added a special NullHandle type which allows null handles without a
handle scope.
Change-Id: I1b51723920a2e4f4f8b2907066f578a3e879fd5b
Dan Albert [Thu, 22 May 2014 17:39:44 +0000 (17:39 +0000)]
Merge "Fixes style nitpick"
Hiroshi Yamauchi [Thu, 22 May 2014 17:34:44 +0000 (17:34 +0000)]
Merge "Add a read barrier for weak roots in monitors."
Dan Albert [Thu, 22 May 2014 17:27:29 +0000 (10:27 -0700)]
Fixes style nitpick
Change-Id: Ic3a7119ce7ca9bfae0dbf7af4d285f44d3a72a3e
Chao-ying Fu [Wed, 21 May 2014 18:20:52 +0000 (11:20 -0700)]
Move modify_ldt_lock into global lock order.
Mutex modify_ldt_lock was being removed during runtime shutdown while
daemons thread may still detach. Avoid this by placing in global lock
order.
This fixes cts dalvik vm-tests-tf that hang on some x86 devices.
By irogers: also, tidy global locks to agree with enum constants and
add extra verification that the global annotalysis order agrees with
the LockLevel order. Bumped the oat version and moved the locks as
LockLevel additions previously caused entrypoints to be moved. Make
unattached lock not handle the default mutex level case by moving the
allocated thread ids lock into the global order.
Change-Id: I9d03f19d44ea254accf0ceae8022563c77f7a02f
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Dan Albert [Thu, 22 May 2014 17:22:00 +0000 (17:22 +0000)]
Merge "Move art host to libc++"
Serban Constantinescu [Thu, 22 May 2014 14:10:18 +0000 (15:10 +0100)]
AArch64: Enable LONG_* and INT_* opcodes.
This patch fixes some of the issues with LONG and INT opcodes. The patch
has been tested and passes all the dalvik tests except for 018 and 107.
Change-Id: Idd1923ed935ee8236ab0c7e5fa969eaefeea8708
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Sebastien Hertz [Thu, 22 May 2014 14:47:06 +0000 (14:47 +0000)]
Merge "Support new VMRuntime native methods"
Bill Buzbee [Thu, 22 May 2014 13:44:31 +0000 (13:44 +0000)]
Merge "ART: Pass driver generalization"
James C Scott [Thu, 1 May 2014 12:52:04 +0000 (05:52 -0700)]
ART: Pass driver generalization
- Generalizing Pass Driver.
- Migrating ME Pass Driver to use the new generalized Pass Driver.
There will be some more changes after in the compiler code to generalize
it a bit more by separating what is being done by the optimizing passes
and post-pass cleanups.
Change-Id: I140a70e88483d7c3991b7d336bd593b2613ae194
Signed-off-by: James C Scott <james.c.scott@intel.com>
Bill Buzbee [Thu, 22 May 2014 13:11:27 +0000 (13:11 +0000)]
Merge "ART: MIR, SSARepresentation, and BasicBlock Additional API"
Jean Christophe Beyler [Thu, 17 Apr 2014 19:47:24 +0000 (12:47 -0700)]
ART: MIR, SSARepresentation, and BasicBlock Additional API
Adding the API calls to the MIR structure to help with higher level code.
Some code has been added to BasicBlock as well for the removal.
Some code has also been added to SSARepresentation.
A constructor has been added to DecodedInstruction.
Change-Id: Ie65948d53d83fd8250545c94c88b442a68d702c7
Signed-off-by: Jean Christophe Beyler <jean.christophe.beyler@intel.com>
Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com>
Signed-off-by: Yixin Shou <yixin.shou@intel.com>
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Signed-off-by: Udayan Banerji <udayan.banerji@intel.com>
buzbee [Thu, 22 May 2014 12:32:10 +0000 (12:32 +0000)]
Merge "Quick compiler: free up space in MIR."
Vladimir Marko [Thu, 22 May 2014 11:16:44 +0000 (12:16 +0100)]
Fix InternTable::Lookup()/Remove() for hash code collisions.
When we have a hash code collision but the string is not yet
in the intern table, the old Lookup() would iterate until
the end of the table, i.e. it was up to linear in the size
of the table rather than linear in the number of colliding
hash codes.
And though the multimap::find() is implemented in terms of
lower_bound() in the standard library we're using, this
requirement doesn't seem to be in the C++ standard. It was
therefore wrong to assume that we will iterate across all
hits when starting from the iterator returned by find().
Change-Id: Ie24aaea6e55750a7aafbed24b136878c5dba66eb
Calin Juravle [Thu, 22 May 2014 11:13:54 +0000 (12:13 +0100)]
Fix profile-backoff usage message
Change-Id: Icccd7bbc0c7b6a088a00dfc7f8c52991ec87f544
Vladimir Marko [Thu, 22 May 2014 09:14:18 +0000 (09:14 +0000)]
Merge "Method inlining across dex files in boot image."
Sebastien Hertz [Fri, 16 May 2014 14:56:45 +0000 (16:56 +0200)]
Support new VMRuntime native methods
Implements vmInstructionSet, is64Bit and isCheckJniEnabled methods.
Bug:
14888999
Bug:
14888124
Change-Id: I8a2d3f22f84a093be2fbc74464af6aa7b2a2bebb
Vladimir Marko [Wed, 21 May 2014 11:08:39 +0000 (12:08 +0100)]
Method inlining across dex files in boot image.
Fix LoadCodeAddress() and LoadMethodAddress() to use the dex
file in addition to the method index to uniquely identify
the literal. With that fix in place, when we have both the
direct code and the direct method, we can safely pass the
actual target method id instead of the method id from the
same dex file in the method lowering info. This was already
done for calls from apps into boot image (and thus there was
a bug with a tiny risk of the wrong literal being used) and
now we also do that for calls within the boot image. The
latter allows the inlining pass to inline many more methods
than before in the boot image.
Bug:
15021903
Change-Id: Ic765ce9809b43ef07e7db32b8e3fbc9acb09147f
Sebastien Hertz [Thu, 22 May 2014 06:52:00 +0000 (06:52 +0000)]
Merge "Secure move-exception in intepreter"
Hiroshi Yamauchi [Thu, 22 May 2014 04:10:23 +0000 (21:10 -0700)]
Add a read barrier for weak roots in monitors.
A weak root requires a read barrier for the to-space invariant to hold
because the object pointed to by a weak root can't be marked/forwarded
like the one pointed to by a strong root (GC does not know if it's
alive or not at that point) and because, without a read barrier, a
mutator could access it and obtain a from-space reference, which would
violate the to-space invariant.
TODO: do similar for the other types of weak roots.
Bug:
12687968
Change-Id: I563a0fa4f875e0c21ac96f57696959454e13b15a
Dan Albert [Thu, 22 May 2014 03:50:35 +0000 (03:50 +0000)]
Merge "Use decltype() instead of typeof()"
Brian Carlstrom [Thu, 22 May 2014 03:49:21 +0000 (03:49 +0000)]
Merge "Change profiler file name parsing option"
Dan Albert [Thu, 22 May 2014 03:31:55 +0000 (20:31 -0700)]
Use decltype() instead of typeof()
This fixes a build failure on Mac.
Change-Id: Iee73ba990d2494fd925fd237da68cf753709a248
Dan Albert [Wed, 21 May 2014 21:55:02 +0000 (14:55 -0700)]
Move art host to libc++
Change-Id: Ia51a4fdfdbae7377130a43c401c2d8d241671d1e
Wei Jin [Thu, 22 May 2014 01:35:19 +0000 (18:35 -0700)]
Change profiler file name parsing option
This patch renames the option for profile output file name to -Xprofile-filename: to avoid conflicts.
Change-Id: I5ba1cf10a7763f083028b8262f9ce2421400c4f3
Signed-off-by: Wei Jin <wejin@google.com>
Mathieu Chartier [Thu, 22 May 2014 00:53:32 +0000 (00:53 +0000)]
Merge "Fix build."
Mathieu Chartier [Thu, 22 May 2014 00:48:25 +0000 (17:48 -0700)]
Fix build.
Old Atomic things were rebased over.
Change-Id: I437041af3247c316f2a75f5ef4bd35286fc8e2b1
Ian Rogers [Wed, 21 May 2014 23:19:19 +0000 (23:19 +0000)]
Merge "Begin migration of art::Atomic to std::atomic."
buzbee [Wed, 21 May 2014 21:53:51 +0000 (14:53 -0700)]
Quick compiler: free up space in MIR.
The width field in MIR isn't especially useful - it could always
be recalculated from the Dalvik instruction. This CL eliminates
it to allow the 16 bits it occupied to be used for the ID of the
parent BasicBlock.
Change-Id: I75ab8562ca217f0f819ecfc417014dee74bc587e
Andreas Gampe [Wed, 21 May 2014 22:20:22 +0000 (22:20 +0000)]
Merge "ART: Fix stub test inline assembly for x86"
Brian Carlstrom [Wed, 21 May 2014 22:11:02 +0000 (22:11 +0000)]
Merge "Fix test-art-target-oat for multi target"
Sebastien Hertz [Wed, 21 May 2014 14:06:49 +0000 (16:06 +0200)]
Fix test-art-target-oat for multi target
Avoids running dalvikvm with 32-bit native library. When the primary target is
64-bit, dalvikvm is a symlink to dalvikvm64 which can't load 32-bit native
library.
Bug:
15131102
Change-Id: I29c2f3b5a62b5f507674f3f6d1b9f3f2e5a9de23
Andreas Gampe [Wed, 21 May 2014 21:39:45 +0000 (14:39 -0700)]
ART: Fix stub test inline assembly for x86
Clang can handle the register pressure, but GCC can't. Make one
a memory constraint.
Change-Id: I49f048b29f5677449bf6ee6282516462332ee645
Andreas Gampe [Wed, 21 May 2014 21:20:18 +0000 (21:20 +0000)]
Merge "ART: Make StubTest IMT sanity check a warning"
Ian Rogers [Wed, 21 May 2014 21:18:13 +0000 (21:18 +0000)]
Merge "Work around Mac assembler differences."
Andreas Gampe [Wed, 21 May 2014 21:16:28 +0000 (21:16 +0000)]
Merge "ART: Fix libjavacore dependency"
Andreas Gampe [Wed, 21 May 2014 21:12:18 +0000 (14:12 -0700)]
ART: Make StubTest IMT sanity check a warning
It seems we can't rely on the specific test against a framework
class. Make the sanity check a warning right now, and fix this up
later.
Change-Id: I673edf33cb4a61e20a4ec806b311deebce86e4de
Andreas Gampe [Wed, 21 May 2014 18:14:35 +0000 (18:14 +0000)]
Merge "ART: Add INVOKE_TRAMPOLINE and imt_conflict stub to 64b architectures"
Andreas Gampe [Wed, 21 May 2014 15:28:48 +0000 (08:28 -0700)]
ART: Add INVOKE_TRAMPOLINE and imt_conflict stub to 64b architectures
"Generalize" the return type notion of the interface helpers.
Includes a simple test for imt_conflict. The other interface
trampolines are as of yet untested.
Change-Id: I30fc75f5103766d57628ff22bcbac7c7f81037e3
Andreas Gampe [Wed, 21 May 2014 18:02:08 +0000 (11:02 -0700)]
ART: Fix libjavacore dependency
Add a dependency for libjavacore for the secondary architecture.
Change-Id: I30f07c200e1cbb7d50b026fa6b21d09ab9aadd66
Mathieu Chartier [Wed, 21 May 2014 18:00:06 +0000 (18:00 +0000)]
Merge "Change zygote_creation_lock_ to be member instead of static."
Mathieu Chartier [Wed, 21 May 2014 17:44:32 +0000 (10:44 -0700)]
Change zygote_creation_lock_ to be member instead of static.
Static variables aren't thread safe and could cause the zygote to be
created twice.
Bug:
15133494
Change-Id: I65c8f089bed8de93f895b62b3dcff4c936931860
buzbee [Wed, 21 May 2014 15:08:33 +0000 (15:08 +0000)]
Merge "64-bit temp register support."
buzbee [Tue, 13 May 2014 22:59:07 +0000 (15:59 -0700)]
64-bit temp register support.
Add a 64-bit temp register allocation path. The recent physical
register handling rework supports multiple views of the same
physical register (or, such as for Arm's float/double regs,
different parts of the same physical register).
This CL adds a 64-bit core register view for 64-bit targets. In
short, each core register will have a 64-bit name, and a 32-bit
name. The different views will be kept in separate register pools,
but aliasing will be tracked. The core temp register allocation
routines will be largely identical - except for 32-bit targets,
which will continue to use pairs of 32-bit core registers for holding
long values.
Change-Id: I8f118e845eac7903ad8b6dcec1952f185023c053
Sebastien Hertz [Wed, 21 May 2014 08:07:42 +0000 (10:07 +0200)]
Secure move-exception in intepreter
Copies exception into the shadow frame before clearing it from its thread so
it's always reachable.
Change-Id: Ifdc68280424f5099aacf0724da94889881a99551
Ian Rogers [Wed, 21 May 2014 06:52:19 +0000 (23:52 -0700)]
Work around Mac assembler differences.
Change-Id: Iba46c1794044e92f5a25bf7f836e0d919ed1f38c
Ian Rogers [Tue, 20 May 2014 23:40:37 +0000 (16:40 -0700)]
Begin migration of art::Atomic to std::atomic.
Change-Id: I4858d9cbed95e5ca560956b9dabd976cebe68333
Hiroshi Yamauchi [Wed, 21 May 2014 01:08:10 +0000 (01:08 +0000)]
Merge "Simplify Class::IsArtFieldClass()."
Hiroshi Yamauchi [Tue, 20 May 2014 20:46:00 +0000 (13:46 -0700)]
Simplify Class::IsArtFieldClass().
Fix the slight glitch that when ImageSpace::VerifyImageAllocations()
called in ImageSpace::Create(), the ArtField and ArtMethod class roots
weren't set, which were used by DCHECKs in Object::Size(), which
VerifyImageAllocations() calls, by delaying the point of the
VerifyImageAllocations() call to Runtime::Init() at which point the
class linker has set the class roots.
To completely disable read barriers from Object::SizeOf(), the
ReadBarrierOption template parameter should have been added to
Class::GetInstanceField(), which calls GetFieldObject(), when it's
called from Class::IsArtFieldClass(). This change fixes this by
removing the need for the call, instead of adding the
ReadBarrierOption parameter.
Bug:
12687968
Change-Id: Ibbecc08f4e3b898851805d690dff8ccac55e94f2
Brian Carlstrom [Wed, 21 May 2014 00:32:45 +0000 (00:32 +0000)]
Merge "Move another LOG to VLOG(signals)"
Brian Carlstrom [Wed, 21 May 2014 00:16:23 +0000 (00:16 +0000)]
Merge "Add context to LinkFields asserts since the previous_size check failed"
Brian Carlstrom [Tue, 20 May 2014 22:36:53 +0000 (15:36 -0700)]
Add context to LinkFields asserts since the previous_size check failed
Change-Id: If7a6c4219f52fd772141e6f070bb7d9a1d9464c0
Dave Allison [Tue, 20 May 2014 23:03:34 +0000 (23:03 +0000)]
Merge "Use strtod to read a double rather than operator >>"
Mathieu Chartier [Tue, 20 May 2014 22:40:41 +0000 (22:40 +0000)]
Merge "Add DALVIKVM_FLAGS to test invocation."
Mathieu Chartier [Sun, 18 May 2014 22:30:10 +0000 (15:30 -0700)]
Add DALVIKVM_FLAGS to test invocation.
Now, only gtest don't use these flags.
Running tests with GC options e.g:
DALVIK_VM="-Xgc:GSS" mm test-art-host-oat
Added a --runtime-option to test/run-test which passes the args to
the test:
test/run-test --runtime-option -Xgc:GSS --runtime-option -XX:UseTLAB 080
Change-Id: Ic928df32cb5aa36d3b0b55456e8b535e82ee9e97