OSDN Git Service
Rui Ueyama [Thu, 11 Aug 2016 22:02:44 +0000 (22:02 +0000)]
Re-commit r278066: Do not ignore SizeOfOptionalHeader in COFF header even if PE header is not present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278429
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Tim Northover [Thu, 11 Aug 2016 21:40:55 +0000 (21:40 +0000)]
GlobalISel: support 'null' constant in translation.
It's sharing the integer G_CONSTANT for now since I don't *think* it creates
any ambiguity (even on weird archs). If that turns out wrong we can create a
G_PTRCONSTANT or something.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278423
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Ehsan Amiri [Thu, 11 Aug 2016 21:31:40 +0000 (21:31 +0000)]
Extend trip count instead of truncating IV in LFTR, when legal
When legal, extending trip count in the loop control logic generates better code compared to truncating IV. This is because
(1) extending trip count is a loop invariant operation (see genLoopLimit where we prove trip count is loop invariant).
(2) Scalar Evolution seems to have problems understanding trunc when computing loop trip count. So removing them allows better analysis performed in Scalar Evolution. (In particular this fixes PR 28363 which is the motivation for this change).
I am not going to perform any performance test. Any degradation caused by this should be an indication of a bug elsewhere.
To prove legality, we rely on SCEV to prove zext(trunc(IV)) == IV (or similarly for sext). If this holds, we can prove equivalence of trunc(IV)==ExitCnt (1) and IV == zext(ExitCnt). Simply take zext of boths sides of (1) and apply the proven equivalence.
This commit contains changes in a newly added testcase which was not included in the previous commit (which was reverted later on).
https://reviews.llvm.org/D23075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278421
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Daniel Berlin [Thu, 11 Aug 2016 21:26:50 +0000 (21:26 +0000)]
[MSSA] Use is_contained
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278418
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David Majnemer [Thu, 11 Aug 2016 21:15:00 +0000 (21:15 +0000)]
Use range algorithms instead of unpacking begin/end
No functionality change is intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278417
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Krzysztof Parzyszek [Thu, 11 Aug 2016 21:14:25 +0000 (21:14 +0000)]
[Hexagon] Allow non-returning calls in hardware loops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278416
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David Majnemer [Thu, 11 Aug 2016 21:14:05 +0000 (21:14 +0000)]
[vim] Add more attributes to llvm.vim
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278415
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Matt Arsenault [Thu, 11 Aug 2016 21:08:43 +0000 (21:08 +0000)]
AMDGPU: Remove unused tablegen utilities
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278414
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Geoff Berry [Thu, 11 Aug 2016 21:05:17 +0000 (21:05 +0000)]
[SCEV] Update interface to handle SCEVExpander insert point motion.
Summary:
This is an extension of the fix in r271424. That fix dealt with builder
insert points being moved by SCEV expansion, but only for the lifetime
of the expand call. This change modifies the interface so that LSR can
safely call expand multiple times at the same insert point and do the
right thing if one of the expansions decides to move the original insert
point.
This is a fix for PR28719.
Reviewers: sanjoy
Subscribers: llvm-commits, mcrosier, mzolotukhin
Differential Revision: https://reviews.llvm.org/D23342
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278413
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Tim Northover [Thu, 11 Aug 2016 21:01:15 +0000 (21:01 +0000)]
Remove empty file left by partial reversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278411
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Tim Northover [Thu, 11 Aug 2016 21:01:13 +0000 (21:01 +0000)]
GlobalISel: add translation support for shift operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278410
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Tim Northover [Thu, 11 Aug 2016 21:01:10 +0000 (21:01 +0000)]
GlobalISel: support zext & sext during translation phase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278409
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Teresa Johnson [Thu, 11 Aug 2016 20:38:39 +0000 (20:38 +0000)]
Fix type truncation warnings
Avoid type truncation warnings from a 32-bit bot due to size_t not
being unsigned long long, by converting the variables and constants to
unsigned. This was introduced by r278338 and caused warnings here:
http://bb.pgr.jp/builders/i686-mingw32-RA-on-linux/builds/15527/steps/build_llvmclang/logs/warnings%20%287%29
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278406
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Daniel Berlin [Thu, 11 Aug 2016 20:35:07 +0000 (20:35 +0000)]
Move GVNHoist tests into their own directory since it is a separate pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278404
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Wei Ding [Thu, 11 Aug 2016 20:34:48 +0000 (20:34 +0000)]
AMDGPU : Add intrinsic for instruction v_cvt_pk_u8_f32
Differential Revision: http://reviews.llvm.org/D23336
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278403
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Wei Mi [Thu, 11 Aug 2016 20:33:37 +0000 (20:33 +0000)]
Revert rL278384 which caused several buildbot failures (like check failures in CodeGen/X86/clz.ll).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278402
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Daniel Berlin [Thu, 11 Aug 2016 20:32:43 +0000 (20:32 +0000)]
Fix PR 28933
Summary:
This fixes PR 28933 by making sure GVNHoist does not try to recreate memory
accesses when it has not actually moved them.
Reviewers: sebpop
Subscribers: llvm-commits, george.burgess.iv
Differential Revision: https://reviews.llvm.org/D23411
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278401
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Tim Shen [Thu, 11 Aug 2016 20:10:15 +0000 (20:10 +0000)]
[ADT] Add relation operators for Optional
Summary: Make Optional's behavior the same as the coming std::optional.
Reviewers: dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D23178
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278397
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Duncan P. N. Exon Smith [Thu, 11 Aug 2016 20:03:09 +0000 (20:03 +0000)]
CodeGen: Avoid dereferencing end() in MachineScheduler
Check MachineInstr::isDebugValue for the same instruction as we're
calling isSchedBoundary, avoiding the possibility of dereferencing
end().
This is a functionality change even when I!=end(). Matthias had a look
and agrees this is the right resolution (as opposed to checking for
end()).
This is triggered by a huge number of tests, but they happen to
magically pass right now. I found this because WIP patches for PR26753
convert them into crashes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278394
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Matt Arsenault [Thu, 11 Aug 2016 19:18:50 +0000 (19:18 +0000)]
AMDGPU: Prune includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278391
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Krzysztof Parzyszek [Thu, 11 Aug 2016 19:12:18 +0000 (19:12 +0000)]
[Hexagon] Standardize "select" pseudo-instructions
- PS_pselect: general register pairs
- PS_vselect: vector registers (+ 128B version)
- PS_wselect: vector register pairs (+ 128B version)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278390
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Ivan Krasin [Thu, 11 Aug 2016 19:09:02 +0000 (19:09 +0000)]
WholeProgramDevirt: generate more detailed and accurate remarks.
Summary:
Keep track of all methods for which we have devirtualized at least
one call and then print them sorted alphabetically. That allows to
avoid duplicates and also makes the order deterministic.
Add optimization names into the remarks, so that it's easier to
understand how has each method been devirtualized.
Fix a bug when wrong methods could have been reported for
tryVirtualConstProp.
Reviewers: kcc, mehdi_amini
Differential Revision: https://reviews.llvm.org/D23297
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278389
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Wei Mi [Thu, 11 Aug 2016 18:42:56 +0000 (18:42 +0000)]
Remove the restriction that MachineSinking is now stopped by "insert_subreg,
subreg_to_reg, and reg_sequence" instructions.
This is to solve PR28852. The restriction was added at 2010 to make better register
coalescing. We assumed that it was not necessary any more. Testing results on x86
supported the assumption.
We will look closely to any performance impact it will bring and will be prepared
to help analyzing performance problem found on other architectures.
Differential Revision: https://reviews.llvm.org/D23210
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278384
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Krzysztof Parzyszek [Thu, 11 Aug 2016 18:42:06 +0000 (18:42 +0000)]
If-conversion incorrectly calculates liveness of redefined registers
Differential Revision: https://reviews.llvm.org/D23207
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278383
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Barnabas Bittner [Thu, 11 Aug 2016 18:34:29 +0000 (18:34 +0000)]
Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278380
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Andrew Kaylor [Thu, 11 Aug 2016 18:28:33 +0000 (18:28 +0000)]
Target independent codesize heuristics for Loop Idiom Recognition
Patch by Sunita Marathe
Differential Revision: https://reviews.llvm.org/D21449
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278378
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Easwaran Raman [Thu, 11 Aug 2016 18:24:08 +0000 (18:24 +0000)]
Add a new method to create SimpleInliner instance and make pre-inliner use this.
This adds a createFunctionInliningPass pass that takes an InlineParams object and use this to create the pre-inliner pass. This prevents the regular inliner's threshold flag from influencing the preinliner.
Differential revision: https://reviews.llvm.org/D23377
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278377
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Krzysztof Parzyszek [Thu, 11 Aug 2016 18:15:16 +0000 (18:15 +0000)]
[Hexagon] Skip byval arguments when checking parameter attributes
From the point of view of register assignment, byval parameters are
ignored: a byval parameter is not going to be assigned to a register,
and it will not affect the assignments of subsequent parameters.
When matching registers with parameters in the bit tracker, make sure
to skip byval parameters before advancing the registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278375
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Dominic Chen [Thu, 11 Aug 2016 17:52:40 +0000 (17:52 +0000)]
Improve virtual register handling when computing debug information
Summary: Some backends, like WebAssembly, use virtual registers instead of physical registers. This crashes the DbgValueHistoryCalculator pass, which assumes that all registers are physical. Instead, skip virtual registers when iterating aliases, and assume that they are clobbered.
Reviewers: dexonsmith, dschuff, aprantl
Subscribers: yurydelendik, llvm-commits, jfb, sunfish
Differential Revision: https://reviews.llvm.org/D22590
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278371
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Michael Kuperstein [Thu, 11 Aug 2016 17:38:33 +0000 (17:38 +0000)]
Make TwoAddressInstructionPass::rescheduleMIBelowKill subreg-aware
This fixes PR28824.
Differential Revision: https://reviews.llvm.org/D23220
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278370
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Matt Arsenault [Thu, 11 Aug 2016 17:31:42 +0000 (17:31 +0000)]
AMDGPU: Fix crashes on memory functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278369
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Matt Arsenault [Thu, 11 Aug 2016 17:22:59 +0000 (17:22 +0000)]
AArch64: Assert on analyzeBranch failing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278366
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Michael Kuperstein [Thu, 11 Aug 2016 17:20:20 +0000 (17:20 +0000)]
[AliasSetTracker] Delete dead code
Deletes unused remove() and containsPointer() interfaces. NFC.
Differential Revision: https://reviews.llvm.org/D23360
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278365
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Eugene Zelenko [Thu, 11 Aug 2016 17:20:18 +0000 (17:20 +0000)]
Fix some Clang-tidy modernize and Include What You Use warnings.
Differential revision: https://reviews.llvm.org/D23291
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278364
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Teresa Johnson [Thu, 11 Aug 2016 17:19:53 +0000 (17:19 +0000)]
Add move ops to satisfy MSVC.
Try to appease MSVC bot:
http://lab.llvm.org:8011/builders/sanitizer-windows/builds/27164/steps/run%20tests/logs/stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278363
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Matt Arsenault [Thu, 11 Aug 2016 17:15:32 +0000 (17:15 +0000)]
AMDGPU: Remove custom getSubReg
This was kind of confusing, the subregister
class shouldn't really be necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278362
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Matt Arsenault [Thu, 11 Aug 2016 17:15:28 +0000 (17:15 +0000)]
AMDGPU: Remove unused tracking of flat instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278361
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Wei Ding [Thu, 11 Aug 2016 17:14:17 +0000 (17:14 +0000)]
AMDGPU : Fix SAD related instruction LIT tests function atttibute issues.
Differential Revision: http://reviews.llvm.org/D23133
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278360
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Duncan P. N. Exon Smith [Thu, 11 Aug 2016 16:40:03 +0000 (16:40 +0000)]
Hexagon: Avoid dereferencing end() in HexagonCopyToCombine::findPairable
Check for end() before skipping through debug values. This avoids
dereferencing end() when the instruction is the final one in the basic
block. (It still assumes that a debug value will not be the final
instruction in the basic block. No tests seemed to violate that.)
Many Hexagon tests trigger this, but they happen to magically pass right
now. I found this because WIP patches for PR26753 convert them into
crashes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278355
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Wei Ding [Thu, 11 Aug 2016 16:33:53 +0000 (16:33 +0000)]
AMDGPU : Add LLVM intrinsics for SAD related instructions.
Differential Revision: http://reviews.llvm.org/D23133
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278354
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Teresa Johnson [Thu, 11 Aug 2016 16:29:47 +0000 (16:29 +0000)]
Add (hopefully last) remaining missing dependences to llvm-lto2
There are still a few missing symbols reported by:
http://bb.pgr.jp/builders/i686-mingw32-RA-on-linux/builds/15535/steps/build_llvmclang/logs/stdio
http://bb.pgr.jp/builders/i686-mingw32-RA-on-linux/builds/15535/steps/build_llvmclang/logs/stdio
This should hopefully take care of them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278353
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Tim Northover [Thu, 11 Aug 2016 16:21:29 +0000 (16:21 +0000)]
GlobalISel: clear vreg mapping after translating each function
Otherwise we only materialize (shared) constants in the first function they
appear in. This doesn't go well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278351
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Reid Kleckner [Thu, 11 Aug 2016 16:00:43 +0000 (16:00 +0000)]
Remove FIXME about asserting on the end iterator
After machine block placement, MBBs may not have terminators, and it is
appropriate to check for the end iterator here. We can fold the check
into the next if, as well. This look is really just looking for BBs that
end in CATCHRET.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278350
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Teresa Johnson [Thu, 11 Aug 2016 15:58:49 +0000 (15:58 +0000)]
More missing llvm-lto2 dependencies
Follow-on to r278341: Update CMakeLists.txt to match LLVMBuild.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278349
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Lang Hames [Thu, 11 Aug 2016 15:56:23 +0000 (15:56 +0000)]
[MCJIT] Improve documentation and error handling for MCJIT::runFunction.
ExecutionEngine::runFunction is supposed to allow execution of arbitrary
function types, but MCJIT can only reasonably support a limited subset of
main-linke function types. This patch documents this limitation, and fixes
MCJIT::runFunction to abort with a meaningful error at runtime if called with
an unsupported function type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278348
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Duncan P. N. Exon Smith [Thu, 11 Aug 2016 15:51:29 +0000 (15:51 +0000)]
X86: Use operator lookup for operator==, NFC
Avoid relying on the MachineInstrBundleIterator operator== being
implemented as a member function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278347
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Duncan P. N. Exon Smith [Thu, 11 Aug 2016 15:45:04 +0000 (15:45 +0000)]
IR: Don't cast the end iterator to Instruction*
End iterators are usually sentinels, not actually Instruction* at all.
Stop casting to it just to get an iterator back.
There is likely no observable functionality change here right now
(although this is relying on UB, I doubt it was triggering anything),
but I'll be removing the cast soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278346
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Duncan P. N. Exon Smith [Thu, 11 Aug 2016 15:29:02 +0000 (15:29 +0000)]
CodeGen: Check for a terminator in llvm::getFuncletMembership
Check for an end iterator from MachineBasicBlock::getFirstTerminator in
llvm::getFuncletMembership. If this is turned into an assertion, it
fires in 48 X86 testcases (for example,
CodeGen/X86/regalloc-spill-at-ehpad.ll).
Since this is likely a latent bug (shouldn't all basic blocks end with a
terminator?) I've filed PR28938.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278344
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Matthew Simpson [Thu, 11 Aug 2016 15:28:45 +0000 (15:28 +0000)]
[SLP] Make RecursionMaxDepth a command line option (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278343
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Sanjay Patel [Thu, 11 Aug 2016 15:23:56 +0000 (15:23 +0000)]
fix comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278342
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Teresa Johnson [Thu, 11 Aug 2016 15:23:05 +0000 (15:23 +0000)]
Fix bot failure from r278338 due to missing dependences
Add some missing dependences to the llvm-lto2 tool to attempt to appease
missing symbols in link from bot:
http://bb.pgr.jp/builders/i686-mingw32-RA-on-linux/builds/15527
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278341
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Sanjay Patel [Thu, 11 Aug 2016 15:21:21 +0000 (15:21 +0000)]
use auto* with dyn_cast ; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278340
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Sanjay Patel [Thu, 11 Aug 2016 15:16:06 +0000 (15:16 +0000)]
getParent()->getParent() == getFunction() ; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278339
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Teresa Johnson [Thu, 11 Aug 2016 14:58:12 +0000 (14:58 +0000)]
Restore "Resolution-based LTO API."
This restores commit r278330, with fixes for a few bot failures:
- Fix a late change I had made to the save temps output file that I
missed due to existing files sitting on my disk
- Fix a bunch of Windows bot failures with "ambiguous call to overloaded
function" due to confusion between llvm::make_unique vs
std::make_unique (preface the new make_unique calls with "llvm::")
- Attempt to fix a modules bot failure by adding a missing include
to LTO/Config.h.
Original change:
Resolution-based LTO API.
Summary:
This introduces a resolution-based LTO API. The main advantage of this API over
existing APIs is that it allows the linker to supply a resolution for each
symbol in each object, rather than the combined object as a whole. This will
become increasingly important for use cases such as ThinLTO which require us
to process symbol resolutions in a more complicated way than just adjusting
linkage.
Patch by Peter Collingbourne.
Reviewers: rafael, tejohnson, mehdi_amini
Subscribers: lhames, tejohnson, mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D20268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278338
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Ehsan Amiri [Thu, 11 Aug 2016 14:51:14 +0000 (14:51 +0000)]
revert 278334
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278337
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Valery Pykhtin [Thu, 11 Aug 2016 14:22:05 +0000 (14:22 +0000)]
Revert "[AMDGPU] fix failure on printing of non-existing instruction operands."
This reverts revision 278333, newly added test failed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278336
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Ehsan Amiri [Thu, 11 Aug 2016 13:51:20 +0000 (13:51 +0000)]
Extend trip count instead of truncating IV in LFTR, when legal
When legal, extending trip count in the loop control logic generates better code compared to truncating IV. This is because
(1) extending trip count is a loop invariant operation (see genLoopLimit where we prove trip count is loop invariant).
(2) Scalar Evolution seems to have problems understanding trunc when computing loop trip count. So removing them allows better analysis performed in Scalar Evolution. (In particular this fixes PR 28363 which is the motivation for this change).
I am not going to perform any performance test. Any degradation caused by this should be an indication of a bug elsewhere.
To prove legality, we rely on SCEV to prove zext(trunc(IV)) == IV (or similarly for sext). If this holds, we can prove equivalence of trunc(IV)==ExitCnt (1) and IV == zext(ExitCnt). Simply take zext of boths sides of (1) and apply the proven equivalence.
https://reviews.llvm.org/D23075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278334
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Valery Pykhtin [Thu, 11 Aug 2016 13:49:46 +0000 (13:49 +0000)]
[AMDGPU] fix failure on printing of non-existing instruction operands.
Differential revision: https://reviews.llvm.org/D23323
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278333
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Teresa Johnson [Thu, 11 Aug 2016 13:03:56 +0000 (13:03 +0000)]
Revert "Resolution-based LTO API."
This reverts commit r278330.
I made a change to the save temps output that is causing issues with the
bots. Didn't realize this because I had older output files sitting on
disk in my test output directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278331
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Teresa Johnson [Thu, 11 Aug 2016 12:56:40 +0000 (12:56 +0000)]
Resolution-based LTO API.
Summary:
This introduces a resolution-based LTO API. The main advantage of this API over
existing APIs is that it allows the linker to supply a resolution for each
symbol in each object, rather than the combined object as a whole. This will
become increasingly important for use cases such as ThinLTO which require us
to process symbol resolutions in a more complicated way than just adjusting
linkage.
Patch by Peter Collingbourne.
Reviewers: rafael, tejohnson, mehdi_amini
Subscribers: lhames, tejohnson, mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D20268
Address review comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278330
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Simon Pilgrim [Thu, 11 Aug 2016 12:19:43 +0000 (12:19 +0000)]
Fixed VS2015 (Update 3) warning - differing const/volatile qualifiers for overridden function
Dropped the const qualifier to match llvm::CallLowering::lowerCall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278329
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Igor Breger [Thu, 11 Aug 2016 12:13:46 +0000 (12:13 +0000)]
[AVX512] Fix extractelement i1 lowering.
The previous implementation (not custom) doesn't enforce zeroing off upper bits. The assumption is that i1 PRODUCER (truncate and extractelement) must zero all upper bits, so i1 CONSUMER instructions ( test, zext, save, etc) can be done without additional zeroing.
Make extractelement i1 lowering custom for all vector i1.
Differential Revision: http://reviews.llvm.org/D23246
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278328
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Marina Yatsina [Thu, 11 Aug 2016 07:32:08 +0000 (07:32 +0000)]
Avoid false dependencies of undef machine operands
This patch helps avoid false dependencies on undef registers by updating the machine instructions' undef operand to use a register that the instruction is truly dependent on, or use a register with clearance higher than Pref.
Pseudo example:
loop:
xmm0 = ...
xmm1 = vcvtsi2sdl eax, xmm0<undef>
... = inst xmm0
jmp loop
In this example, selecting xmm0 as the undef register creates false dependency between loop iterations.
This false dependency cannot be solved by inserting an xor before vcvtsi2sdl because xmm0 is alive at the point of the vcvtsi2sdl instruction.
Selecting a different register instead of xmm0, especially a register that is not used in the loop, will eliminate this problem.
Differential Revision: https://reviews.llvm.org/D22466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278321
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Amjad Aboud [Thu, 11 Aug 2016 07:22:53 +0000 (07:22 +0000)]
[Debug Info] Added a LIT test that covers the fix committed in rL277290.
Differential Revision: http://reviews.llvm.org/D23056
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278320
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Craig Topper [Thu, 11 Aug 2016 06:04:07 +0000 (06:04 +0000)]
[AVX-512] Promote 512-bit integer loads to v8i64 similar to what is done for 128/256-bit vectors for overall consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278318
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Craig Topper [Thu, 11 Aug 2016 06:04:04 +0000 (06:04 +0000)]
[AVX-512] Add patterns to allow EVEX encoded stores of v16i16/v8i16/v16i8/v32i8 even when BWI is not supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278317
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Craig Topper [Thu, 11 Aug 2016 06:04:00 +0000 (06:04 +0000)]
[AVX-512] Fix the 128-bit and 256-bit nontemporal load patterns with elements type other than i64. These loads have all been promoted to v2i64/v4i64 loads so we need bitcasts or we end up selecting VMOVDQA32/VMOVDQU32 instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278316
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Xinliang David Li [Thu, 11 Aug 2016 05:09:30 +0000 (05:09 +0000)]
[Profile] improve warning control option
Change --no-pgo-warn-missing to -pgo-warn-missing-function
and negate the default. /NFC
Add more test to make sure the warning is off by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278314
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Dominic Chen [Thu, 11 Aug 2016 04:10:56 +0000 (04:10 +0000)]
[WebAssembly] Cleanup trailing whitespace
Summary: Test for commit access.
Subscribers: jfb, dschuff
Differential Revision: https://reviews.llvm.org/D23392
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278313
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Easwaran Raman [Thu, 11 Aug 2016 03:58:05 +0000 (03:58 +0000)]
Make more fields of InlineParams Optional.
Differential revision: https://reviews.llvm.org/D23386
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278312
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Sanjoy Das [Thu, 11 Aug 2016 00:56:46 +0000 (00:56 +0000)]
[Statepoints] Minor cosmetic change; NFC
The verification failure message was missing a space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278309
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Chris Bieneman [Thu, 11 Aug 2016 00:20:03 +0000 (00:20 +0000)]
[MachOYAML] Don't output empty ExportTrie
The YAML representation was always outputting the root node of an export trie even if the trie was empty. While this doesn't really have any functional impact, it does add visual clutter to the yaml file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278307
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Tim Northover [Wed, 10 Aug 2016 23:02:41 +0000 (23:02 +0000)]
GlobalISel: support same ConstantExprs as Instructions.
It's more than just inttoptr, but the others can't be tested until we have
support for non-trivial constants (they currently get unavoidably folded to a
ConstantInt).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278303
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Tim Shen [Wed, 10 Aug 2016 22:35:38 +0000 (22:35 +0000)]
[ADT] Move LLVM_ATTRIBUTE_UNUSED_RESULT to the function, otherwise gcc 4.8 complains about it.
It's a fix for the original patch r278251.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278298
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Tim Northover [Wed, 10 Aug 2016 22:13:48 +0000 (22:13 +0000)]
GlobalISel: add tests forgotten in r278293.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278296
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Sanjoy Das [Wed, 10 Aug 2016 21:48:24 +0000 (21:48 +0000)]
[LangRef] Fix formatting (no semantic change)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278294
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Tim Northover [Wed, 10 Aug 2016 21:44:01 +0000 (21:44 +0000)]
GlobalISel: implement simple function calls on AArch64.
We're still limited in the arguments we support, but this at least handles the
basic cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278293
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Changpeng Fang [Wed, 10 Aug 2016 21:15:30 +0000 (21:15 +0000)]
AMDGPU/SI: Implement amdgcn image intrinsics with sampler
Summary:
This patch define and implement amdgcn image intrinsics with sampler.
1. define vdata type to be llvm_anyfloat_ty, address type to be llvm_anyfloat_ty,
and rsrc type to be llvm_anyint_ty. As a result, we expect the intrinsics name
to have three suffixes to overload each of these three types;
2. D128 as well as two other flags are implied in the three types, for example,
if you use v8i32 as resource type, then r128 is 0!
3. don't expose TFE flag, and other flags are exposed in the instruction order:
unrm, glc, slc, lwe and da.
Differential Revision: http://reviews.llvm.org/D22838
Reviewed by:
arsenm and tstellarAMD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278291
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Piotr Padlewski [Wed, 10 Aug 2016 21:15:22 +0000 (21:15 +0000)]
Changed sign of LastCallToStaticBouns
Summary:
I think it is much better this way.
When I firstly saw line:
Cost += InlineConstants::LastCallToStaticBonus;
I though that this is a bug, because everywhere where the cost is being reduced
it is usuing -=.
Reviewers: eraman, tejohnson, mehdi_amini
Subscribers: llvm-commits, mehdi_amini
Differential Revision: https://reviews.llvm.org/D23222
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278290
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Kyle Butt [Wed, 10 Aug 2016 21:03:27 +0000 (21:03 +0000)]
Codegen: Don't tail-duplicate blocks with un-analyzable fallthrough.
If AnalyzeBranch can't analyze a block and it is possible to
fallthrough, then duplicating the block doesn't make sense, as only one
block can be the layout predecessor for the un-analyzable fallthrough.
Submitted wit a test case, but NOTE: the test case doesn't currently
fail. However, the test case fails with D20505 and would have saved me
some time debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278288
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Kyle Butt [Wed, 10 Aug 2016 20:45:56 +0000 (20:45 +0000)]
CodeGen: If Convert blocks that would form a diamond when tail-merged.
The following function currently relies on tail-merging for if
conversion to succeed. The common tail of cond_true and cond_false is
extracted, and this then forms a diamond pattern that can be
successfully if converted.
If this block does not get extracted, either because tail-merging is
disabled or the threshold is higher, we should still recognize this
pattern and if-convert it.
Fixed a regression in the original commit. Need to un-reverse branches after
reversing them, or other conversions go awry.
define i32 @t2(i32 %a, i32 %b) nounwind {
entry:
%tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1]
br i1 %tmp1434, label %bb17, label %bb.outer
bb.outer: ; preds = %cond_false, %entry
%b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ]
%a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ]
br label %bb
bb: ; preds = %cond_true, %bb.outer
%indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ]
%tmp. = sub i32 0, %b_addr.021.0.ph
%tmp.40 = mul i32 %indvar, %tmp.
%a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph
%tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph
br i1 %tmp3, label %cond_true, label %cond_false
cond_true: ; preds = %bb
%tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph
%tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph
%indvar.next = add i32 %indvar, 1
br i1 %tmp1437, label %bb17, label %bb
cond_false: ; preds = %bb
%tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0
%tmp14 = icmp eq i32 %a_addr.026.0, %tmp10
br i1 %tmp14, label %bb17, label %bb.outer
bb17: ; preds = %cond_false, %cond_true, %entry
%a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ]
ret i32 %a_addr.026.1
}
Without tail-merging or diamond-tail if conversion:
LBB1_1: @ %bb
@ =>This Inner Loop Header: Depth=1
cmp r0, r1
ble LBB1_3
@ BB#2: @ %cond_true
@ in Loop: Header=BB1_1 Depth=1
subs r0, r0, r1
cmp r1, r0
it ne
cmpne r0, r1
bgt LBB1_4
LBB1_3: @ %cond_false
@ in Loop: Header=BB1_1 Depth=1
subs r1, r1, r0
cmp r1, r0
bne LBB1_1
LBB1_4: @ %bb17
bx lr
With diamond-tail if conversion, but without tail-merging:
@ BB#0: @ %entry
cmp r0, r1
it eq
bxeq lr
LBB1_1: @ %bb
@ =>This Inner Loop Header: Depth=1
cmp r0, r1
ite le
suble r1, r1, r0
subgt r0, r0, r1
cmp r1, r0
bne LBB1_1
@ BB#2: @ %bb17
bx lr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278287
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Reid Kleckner [Wed, 10 Aug 2016 20:11:35 +0000 (20:11 +0000)]
Disable sancov tests failing due to apparent endianness issues
Undoes some of the effect of r278271
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278285
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Reid Kleckner [Wed, 10 Aug 2016 20:08:19 +0000 (20:08 +0000)]
[sancov] Port sancov -print-coverage-pcs to COFF
The export table is not considered part of the object file symbol table,
so we have to look through it separately.
Reviewers: kcc
Differential Revision: https://reviews.llvm.org/D23321
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278284
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Jonathan Roelofs [Wed, 10 Aug 2016 19:50:14 +0000 (19:50 +0000)]
Fix UB in APInt::ashr
i64 -1, whose sign bit is the 0th one, can't be left shifted without invoking UB.
https://reviews.llvm.org/D23362
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278280
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Matt Arsenault [Wed, 10 Aug 2016 19:20:02 +0000 (19:20 +0000)]
AMDGPU: s_setpc_b64 should be an indirect branch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278278
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Matt Arsenault [Wed, 10 Aug 2016 19:11:51 +0000 (19:11 +0000)]
AMDGPU: Set sizes on control flow pseudos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278276
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Matt Arsenault [Wed, 10 Aug 2016 19:11:48 +0000 (19:11 +0000)]
AMDGPU: Remove empty file comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278275
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Matt Arsenault [Wed, 10 Aug 2016 19:11:45 +0000 (19:11 +0000)]
AMDGPU: Remove unnecessary cast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278274
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Matt Arsenault [Wed, 10 Aug 2016 19:11:42 +0000 (19:11 +0000)]
AMDGPU: Change insertion point of si_mask_branch
Insert before the skip branch if one is created.
This is a somewhat more natural placement relative
to the skip branches, and makes it possible to implement
analyzeBranch for skip blocks.
The test changes are mostly due to a quirk where
the block label is not emitted if there is a terminator
that is not also a branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278273
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Matt Arsenault [Wed, 10 Aug 2016 19:11:36 +0000 (19:11 +0000)]
AMDGPU: Use CreateStackObject instead of CreateSpillStackObject
I'm not sure what the difference is, but no other target
uses this for emergency spill slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278272
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Reid Kleckner [Wed, 10 Aug 2016 19:03:18 +0000 (19:03 +0000)]
[sancov] Run more sancov tests on non-x86-Linux machines
Add the $arch-registered-target features that clang uses to disable
tests that require a registered backend, so that we can run the sancov
tests on Windows. LLVM's lit suite did not appear to have a per-test way
to do this, and I would rather not split up the sancov tests into
architecture directories.
Split out of https://reviews.llvm.org/D23321
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278271
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Sanjay Patel [Wed, 10 Aug 2016 19:00:11 +0000 (19:00 +0000)]
[x86, AVX] allow FP vector select folding to bitwise logic ops (PR28895)
This handles the case in:
https://llvm.org/bugs/show_bug.cgi?id=28895
...but we are not getting all of the possibilities yet.
Eg, we use 'X86::FANDN' for scalar FP select combines.
That enhancement is filed as:
https://llvm.org/bugs/show_bug.cgi?id=28925
Differential Revision: https://reviews.llvm.org/D23337
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278270
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Andrew Kaylor [Wed, 10 Aug 2016 18:56:35 +0000 (18:56 +0000)]
[IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative
Patch by Li Huang
Differential Revision: https://reviews.llvm.org/D18867
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278269
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Nicolai Haehnle [Wed, 10 Aug 2016 18:51:14 +0000 (18:51 +0000)]
LiveIntervalAnalysis: fix a crash in repairOldRegInRange
Summary:
See the new test case for one that was (non-deterministically) crashing
on trunk and deterministically hit the assertion that I added in D23302.
Basically, the machine function contains a sequence
DS_WRITE_B32 %vreg4, %vreg14:sub0, ...
DS_WRITE_B32 %vreg4, %vreg14:sub0, ...
%vreg14:sub1<def> = COPY %vreg14:sub0
and SILoadStoreOptimizer::mergeWrite2Pair merges the two DS_WRITE_B32
instructions into one before calling repairIntervalsInRange.
Now repairIntervalsInRange wants to repair %vreg14, in particular, and
ends up trying to repair %vreg14:sub1 as well, but that only becomes
active _after_ the range that is to be repaired, hence the crash due
to LR.find(...) == LR.begin() at the start of repairOldRegInRange.
I believe that just skipping those subrange is fine, but again, not too
familiar with that code.
Reviewers: MatzeB, kparzysz, tstellarAMD
Subscribers: llvm-commits, MatzeB
Differential Revision: https://reviews.llvm.org/D23303
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278268
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Andrew Kaylor [Wed, 10 Aug 2016 18:47:19 +0000 (18:47 +0000)]
[ValueTracking] An improvement to IR ValueTracking on Non-negative Integers
Patch by Li Huang
Differential Revision: https://reviews.llvm.org/D18777
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278267
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Krzysztof Parzyszek [Wed, 10 Aug 2016 18:40:36 +0000 (18:40 +0000)]
[Hexagon] Remove unused variants of LO/HI instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278266
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Kyle Butt [Wed, 10 Aug 2016 18:36:18 +0000 (18:36 +0000)]
Codegen: Tail Merge: Be less aggressive with special cases.
This change makes it possible for tail-duplication and tail-merging to
be disjoint. By being less aggressive when merging during layout, there are no
overlapping cases between tail-duplication and tail-merging, provided the
thresholds are disjoint.
There is a remaining TODO to benchmark the succ_size() test for non-layout tail
merging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278265
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Simon Pilgrim [Wed, 10 Aug 2016 18:10:29 +0000 (18:10 +0000)]
[X86][SSE] Dropped blend(insertps(x,y),zero) combine - this is now handled by target shuffle chain combining
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278260
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Tim Shen [Wed, 10 Aug 2016 18:08:38 +0000 (18:08 +0000)]
[ADT] Removed synthesized constructor introduced in r278251, since MSVC doesn't support them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278259
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Matthias Braun [Wed, 10 Aug 2016 18:05:50 +0000 (18:05 +0000)]
TargetOpcodes: Rewrite the documentation for SUBREG_TO_REG
Differential Revision: https://reviews.llvm.org/D22708
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278258
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