OSDN Git Service

android-x86/external-llvm.git
6 years agoRemove llvm-mcmarkup.
Eric Christopher [Mon, 2 Apr 2018 23:17:55 +0000 (23:17 +0000)]
Remove llvm-mcmarkup.

It was never used and I've checked with the original authors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329029 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] Don't strip function type casts from musttail calls
Reid Kleckner [Mon, 2 Apr 2018 22:49:44 +0000 (22:49 +0000)]
[InstCombine] Don't strip function type casts from musttail calls

Summary:
The cast simplifications that instcombine does here do not make any
attempt to obey the verifier rules for musttail calls. Therefore we have
to disable them.

Reviewers: efriedma, majnemer, pcc

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D45186

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329027 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] One more try at fixing TestRunner.py for D43165
Aaron Smith [Mon, 2 Apr 2018 22:34:35 +0000 (22:34 +0000)]
[lit] One more try at fixing TestRunner.py for D43165

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329026 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Attempt to fix builtin diff code for Python 2
Reid Kleckner [Mon, 2 Apr 2018 22:19:42 +0000 (22:19 +0000)]
[lit] Attempt to fix builtin diff code for Python 2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329024 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Fix problem in how Python versions open files with different encodings
Aaron Smith [Mon, 2 Apr 2018 22:08:56 +0000 (22:08 +0000)]
[lit] Fix problem in how Python versions open files with different encodings

Reapply D43165 which was reverted because of different versions of python failing.
The one line fix for the different python versions was commited at the same time
that D43165 was reverted. If this change is giving you issues then get in touch
with your python version and we will fix it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329022 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix Go IR test for changes in DIBuilder API
Harlan Haskins [Mon, 2 Apr 2018 21:45:35 +0000 (21:45 +0000)]
Fix Go IR test for changes in DIBuilder API

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329021 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Use io.open to compare two files since it supports different encodings while...
Aaron Smith [Mon, 2 Apr 2018 21:44:51 +0000 (21:44 +0000)]
[lit] Use io.open to compare two files since it supports different encodings while older versions of open do not

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329020 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Add a debugging check to catch dangling references to SymbolStringPools.
Lang Hames [Mon, 2 Apr 2018 21:39:39 +0000 (21:39 +0000)]
[ORC] Add a debugging check to catch dangling references to SymbolStringPools.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329019 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Fix a think-o: ExecutionSession should create a SymbolStringPool if none
Lang Hames [Mon, 2 Apr 2018 21:34:48 +0000 (21:34 +0000)]
[ORC] Fix a think-o: ExecutionSession should create a SymbolStringPool if none
is passed in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329018 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r329012 "[lit] Fix problem in how Python versions open files with different...
Reid Kleckner [Mon, 2 Apr 2018 21:33:46 +0000 (21:33 +0000)]
Revert r329012 "[lit] Fix problem in how Python versions open files with different encodings"

This doesn't work with Python 2. See this build-in-progress:
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/11105

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329017 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTreat inlining a notail call as a regular, non-tail call
Reid Kleckner [Mon, 2 Apr 2018 21:23:16 +0000 (21:23 +0000)]
Treat inlining a notail call as a regular, non-tail call

Otherwise, we end up inlining a musttail call into a non-tail position,
which breaks verifier invariants.

Fixes PR31014

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329015 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Create a new SymbolStringPool by default in ExecutionSession constructor.
Lang Hames [Mon, 2 Apr 2018 20:57:56 +0000 (20:57 +0000)]
[ORC] Create a new SymbolStringPool by default in ExecutionSession constructor.

This makes the common case of constructing an ExecutionSession tidier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329013 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Fix problem in how Python versions open files with different encodings
Aaron Smith [Mon, 2 Apr 2018 20:57:06 +0000 (20:57 +0000)]
[lit] Fix problem in how Python versions open files with different encodings

Summary:
This issue was found when running the clang unit test on Windows. Python 3.x cannot open some of the files that the tests are using with a simple open because of their encoding. Python 2.7+ and Python 3.x both support io.open which allows for an encoding to be specified.

This change will determine whether two files being compared should be opened (and then compared) as text or binary and whether to use utf-8 or the default encoding before proceeding with a line-by-line comparison.

Patch by Stella Stamenova!

Reviewers: zturner, llvm-commits, rnk, MaggieYi

Reviewed By: zturner

Subscribers: asmith, MatzeB, stella.stamenova, delcypher, llvm-commits

Differential Revision: https://reviews.llvm.org/D43165

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329012 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] add folds for icmp + sub (PR36969)
Sanjay Patel [Mon, 2 Apr 2018 20:37:40 +0000 (20:37 +0000)]
[InstCombine] add folds for icmp + sub (PR36969)

(A - B) >u A --> A <u B
C <u (C - D) --> C <u D

https://rise4fun.com/Alive/e7j

Name: ugt
  %sub = sub i8 %x, %y
  %cmp = icmp ugt i8 %sub, %x
=>
  %cmp = icmp ult i8 %x, %y

Name: ult
  %sub = sub i8 %x, %y
  %cmp = icmp ult i8 %x, %sub
=>
  %cmp = icmp ult i8 %x, %y

This should fix:
https://bugs.llvm.org/show_bug.cgi?id=36969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329011 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] add tests for icmp (sub x, y), x (PR36969); NFC
Sanjay Patel [Mon, 2 Apr 2018 20:23:54 +0000 (20:23 +0000)]
[InstCombine] add tests for icmp (sub x, y), x (PR36969); NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329010 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAnother attempt to fix papertrail-warnings.test on Windows bots by making expected...
Douglas Yung [Mon, 2 Apr 2018 20:05:05 +0000 (20:05 +0000)]
Another attempt to fix papertrail-warnings.test on Windows bots by making expected message less case sensitive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329008 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix header mismatch in DIBuilder Type APIs
Harlan Haskins [Mon, 2 Apr 2018 19:11:44 +0000 (19:11 +0000)]
Fix header mismatch in DIBuilder Type APIs

Some of the headers changed slightly, and the accompanying
implementation didn't change. This caused a silent failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329003 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-pdbutil] Add an export subcommand.
Zachary Turner [Mon, 2 Apr 2018 18:35:21 +0000 (18:35 +0000)]
[llvm-pdbutil] Add an export subcommand.

This command can dump the binary contents of a stream to a file.
This is useful when you want to do side-by-side comparisons of
a specific stream from two PDBs to examine the differences between
them.  You can export both of them to a file, then open them up
side by side in a hex editor (for example), so as to eliminate any
differences that might arise from the contents being on different
blocks in the PDB.

In subsequent patches I plan to improve the "explain" subcommand
so that you can explain the contents of a binary file that isn't
necessarily a full PDB, but one of these dumped streams, by telling
the subcommand how to interpret the contents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329002 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove unused PACKAGE_TARNAME; looks like a remnant of the old autoconf build.
Nico Weber [Mon, 2 Apr 2018 18:13:05 +0000 (18:13 +0000)]
Remove unused PACKAGE_TARNAME; looks like a remnant of the old autoconf build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328998 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove some unused cmake standard library includes.
Nico Weber [Mon, 2 Apr 2018 17:52:19 +0000 (17:52 +0000)]
Remove some unused cmake standard library includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328996 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove more feature test macros that became unused after r328989.
Nico Weber [Mon, 2 Apr 2018 17:45:47 +0000 (17:45 +0000)]
Remove more feature test macros that became unused after r328989.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328995 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove HAVE_LIBPSAPI, HAVE_SHELL32.
Nico Weber [Mon, 2 Apr 2018 17:32:48 +0000 (17:32 +0000)]
Remove HAVE_LIBPSAPI, HAVE_SHELL32.

These used to be set in the old autoconf build, but the cmake build has had a
"TODO: actually check for these" comment since it was checked in, and they
were set to 1 on mingw unconditionally.  It seems safe to say that they always
exist under mingw, so just remove them and assume they're set exactly when on
mingw (with msvc, we use `pragma comment` instead of linking these via flags).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328992 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DeadArgumentElim] Clone function level metadatas
Rong Xu [Mon, 2 Apr 2018 17:27:38 +0000 (17:27 +0000)]
[DeadArgumentElim] Clone function level metadatas

Some Function level metadatas, such as function entry count, are not cloned in
DeadArgumentElim. This happens a lot in lto/thinlto because of DeadArgumentElim
after internalization.

This patch clones the metadatas in the original function to the new function.

Differential Revision: https://reviews.llvm.org/D44127

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328991 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove HAVE_DIRENT_H.
Nico Weber [Mon, 2 Apr 2018 17:17:29 +0000 (17:17 +0000)]
Remove HAVE_DIRENT_H.

The autoconf manual: "This macro is obsolescent, as all current systems with
directory libraries have <dirent.h>. New programs need not use this macro."

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328989 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU][MC][GFX9] Added instructions v_cvt_norm_*16_f16, v_sat_pk_u8_i16
Dmitry Preobrazhensky [Mon, 2 Apr 2018 17:09:20 +0000 (17:09 +0000)]
[AMDGPU][MC][GFX9] Added instructions v_cvt_norm_*16_f16, v_sat_pk_u8_i16

See bug 36847: https://bugs.llvm.org/show_bug.cgi?id=36847

Differential Revision: https://reviews.llvm.org/D45097

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328988 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[coroutines] Add support for llvm.coro.noop intrinsics
Gor Nishanov [Mon, 2 Apr 2018 16:55:12 +0000 (16:55 +0000)]
[coroutines] Add support for llvm.coro.noop intrinsics

Summary:
A recent addition to Coroutines TS (https://wg21.link/p0913) adds a pre-defined coroutine noop_coroutine that does nothing.
To implement this feature, we implemented an llvm.coro.noop intrinsic that returns a coroutine handle to a coroutine that does nothing when resumed or destroyed.

Reviewers: EricWF, modocache, rnk, lewissbaker

Reviewed By: modocache

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45114

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328986 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU][MC][GFX9] Added s_atomic_* and s_buffer_atomic_* instructions
Dmitry Preobrazhensky [Mon, 2 Apr 2018 16:10:25 +0000 (16:10 +0000)]
[AMDGPU][MC][GFX9] Added s_atomic_* and s_buffer_atomic_* instructions

Fixed a bug which caused Tablegen crash.

See bug 36837: https://bugs.llvm.org/show_bug.cgi?id=36837

Differential Revision: https://reviews.llvm.org/D45085

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328983 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Clean up some code in HexagonAsmPrinter, NFC
Krzysztof Parzyszek [Mon, 2 Apr 2018 15:06:55 +0000 (15:06 +0000)]
[Hexagon] Clean up some code in HexagonAsmPrinter, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328981 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SLP] Fix PR36481: vectorize reassociated instructions.
Alexey Bataev [Mon, 2 Apr 2018 14:51:37 +0000 (14:51 +0000)]
[SLP] Fix PR36481: vectorize reassociated instructions.

Summary:
If the load/extractelement/extractvalue instructions are not originally
consecutive, the SLP vectorizer is unable to vectorize them. Patch
allows reordering of such instructions.

Reviewers: RKSimon, spatel, hfinkel, mkuper, Ayal, ashahid

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43776

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328980 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove stro(u?)ll() config checks. Those were needed pre-MSVC2013, but we require...
Nico Weber [Mon, 2 Apr 2018 14:36:34 +0000 (14:36 +0000)]
Remove stro(u?)ll() config checks. Those were needed pre-MSVC2013, but we require 2015 nowadays.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328979 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r328975, it makes TableGen assert on the bots.
Nico Weber [Mon, 2 Apr 2018 14:20:23 +0000 (14:20 +0000)]
Revert r328975, it makes TableGen assert on the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328978 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove HAVE_WRITEV that's unused after r255837.
Nico Weber [Mon, 2 Apr 2018 14:18:13 +0000 (14:18 +0000)]
Remove HAVE_WRITEV that's unused after r255837.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328977 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMore fixes after r328970.
Nico Weber [Mon, 2 Apr 2018 13:55:56 +0000 (13:55 +0000)]
More fixes after r328970.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328976 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU][MC][GFX9] Added s_atomic_* and s_buffer_atomic_* instructions
Dmitry Preobrazhensky [Mon, 2 Apr 2018 13:52:23 +0000 (13:52 +0000)]
[AMDGPU][MC][GFX9] Added s_atomic_* and s_buffer_atomic_* instructions

See bug 36837: https://bugs.llvm.org/show_bug.cgi?id=36837

Differential Revision: https://reviews.llvm.org/D45085

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328975 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAttempt to heal bots after r328970.
Nico Weber [Mon, 2 Apr 2018 13:49:35 +0000 (13:49 +0000)]
Attempt to heal bots after r328970.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328974 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Reduce Store Forward Block issues in HW - Recommit after fixing Bug 36346
Lama Saba [Mon, 2 Apr 2018 13:48:28 +0000 (13:48 +0000)]
[X86] Reduce Store Forward Block issues in HW - Recommit after fixing Bug 36346

If a load follows a store and reloads data that the store has written to memory, Intel microarchitectures can in many cases forward the data directly from the store to the load, This "store forwarding" saves cycles by enabling the load to directly obtain the data instead of accessing the data from cache or memory.
A "store forward block" occurs in cases that a store cannot be forwarded to the load. The most typical case of store forward block on Intel Core microarchiticutre that a small store cannot be forwarded to a large load.
The estimated penalty for a store forward block is ~13 cycles.

This pass tries to recognize and handle cases where "store forward block" is created by the compiler when lowering memcpy calls to a sequence
of a load and a store.

The pass currently only handles cases where memcpy is lowered to XMM/YMM registers, it tries to break the memcpy into smaller copies.
breaking the memcpy should be possible since there is no atomicity guarantee for loads and stores to XMM/YMM.

Differential revision: https://reviews.llvm.org/D41330

Change-Id: Ib48836ccdf6005989f7d4466fa2035b7b04415d9

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328973 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-mca] Do not assume that implicit reads cannot be associated with ReadAdvance...
Andrea Di Biagio [Mon, 2 Apr 2018 13:46:49 +0000 (13:46 +0000)]
[llvm-mca] Do not assume that implicit reads cannot be associated with ReadAdvance entries.

Before, the instruction builder incorrectly assumed that only explicit reads
could have been associated with ReadAdvance entries.
This patch fixes the issue and adds a test to verify it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328972 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAttempt to fix papertrail-warnings.test on Windows bots.
Nico Weber [Mon, 2 Apr 2018 13:45:39 +0000 (13:45 +0000)]
Attempt to fix papertrail-warnings.test on Windows bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328971 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAssume existence of inttypes.h and stdint.h in DataTypes.h.
Nico Weber [Mon, 2 Apr 2018 13:22:26 +0000 (13:22 +0000)]
Assume existence of inttypes.h and stdint.h in DataTypes.h.

These should exist in all toolchains LLVM supports nowadays.

Enables making DataTypes.h a regular header instead of a .h.cmake file and
allows deleting a bunch of cmake goop (which should also speed up cmake
configure time a bit).

All the code this removes is 9+ years old.
https://reviews.llvm.org/D45155

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328970 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] fix assertion failure due to missing instruction in P9InstrResources.td
Hiroshi Inoue [Mon, 2 Apr 2018 12:18:21 +0000 (12:18 +0000)]
[PowerPC] fix assertion failure due to missing instruction in P9InstrResources.td

This patch adds L(D|W|H|B)XTLS instructions introduced by https://reviews.llvm.org/rL327635 in P9InstrResources.td.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328969 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[dsymutil] Upstream emitting of papertrail warnings.
Jonas Devlieghere [Mon, 2 Apr 2018 10:40:43 +0000 (10:40 +0000)]
[dsymutil] Upstream emitting of papertrail warnings.

When running dsymutil as part of your build system, it can be desirable
for warnings to be part of the end product, rather than just being
emitted to the output stream. This patch upstreams that functionality.

Differential revision: https://reviews.llvm.org/D44639

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328965 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoWdocumentation fix. NFCI.
Simon Pilgrim [Mon, 2 Apr 2018 10:34:39 +0000 (10:34 +0000)]
Wdocumentation fix. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328964 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoWdocumentation fixes. NFCI.
Simon Pilgrim [Mon, 2 Apr 2018 10:21:51 +0000 (10:21 +0000)]
Wdocumentation fixes. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328963 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][Silvermont] Use correct latency and throughput information for divide and squar...
Craig Topper [Mon, 2 Apr 2018 06:34:16 +0000 (06:34 +0000)]
[X86][Silvermont] Use correct latency and throughput information for divide and square root in the scheduler model.

Data taken from Table 16-17 in the Intel Optimization Manual.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328962 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SkylakeServer] Correct throughput for 512-bit sqrt and divide.
Craig Topper [Mon, 2 Apr 2018 05:54:34 +0000 (05:54 +0000)]
[X86][SkylakeServer] Correct throughput for 512-bit sqrt and divide.

Data taken from the AVX512_SKX_PortAssign spreadsheet at http://instlatx64.atw.hu/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328961 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Correct the throughput for divide instructions in Sandy Bridge/Haswell/Broadwel...
Craig Topper [Mon, 2 Apr 2018 05:33:28 +0000 (05:33 +0000)]
[X86] Correct the throughput for divide instructions in Sandy Bridge/Haswell/Broadwell/Skylake scheduler models.

Fixes most of PR36898. Still need to fix the 512-bit instructions, but Agner's tables don't have those.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328960 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Fix the SchedRW for AVX512 shift instructions.
Craig Topper [Mon, 2 Apr 2018 03:15:02 +0000 (03:15 +0000)]
[X86] Fix the SchedRW for AVX512 shift instructions.

It was being inadvertently defaulted to an FADD scheduler class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328959 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Give the AVX512 VEXTRACT instructions the same SchedRWs as the SSE/AVX versions.
Craig Topper [Mon, 2 Apr 2018 02:44:55 +0000 (02:44 +0000)]
[X86] Give the AVX512 VEXTRACT instructions the same SchedRWs as the SSE/AVX versions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328958 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove a few unreferenced config.h defines.
Nico Weber [Mon, 2 Apr 2018 01:46:08 +0000 (01:46 +0000)]
Remove a few unreferenced config.h defines.

Found by looking through the output of

  for f in $(grep -o '\bHAVE_[A-Z0-9_]*\b' llvm/cmake/config-ix.cmake); do
    echo $f $(git grep $f '*' | wc -l);
  done

in the monorepo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328957 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add an itinerary to BTR64rr.
Craig Topper [Mon, 2 Apr 2018 01:12:34 +0000 (01:12 +0000)]
[X86] Add an itinerary to BTR64rr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328956 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Make sure all the classes declare in the Haswell scheduler model are prefixed...
Craig Topper [Mon, 2 Apr 2018 01:12:32 +0000 (01:12 +0000)]
[X86] Make sure all the classes declare in the Haswell scheduler model are prefixed with HW.

The tablegen files all share a namespace so we shouldn't use a generic names in a specific scheduler model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328955 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Give VINSERTPS the same intinerary as INSERTPS.
Craig Topper [Mon, 2 Apr 2018 00:48:11 +0000 (00:48 +0000)]
[X86] Give VINSERTPS the same intinerary as INSERTPS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328954 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd C API bindings for DIBuilder 'Type' APIs
Harlan Haskins [Mon, 2 Apr 2018 00:17:40 +0000 (00:17 +0000)]
Add C API bindings for DIBuilder 'Type' APIs

This patch adds a set of unstable C API bindings to the DIBuilder interface for
creating structure, function, and aggregate types.

This patch also removes the existing implementations of these functions from
the Go bindings and updates the Go API to fit the new C APIs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328953 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Cleanup ADCX/ADOX instruction definitions.
Craig Topper [Sun, 1 Apr 2018 23:58:50 +0000 (23:58 +0000)]
[X86] Cleanup ADCX/ADOX instruction definitions.

Give them both the same itineraries. Add hasSideEffects = 0 to ADOX since they don't have patterns. Rename source operands to $src1 and $src2 instead of $src0 and $src. Add ReadAfterLd to the memory form SchedRW.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328952 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Reserve x18 register on Fuchsia
Petr Hosek [Sun, 1 Apr 2018 23:44:04 +0000 (23:44 +0000)]
[AArch64] Reserve x18 register on Fuchsia

This register is reserved as a platform register on Fuchsia.

Differential Revision: https://reviews.llvm.org/D45105

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328950 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugCounter] Make -debug-counter cl::Hidden.
Craig Topper [Sun, 1 Apr 2018 22:16:52 +0000 (22:16 +0000)]
[DebugCounter] Make -debug-counter cl::Hidden.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328948 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LegacyPassManager] Make 'print-module-scope' cl::Hidden like the rest of the printin...
Craig Topper [Sun, 1 Apr 2018 21:54:26 +0000 (21:54 +0000)]
[LegacyPassManager] Make 'print-module-scope' cl::Hidden like the rest of the printing options.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328947 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Give ADC8/16/32/64mi the same scheduling information as ADC8/16/32/64mr and...
Craig Topper [Sun, 1 Apr 2018 21:54:24 +0000 (21:54 +0000)]
[X86] Give ADC8/16/32/64mi the same scheduling information as ADC8/16/32/64mr and SBB8/16/32/64mi.

It doesn't make a lot of sense that it would be different.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328946 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86] Correct the operand structure of the ADOX instruction.
Chandler Carruth [Sun, 1 Apr 2018 21:53:18 +0000 (21:53 +0000)]
[x86] Correct the operand structure of the ADOX instruction.

This also moves to define it in the same way as ADCX which seems to use
constraints a bit better.

This is pulled out of the review for reducing the use of popf for
restoring EFLAGS, but is independent. There are still more problems with
our definitions for these instructions that Craig is going to look at
but this is at least less broken and he can start from this to improve
them more fully.

Thanks to Craig for the review here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328945 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86] Expose more of the condition conversion routines in the public API
Chandler Carruth [Sun, 1 Apr 2018 21:47:55 +0000 (21:47 +0000)]
[x86] Expose more of the condition conversion routines in the public API
for X86's instruction information. I've now got a second patch under
review that needs these same APIs. This bit is nicely orthogonal and
obvious, so landing it. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328944 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[tools] Change std::sort to llvm::sort in response to r327219
Mandeep Singh Grang [Sun, 1 Apr 2018 21:24:53 +0000 (21:24 +0000)]
[tools] Change std::sort to llvm::sort in response to r327219

Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: JDevlieghere, zturner, echristo, dberris, friss

Reviewed By: echristo

Subscribers: gbedwell, llvm-commits

Differential Revision: https://reviews.llvm.org/D45141

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328943 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[include] Change std::sort to llvm::sort in response to r327219
Mandeep Singh Grang [Sun, 1 Apr 2018 18:39:50 +0000 (18:39 +0000)]
[include] Change std::sort to llvm::sort in response to r327219

Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: echristo, zturner, mzolotukhin, lhames

Reviewed By: echristo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45135

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328940 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Make isIntrinsicSourceOfDivergence table-driven
Nicolai Haehnle [Sun, 1 Apr 2018 17:09:14 +0000 (17:09 +0000)]
AMDGPU: Make isIntrinsicSourceOfDivergence table-driven

Summary:
This is in preparation for the new dimension-aware image intrinsics,
which I'd rather not have to list here by hand.

Change-Id: Iaa16e3a635a11283918ce0d9e1e618591b0bf6fa

Reviewers: arsenm, rampitec, b-sumner

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D44938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328939 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Make getTgtMemIntrinsic table-driven for resource-based intrinsics
Nicolai Haehnle [Sun, 1 Apr 2018 17:09:07 +0000 (17:09 +0000)]
AMDGPU: Make getTgtMemIntrinsic table-driven for resource-based intrinsics

Summary:
Avoids having to list all intrinsics manually.

This is in preparation for the new dimension-aware image intrinsics,
which I'd rather not have to list here by hand.

Change-Id: If7ced04998397ef68c4cb8f7de66b5050fb767e5

Reviewers: arsenm, rampitec, b-sumner

Subscribers: kzhuravl, wdng, mgorny, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D44937

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328938 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTableGen: Support Intrinsic values in SearchableTable
Nicolai Haehnle [Sun, 1 Apr 2018 17:08:58 +0000 (17:08 +0000)]
TableGen: Support Intrinsic values in SearchableTable

Summary:
We will use this in the AMDGPU backend in a subsequent patch
in the stack to lookup target-specific per-intrinsic information.

The generic CodeGenIntrinsic machinery is used to ensure that,
even though we don't calculate actual enum values here, we do
get the intrinsics in the right order for the binary search
index.

Change-Id: If61cd5587963a4c5a1cc53df1e59c5e4dec1f9dc

Reviewers: arsenm, rampitec, b-sumner

Subscribers: wdng, tpr, llvm-commits

Differential Revision: https://reviews.llvm.org/D44935

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328937 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTableGen: More helpful error messages
Nicolai Haehnle [Sun, 1 Apr 2018 17:08:49 +0000 (17:08 +0000)]
TableGen: More helpful error messages

Summary: Change-Id: I3c23f6f6597912423762780cd8c5315870412bbe

Reviewers: arsenm, rampitec, b-sumner

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44936

Change-Id: Ie62614a3e2d7774f46e4034478b28f57100a2c92

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328936 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo] Change std::sort to llvm::sort in response to r327219
Mandeep Singh Grang [Sun, 1 Apr 2018 16:18:49 +0000 (16:18 +0000)]
[DebugInfo] Change std::sort to llvm::sort in response to r327219

Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: echristo, zturner, samsonov

Reviewed By: echristo

Subscribers: JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D45134

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328935 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ThinLTO] Add an import cutoff for debugging/triaging
Teresa Johnson [Sun, 1 Apr 2018 15:54:40 +0000 (15:54 +0000)]
[ThinLTO] Add an import cutoff for debugging/triaging

Summary:
Adds -import-cutoff=N which will stop importing during the thin link
after N imports. Default is -1 (no  limit).

Reviewers: wmi

Subscribers: inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D45127

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328934 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LoopRotate] Rotate loops with loop exiting latches
David Green [Sun, 1 Apr 2018 12:48:24 +0000 (12:48 +0000)]
[LoopRotate] Rotate loops with loop exiting latches

If a loop has a loop exiting latch, it can be profitable
to rotate the loop if it leads to the simplification of
a phi node. Perform rotation in these cases even if loop
rotate itself didnt simplify the loop to get there.

Differential Revision: https://reviews.llvm.org/D44199

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328933 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Don't check for folding into a store when deciding if we can promote an i16...
Craig Topper [Sun, 1 Apr 2018 06:29:32 +0000 (06:29 +0000)]
[X86] Don't check for folding into a store when deciding if we can promote an i16 mul.

There's no RMW mul operation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328931 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Check if the load and store are to the same pointer before preventing i16 RMW...
Craig Topper [Sun, 1 Apr 2018 06:29:28 +0000 (06:29 +0000)]
[X86] Check if the load and store are to the same pointer before preventing i16 RMW shifts and subtracts from being promoted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328930 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add test case to show failure to promote i16 subtract when the LHS is a load...
Craig Topper [Sun, 1 Apr 2018 06:29:27 +0000 (06:29 +0000)]
[X86] Add test case to show failure to promote i16 subtract when the LHS is a load and the result is stored to a different address.

We mistakenly believe we might be able to fold this as a RMW operation, but that doesn't end up happening.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328929 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Allow i16 subtracts to be promoted if the load is on the LHS and its not being...
Craig Topper [Sun, 1 Apr 2018 06:29:25 +0000 (06:29 +0000)]
[X86] Allow i16 subtracts to be promoted if the load is on the LHS and its not being stored.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328928 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add test case to show failure to promote i16 subtract because we mistakenly...
Craig Topper [Sun, 1 Apr 2018 06:29:23 +0000 (06:29 +0000)]
[X86] Add test case to show failure to promote i16 subtract because we mistakenly believe the load can be folded. NFC

The left hand side of the subtract is a load, but we cna't fold those unless we also have a store.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328927 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unneeded temporary variable. NFC
Craig Topper [Sun, 1 Apr 2018 06:29:21 +0000 (06:29 +0000)]
[X86] Remove unneeded temporary variable. NFC

This Promote flag was alwasys set to true except in the default case. But in the default case we don't need to set PVT and can just return false.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328926 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Analysis] Change std::sort to llvm::sort in response to r327219
Mandeep Singh Grang [Sun, 1 Apr 2018 01:46:51 +0000 (01:46 +0000)]
[Analysis] Change std::sort to llvm::sort in response to r327219

Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer D44363 for a list of all the required patches.

Reviewers: sanjoy, dexonsmith, hfinkel, RKSimon

Reviewed By: dexonsmith

Subscribers: david2050, llvm-commits

Differential Revision: https://reviews.llvm.org/D44944

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328925 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAGCombine] (float)((int) f) --> ftrunc (PR36617)
Sanjay Patel [Sat, 31 Mar 2018 17:55:44 +0000 (17:55 +0000)]
[DAGCombine] (float)((int) f) --> ftrunc (PR36617)

fptosi / fptoui round towards zero, and that's the same behavior as ISD::FTRUNC,
so replace a pair of casts with the equivalent node. We don't have to account for
special cases (NaN, INF) because out-of-range casts are undefined.

Differential Revision: https://reviews.llvm.org/D44909

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328921 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-rtdyld] Fix the InputFileList cl::opt description: it accepts multiple
Lang Hames [Sat, 31 Mar 2018 16:01:01 +0000 (16:01 +0000)]
[llvm-rtdyld] Fix the InputFileList cl::opt description: it accepts multiple
input files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328920 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][Btver2] Add MMX_PSHUFB to the JWritePSHUFB InstRW entries
Simon Pilgrim [Sat, 31 Mar 2018 09:15:54 +0000 (09:15 +0000)]
[X86][Btver2] Add MMX_PSHUFB to the JWritePSHUFB InstRW entries

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328918 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix trailing whitespace. NFCI.
Simon Pilgrim [Sat, 31 Mar 2018 09:14:14 +0000 (09:14 +0000)]
Fix trailing whitespace. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328917 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUnbreak the build of the go bindings after r328839.
Benjamin Kramer [Sat, 31 Mar 2018 07:41:25 +0000 (07:41 +0000)]
Unbreak the build of the go bindings after r328839.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328916 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MIR-Canon] Adding support for local idempotent instruction hoisting.
Puyan Lotfi [Sat, 31 Mar 2018 05:48:51 +0000 (05:48 +0000)]
[MIR-Canon] Adding support for local idempotent instruction hoisting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328915 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add SchedRW for PMULLD
Craig Topper [Sat, 31 Mar 2018 04:54:32 +0000 (04:54 +0000)]
[X86] Add SchedRW for PMULLD

Summary:
It seems many CPUs don't implement this instruction as well as the other vector multiplies. Often using a multi uop flow. Silvermont in particular has a 7 uop flow with 11 cycle throughput. Sandy Bridge implements it as a single uop with 5 cycle latency and 1 cycle throughput. But Haswell and later use 2 uops with 10 cycle latency and 2 cycle throughput.

This patch adds a new X86SchedWritePair we can use to tag this instruction separately. I've provided correct information for Silvermont, Btver2, and Sandy Bridge. I've removed the InstRWs for SandyBridge. I've left Haswell/Broadwell/Skylake InstRWs in place because I wasn't sure how to account for the different load latency between 128 and 256 bits. I also left Znver1 InstRWs in place because the existing values don't match Agner's spreadsheet.

I also left a FIXME in the SandyBridge model because it being used for the "generic" model is too optimistic for the 256/512-bit versions since those are multiple uops on all known CPUs.

Reviewers: RKSimon, GGanesh, courbet

Reviewed By: RKSimon

Subscribers: gchatelet, gbedwell, andreadb, llvm-commits

Differential Revision: https://reviews.llvm.org/D44972

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328914 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ThinLTO] Add an option to force summary call edges cold for debugging
Teresa Johnson [Sat, 31 Mar 2018 00:18:08 +0000 (00:18 +0000)]
[ThinLTO] Add an option to force summary call edges cold for debugging

Summary:
Useful to selectively disable importing into specific modules for
debugging/triaging/workarounds.

Reviewers: eraman

Subscribers: inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D45062

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328909 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix a bunch of typoes. NFC
Fangrui Song [Fri, 30 Mar 2018 22:22:31 +0000 (22:22 +0000)]
Fix a bunch of typoes. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328907 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoPrevent data races in concurrent ThinLTO processes.
Ekaterina Romanova [Fri, 30 Mar 2018 21:35:42 +0000 (21:35 +0000)]
Prevent data races in concurrent ThinLTO processes.

Make sure ThinLTO with caching doesn't use non-atomic writes to the cache file (to prevent data races and cache files corruption).

1. Place temp file to the same place where the caching directory is (instead of creating it the directory pointed to by TMP/TEMP variable). This will help to prevent using non-atomic rename and falling back to non-atomic "direct" write to the cache file.
2. if rename failed do not write to the cache file directly (direct write to the file is non-atomic and could cause data race conditions).
3. if cache file doesn't exist (e.g., because 'rename' failed or because some other reasons), bypass using the cache altogether.

Differential Revision:  https://reviews.llvm.org/D45076

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328904 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Register wasm passes with the PassRegistry
Jacob Gravelle [Fri, 30 Mar 2018 20:36:58 +0000 (20:36 +0000)]
[WebAssembly] Register wasm passes with the PassRegistry

Summary:
This exposes WebAssembly passes for use on the command line (as
arguments to -print-before and the like).

Reviewers: dschuff, sunfish

Subscribers: MatzeB, jfb, sbc100, llvm-commits, aheejin

Differential Revision: https://reviews.llvm.org/D45103

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328901 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Fix testcase
Krzysztof Parzyszek [Fri, 30 Mar 2018 19:46:28 +0000 (19:46 +0000)]
[Hexagon] Fix testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328899 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Reduce excessive indentation in .s output
Krzysztof Parzyszek [Fri, 30 Mar 2018 19:30:28 +0000 (19:30 +0000)]
[Hexagon] Reduce excessive indentation in .s output

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328898 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Avoid creating invalid offsets in packetizer
Krzysztof Parzyszek [Fri, 30 Mar 2018 19:28:37 +0000 (19:28 +0000)]
[Hexagon] Avoid creating invalid offsets in packetizer

Two memory instructions with a dependency only on the address register
between the two (the first one of them being post-incrememnt) can be
packetized together after the offset on the second was updated to the
incremement value. Make sure that the new offset is valid for the
instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328897 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][BtVer2] Fixed the number of micro opcodes for AVX vector converts and
Andrea Di Biagio [Fri, 30 Mar 2018 18:53:47 +0000 (18:53 +0000)]
[X86][BtVer2] Fixed the number of micro opcodes for AVX vector converts and
VSQRT instructions.

There were still a few AVX instructions with an incorrect number of opcodes.
These should be fixed now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328892 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDataFlowSanitizer: wrappers of functions with local linkage should have the same...
Peter Collingbourne [Fri, 30 Mar 2018 18:37:55 +0000 (18:37 +0000)]
DataFlowSanitizer: wrappers of functions with local linkage should have the same linkage as the function being wrapped

This patch resolves link errors when the address of a static function is taken, and that function is uninstrumented by DFSan.

This change resolves bug 36314.

Patch by Sam Kerner!

Differential Revision: https://reviews.llvm.org/D44784

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328890 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MIR] Adding support for Named Virtual Registers in MIR.
Puyan Lotfi [Fri, 30 Mar 2018 18:15:54 +0000 (18:15 +0000)]
[MIR] Adding support for Named Virtual Registers in MIR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328887 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][BtVer2] Fix the number of uOps for horizontal operations.
Andrea Di Biagio [Fri, 30 Mar 2018 18:15:30 +0000 (18:15 +0000)]
[X86][BtVer2] Fix the number of uOps for horizontal operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328886 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NVPTX] Enable StructuredCFG for NVPTX
Tim Shen [Fri, 30 Mar 2018 17:51:03 +0000 (17:51 +0000)]
[NVPTX] Enable StructuredCFG for NVPTX

Summary:
Make NVPTX require structured CFG. Added a temporary flag to
"roll back" the behavior for easy deployment.

Combined with D45008, this fixes several internal Nvidia GPU test
failures that we suspect to be ptxas miscompiles (PR27738).

Reviewers: jlebar

Subscribers: jholewinski, sanjoy, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D45070

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328885 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[BlockPlacement] Disable block placement tail duplciation in structured CFG.
Tim Shen [Fri, 30 Mar 2018 17:51:00 +0000 (17:51 +0000)]
[BlockPlacement] Disable block placement tail duplciation in structured CFG.

Summary:
Tail duplication easily breaks the structure of CFG, e.g. duplicating on
a region entry. If the structure is intended to be preserved, then we
may want to configure tail duplication, or disable it for structured
CFG. From our benchmark results disabling it doesn't cause performance
regression.

Notice that this currently affects AMDGPU backend. In the next patch, I
also plan to turn on requiresStructuredCFG for NVPTX.

All unit tests still pass.

Reviewers: jlebar, arsenm

Subscribers: jholewinski, sanjoy, wdng, tpr, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D45008

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328884 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LLVM-C] Finish exception instruction bindings - Round 2
Robert Widmann [Fri, 30 Mar 2018 17:49:53 +0000 (17:49 +0000)]
[LLVM-C] Finish exception instruction bindings - Round 2

Summary:
Previous revision caused a leak in the echo test that got caught by the ASAN bots because of missing free of the handlers array and was reverted in r328759.  Resubmitting the patch with that correction.

Add support for cleanupret, catchret, catchpad, cleanuppad and catchswitch and their associated accessors.

Test is modified from SimplifyCFG because it contains many diverse usages of these instructions.

Reviewers: whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits, vlad.tsyrklevich

Differential Revision: https://reviews.llvm.org/D45100

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328883 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix some signed / unsigned conversion problems.
Zachary Turner [Fri, 30 Mar 2018 17:28:35 +0000 (17:28 +0000)]
Fix some signed / unsigned conversion problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328881 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-pdbutil] Dig deeper into the PDB and DBI streams when explaining.
Zachary Turner [Fri, 30 Mar 2018 17:16:50 +0000 (17:16 +0000)]
[llvm-pdbutil] Dig deeper into the PDB and DBI streams when explaining.

This will show more detail when using `llvm-pdbutil explain` on an
offset in the DBI or PDB streams.  Specifically, it will dig into
individual header fields and substreams to give a more precise
description of what the byte represents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328878 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Refactor tablegen for store instructions (NFC)
Derek Schuff [Fri, 30 Mar 2018 17:02:50 +0000 (17:02 +0000)]
[WebAssembly] Refactor tablegen for store instructions (NFC)

Summary: Add patterns similar to loads.

Differential Revision: https://reviews.llvm.org/D45064

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328876 91177308-0d34-0410-b5e6-96231b3b80d8