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David Brazdil [Wed, 19 Aug 2015 13:42:56 +0000 (13:42 +0000)]
am
32f264e6: Merge "ART: Revisit users in phi elimination"
* commit '
32f264e67afa8654a5570d38b627515fb73fc333':
ART: Revisit users in phi elimination
David Brazdil [Wed, 19 Aug 2015 13:38:28 +0000 (13:38 +0000)]
Merge "ART: Revisit users in phi elimination"
David Brazdil [Wed, 19 Aug 2015 13:17:31 +0000 (14:17 +0100)]
ART: Revisit users in phi elimination
SSA phi elimination visits phis in post order so that loop phis are
visited after their inputs. This prevents elimination of phis with
other phi inputs, exacerbated by the fact that the SSA builder does
create catch phis even if all inputs are the same (unlike with normal
phis). This patch revisits phi users of eliminated phis until no more
phis can be removed.
Change-Id: I403614dd46a8e6f0a5b9dd9e8ddc8832617521eb
Sebastien Hertz [Wed, 19 Aug 2015 13:01:41 +0000 (13:01 +0000)]
am
3bf1027c: Merge "JDWP: remove suspend count check on invoke"
* commit '
3bf1027cd09397f1c076f523de7b4553227d36d3':
JDWP: remove suspend count check on invoke
Sebastien Hertz [Wed, 19 Aug 2015 12:53:38 +0000 (12:53 +0000)]
Merge "JDWP: remove suspend count check on invoke"
Vladimir Marko [Wed, 19 Aug 2015 12:50:45 +0000 (12:50 +0000)]
am
d9c4d2e9: Merge "Revert "Optimizing: Better invoke-static/-direct dispatch.""
* commit '
d9c4d2e9a9bc01fd82a895091126406081fafb1f':
Revert "Optimizing: Better invoke-static/-direct dispatch."
Vladimir Marko [Wed, 19 Aug 2015 12:46:09 +0000 (12:46 +0000)]
Merge "Revert "Optimizing: Better invoke-static/-direct dispatch.""
Vladimir Marko [Wed, 19 Aug 2015 12:45:42 +0000 (12:45 +0000)]
Revert "Optimizing: Better invoke-static/-direct dispatch."
Reverting due to failing ndebug tests.
This reverts commit
9b688a095afbae21112df5d495487ac5231b12d0.
Change-Id: Ie4f69da6609df3b7c8443412b6cf7f5c43c2c5d9
Vladimir Marko [Wed, 19 Aug 2015 11:32:43 +0000 (11:32 +0000)]
am
464581ad: Merge "Optimizing: Better invoke-static/-direct dispatch."
* commit '
464581adaf895d14f73db3d768729f0c9c6f5366':
Optimizing: Better invoke-static/-direct dispatch.
Vladimir Marko [Wed, 19 Aug 2015 11:27:57 +0000 (11:27 +0000)]
Merge "Optimizing: Better invoke-static/-direct dispatch."
Vladimir Marko [Wed, 6 May 2015 13:12:42 +0000 (14:12 +0100)]
Optimizing: Better invoke-static/-direct dispatch.
Add framework for different types of loading ArtMethod*
and code pointer retrieval. Implement invoke-static and
invoke-direct calls the same way as Quick. Document the
dispatch kinds in HInvokeStaticOrDirect's new enumerations
MethodLoadKind and CodePtrLocation.
PC-relative loads from dex cache arrays are used only for
x86-64 and arm64. The implementation for other architectures
will be done in separate CLs.
Change-Id: I468ca4d422dbd14748e1ba6b45289f0d31734d94
Nicolas Geoffray [Wed, 19 Aug 2015 10:56:44 +0000 (10:56 +0000)]
am
5a4f0032: Merge "Remove extra calls to `RecordPcInfo()`."
* commit '
5a4f0032d797cef0bd110ed03b4342862cd27fc8':
Remove extra calls to `RecordPcInfo()`.
Nicolas Geoffray [Wed, 19 Aug 2015 10:52:30 +0000 (10:52 +0000)]
Merge "Remove extra calls to `RecordPcInfo()`."
Alexandre Rames [Wed, 19 Aug 2015 10:33:36 +0000 (11:33 +0100)]
Remove extra calls to `RecordPcInfo()`.
Some calls to `RecordPcInfo()` were mistakingly left in the x86/x86_64
code after we started using the `InvokeRuntime()` helper.
Change-Id: I8a902fee9db2dfb85020167289a786f965cb3fe9
David Brazdil [Wed, 19 Aug 2015 10:14:50 +0000 (10:14 +0000)]
am
f9d86df5: Merge "ART: Revert storing of exceptional predecessors"
* commit '
f9d86df5ff23d7a0459daab2669ceb1b9ed9a035':
ART: Revert storing of exceptional predecessors
David Brazdil [Wed, 19 Aug 2015 10:08:36 +0000 (10:08 +0000)]
Merge "ART: Revert storing of exceptional predecessors"
Roland Levillain [Wed, 19 Aug 2015 10:00:21 +0000 (10:00 +0000)]
am
cbddb90e: Merge "Implement CountLeadingZeros for x86"
* commit '
cbddb90e515c30983094378e316e446b9edca5d6':
Implement CountLeadingZeros for x86
Roland Levillain [Wed, 19 Aug 2015 08:50:42 +0000 (08:50 +0000)]
Merge "Implement CountLeadingZeros for x86"
Mathieu Chartier [Wed, 19 Aug 2015 00:02:44 +0000 (00:02 +0000)]
am
1cb16842: Merge "Always visit object class from VisitReferences"
* commit '
1cb16842fbd213fcd6288efe7f854b6dbc844dcf':
Always visit object class from VisitReferences
Mathieu Chartier [Tue, 18 Aug 2015 23:58:07 +0000 (23:58 +0000)]
Merge "Always visit object class from VisitReferences"
Alex Light [Tue, 18 Aug 2015 23:35:01 +0000 (23:35 +0000)]
am
fdc3990c: Merge "Revert "Introduce support for hardware simulators, starting with ARM64""
* commit '
fdc3990cafb30dff8c48ea042b61b991b31a4b4d':
Revert "Introduce support for hardware simulators, starting with ARM64"
Alex Light [Tue, 18 Aug 2015 23:27:43 +0000 (23:27 +0000)]
Merge "Revert "Introduce support for hardware simulators, starting with ARM64""
Alex Light [Tue, 18 Aug 2015 23:03:42 +0000 (23:03 +0000)]
Revert "Introduce support for hardware simulators, starting with ARM64"
This reverts commit
c2e1a5edc438274159c6ef8e65455ac73723a8f1.
This breaks the build for x86_64 targets. This is because on target the libvixl is not included as a
library for the libart.so target build. The build of non-x86_64 targets only works because the
compilers removes the dead-code that contains the libvixl symbols.
Bug:
23321940
Change-Id: I39e93ff05b887665c47fb0986867f1d13ca65b9b
Mathieu Chartier [Tue, 18 Aug 2015 20:54:21 +0000 (13:54 -0700)]
Always visit object class from VisitReferences
We don't want to unload classes which have instances.
Slight increase in CMS GC time from ~6.5s to ~7.3s on
EvaluateAndApplyChanges.
Bug:
22720414
Change-Id: I467ff9c9d55163d2a90b999aef3bdd7b3f648bac
Alex Light [Tue, 18 Aug 2015 21:49:13 +0000 (21:49 +0000)]
am
f71ad9ed: Merge "Svelter libart-compiler"
* commit '
f71ad9ede9ae322a897e8fe407208dc35c5dee65':
Svelter libart-compiler
Alex Light [Tue, 18 Aug 2015 21:43:44 +0000 (21:43 +0000)]
Merge "Svelter libart-compiler"
Mathieu Chartier [Tue, 18 Aug 2015 20:52:50 +0000 (20:52 +0000)]
am
add6cfac: Merge "Guard thread exited message by try-catch in ThreadStress"
* commit '
add6cfac914f48136e71a05f72123154d7d2d44b':
Guard thread exited message by try-catch in ThreadStress
Mathieu Chartier [Tue, 18 Aug 2015 20:48:30 +0000 (20:48 +0000)]
Merge "Guard thread exited message by try-catch in ThreadStress"
Mathieu Chartier [Tue, 18 Aug 2015 18:42:03 +0000 (11:42 -0700)]
Guard thread exited message by try-catch in ThreadStress
Bug:
18577101
Change-Id: I1c3cbbfad09b88f4d913dc86bb6a89bf5b5269a8
Alex Light [Mon, 10 Aug 2015 22:30:07 +0000 (15:30 -0700)]
Svelter libart-compiler
Added new environment variable ART_{TARGET,HOST}_CODEGEN_ARCHS which
may be set to 'all', 'svelte' or a space separated list of architectures.
When compiled with ART_{TARGET,HOST}_CODEGEN_ARCHS='all' (the default
value) dex2oat will be able to generate output for all supported
architectures.
When compiled with ART_TARGET_CODEGEN_ARCHS='svelte'
only the architectures of the TARGET will be included. When
ART_HOST_CODEGEN_ARCHS='svelte' all architectures the target includes
and the host architectures will be included on the host dex2oat.
If a list of architectures is given only those will be included.
Change-Id: I87f4ad0131ab1b37544d8799e947ce4733b6daec
Mathieu Chartier [Tue, 18 Aug 2015 18:20:43 +0000 (18:20 +0000)]
am
edd0a6db: Merge "Fix some global constructors and destructors"
* commit '
edd0a6dbe26bb334f02d5abe649e3da9165277b2':
Fix some global constructors and destructors
Mathieu Chartier [Tue, 18 Aug 2015 18:14:12 +0000 (18:14 +0000)]
Merge "Fix some global constructors and destructors"
Mathieu Chartier [Tue, 18 Aug 2015 17:41:39 +0000 (10:41 -0700)]
Fix some global constructors and destructors
Bug:
17994073
Change-Id: Ib4da5ac25812460b3dcee26024d1a3415a21257b
Roland Levillain [Tue, 18 Aug 2015 17:49:18 +0000 (17:49 +0000)]
am
fc5b096f: Merge "Fix codegen_test."
* commit '
fc5b096fcddb0ddb2d01e2b28e86ed5a02d37b2e':
Fix codegen_test.
Roland Levillain [Tue, 18 Aug 2015 17:43:29 +0000 (17:43 +0000)]
Merge "Fix codegen_test."
Roland Levillain [Tue, 18 Aug 2015 17:36:20 +0000 (18:36 +0100)]
Fix codegen_test.
Allow the execution of Thumb-2 code on ARM32 hardware.
Change-Id: I2fec71e39d538249569ffa88435f3198e8c28c01
David Brazdil [Tue, 18 Aug 2015 16:17:38 +0000 (17:17 +0100)]
ART: Revert storing of exceptional predecessors
After change of the approach for try/catch register allocation, it is
no longer necessary to record instructions which might throw into a
catch block.
Change-Id: I7ef12ed06c49a35280029810975fa2a50fe4a424
Roland Levillain [Tue, 18 Aug 2015 13:32:44 +0000 (13:32 +0000)]
am
a539ec06: Merge "Introduce support for hardware simulators, starting with ARM64"
* commit '
a539ec06503766fcad4be71480c194a225fb037c':
Introduce support for hardware simulators, starting with ARM64
Roland Levillain [Tue, 18 Aug 2015 13:28:20 +0000 (13:28 +0000)]
Merge "Introduce support for hardware simulators, starting with ARM64"
Phil Wang [Wed, 29 Jul 2015 07:14:09 +0000 (15:14 +0800)]
Introduce support for hardware simulators, starting with ARM64
Simulator support for ARM64 is implemented with VIXL.
Now codegen_test will also run on all supported hardware simulators.
Change-Id: Idc740f566175d1a23c373ea9292b8fc5ba526d00
Mathieu Chartier [Tue, 18 Aug 2015 00:44:45 +0000 (00:44 +0000)]
am
009c34cb: Merge "Fix and improve reference cache mod-union table"
* commit '
009c34cba875885d9540696f33255a9b355d6e15':
Fix and improve reference cache mod-union table
Mathieu Chartier [Tue, 18 Aug 2015 00:40:27 +0000 (00:40 +0000)]
Merge "Fix and improve reference cache mod-union table"
Mathieu Chartier [Sun, 16 Aug 2015 21:37:04 +0000 (14:37 -0700)]
Fix and improve reference cache mod-union table
Improvements:
Remove cards that only contain null references, this can save memory
in some cases.
Fixes:
Fix a bug where the mod-union table didn't properly handle class
loaders in the boot image. This was cause by not adding the new
classes as references. The fix is to leave these cards dirty.
Bug:
23203999
Change-Id: Ib1f1f74154df976dd8abaf2430c6dabd4cae2dbe
Andreas Gampe [Mon, 17 Aug 2015 23:04:47 +0000 (23:04 +0000)]
am
f0917e0e: Merge "ART: Some header cleaning around bit-utils"
* commit '
f0917e0e4b5a4e10bbe33f23f6ea6f73d36d8c52':
ART: Some header cleaning around bit-utils
Andreas Gampe [Mon, 17 Aug 2015 22:59:27 +0000 (22:59 +0000)]
Merge "ART: Some header cleaning around bit-utils"
Andreas Gampe [Fri, 14 Aug 2015 15:22:54 +0000 (08:22 -0700)]
ART: Some header cleaning around bit-utils
Try to remove dependencies where they are not necessary.
Change-Id: I5ff35cb17aea369bed3725b1610b50d7eb05b81e
Andreas Gampe [Mon, 17 Aug 2015 22:30:32 +0000 (22:30 +0000)]
am
0d52a673: Merge "Correct for 115-native-bridge hard-coded x86/x86_64 signal handling values"
* commit '
0d52a6738f55d9610f08d3be24270bd0eeb88edc':
Correct for 115-native-bridge hard-coded x86/x86_64 signal handling values
Andreas Gampe [Mon, 17 Aug 2015 22:24:30 +0000 (22:24 +0000)]
Merge "Correct for 115-native-bridge hard-coded x86/x86_64 signal handling values"
Andreas Gampe [Mon, 17 Aug 2015 21:26:44 +0000 (21:26 +0000)]
am
b0aeeb77: Merge "ART: Follow-up fixes"
* commit '
b0aeeb777f6c2567a9ea038c9442c1df592b7e04':
ART: Follow-up fixes
Andreas Gampe [Mon, 17 Aug 2015 21:21:59 +0000 (21:21 +0000)]
am
228b3973: Merge "ART: Dex2oat lint fix"
* commit '
228b3973b2b24783c727a55fda2b4b80375f7207':
ART: Dex2oat lint fix
Andreas Gampe [Mon, 17 Aug 2015 21:19:23 +0000 (21:19 +0000)]
Merge "ART: Follow-up fixes"
Andreas Gampe [Mon, 17 Aug 2015 21:15:15 +0000 (21:15 +0000)]
Merge "ART: Dex2oat lint fix"
Andreas Gampe [Mon, 17 Aug 2015 21:14:25 +0000 (14:14 -0700)]
ART: Dex2oat lint fix
Lint fix.
Change-Id: Id45bc246645715afaca58c145a70c3b319e5d673
Agi Csaki [Mon, 17 Aug 2015 20:40:45 +0000 (13:40 -0700)]
Correct for 115-native-bridge hard-coded x86/x86_64 signal handling values
Added inline assembly to ensure that the instruction causing a segfault
in x86/x86_64 for the 115-native-bridge test always has a size of 3 bytes,
in response to a bug that caused the test to fail when this instruction
had variable sizes.
Bug:
22876261
Change-Id: I296e623f170fd1925919bedf913c569a6563e3dc
Andreas Gampe [Mon, 17 Aug 2015 21:02:01 +0000 (21:02 +0000)]
am
18d54cda: Merge "Revert "Revert "ART: DCHECK zero case for CLZ/CTZ"""
* commit '
18d54cda7d9a0e6846a1c7b9b72c07598f3d1855':
Revert "Revert "ART: DCHECK zero case for CLZ/CTZ""
Andreas Gampe [Mon, 17 Aug 2015 20:52:26 +0000 (20:52 +0000)]
Merge "Revert "Revert "ART: DCHECK zero case for CLZ/CTZ"""
Andreas Gampe [Fri, 14 Aug 2015 23:01:49 +0000 (23:01 +0000)]
Revert "Revert "ART: DCHECK zero case for CLZ/CTZ""
This reverts commit
4318d91ea4be673d4deba39d33ac4718d77986a7.
Fix up the lit=-1 case in the arm32 Quick backend; add test case.
Change-Id: I8d0861133db950090ee959f532ede1448683dfa9
Andreas Gampe [Mon, 17 Aug 2015 20:43:55 +0000 (13:43 -0700)]
ART: Follow-up fixes
Addressing comments for CL 166499, commit
5073fedd553afeb6ccdb49c1a1ab2cc2947c0870.
Change-Id: I359e5a4c026d58d75cb62b90c495796855302b94
Dan Albert [Mon, 17 Aug 2015 20:37:04 +0000 (20:37 +0000)]
am
381e58a4: Merge "Only apply aarch64 clang WAR to the target."
* commit '
381e58a43c6833f7fa7018cf0545681d3ebea4c3':
Only apply aarch64 clang WAR to the target.
Dan Albert [Mon, 17 Aug 2015 20:31:53 +0000 (20:31 +0000)]
am
0b9c2424: Merge "Refactor art::Dex2Oat::ParseArg."
* commit '
0b9c24247d40e9ff1909fcc89cb01d89f2469721':
Refactor art::Dex2Oat::ParseArg.
Dan Albert [Mon, 17 Aug 2015 20:31:27 +0000 (20:31 +0000)]
Merge "Only apply aarch64 clang WAR to the target."
Dan Albert [Mon, 17 Aug 2015 17:14:51 +0000 (10:14 -0700)]
Only apply aarch64 clang WAR to the target.
Note that the ART_TARGET_CLANG_CFLAGS_$(arch) was actually broken over a
year ago. This patch fixes that and drops the no longer needed
-DNVALGRIND for clang aarch64.
Bug: http://b/
23256622
Change-Id: I749db286c0fd533aeb50744b323c1faddf951d79
Dan Albert [Mon, 17 Aug 2015 20:25:39 +0000 (20:25 +0000)]
Merge "Refactor art::Dex2Oat::ParseArg."
Roland Levillain [Mon, 17 Aug 2015 19:18:41 +0000 (20:18 +0100)]
Refactor art::Dex2Oat::ParseArg.
Split up art::Dex2Oat::ParseArg to allow
`clang++ -01 -Werror -Wframe-larger-than=1728` to compile
dex2oat.cc.
Change-Id: I0b45f394568765ccd849c87a7cf910507291e65d
Alex Light [Mon, 17 Aug 2015 17:29:49 +0000 (17:29 +0000)]
am
5e289b2b: Merge "Make patchoat match offset when given a patched image"
* commit '
5e289b2bca7a0bc67fcf00a1017d70db8b363113':
Make patchoat match offset when given a patched image
Alex Light [Mon, 17 Aug 2015 17:20:46 +0000 (17:20 +0000)]
Merge "Make patchoat match offset when given a patched image"
Vladimir Marko [Mon, 17 Aug 2015 16:03:50 +0000 (16:03 +0000)]
am
4b7b5fcd: Merge "ART: Rename ArtMethod\'s size and alignment methods."
* commit '
4b7b5fcda0f97ed874de0ccd18940030e6c71f04':
ART: Rename ArtMethod's size and alignment methods.
Vladimir Marko [Mon, 17 Aug 2015 15:57:24 +0000 (15:57 +0000)]
Merge "ART: Rename ArtMethod's size and alignment methods."
Vladimir Marko [Mon, 17 Aug 2015 11:07:23 +0000 (12:07 +0100)]
ART: Rename ArtMethod's size and alignment methods.
Remove the historical prefix "Object" to avoid confusion
with Java objects.
Change-Id: Ib36422c9a24878d8d4bd757977d99cbf66b3d567
Vladimir Marko [Mon, 17 Aug 2015 12:01:07 +0000 (12:01 +0000)]
am
8ecc1357: Merge "ART: Compress LengthPrefixedArray on 32-bit targets."
* commit '
8ecc1357e2c682165467ca8e10c7a748f7554df2':
ART: Compress LengthPrefixedArray on 32-bit targets.
Roland Levillain [Mon, 17 Aug 2015 12:01:05 +0000 (12:01 +0000)]
am
6103d962: Merge "Add \'bsr\' instruction to x86 and x86_64"
* commit '
6103d9624f0d2f3e4a486d9f1b188fddf26c8e7c':
Add 'bsr' instruction to x86 and x86_64
Mark Mendell [Thu, 13 Aug 2015 01:16:41 +0000 (21:16 -0400)]
Implement CountLeadingZeros for x86
Generate Long and Integer numberOfLeadingZeros for x86 and x86_64. Uses
'bsr' instruction to find the first one bit, and then corrects the
result.
Added some more tests with constant values to test constant folding.
Also add a runtime test with 0 as the input.
Change-Id: I920b21bb00069bccf5f921f8f87a77e334114926
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Vladimir Marko [Mon, 17 Aug 2015 10:49:15 +0000 (10:49 +0000)]
Merge "ART: Compress LengthPrefixedArray on 32-bit targets."
Roland Levillain [Mon, 17 Aug 2015 10:06:07 +0000 (10:06 +0000)]
Merge "Add 'bsr' instruction to x86 and x86_64"
Vladimir Marko [Wed, 12 Aug 2015 18:27:26 +0000 (19:27 +0100)]
ART: Compress LengthPrefixedArray on 32-bit targets.
Previously, the LengthPrefixedArray<ArtMethod> on 32-bit
targets contained a 64-bit length field followed by the
ArtMethod elements with size only a multiple of 4, not 8.
Consequently, an odd-length array broke the alignment for
the following array which would have the 64-bit length
placed at an unaligned address.
To fix that, we make the length field 32-bit and explicitly
pass the alignment information to the LengthPrefixedArray.
This also makes the 32-bit boot image a bit smaller.
On Nexus 5, AOSP, ToT, the field section is 11528B smaller
and the method section is 21036B smaller. 64-bit targets
should see the same savings for the field section but no
difference for the methods section.
Change-Id: I3e03e7b94129025c8a1c117c27645a34dec516d2
Dan Albert [Mon, 17 Aug 2015 01:11:01 +0000 (01:11 +0000)]
am
9d0f8210: Merge "Force Clang aarch64 builds to -O1."
* commit '
9d0f8210973aa0d823df3274f63b86116f2c58a8':
Force Clang aarch64 builds to -O1.
Dan Albert [Sun, 16 Aug 2015 23:57:36 +0000 (23:57 +0000)]
Merge "Force Clang aarch64 builds to -O1."
Dan Albert [Sun, 16 Aug 2015 23:49:29 +0000 (16:49 -0700)]
Force Clang aarch64 builds to -O1.
Bug: http://b/
23256622
Change-Id: Icab87964576f12a671e255500dec901f3558e7ad
Stephen Hines [Sat, 15 Aug 2015 02:12:54 +0000 (02:12 +0000)]
am
799e81c5: Merge "Add -Wno-pessimizing-move to Clang flags"
* commit '
799e81c5bd283bdaed07c4712a3e9df014230d12':
Add -Wno-pessimizing-move to Clang flags
Stephen Hines [Sat, 15 Aug 2015 02:04:56 +0000 (02:04 +0000)]
Merge "Add -Wno-pessimizing-move to Clang flags"
Andreas Gampe [Fri, 14 Aug 2015 23:56:59 +0000 (23:56 +0000)]
am
63fdedf3: Merge "Optimizing String.Equals as an intrinsic (x86_64)"
* commit '
63fdedf3c46a42c77713b5cc5abce47defaf5550':
Optimizing String.Equals as an intrinsic (x86_64)
Andreas Gampe [Fri, 14 Aug 2015 23:49:45 +0000 (23:49 +0000)]
Merge "Optimizing String.Equals as an intrinsic (x86_64)"
Andreas Gampe [Fri, 14 Aug 2015 22:54:53 +0000 (22:54 +0000)]
am
b31de31c: Merge "ART: Fix verifier dumping, add hard-fail dumping"
* commit '
b31de31c4559c8434aa37701ef2f9e0ba3d2ad44':
ART: Fix verifier dumping, add hard-fail dumping
Andreas Gampe [Fri, 14 Aug 2015 22:47:09 +0000 (22:47 +0000)]
Merge "ART: Fix verifier dumping, add hard-fail dumping"
Andreas Gampe [Fri, 14 Aug 2015 22:37:35 +0000 (15:37 -0700)]
ART: Fix verifier dumping, add hard-fail dumping
Fix the dumping code in the verifier.
Add an option to dump the verifier state on hard failure when
verbose:verifier.
Change-Id: Iccea92fcbcb2301356d86004ea0f5f3e5da84f3c
Andreas Gampe [Fri, 14 Aug 2015 21:40:49 +0000 (21:40 +0000)]
am
933fdd0b: Merge "ART: Relax verifier aput checking"
* commit '
933fdd0b0e7b1f831033d70b922d1845955caa53':
ART: Relax verifier aput checking
Andreas Gampe [Fri, 14 Aug 2015 21:32:53 +0000 (21:32 +0000)]
Merge "ART: Relax verifier aput checking"
Andreas Gampe [Fri, 14 Aug 2015 21:07:43 +0000 (14:07 -0700)]
ART: Relax verifier aput checking
When checking on a null array, the cases of aput and aput-wide are
shared between integral and floating point types. Be careful to not
reject a valid program.
Bug:
21867457
Bug:
23201502
Change-Id: I6c54a389c06e40a2dae00995aa16ff08a089e512
Alex Light [Wed, 12 Aug 2015 01:03:47 +0000 (18:03 -0700)]
Make patchoat match offset when given a patched image
Previously if we gave patchoat a patched image and a already patched
(but improperly relocated) oat file it would not correctly patch the
oat file to the same offset as the image.
Bug:
22599792
Bug:
23119724
Change-Id: I8773022bd75c2e0b7eb529893b147cbd8792bcad
Andreas Gampe [Fri, 14 Aug 2015 18:46:29 +0000 (18:46 +0000)]
am
a0856f51: Merge "Revert "ART: DCHECK zero case for CLZ/CTZ""
* commit '
a0856f5158e35e8cd83b36ece16c58915292653a':
Revert "ART: DCHECK zero case for CLZ/CTZ"
Andreas Gampe [Fri, 14 Aug 2015 18:39:46 +0000 (18:39 +0000)]
Merge "Revert "ART: DCHECK zero case for CLZ/CTZ""
Andreas Gampe [Fri, 14 Aug 2015 18:39:30 +0000 (18:39 +0000)]
Revert "ART: DCHECK zero case for CLZ/CTZ"
This reverts commit
51db2c217052fd6881b81f3ac5162fe88c36dbf0.
Still breaks for arm32. :(
Change-Id: I5fe6fc0cc410cc1c5b6bd68028ce9bf835cb94d5
Mathieu Chartier [Fri, 14 Aug 2015 17:59:26 +0000 (17:59 +0000)]
am
b2812de0: Merge "Change SS to use MarkObjectIfNotInToSpace for roots"
* commit '
b2812de049b55dabf6bf39535a5c9ea26d477be0':
Change SS to use MarkObjectIfNotInToSpace for roots
Andreas Gampe [Fri, 14 Aug 2015 17:59:24 +0000 (17:59 +0000)]
am
72eb673b: Merge "ART: Add utility function to dump dex CFG"
* commit '
72eb673bf8e2da90f1454cd0591a9c8173ed9213':
ART: Add utility function to dump dex CFG
Mathieu Chartier [Fri, 14 Aug 2015 17:54:21 +0000 (17:54 +0000)]
Merge "Change SS to use MarkObjectIfNotInToSpace for roots"
Andreas Gampe [Fri, 14 Aug 2015 17:51:51 +0000 (17:51 +0000)]
Merge "ART: Add utility function to dump dex CFG"
Agi Csaki [Fri, 14 Aug 2015 00:54:54 +0000 (17:54 -0700)]
Optimizing String.Equals as an intrinsic (x86_64)
The fourth implementation of String.Equals. I added an intrinsic
in x86_64 which is similar to the original java implementation
of String.equals: an instanceof check, null check,length check,
and reference equality check followed by a loop comparing strings
four characters at a time.
Interesting Benchmarking Values:
Optimizing Compiler on 64-bit Emulator
Intrinsic 1-5 Character Strings: 48 ns
Original 1-5 Character Strings: 56 ns
Intrinsic 1000+ Character Strings: 4009 ns
Original 1000+ Character Strings: 4704 ns
Intrinsic Non-String Argument: 35 ns
Original Non-String Argument: 42 ns
Bug:
21481923
Change-Id: I17d0d2e24a670a898ab1729669d3990403b9a853
Mathieu Chartier [Fri, 14 Aug 2015 17:37:28 +0000 (10:37 -0700)]
Change SS to use MarkObjectIfNotInToSpace for roots
The roots can be in the to-space since we may visit the declaring
class of an ArtMethod multiple times if it is on the call stack.
Fixes GSS/SS tests for a few test cases.
Change-Id: Iba354340289fc49987d06e70929dadb2f367734b
Mark Mendell [Thu, 13 Aug 2015 01:16:41 +0000 (21:16 -0400)]
Add 'bsr' instruction to x86 and x86_64
Add support for 'bsr' instruction. Add tests.
Change-Id: I1cd8b30d7f3f5ee7fbeef8124cc6a31bf8ce59d5
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Roland Levillain [Fri, 14 Aug 2015 16:15:18 +0000 (16:15 +0000)]
am
f67ab129: Merge "Add rep movsw to x86 and x86_64 instructions."
* commit '
f67ab129d868b8355a8403a9627f96ac1e41a796':
Add rep movsw to x86 and x86_64 instructions.