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8 years agomsm: pcie: add PCIe support for 3.18 kernel
Tony Truong [Thu, 16 Apr 2015 19:01:51 +0000 (12:01 -0700)]
msm: pcie: add PCIe support for 3.18 kernel

Add PCIe support for 3.18 kernel. Added enumeration,
interrupts, and hardware configurations support for
PCIe.

Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: increase the Ipeaks for PCIe LDOs
Tony Truong [Thu, 28 May 2015 21:24:41 +0000 (14:24 -0700)]
msm: pcie: increase the Ipeaks for PCIe LDOs

Increase the Ipeak request for each PCIe LDO based
on updated settings.

Change-Id: Ie3af6462dac68252b339595e350e393079a89bb9
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: add SMMU support to calculate SID for PCIe EP
Tony Truong [Mon, 5 Jan 2015 20:58:58 +0000 (12:58 -0800)]
msm: pcie: add SMMU support to calculate SID for PCIe EP

SMMU requires PCIe to provide a SID for each of its endpoint
so that the endpoint can successful transaction on the bus.
This change adds the support for PCIe bus driver to calculate
a SID for its endpoint and give it to the SMMU driver.

Change-Id: I52099bbfed0a38c75b0277b0f58f45f6e6559695
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: correct exit code for invalid Root Complex indexes
Tony Truong [Fri, 8 May 2015 23:39:49 +0000 (16:39 -0700)]
msm: pcie: correct exit code for invalid Root Complex indexes

In the case where the Root Complex fails to retrive a valid
index, the exit code fails to handle this correctly. This
change corrects the way the exit code handles invalid root
complex indexes.

Change-Id: Ie832fec1be2b05dea05b8917348a1c08cdc1d681
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: add support to enable additional GPIO for endpoint
Tony Truong [Thu, 30 Apr 2015 02:22:00 +0000 (19:22 -0700)]
msm: pcie: add support to enable additional GPIO for endpoint

Some EP requires additional GPIO to be enabled for link training.
Add the support in PCIe Bus Driver to manage this GPIO.

Change-Id: I837edae478779fdaf3e94c70a0a031f9d0580a77
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agoDocumentation: devicetree: add iommus entry for PCIe
Tony Truong [Mon, 27 Apr 2015 20:12:55 +0000 (13:12 -0700)]
Documentation: devicetree: add iommus entry for PCIe

PCIe on some targets require the iommus device tree entry.
Therefore, add this device tree entry to the PCIe
documentation.

Change-Id: Iec6c4cfcd5e51d6aa1259bb826fe60d131072170
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: update PCIe PHY sequence on MSM8996
Tony Truong [Thu, 23 Apr 2015 01:36:18 +0000 (18:36 -0700)]
msm: pcie: update PCIe PHY sequence on MSM8996

There are new PCIe PHY settings that have been updated
to improve performance and stablilty. Therefore, update
the PCIe PHY sequence on MSM8996.

Change-Id: If321471c51ff6a91595b68bd2cae08c8c043d6bb
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: add entry and exit detail logging for PCIe
Tony Truong [Wed, 8 Apr 2015 01:05:30 +0000 (18:05 -0700)]
msm: pcie: add entry and exit detail logging for PCIe

To support more accurate benchmarks, add entry and exit logs
for PCIe functions.

Change-Id: I49f27263722adfaa8ae3973f242faa6a589d3358
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: correct the offset of a PCIe AXI register
Tony Truong [Mon, 9 Mar 2015 20:48:04 +0000 (13:48 -0700)]
msm: pcie: correct the offset of a PCIe AXI register

Correct the offset of a PCIe AXI register.

Change-Id: I429c3e42cc8bb6cc7e23b5e461e51ec10435a89d
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: add PCIe MSI support on 3.14 kernel
Tony Truong [Thu, 9 Apr 2015 00:26:05 +0000 (17:26 -0700)]
msm: pcie: add PCIe MSI support on 3.14 kernel

To support PCIe MSI on 3.14 kernel, the client's host
driver must use the QGIC IRQ number to request/enable
the interrupt while the client's firmware must use
the SPI number to trigger the interrupt. Therefore,
add this logic in PCIe bus driver to support MSI
interrupts on 3.14 kernel.

Change-Id: I165022281c9e795be8c5e2e4a4faa34d4c004a45
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: correct PCIe PHY dump status register read
Tony Truong [Thu, 26 Mar 2015 20:31:00 +0000 (13:31 -0700)]
msm: pcie: correct PCIe PHY dump status register read

After writing to a PCIe PHY debug register, the wrong
PCIe PHY status register is being read back. This change
corrects the PCIe PHY status register that is read back.

Change-Id: If360aa6f9b4530e4c07acfcc1af684c6d7ecc234
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: add PCIe support for thulium
Tony Truong [Fri, 19 Sep 2014 22:00:41 +0000 (15:00 -0700)]
msm: pcie: add PCIe support for thulium

Add PCIe support for thulium. Added enumeration,
interrupts, and hardware configurations support for
PCIe.

Change-Id: I48b2fc8a51303a6aea7b1b2a97c4de25f19ded4c
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: sanity check when calculating EP CAP offset
Tony Truong [Fri, 27 Feb 2015 23:18:31 +0000 (15:18 -0800)]
msm: pcie: sanity check when calculating EP CAP offset

When searching for the endpoint's capabilities register,
check that the value from the register read is valid.

Change-Id: Ia64de3c75618ca0a51aa4588ac97f2fcb26d8829
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: correct the shadow save for RC L1 register
Tony Truong [Fri, 27 Feb 2015 01:01:51 +0000 (17:01 -0800)]
msm: pcie: correct the shadow save for RC L1 register

When reading shadow registers, the wrong value is being
recovered for root complex L1 register. Currently,
the value being recovered is a shadow of the endpoint's
L1 register. This change will recover the correct shadow
value for RC L1 register.

Change-Id: I82b1810ef8761de90b350743cdd9b24a74efb62f
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: remove duplicate call to get aux clk from dt
Tony Truong [Thu, 19 Feb 2015 00:01:49 +0000 (16:01 -0800)]
msm: pcie: remove duplicate call to get aux clk from dt

There is an extra identical call made to check if aux clk
is supported base from PCIe device tree node. There is no
need to do this check twice; therefore, remove the duplicate
call.

Change-Id: If705e98e637287969d68ea2241e62447aa505eb0
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: only look for EP CAP reg for certain testcases
Tony Truong [Wed, 18 Feb 2015 23:45:32 +0000 (15:45 -0800)]
msm: pcie: only look for EP CAP reg for certain testcases

Not all the testcases for debugfs needs the calculated offset
of an endpoint's capability register. Therefore, only calculate
the offset of an endpoint's capanility register if that testcase
needs it.

Change-Id: Iffddcea682d8c9344f51a04b57f60ba906b01dc6
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: add support to enable common clock for RC
Tony Truong [Wed, 18 Feb 2015 23:41:05 +0000 (15:41 -0800)]
msm: pcie: add support to enable common clock for RC

When the clients want to enable common clock for the
endpoint, also enable it for the root complex.

Change-Id: I55d5a69be0746a745b073051452d45a38d0a4e65
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: add PCIe PHY support for FSM9010
Tony Truong [Thu, 22 Jan 2015 01:45:15 +0000 (17:45 -0800)]
msm: pcie: add PCIe PHY support for FSM9010

FSM9010 requires a different PHY sequence. Therefore,
this change adds the PCIe PHY support for FSM9010.

Change-Id: Ic98860d3ac1f7b644b76064032f399f070fc9b47
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: add support to enable clk power management for EP
Tony Truong [Thu, 29 Jan 2015 02:20:25 +0000 (18:20 -0800)]
msm: pcie: add support to enable clk power management for EP

Add support to enable the clock power management for the
endpoint.

Change-Id: I02bebfeb5d32eb8e1f75ee5feb4c4fff956ece66
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: add support to enable common clk config for EP
Tony Truong [Thu, 29 Jan 2015 01:08:04 +0000 (17:08 -0800)]
msm: pcie: add support to enable common clk config for EP

Add support to enable the common clock configuration for the
endpoint.

Change-Id: I9f6c33eb6cfa032837a07e437f349a7c1a60704c
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: calculate EP's capability register offsets
Tony Truong [Thu, 29 Jan 2015 00:04:53 +0000 (16:04 -0800)]
msm: pcie: calculate EP's capability register offsets

The start address of the capability register varies
depending on the endpoint. This change calculates the
endpoint's capability register offset instead of using
a fixed one.

Change-Id: I28a97d316aee8c34afe313838b91fcc06af0847f
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: add PM support for multiple endpoints on a bridge
Tony Truong [Wed, 21 Jan 2015 23:27:21 +0000 (15:27 -0800)]
msm: pcie: add PM support for multiple endpoints on a bridge

In the case of multiple endpoints connected to a bridge,
PM logic is not present. Therefore, this change adds
PM support for when there are multiple endpoints on a bridge.

Change-Id: I5a1876db85d0d161ae537a09a508a93b5099aa56
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agomsm: pcie: add PCIe bus driver snapshot
Tony Truong [Thu, 2 Oct 2014 00:35:56 +0000 (17:35 -0700)]
msm: pcie: add PCIe bus driver snapshot

This PCIe bus driver snapshot is taken as of msm-3.10 commit:
 803998b (Merge "ASoC: wcd: don't set autozeroing for conga")

This change adds the PCIe bus driver and its dependecies from
msm-3.10 to msm-3.14. All the files are as is from msm-3.10.
No additional changes were made.

Change-Id: Ia1a2d0eea0cc87c16357c95bfcc4df72e910cd34
Signed-off-by: Tony Truong <truong@codeaurora.org>
8 years agoEnable CONFIG_RTC_DRV_QPNP
Mao Jinlong [Wed, 17 Feb 2016 09:07:11 +0000 (17:07 +0800)]
Enable CONFIG_RTC_DRV_QPNP

Enable CONFIG_RTC_DRV_QPNP as power_on_alarm_init is added by
change : I781389c658fb00ba7f0ce089d706c10f202a7dc6

Change-Id: I48bc69e2215e45e0c5c7bc8aa2c489fca995c201
Signed-off-by: Mao Jinlong <c_jmao@codeaurora.org>
8 years agortc: alarm: Add power-on alarm feature
Mao Jinlong [Wed, 17 Feb 2016 07:21:49 +0000 (15:21 +0800)]
rtc: alarm: Add power-on alarm feature

Android does not support powering-up the phone through alarm.
Set rtc alarm in timerfd to power-up the phone after alarm
expiration.

Change-Id: I781389c658fb00ba7f0ce089d706c10f202a7dc6
Signed-off-by: Mao Jinlong <c_jmao@codeaurora.org>
8 years agoalarmtimer: add rtc irq support for alarm
Mao Jinlong [Wed, 17 Feb 2016 07:19:08 +0000 (15:19 +0800)]
alarmtimer: add rtc irq support for alarm

Add the rtc irq support for alarmtimer to wakeup the
alarm during system suspend.

Change-Id: I41b774ed4e788359321e1c6a564551cc9cd40c8e
Signed-off-by: Xiaocheng Li <lix@codeaurora.org>
8 years agodefconfig: arm64: msm: Enable sensors SSC driver
Satya Durga Srinivasu Prabhala [Tue, 16 Feb 2016 20:17:49 +0000 (12:17 -0800)]
defconfig: arm64: msm: Enable sensors SSC driver

Enable sensors SSC driver.

Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
8 years agoSnapshot: SSC Sensor driver
Satya Durga Srinivasu Prabhala [Tue, 16 Feb 2016 20:08:20 +0000 (12:08 -0800)]
Snapshot: SSC Sensor driver

This snapshot is taken as of msm-3.18 commit 95a59da3cf
(msm: hdcp: proper state sanitization for different versions)

Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
8 years agoirqchip: gic-v3: Add panic handler to save registers
Cassidy Burden [Tue, 11 Aug 2015 19:54:19 +0000 (12:54 -0700)]
irqchip: gic-v3: Add panic handler to save registers

Save gic-v3 distributor registers on panic. Allows for inspection of
gic-v3 state at the time of a panic.

Change-Id: I3236577161abab4e292a01254e1e1ecb50bb38de
Signed-off-by: Cassidy Burden <cburden@codeaurora.org>
8 years agoARM: gic-v3: Log the IRQs in RTB before handling an IRQ
Abhimanyu Kapur [Sat, 13 Feb 2016 01:43:00 +0000 (17:43 -0800)]
ARM: gic-v3: Log the IRQs in RTB before handling an IRQ

Gic-v3 did not log IRQs in RTB like gic-v2. Thus add the LOGK_IRQ log
before calling the IRQ handler like gic-v2.

Change-Id: I46a5951e733a05b9a7d5d6323568fa800dfb5d62
Signed-off-by: Cassidy Burden <cburden@codeaurora.org>
[abhimany: resolve minor merge conflicts]
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
8 years agoirqchip: GICv3: Check if GIC register access is controlled
Abhimanyu Kapur [Sat, 13 Feb 2016 01:34:46 +0000 (17:34 -0800)]
irqchip: GICv3: Check if GIC register access is controlled

Add support to configure ITS registers only if higher
exception levels have not already configured them.

Change-Id: I45eaa51e56e034d011cf41d8b924fb674f63447d
Signed-off-by: Hanumant Singh <hanumant@codeaurora.org>
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
[abhimany: resolved minor merge conflict]
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
8 years agodrivers: GICv3: Add mb() after the read of the IAR1_EL1 and other registers
Abhimanyu Kapur [Sat, 13 Feb 2016 01:27:36 +0000 (17:27 -0800)]
drivers: GICv3: Add mb() after the read of the IAR1_EL1 and other registers

As per the GICv3 architecture spec section "Observability
of GIC Register Accsses", architecture execution of the "DSB"
gurantees that last interrupt identifier read from ICC_IAR{0,1}_EL1
is observable by the top-level Distributor and by accesses from
any processor to the top-level Distributor.

Same comment goes for the ICC_PMR_EL1 and ICC_SGI1R_EL1 too.

CRs-Fixed: 960754
Change-Id: I9c7bcdee51f71d369e2a6f04faf7a22c3c1381bc
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
[abhimany: relocate mb()'s to header files]
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
8 years agoirqchip: gicv3: Add GICv3 access control Kconfig option
Trilok Soni [Wed, 9 Dec 2015 01:15:18 +0000 (17:15 -0800)]
irqchip: gicv3: Add GICv3 access control Kconfig option

Some SOCs(System-on-chip) S/W configurations restricts the access
to particular set of the GIC registers to prevent invalid
accesses for the security reasons. Provide a configuration
option for the GICv3 driver and also restrict the access
of the GICR_WAKER registers from the non-secure world.

If this Kconfig option is not selected then it means that
access control configuration is enabled from the secure world.

CRs-Fixed: 958251
Change-Id: I91f06484b6b6bf58d05e6b621ee84610a71fe3e7
[abhimany: minor merge conflict resolution]
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
8 years agoarm: traps: emulate a MRCC instruction reading CNTPCT register
Se Wang (Patrick) Oh [Thu, 28 May 2015 19:37:22 +0000 (12:37 -0700)]
arm: traps: emulate a MRCC instruction reading CNTPCT register

A user space application is planned to support feature for
synchronized timestamp among debug packets across peripherals.
As part of the feature, it is responsible for providing physical
timer count value to user space. If memory mapped timer is used
in ARM arch, Usersapce can't read the physical timer count directly
with a MRCC ASM instruction. So Kernel traps the instruction and
returns the physical timer count.

Change-Id: Ia3f0d9c8c06ca9e2204187890c0c57c8640e4f7e
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
[abhimany: minor merge conflict resolution]
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
8 years agoclocksource: arch_timer: Enable user access to the physical counter
Se Wang (Patrick) Oh [Wed, 20 May 2015 03:14:44 +0000 (20:14 -0700)]
clocksource: arch_timer: Enable user access to the physical counter

A user space application is planned to support feature for
synchronized timestamp among debug packets across peripherals.
As part of the feature, it is responsible for providing physical
timer count value to user space. So Enable user access to the
physical counter in cp15 register.

Change-Id: Idf7f6375713d842925e6f72a4b1fb98a7168726d
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
8 years agodefconfig: arm64: enable boot stats reporting on msmcortex
Abhimanyu Kapur [Sat, 13 Feb 2016 00:39:55 +0000 (16:39 -0800)]
defconfig: arm64: enable boot stats reporting on msmcortex

Enable boot stats reporting on the debug and perf msmcortex
configs.

Change-Id: I3baa866f93a484acdde5789dbd3ac02a03bc561a
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
8 years agoDocumentation: arm: msm: Add document for SMEM Driver
Karthikeyan Ramasubramanian [Thu, 11 Feb 2016 23:14:54 +0000 (16:14 -0700)]
Documentation: arm: msm: Add document for SMEM Driver

The Shared Memory Manager driver implements an interface for allocating
and accessing items in the memory area shared among all of the
processors in a Qualcomm platform.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agosoc: qcom: Add snapshot of System Health Monitor
Karthikeyan Ramasubramanian [Thu, 11 Feb 2016 23:08:06 +0000 (16:08 -0700)]
soc: qcom: Add snapshot of System Health Monitor

This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agodefconfig: arm64: msm: Enable smd_tty
Karthikeyan Ramasubramanian [Thu, 11 Feb 2016 22:56:31 +0000 (15:56 -0700)]
defconfig: arm64: msm: Enable smd_tty

Enable userspace access to SMD channels via a streaming interface.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agodrivers: tty: serial: Add snapshot of SMD_TTY Driver
Karthikeyan Ramasubramanian [Thu, 11 Feb 2016 22:53:42 +0000 (15:53 -0700)]
drivers: tty: serial: Add snapshot of SMD_TTY Driver

This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agodefconfig: arm64: msm: Enable glink_pkt
Karthikeyan Ramasubramanian [Thu, 11 Feb 2016 21:39:12 +0000 (14:39 -0700)]
defconfig: arm64: msm: Enable glink_pkt

The glink_pkt driver provides packet access to G-Link channels for
userspace clients.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agosoc: qcom: Add snapshot of GLINK_PKT Driver
Karthikeyan Ramasubramanian [Thu, 11 Feb 2016 21:36:19 +0000 (14:36 -0700)]
soc: qcom: Add snapshot of GLINK_PKT Driver

This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agomsm: boot_stats: Add snapshot of boot_stats driver
Abhimanyu Kapur [Tue, 8 Jul 2014 21:24:45 +0000 (14:24 -0700)]
msm: boot_stats: Add snapshot of boot_stats driver

Add a snapshot of the msm boot_stats driver as of commit
acdce027751d5a7488b283f0ce3111f873a5816d (Merge "defconfig: arm64: Enable
ONESHOT_SYNC for msm8994")

Change-Id: Iee7ec288fe44606b468dc533bb4221f8d018b3cb
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
[abhimany: resolve trivial merge conflicts and add header file]
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
8 years agosoc: qcom: rq_stats: add snapshot of run queue stats driver
Matt Wagantall [Fri, 24 Jul 2015 07:46:40 +0000 (00:46 -0700)]
soc: qcom: rq_stats: add snapshot of run queue stats driver

Add a snapshot of the run queue stats driver as of msm-3.10 commit
4bf320bd ("Merge "ASoC: msm8952: set async flag for 8952 dailink"")

Resolve checkpatch warnings in the process, notably the replacement
of sscanf with kstrtouint.

Change-Id: I7e2f98223677e6477df114ffe770c0740ed37de9
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
8 years agodefconfig: msmcortex: enable core hang detection
Abhimanyu Kapur [Sat, 13 Feb 2016 00:17:57 +0000 (16:17 -0800)]
defconfig: msmcortex: enable core hang detection

Enable core  hang detection debug feature on
msmcortex defconfig.

Change-Id: I4cbf8811f190d88e6a0efddc23ee19f80b5a74df
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
8 years agosoc: qcom: core_hang: Add core hang driver
Prasad Sodagudi [Tue, 20 Oct 2015 18:22:24 +0000 (23:52 +0530)]
soc: qcom: core_hang: Add core hang driver

Add driver for core hang detection.
This drivers provides sysfs entries to configure
threshold, pmu event select and enable parameters
for core hang detection feature.

Change-Id: Ieb19b309238fc11f1a631842564a7e43b16651dc
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
8 years agodefconfig: msmcortex: enable gladiator hang detection
Abhimanyu Kapur [Sat, 13 Feb 2016 00:07:32 +0000 (16:07 -0800)]
defconfig: msmcortex: enable gladiator hang detection

Enable gladiator hang detection debug feature on the
msmcortex defconfig.

Change-Id: Ie33697d94cf9bd964b6a832ce7aeebf960e00e2a
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
8 years agosoc: qcom: gladiator_hang: Add gladiator hang driver
Runmin Wang [Wed, 2 Dec 2015 01:51:55 +0000 (17:51 -0800)]
soc: qcom: gladiator_hang: Add gladiator hang driver

Add driver for gladiator hang detection.
This driver provides sysfs entries to configure thresholds,
enable parameters for ACE, IO, M1, M2, PCIO gladiator ports.

Change-Id: Ib4bfa084a4265d6b6a149e8c932a5e6f884a043e
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
8 years agosoc: qcom: Correct the logic to determine if device is secure boot or not.
Aparna Mallavarapu [Thu, 9 Jul 2015 07:13:05 +0000 (12:43 +0530)]
soc: qcom: Correct the logic to determine if device is secure boot or not.

Correct the logic to determine if device is secure boot or not
and accordingly disable the gladiator ERP driver for secure boot devices.

Change-Id: I7fc38983f293eb48abbeb3e4996bc3e03046b962
Signed-off-by: Aparna Mallavarapu <aparnam@codeaurora.org>
8 years agosoc: qcom: Add support for gladiator error reporting
Abhimanyu Kapur [Sat, 14 Feb 2015 00:42:38 +0000 (16:42 -0800)]
soc: qcom: Add support for gladiator error reporting

Add support for gladiator cache interconnect error
detection and reporting. The Gladiator is the cache
coherent interconnect in between two or more CPU
clusters. This driver helps detect the errors related to
snoop data transfer and Distributed Virtual Memory(DVM)
on READ/WRITE transactions.

Change-Id: Ic1aa2066df239672a8ed3d99a63318ed32a11af2
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
8 years agodefconfig: msm: enable SPS/BAM driver
Yan He [Thu, 11 Feb 2016 06:42:32 +0000 (22:42 -0800)]
defconfig: msm: enable SPS/BAM driver

Enable SPS/BAM driver on 4.4 kernel.

Change-Id: Ib7a7bce4564f0a817fd93612fcc0d8824bd1c9cf
Signed-off-by: Yan He <yanhe@codeaurora.org>
8 years agoplatform: msm: Add snapshot of the SPS/BAM driver
Yan He [Thu, 11 Feb 2016 06:38:38 +0000 (22:38 -0800)]
platform: msm: Add snapshot of the SPS/BAM driver

Add the MSM SPS (Smart Peripheral Switch) driver.

SPS may be used as a DMA engine to move data in either Peripheral-to-
Peripheral (a.k.a. BAM-to-BAM) mode or Peripheral-to-Memory (a.k.a
BAM-System) mode.

This snapshot is taken as of msm-3.18 commit 132e1315c1

Change-Id: I7ec9781c3b608b9ee0fffdf7ba3e1b33bfa4dfcd
Signed-off-by: Yan He <yanhe@codeaurora.org>
8 years agosoc: qcom: Snapshot of thermal/LMH drivers
Mahesh Sivasubramanian [Mon, 11 Jan 2016 21:27:35 +0000 (14:27 -0700)]
soc: qcom: Snapshot of thermal/LMH drivers

This snapshot is taken as of msm-3.18 commit e70ad0c (Promotion of
kernel.lnx.3.18-151201.)

Include necessary thermal_core changes to convert long to int inline with
upstream kernel changes.

Change-Id: I642b666518fe72385794b743989a0f5e5120ec03

Conflicts:
drivers/thermal/Makefile

8 years agokobject: increase number of kobject uevent pointers to 64
Subbaraman Narayanamurthy [Tue, 26 Jan 2016 23:59:30 +0000 (15:59 -0800)]
kobject: increase number of kobject uevent pointers to 64

Power supply framework uses uevents to notify the power supply
change events to the userspace. Some power supplies have their
properties increasing thus overflowing the number of kobject
uevent pointers, triggering warning shown below.

[   10.577545] WARNING: CPU: 3 PID: 406 at kernel/lib/kobject_uevent.c:393 add_uevent_var+0xc0/0x100()
[   10.589680] add_uevent_var: too many keys
[   10.593809] Modules linked in:
[   10.596686] CPU: 3 PID: 406 Comm: kworker/3:2 Tainted: G        W      3.18.20-g5e99605-00057-gd18285f #603
[   10.606373] Hardware name: Qualcomm Technologies, Inc. MSM 8996 v3 + PMI8996 MTP (DT)
[   10.614188] Workqueue: events power_supply_changed_work
[   10.619366] Call trace:
[   10.621803] [<ffffffc00008881c>] dump_backtrace+0x0/0x130
[   10.627175] [<ffffffc00008895c>] show_stack+0x10/0x1c
[   10.632237] [<ffffffc000cc4d00>] dump_stack+0x74/0xb8
[   10.637253] [<ffffffc0000a0fec>] warn_slowpath_common+0x90/0xb8
[   10.643170] [<ffffffc0000a1060>] warn_slowpath_fmt+0x4c/0x58
[   10.648814] [<ffffffc00031121c>] add_uevent_var+0xbc/0x100
[   10.654259] [<ffffffc0003116f8>] kobject_uevent_env+0x498/0x5a8
[   10.660185] [<ffffffc000311814>] kobject_uevent+0xc/0x18
[   10.665457] [<ffffffc0007fd3c0>] power_supply_changed_work+0xb0/0xf0
[   10.671830] [<ffffffc0000b617c>] process_one_work+0x23c/0x3f4
[   10.677529] [<ffffffc0000b7338>] worker_thread+0x280/0x3a8
[   10.683017] [<ffffffc0000bb384>] kthread+0xe0/0xec

Fix this warning by increasing the number of kobject uevent
pointers from 32 to 64.

CRs-Fixed: 971954
Change-Id: Ide942d25006abd36ba7be945be397a535e91d970
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
8 years agoarm64: dts: msm: Temporarily disable WiPower charging
Jack Pham [Wed, 3 Feb 2016 04:00:43 +0000 (20:00 -0800)]
arm64: dts: msm: Temporarily disable WiPower charging

WiPower charging depends on VADC which is not yet ported. Disable
it for now in order to allow pmi8994 charger to work for other
use cases, such as USB charging and detection.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
8 years agopower: Ensure power_supply_config is zero-initialized
Jack Pham [Wed, 3 Feb 2016 03:56:58 +0000 (19:56 -0800)]
power: Ensure power_supply_config is zero-initialized

Since the config object is created on the stack, ensure that
it is initialized to zero. Otherwise an invalid pointer access
may occur when trying to dereference the cfg->of_node pointer
that's typically left unset.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
8 years agodefconfig: arm64: msm: Enable USB Gadget ConfigFS drivers
Jack Pham [Wed, 3 Feb 2016 01:43:41 +0000 (17:43 -0800)]
defconfig: arm64: msm: Enable USB Gadget ConfigFS drivers

Enable USB_GADGET, USB_CONFIGFS and several of the most used
function drivers to allow device mode operation. These drivers
provide functionality previously provided by the Android gadget
driver.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
8 years agodefconfig: arm64: msm: Enable USB DWC3 and PHY drivers (v2)
Jack Pham [Tue, 2 Feb 2016 21:40:19 +0000 (13:40 -0800)]
defconfig: arm64: msm: Enable USB DWC3 and PHY drivers (v2)

Enable DWC3, QUSB and QMP PHY drivers to support the USB
controller hardware. Also enable XHCI_HCD for USB host mode.

This is the second take, after fixing compilation errors in
dwc3-msm.c.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
8 years agousb: dwc3-msm: Allow compilation when USB_GADGET=n
Jack Pham [Wed, 10 Feb 2016 00:04:20 +0000 (16:04 -0800)]
usb: dwc3-msm: Allow compilation when USB_GADGET=n

Fix link errors when USB_GADGET=n which causes dwc3/gadget.c
not to be built. These symbols are only used in the msm_ep_config/
unconfig functions so we can conditionally compile them.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
8 years agothermal: thermal_sys: Add support for configurable trip points.
Siddartha Mohanadoss [Tue, 7 Dec 2010 06:49:26 +0000 (22:49 -0800)]
thermal: thermal_sys: Add support for configurable trip points.

Add functionality for configurable hi, low and critical low.
Change the trip point attributes to allow userspace clients
with root access to set temperature for configurable hi and
low temperature.

Change-Id: I25c9c3bcfd58e44da5369187d1095559062f1860
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
8 years agoRevert "thermal-core: Add a lock to tz_notify_trip()"
Ram Chandrasekar [Wed, 7 Jan 2015 00:46:41 +0000 (17:46 -0700)]
Revert "thermal-core: Add a lock to tz_notify_trip()"

This reverts commit 383ac33a1e2ab375e41387cf05132533ae178c36.

The temperature sensor drivers registering with thermal
core framework can call the thermal_sensor_trip() API in
interrupt context. This might cause potential thermal
reset issues because the interrupt might be disabled till
this API returns.

Change-Id: I8d6dfc55386fbdea8e51e7abbb0e7632208c6c38
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agothermal-core: Add separate threads for sysfs notify
Shiju Mathew [Tue, 30 Dec 2014 19:59:23 +0000 (14:59 -0500)]
thermal-core: Add separate threads for sysfs notify

Add separate threads for sysfs notify. This is required
so that any thermal trip is not blocked while handling
sysfs notify.

Change-Id: Ifee206c29fd1b3c226a342b7f048250d5062397e
Signed-off-by: Shiju Mathew <shijum@codeaurora.org>
[imaund@codeaurora.org: Resolved context conflicts and updated a call
  of INIT_COMPLETION to reinit_completion]
Signed-off-by: Ian Maund <imaund@codeaurora.org>
8 years agothermal-core: Re-program the thresholds every time
Jeff Bernard [Wed, 10 Dec 2014 04:14:13 +0000 (23:14 -0500)]
thermal-core: Re-program the thresholds every time

Program the thresholds every time regardless so we guarantee
the threshold is programmed.  Previous code didn't reprogram
the threshold if it was already believed to be set.  This
check can be wrong is some cornor cases.

Change-Id: Ie94cb40302c585b2b779da57ad70d32cc2445c96
Signed-off-by: Jeff Bernard <jbernard@codeaurora.org>
8 years agothermal-core: Add a lock to tz_notify_trip()
Jeff Bernard [Wed, 10 Dec 2014 03:09:48 +0000 (22:09 -0500)]
thermal-core: Add a lock to tz_notify_trip()

Lock the sensor threshold list during notifications so it
isn't updated until notifications are sent out nor can
something else update thresholds until all notifications
are sent out.

Change-Id: Iafce75fa7fceda3de867044861e4a2e3eef47c95
Signed-off-by: Jeff Bernard <jbernard@codeaurora.org>
8 years agothermal_core: Add sysfs notification support for userspace
Ram Chandrasekar [Fri, 21 Nov 2014 01:25:07 +0000 (18:25 -0700)]
thermal_core: Add sysfs notification support for userspace

Add support to notify the userspace through sysfs
notification when a userspace threshold is crossed.

Change-Id: Ifdea7f15f288d1dca5365aedad16d1bdbc80be6c
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agothermal-core: Add API to get temperature
Archana Sathyakumar [Wed, 12 Mar 2014 15:41:12 +0000 (09:41 -0600)]
thermal-core: Add API to get temperature

Currently, there is no API to query the current temperature
in sensor framework. Add a generic API to get it.

Change-Id: I038e9a118e77eb6a3599b7d45a0cc8757990d2ef
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
Conflicts:
include/linux/thermal.h

8 years agothermal-core: Fix to send correct trip type to get trip temperature
Ram Chandrasekar [Wed, 29 Jan 2014 21:02:40 +0000 (14:02 -0700)]
thermal-core: Fix to send correct trip type to get trip temperature

Fix the thermal sys code to pass the proper trip type
expected by tsens driver to get the tsens trip
temperature.

CRs-Fixed: 608753
Change-Id: I527af21bf13d8c5a93b92b34fa5f05c527a08bcd
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agothermal-core: Fix invalid sensor request not accounted correctly
Anji Jonnala [Fri, 22 Nov 2013 16:06:18 +0000 (21:36 +0530)]
thermal-core: Fix invalid sensor request not accounted correctly

Add NULL check for sensor name before using it in sensor_get_id and
return NULL explicitly when sensor id is not valid in get_sensor of
thermal core.

Change-Id: I4200a5691183aa2d40ef8ed64554f0beb8ce6d0d
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
8 years agothermal: Add Support for enabling and disabling tsens trip
Ram Chandrasekar [Wed, 2 Oct 2013 18:23:27 +0000 (12:23 -0600)]
thermal: Add Support for enabling and disabling tsens trip

Add new API to enable or disable the kernel client's trip
threshold request. The enable or disable trip threshold requests
from different kernel clients and userspace client will
activate/deactivate the corresponding clients threshold request.

Modify thermal sys framework to include only the active
thresholds from clients to determine the current trip
thresholds for tsens.

CRs-Fixed: 561775
Change-Id: I304ac00daa8a0a1a68b60153c29ee6cb5c3507b1
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
[joshc: drop msm_thermal chunk]
Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
8 years agothermal: Fix sensor thresholds not accounted correctly
Praveen Chidambaram [Thu, 12 Sep 2013 22:39:44 +0000 (16:39 -0600)]
thermal: Fix sensor thresholds not accounted correctly

Sensor threshold min and max are calculated to be binding around the
current temp, but they fail if there no thresholds available with the
min < curr_temp and the max > curr_temp.

Fix negative temperatures handling.

Change-Id: I124d2a9249f705d41469b8e0efffe2dfdf05e292
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
8 years agothermal: thermal-core: Change temp type from unsigned to int
Siddartha Mohanadoss [Fri, 13 Sep 2013 18:08:57 +0000 (11:08 -0700)]
thermal: thermal-core: Change temp type from unsigned to int

Negative temperature values can be set by thermal clients
to the TSENS driver. Having unsgined long type prevents
clients using the set_trip_temp() thermal api to set
negative temperature values. On msm-3.4 kernel this api
had support to set negative temperature. Change the type
to support the negative temperature.

Change-Id: I987aed5a291b76d8360a9256cad0ff0c1adb06c8
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
8 years agothermal: Add sensor API to allow any driver to set thresholds
Praveen Chidambaram [Tue, 2 Jul 2013 19:04:58 +0000 (13:04 -0600)]
thermal: Add sensor API to allow any driver to set thresholds

Sensor API allow drivers to set min or max thresholds and get
notified when the corresponding sensor crosses these thresholds.
The sensor API, uses the THERMAL_TRIP_CONFIGURABLE_HI and
THERMAL_TRIP_CONFIGURABLE_LOW, to set the threshold. The existing
sysfs interfaces will not be affected by the newly added API.

Change-Id: I85d2ae132fc3b7b6d157faf0a7390e31fdc7e6da
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
Conflicts:
include/linux/thermal.h

8 years agothermal: thermal_sys: Add support for configurable trip points.
Siddartha Mohanadoss [Tue, 7 Dec 2010 06:49:26 +0000 (22:49 -0800)]
thermal: thermal_sys: Add support for configurable trip points.

Add functionality for configurable hi, low and critical low.
Change the trip point attributes to allow userspace clients
with root access to set temperature for configurable hi and
low temperature.

Change-Id: I25c9c3bcfd58e44da5369187d1095559062f1860
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Conflicts:
drivers/thermal/thermal_core.c

8 years agothermal: tsens: TSENS driver fixups
Siddartha Mohanadoss [Wed, 29 Apr 2015 16:51:50 +0000 (09:51 -0700)]
thermal: tsens: TSENS driver fixups

Add TSENS Thermal driver. Include support to activate
a trip type and mode.

This snapshot is taken as of msm-3.14 commit 3bc54cf86b
(Merge "msm: camera: Add dummy sub module in sensor pipeline")

Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Conflicts:
drivers/thermal/Kconfig
drivers/thermal/Makefile
include/linux/thermal.h

Change-Id: Ie8a089afc0cf9e45ac000dff425a3e6206c1b9b1

8 years agodefconfig: arm: msm: Enable memshare config flag
Mohit Aggarwal [Thu, 11 Feb 2016 07:53:02 +0000 (13:23 +0530)]
defconfig: arm: msm: Enable memshare config flag

Memshare driver is required to provide memory from HLOS
to clients present on Modem.

Signed-off-by: Mohit Aggarwal <maggarwa@codeaurora.org>
8 years agomemshare: Release the memory only if no allocation is done
Katish Paran [Wed, 28 Oct 2015 13:13:35 +0000 (18:43 +0530)]
memshare: Release the memory only if no allocation is done

Currently, memshare relies on the system monitor only for
releasing memory for the allocated clients. It may happen that
XPU is still intact on the modem side while driver tries to
release the memory. This patch ensures that memory release only
happens if XPU is released.

Change-Id: I45716c0abe6bc08559854782ff73a332e148a7cb
Signed-off-by: Katish Paran <kparan@codeaurora.org>
8 years agomemshare: Port and add snapshot of changes from msm-3.10
Mohit Aggarwal [Fri, 17 Jul 2015 11:13:48 +0000 (16:43 +0530)]
memshare: Port and add snapshot of changes from msm-3.10

Port the memshare driver and apply the following memshare driver
changes taken from msm-3.10 kernel branch as of msm-3.10 commit
4493220f memshare: Boot time allocation and handling
multiple clients
2ae4997a memshare: Donot re-allocate the memory for the
clients
059dcd59 memshare: Do not overwrite the response for the
failure case
ed6d183f memshare: Change the compatible property field
for child node
b473fc4e2 memshare: Free the memory after XPU unlocking is
done
95c114c39 memshare: Add query size api support for clients
60f310d4e memshare: Change dma attribute to
DMA_ATTR_NO_KERNEL_MAPPING
73075545 memshare: Remove local connection status variable
98dd2908 memshare: Place error check to prevent out of
bound access

Change-Id: Iecf0a9828efd1d56c309a2af882c13ce36e7fc06
Signed-off-by: Katish Paran <kparan@codeaurora.org>
Signed-off-by: Mohit Aggarwal <maggarwa@codeaurora.org>
8 years agodefconfig: msm: Enable CONFIG_UIO and CONFIG_MSM_SHAREDMEM
Rohit Vaswani [Thu, 11 Feb 2016 00:51:28 +0000 (16:51 -0800)]
defconfig: msm: Enable CONFIG_UIO and CONFIG_MSM_SHAREDMEM

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
8 years agouio: msm_sharedmem: Use proper format to print phys_addr_t
Prasad Sodagudi [Wed, 7 Oct 2015 17:34:40 +0000 (23:04 +0530)]
uio: msm_sharedmem: Use proper format to print phys_addr_t

Use proper printk format specifier to print phys_addr_t
type variable.

Change-Id: I7c55e44e813d8d41e1ead03280044c8542a24922
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
8 years agouio: msm_sharedmem: Add support for HYP call
Nikhilesh Reddy [Thu, 4 Jun 2015 18:31:42 +0000 (11:31 -0700)]
uio: msm_sharedmem: Add support for HYP call

Add support for HYP call to setup the sharedmem permissions
for the MPSS client.

Change-Id: I3b48ae962865d8d0a0ea6e3fbb8e21278b59c690
Signed-off-by: Nikhilesh Reddy <reddyn@codeaurora.org>
8 years agouio: Add snapshot of MSM sharedmem driver
Nikhilesh Reddy [Mon, 1 Jun 2015 23:08:32 +0000 (16:08 -0700)]
uio: Add snapshot of MSM sharedmem driver

This is a snapshot of the MSM sharedmem driver as of msm-3.14
commit:

149717c082aab8168283b7e0c23d8bd5a45b1999
( uio: msm_sharedmem: Add custom mmap )

The following changes are included:
02d55287 uio: msm_sharedmem: Restrict debugfs write to root.
de961fc7 uio: msm_sharedmem: Return ENOMEM if the shared mem addr
 is zero.
b974ce64 uio: msm_sharedmem: Add addtional information to debugfs
c46af547 uio: msm_sharedmem: Add support for dynamic shared memory
 allocation

Change-Id: I49902f018bde1d59d41027b7e46268cc17231a3e
Signed-off-by: Nikhilesh Reddy <reddyn@codeaurora.org>
8 years agodefconfig: arm64: msm: Enable kernel QMI Interface
Karthikeyan Ramasubramanian [Wed, 3 Feb 2016 21:22:47 +0000 (14:22 -0700)]
defconfig: arm64: msm: Enable kernel QMI Interface

The kernel QMI interface permits QMI communication to/from kernel
drivers.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agosoc: qcom: Add snapshot of QMI
Karthikeyan Ramasubramanian [Wed, 3 Feb 2016 21:20:26 +0000 (14:20 -0700)]
soc: qcom: Add snapshot of QMI

This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agodefconfig: arm64: msm: Enable IPC Router G-Link Transport
Karthikeyan Ramasubramanian [Wed, 3 Feb 2016 20:03:17 +0000 (13:03 -0700)]
defconfig: arm64: msm: Enable IPC Router G-Link Transport

The IPC Router G-Link Transport permits IPC Router communication over
G-Link to the other processors in the SoC.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agosoc: qcom: Add snapshot of ipc_router_glink_xprt
Karthikeyan Ramasubramanian [Wed, 3 Feb 2016 19:59:45 +0000 (12:59 -0700)]
soc: qcom: Add snapshot of ipc_router_glink_xprt

This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agosoc: qcom: Add snapshot of ipc_router_mhi_xprt
Karthikeyan Ramasubramanian [Wed, 3 Feb 2016 19:54:31 +0000 (12:54 -0700)]
soc: qcom: Add snapshot of ipc_router_mhi_xprt

This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agosoc: qcom: Add snapshot of ipc_router_hsic_xprt
Karthikeyan Ramasubramanian [Wed, 3 Feb 2016 19:50:54 +0000 (12:50 -0700)]
soc: qcom: Add snapshot of ipc_router_hsic_xprt

This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agosoc: qcom: Add snapshot of ipc_router_smd_xprt
Karthikeyan Ramasubramanian [Wed, 3 Feb 2016 19:45:04 +0000 (12:45 -0700)]
soc: qcom: Add snapshot of ipc_router_smd_xprt

This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agodefconfig: arm64: msm: Enable IPC Router, IPC Router Security
Karthikeyan Ramasubramanian [Tue, 2 Feb 2016 00:00:09 +0000 (17:00 -0700)]
defconfig: arm64: msm: Enable IPC Router, IPC Router Security

IPC Router is a peer-to-peer, message oriented router that supports name
service and limited multihop routing for interprocessor messages in the
SoC.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agonet: ipc_router: Use iov_iter accessor functions
Karthikeyan Ramasubramanian [Wed, 3 Feb 2016 18:56:30 +0000 (11:56 -0700)]
net: ipc_router: Use iov_iter accessor functions

The networking module uses iov_iter library to manage the vector buffers
from user-space. Use iov_iter accessor functions to copy the data from/to
the user-space vector buffers.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agonet: ipc_router: Fix to handle the socket framework updates
Karthikeyan Ramasubramanian [Tue, 2 Feb 2016 00:18:19 +0000 (17:18 -0700)]
net: ipc_router: Fix to handle the socket framework updates

Update the function signature of sendmsg and recvmsg operations.
Pass the kernel socket flag to the updated socket object allocation
function.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agonet: ipc_router: Remove including unused header file
Karthikeyan Ramasubramanian [Tue, 2 Feb 2016 00:09:04 +0000 (17:09 -0700)]
net: ipc_router: Remove including unused header file

qmi_encdec.h header file is no longer required in IPC Router. Remove
including that header file.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agonet: ipc_router: Add snapshot of IPC Router
Karthikeyan Ramasubramanian [Mon, 1 Feb 2016 23:53:22 +0000 (16:53 -0700)]
net: ipc_router: Add snapshot of IPC Router

This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agodefconfig: arm64: msm: Enable IPC Logging
Karthikeyan Ramasubramanian [Mon, 1 Feb 2016 23:23:41 +0000 (16:23 -0700)]
defconfig: arm64: msm: Enable IPC Logging

IPC Logging is a low latency and minimal overhead logging framework used
by many interprocessor communication drivers such as GLink.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agotrace: ipc_logging: Use virtual counter
Karthikeyan Ramasubramanian [Mon, 8 Feb 2016 19:03:37 +0000 (12:03 -0700)]
trace: ipc_logging: Use virtual counter

Using the physical counter leads to a kernel BUG_ON(). Update the
IPC Logging Driver to use virtual counter.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agotrace: Add snapshot of ipc_logging driver
Karthikeyan Ramasubramanian [Mon, 1 Feb 2016 23:14:18 +0000 (16:14 -0700)]
trace: Add snapshot of ipc_logging driver

This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agodefconfig: arm64: msm: Enable SMEM log
Karthikeyan Ramasubramanian [Mon, 1 Feb 2016 22:38:37 +0000 (15:38 -0700)]
defconfig: arm64: msm: Enable SMEM log

The SMEM log allows certain log events to be synchronized between
multiple processors in the SoC.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agosoc: qcom: Add snapshot of SMEM_LOG Driver
Karthikeyan Ramasubramanian [Mon, 1 Feb 2016 22:35:34 +0000 (15:35 -0700)]
soc: qcom: Add snapshot of SMEM_LOG Driver

This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
8 years agodefconfig: msm-perf: Bring it up-to-date with missing features during upgrade
Rohit Vaswani [Tue, 9 Feb 2016 20:28:52 +0000 (12:28 -0800)]
defconfig: msm-perf: Bring it up-to-date with missing features during upgrade

Also run savedefconfig to remove any diff on both defconfigs.

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
8 years agodefconfig: Enable CONFIG_SYNC for Android
Rohit Vaswani [Tue, 9 Feb 2016 20:25:30 +0000 (12:25 -0800)]
defconfig: Enable CONFIG_SYNC for Android

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>