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Mircea Trofin [Fri, 6 Apr 2018 15:54:47 +0000 (15:54 +0000)]
[GlobalOpt] Fix support for casts in ctors.
Summary:
Fixing an issue where initializations of globals where constructors use
casts were silently translated to 0-initialization.
Reviewers: davidxl, evgeny777
Reviewed By: evgeny777
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329409
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Dmitry Preobrazhensky [Fri, 6 Apr 2018 15:48:39 +0000 (15:48 +0000)]
[AMDGPU][MC][VI][GFX9] Added s_atc_probe* instructions
See bug 36839: https://bugs.llvm.org/show_bug.cgi?id=36839
Differential Revision: https://reviews.llvm.org/D45249
Reviewers: artem.tamazov, arsenm, timcorringham
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329408
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Simon Pilgrim [Fri, 6 Apr 2018 15:46:26 +0000 (15:46 +0000)]
[CostModel][X86] Regenerate bswap/bitreverse cost tests with update_analyze_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329407
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Pete Couperus [Fri, 6 Apr 2018 15:43:11 +0000 (15:43 +0000)]
[ARC] Add <.f> suffix for F32_GEN4_{DOP|SOP}.
Add disassembler support for instructions which writeback STATUS32.
https://reviews.llvm.org/D45148
Patch by Yan Luo! (Yan.Luo2@synopsys.com)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329404
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Andrea Di Biagio [Fri, 6 Apr 2018 15:30:02 +0000 (15:30 +0000)]
[llvm-mca] Do not separate iterations with a newline in the timeline view.
Also, update a few tests to minimize the diff in D45369.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329403
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Simon Pilgrim [Fri, 6 Apr 2018 15:28:26 +0000 (15:28 +0000)]
[CostModel][X86] Regenerate integer extension/truncation cost tests with update_analyze_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329402
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Simon Pilgrim [Fri, 6 Apr 2018 15:23:26 +0000 (15:23 +0000)]
[CostModel][X86] Regenerate integer division/remainder tests with update_analyze_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329401
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Simon Pilgrim [Fri, 6 Apr 2018 15:14:34 +0000 (15:14 +0000)]
[CostModel][X86] Regenerate vector shift cost tests with update_analyze_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329400
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Simon Pilgrim [Fri, 6 Apr 2018 15:12:36 +0000 (15:12 +0000)]
[CostModel][X86] Regenerate int<->fp cost tests with update_analyze_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329398
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Dmitry Preobrazhensky [Fri, 6 Apr 2018 15:08:42 +0000 (15:08 +0000)]
[AMDGPU][MC][GFX9] Added s_dcache_discard* instructions
See bug 36838: https://bugs.llvm.org/show_bug.cgi?id=36838
Differential Revision: https://reviews.llvm.org/D45247
Reviewers: artem.tamazov, arsenm, timcorringham
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329397
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Chad Rosier [Fri, 6 Apr 2018 13:57:21 +0000 (13:57 +0000)]
[LoopUnroll] Make LoopPeeling respect the AllowPeeling preference.
The SimpleLoopUnrollPass isn't suppose to perform loop peeling.
Differential Revision: https://reviews.llvm.org/D45334
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329395
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Philip Pfaffe [Fri, 6 Apr 2018 13:39:16 +0000 (13:39 +0000)]
Followup for r329293: Temporarily disable the breaking test on windows.
This test is failing on windows bots. Disable it temporarily to unbreak
the windows bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329393
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Pavel Labath [Fri, 6 Apr 2018 13:34:12 +0000 (13:34 +0000)]
DWARFVerifier: validate information in name index entries
Summary:
This patch add checks to verify that the information in the name index
entries is consistent with the debug_info section. Specifically, we
check that entries point to valid DIEs, and their names, tags, and
compile units match the information in the debug_info sections.
These checks are only run if the previous checks did not find any errors
in the name index headers. Attempting to proceed with the checks anyway
would likely produce a lot of spurious errors and the verification code
would need to be very careful to avoid crashing.
I also add a couple of more checks to the abbreviation-validation code
to verify that some attributes are always present (an index without a
DW_IDX_die_offset attribute is fairly useless).
The entry verification works only on indexes without any type units - I
haven't attempted to extend it to type units, as we don't even have a
DWARF v5-compatible type unit generator at the moment.
Reviewers: JDevlieghere, aprantl, dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45323
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329392
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Simon Pilgrim [Fri, 6 Apr 2018 12:36:27 +0000 (12:36 +0000)]
[UpdateTestChecks] Add update_analyze_test_checks.py for cost model analysis generation
The script allows the auto-generation of checks for cost model tests to speed up their creation and help improve coverage, which will help a lot with PR36550.
If the need arises we can add support for other analyze passes as well, but the cost models was the one I needed to get done - at the moment it just warns that any other analysis mode is unsupported.
I've regenerated a couple of x86 test files to show the effect.
Differential Revision: https://reviews.llvm.org/D45272
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329390
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Simon Pilgrim [Fri, 6 Apr 2018 11:25:21 +0000 (11:25 +0000)]
[X86][SandyBridge] Add (V)DPPS memory fold latencies
Noticed this during D44654
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329389
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Simon Pilgrim [Fri, 6 Apr 2018 11:00:51 +0000 (11:00 +0000)]
[X86][SandyBridge] SBWriteResPair +5cy Memory Folds
As mentioned on D44647, this patch increases the default memory latency to +5cy , which more closely matches what most custom cases are doing for reg-mem instructions.
I've bumped LoadLatency, ReadAfterLd and WriteLoad values to 5cy to be consistent.
As Sandy Bridge is currently our default generic model, this affects a lot of scheduling tests...
Differential Revision: https://reviews.llvm.org/D44654
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329388
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Hans Wennborg [Fri, 6 Apr 2018 10:20:19 +0000 (10:20 +0000)]
Tweak an assert message in the verifier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329387
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Simon Pilgrim [Fri, 6 Apr 2018 10:16:36 +0000 (10:16 +0000)]
[X86][SkylakeServer] Merge 2 InstRW entries to the same sched group. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329386
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Hans Wennborg [Fri, 6 Apr 2018 10:14:09 +0000 (10:14 +0000)]
EntryExitInstrumenter: Handle musttail calls
Inserting instrumentation between a musttail call and ret instruction
would create invalid IR. Instead, treat musttail calls as function
exits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329385
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Max Kazantsev [Fri, 6 Apr 2018 09:47:06 +0000 (09:47 +0000)]
[NFC] Add missing end of line symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329383
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Francis Visoiu Mistrih [Fri, 6 Apr 2018 08:56:25 +0000 (08:56 +0000)]
[MIR] Add support for MachineFrameInfo::LocalFrameSize
MFI.LocalFrameSize was not serialized.
It is usually set from LocalStackSlotAllocation, so if that pass doesn't
run it is impossible do deduce it from the stack objects. Until now, this
information was lost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329382
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Pavel Labath [Fri, 6 Apr 2018 08:49:57 +0000 (08:49 +0000)]
[debug_loc] Fix typo in DWARFExpression constructor
Summary:
The positions of the DwarfVersion and AddressSize arguments were
reversed, which caused parsing for dwarf opcodes which contained
address-size-dependent operands (such as DW_OP_addr). Amusingly enough,
none of the address-size asserts fired, as dwarf version was always 4,
which is a valid address size.
I ran into this when constructing weird inputs for the DWARF verifier. I
I add a test case as hand-written dwarf -- I am not sure how to trigger
this differently, as having a DW_OP_addr inside a location list is a
fairly non-standard thing to do.
Fixing this error exposed a bug in the debug_loc.dwo parser, which was
always being constructed with an address size of 0. I fix that as well
by following the pattern in the non-dwo parser of picking up the address
size from the first compile unit (which is technically not correct, but
probably good enough in practice).
Reviewers: JDevlieghere, aprantl, dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45324
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329381
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Max Kazantsev [Fri, 6 Apr 2018 07:23:45 +0000 (07:23 +0000)]
[NFC] Loosen restriction on preheader to fix buildbot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329379
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Hiroshi Inoue [Fri, 6 Apr 2018 05:41:16 +0000 (05:41 +0000)]
[PowerPC] allow D-form VSX load/store when accessing FrameIndex without offset
VSX D-form load/store instructions of POWER9 require the offset be a multiple of 16 and a helper`isOffsetMultipleOf` is used to check this.
So far, the helper handles FrameIndex + offset case, but not handling FrameIndex without offset case. Due to this, we are missing opportunities to exploit D-form instructions when accessing an object or array allocated on stack.
For example, x-form store (stxvx) is used for int a[4] = {0}; instead of d-form store (stxv). For larger arrays, D-form instruction is not used when accessing the first 16-byte. Using D-form instructions reduces register pressure as well as instructions.
Differential Revision: https://reviews.llvm.org/D45079
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329377
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Robert Widmann [Fri, 6 Apr 2018 04:02:39 +0000 (04:02 +0000)]
[LLVM-C] Fill Out LLVMCallConv
Summary: Bring LLVMCallConv up to date with latest [[ http://llvm.org/doxygen/CallingConv_8h_source.html | CallConv ]]
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45347
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329373
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Robert Widmann [Fri, 6 Apr 2018 02:31:29 +0000 (02:31 +0000)]
[LLVM-C] Audit Inline Assembly APIs for Consistency
Summary:
- Add a missing getter for module-level inline assembly
- Add a missing append function for module-level inline assembly
- Deprecate LLVMSetModuleInlineAsm and replace it with LLVMSetModuleInlineAsm2 which takes an explicit length parameter
- Deprecate LLVMConstInlineAsm and replace it with LLVMGetInlineAsm, a function that allows passing a dialect and is not mis-classified as a constant operation
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45346
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329369
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Rafael Espindola [Fri, 6 Apr 2018 01:21:48 +0000 (01:21 +0000)]
Update method names in documentation.
They were renamed in r328848.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329368
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Manoj Gupta [Thu, 5 Apr 2018 23:23:29 +0000 (23:23 +0000)]
Fix lld-x86_64-darwin13 build fails.
Use double braces in std::array initialization
to keep Darwin builders happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329363
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Sanjay Patel [Thu, 5 Apr 2018 23:21:15 +0000 (23:21 +0000)]
[InstCombine] FP: Z - (X - Y) --> Z + (Y - X)
This restores what was lost with rL73243 but without
re-introducing the bug that was present in the old code.
Note that we already have these transforms if the ops are
marked 'fast' (and I assume that's happening somewhere in
the code added with rL170471), but we clearly don't need
all of 'fast' for these transforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329362
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Sanjay Patel [Thu, 5 Apr 2018 22:56:54 +0000 (22:56 +0000)]
[InstCombine] add FP tests for Z - (X - Y); NFC
A fold for this pattern was removed at rL73243 to fix PR4374:
https://bugs.llvm.org/show_bug.cgi?id=4374
...and apparently there were no tests that went with that fold.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329360
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Manoj Gupta [Thu, 5 Apr 2018 22:47:25 +0000 (22:47 +0000)]
Attempt to fix Mips breakages.
Summary:
Replace ArrayRefs by actual std::array objects so that there are
no dangling references.
Reviewers: rsmith, gkistanova
Subscribers: sdardis, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D45338
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329359
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Zvi Rackover [Thu, 5 Apr 2018 21:57:20 +0000 (21:57 +0000)]
X86 Tests: Add a case for combining sdiv by a splatted pow2 negative. NFC.
Noticed test was missing while working on D42479.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329356
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Lang Hames [Thu, 5 Apr 2018 21:56:55 +0000 (21:56 +0000)]
[RuntimeDyld][PowerPC] Add a test case for r329335.
Checks that calls to different sections go to the function's global entry point,
rather than the local one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329355
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Craig Topper [Thu, 5 Apr 2018 21:56:19 +0000 (21:56 +0000)]
[X86] Separate CDQ and CDQE in the scheduler model.
According to Agner's data, CDQE is closer to CWDE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329354
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Mandeep Singh Grang [Thu, 5 Apr 2018 21:52:24 +0000 (21:52 +0000)]
[IR] Change std::sort to llvm::sort in response to r327219
r327219 added wrappers to std::sort which randomly shuffle the container before
sorting. This will help in uncovering non-determinism caused due to undefined
sorting order of objects having the same key.
To make use of that infrastructure we need to invoke llvm::sort instead of
std::sort.
Note: This patch is one of a series of patches to replace *all* std::sort to
llvm::sort. Refer D44363 for a list of all the required patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329353
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Craig Topper [Thu, 5 Apr 2018 21:40:32 +0000 (21:40 +0000)]
[X86] Add MOVZPQILo2PQIrr to the Sandy Bridge scheduler model
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329351
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Sanjay Patel [Thu, 5 Apr 2018 21:37:17 +0000 (21:37 +0000)]
[InstCombine] nsz: -(X - Y) --> Y - X
This restores part of the fold that was removed with rL73243 (PR4374).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329350
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Roman Lebedev [Thu, 5 Apr 2018 21:34:59 +0000 (21:34 +0000)]
[InstCombine][NFC] Regenerate select-of-bittest.ll with instnamer pass
As requested by spatel in https://reviews.llvm.org/D45329
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329349
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Roman Lebedev [Thu, 5 Apr 2018 21:34:53 +0000 (21:34 +0000)]
[InstCombine] [NFC] Add more tests for getting rid of select of bittest (D45108, PR36950 / PR17564)
Summary:
More tests for D45108:
* One use tests
* allow shift to be a variable, too
Reviewers: spatel, craig.topper
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45329
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329348
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Craig Topper [Thu, 5 Apr 2018 21:16:26 +0000 (21:16 +0000)]
[X86] Add LEAVE instruction to the scheduler models using the same data as LEAVE64. Make LEAVE/LEAVE64 more correct on Sandy Bridge.
This is the 32-bit mode version of LEAVE64. It should be at least somewhat similar to LEAVE64.
The Sandy Bridge version was missing a load port use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329347
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Wolfgang Pieb [Thu, 5 Apr 2018 21:01:49 +0000 (21:01 +0000)]
[DWARF v5][NFC]: Refactor DebugRnglists to prepare for the support of the DW_AT_ranges
attribute in conjunction with .debug_rnglists.
Reviewers: JDevlieghere
Differential Revision: https://reviews.llvm.org/D45307
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329345
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Simon Pilgrim [Thu, 5 Apr 2018 21:01:21 +0000 (21:01 +0000)]
[X86][SSE] Add floating point add/mul fast-math vector.reduce tests
Strict versions aren't working at all (PR36732) and the accumulators aren't supported (PR36734)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329344
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Simon Pilgrim [Thu, 5 Apr 2018 20:54:55 +0000 (20:54 +0000)]
[X86][SSE] Add floating point min/max vector.reduce tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329343
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Konstantin Zhuravlyov [Thu, 5 Apr 2018 20:46:04 +0000 (20:46 +0000)]
AMDGPU/Metadata: Always report a fixed number of hidden arguments
Currently it is 6. If the "feature" was not used, report dummy
hidden argument. Otherwise it does not match the kernarg size
reported in the kernel header.
Differential Revision: https://reviews.llvm.org/D45129
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329341
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Craig Topper [Thu, 5 Apr 2018 20:04:06 +0000 (20:04 +0000)]
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
We were forcing the latency of these instructions to 5 cycles, but every other scheduler model had them as 1 cycle. I'm sure I didn't get everything, but this gets a big portion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329339
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Max Moroz [Thu, 5 Apr 2018 19:43:24 +0000 (19:43 +0000)]
[llvm-cov] Prevent llvm-cov from hanging when a symblink doesn't exist.
Summary:
Previous code hangs indefinitely when trying to iterate through a
symbol link file that points to an non-exist directory. This change
fixes the bug to make the addCollectedPath function exit ealier and
print out correct warning messages.
Patch by Yuke Liao (@liaoyuke).
Reviewers: Dor1s, vsk
Reviewed By: vsk
Subscribers: bruno, mgrang, llvm-commits
Differential Revision: https://reviews.llvm.org/D44960
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329338
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Lang Hames [Thu, 5 Apr 2018 19:37:05 +0000 (19:37 +0000)]
[RuntimeDyld][PowerPC] Use global entry points for calls between sections.
Functions in different objects may use different TOCs, so calls between such
functions should use the global entry point of the callee which updates the
TOC pointer.
This should fix a bug that the Numba developers encountered (see
https://github.com/numba/numba/issues/2451).
Patch by Olexa Bilaniuk. Thanks Olexa!
No RuntimeDyld checker test case yet as I am not familiar enough with how
RuntimeDyldELF fixes up call-sites, but I do not want to hold up landing
this. I will continue to work on it and see if I can rope some powerpc
experts in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329335
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Mandeep Singh Grang [Thu, 5 Apr 2018 19:27:04 +0000 (19:27 +0000)]
[Bitcode] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.
To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.
Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.
Reviewers: pcc, mehdi_amini, dexonsmith
Reviewed By: dexonsmith
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45132
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329334
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Daniel Neilson [Thu, 5 Apr 2018 18:51:45 +0000 (18:51 +0000)]
[InstCombine] Properly change GEP type when reassociating loop invariant GEP chains
Summary:
This is a fix to PR37005.
Essentially, rL328539 ([InstCombine] reassociate loop invariant GEP chains to enable LICM) contains a bug
whereby it will convert:
%src = getelementptr inbounds i8, i8* %base, <2 x i64> %val
%res = getelementptr inbounds i8, <2 x i8*> %src, i64 %val2
into:
%src = getelementptr inbounds i8, i8* %base, i64 %val2
%res = getelementptr inbounds i8, <2 x i8*> %src, <2 x i64> %val
By swapping the index operands if the GEPs are in a loop, and %val is loop variant while %val2
is loop invariant.
This fix recreates new GEP instructions if the index operand swap would result in the type
of %src changing from vector to scalar, or vice versa.
Reviewers: sebpop, spatel
Reviewed By: sebpop
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45287
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329331
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Craig Topper [Thu, 5 Apr 2018 18:38:45 +0000 (18:38 +0000)]
[X86] Synchronize the SchedRW on some EVEX instructions with their VEX equivalents.
Mostly vector load, store, and move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329330
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Mandeep Singh Grang [Thu, 5 Apr 2018 18:31:50 +0000 (18:31 +0000)]
[ARM] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.
To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.
Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.
Reviewers: t.p.northover, RKSimon, MatzeB, bkramer
Reviewed By: bkramer
Subscribers: javed.absar, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D44855
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329329
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Craig Topper [Thu, 5 Apr 2018 18:20:14 +0000 (18:20 +0000)]
[X86] Disassembler support for having an ADSIZE prefix affect instructions with 0xf2 and 0xf3 prefixes.
Needed to support umonitor from D45253.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329327
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Zachary Turner [Thu, 5 Apr 2018 18:18:12 +0000 (18:18 +0000)]
[llvm-pdbutil] Display types from MSVC precompiled header object files.
These appear in a .debug$P section, which is exactly the same in
format as a .debug$T section. So we shouldn't ignore these when
dumping types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329326
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Konstantin Zhuravlyov [Thu, 5 Apr 2018 18:16:02 +0000 (18:16 +0000)]
llvm-exegesis: Fix unittests include dirs when llvm is a part of another project
When llvm is a part of another project (i.e. opencl),
CMAKE_SOURCE_DIR and CMAKE_BINARY_DIR are pointing to
the parent project, which lead to build failures.
Differential Revision: https://reviews.llvm.org/D45328
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329325
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Sanjay Patel [Thu, 5 Apr 2018 17:40:51 +0000 (17:40 +0000)]
[InstCombine] add test for fneg+fsub with nsz; NFC
There used to be a fold that would handle this case more generally,
but it was removed at rL73243 to fix PR4374:
https://bugs.llvm.org/show_bug.cgi?id=4374
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329322
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Simon Pilgrim [Thu, 5 Apr 2018 17:37:35 +0000 (17:37 +0000)]
[X86][SSE] Add integer add/mul vector.reduce tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329321
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Simon Pilgrim [Thu, 5 Apr 2018 17:29:51 +0000 (17:29 +0000)]
[X86][SSE] Add integer and/or/xor vector.reduce tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329320
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Simon Pilgrim [Thu, 5 Apr 2018 17:25:40 +0000 (17:25 +0000)]
[X86][SSE] Add integer min/max vector.reduce tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329319
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Philip Pfaffe [Thu, 5 Apr 2018 17:20:45 +0000 (17:20 +0000)]
Another fix for r329293: Unbreak the windows bots
Only build the unittest if plugins are enabled. Link components into the
TestPlugin on windows and cygwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329318
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Sanjay Patel [Thu, 5 Apr 2018 17:06:45 +0000 (17:06 +0000)]
[InstCombine] use pattern matchers for fsub --> fadd folds
This allows folding for vectors with undef elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329316
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Sam Clegg [Thu, 5 Apr 2018 17:01:39 +0000 (17:01 +0000)]
[WebAssembly] Allow for the creation of user-defined custom sections
This patch adds a way for users to create their own custom sections to
be added to wasm files. At the LLVM IR layer, they are defined through
the "wasm.custom_sections" named metadata. The expected use case for
this is bindings generators such as wasm-bindgen.
Patch by Dan Gohman
Differential Revision: https://reviews.llvm.org/D45297
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329315
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Sanjay Patel [Thu, 5 Apr 2018 16:51:09 +0000 (16:51 +0000)]
[InstCombine] add tests for fsub --> fadd; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329313
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Andrea Di Biagio [Thu, 5 Apr 2018 16:42:32 +0000 (16:42 +0000)]
[documentation][llvm-mca] Update the documentation.
Scheduling models can now describe processor register files and retire control
units. This updates the existing documentation and the README file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329311
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Craig Topper [Thu, 5 Apr 2018 16:32:48 +0000 (16:32 +0000)]
[X86] Use WriteFShuffle256 for VEXTRACTF128 to be consistent with VEXTRACTI128 which uses WriteShuffle256.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329310
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Philip Pfaffe [Thu, 5 Apr 2018 15:58:27 +0000 (15:58 +0000)]
Fix r329293: Add a missing CMake dependency
The unittest plugin indirectly includes Attributes.gen, so make sure its
target depends on the appropriate tablegen target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329308
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Andrea Di Biagio [Thu, 5 Apr 2018 15:53:31 +0000 (15:53 +0000)]
Fix the buildbots after r329304.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329306
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Andrea Di Biagio [Thu, 5 Apr 2018 15:41:41 +0000 (15:41 +0000)]
[MC][Tablegen] Allow models to describe the retire control unit for llvm-mca.
This patch adds the ability to describe properties of the hardware retire
control unit.
Tablegen class RetireControlUnit has been added for this purpose (see
TargetSchedule.td).
A RetireControlUnit specifies the size of the reorder buffer, as well as the
maximum number of opcodes that can be retired every cycle.
A zero (or negative) value for the reorder buffer size means: "the size is
unknown". If the size is unknown, then llvm-mca defaults it to the value of
field SchedMachineModel::MicroOpBufferSize. A zero or negative number of
opcodes retired per cycle means: "there is no restriction on the number of
instructions that can be retired every cycle".
Models can optionally specify an instance of RetireControlUnit. There can only
be up-to one RetireControlUnit definition per scheduling model.
Information related to the RCU (RetireControlUnit) is stored in (two new fields
of) MCExtraProcessorInfo. llvm-mca loads that information when it initializes
the DispatchUnit / RetireControlUnit (see Dispatch.h/Dispatch.cpp).
This patch fixes PR36661.
Differential Revision: https://reviews.llvm.org/D45259
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329304
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Sanjay Patel [Thu, 5 Apr 2018 15:36:55 +0000 (15:36 +0000)]
[PatternMatch] define m_FNeg using m_FSub
Using cstfp_pred_ty in the definition allows us to match vectors with undef elements.
This replicates the change for m_Not from D44076 / rL326823 and continues
towards making all pattern matchers allow undef elements in vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329303
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Hiroshi Inoue [Thu, 5 Apr 2018 15:27:06 +0000 (15:27 +0000)]
[PowerPC] fix assertion failure due to missing instruction in P9InstrResources.td
This patch adds L(W|H|B)ZXTLS_32 instructions introduced by https://reviews.llvm.org/rL327635 in P9InstrResources.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329299
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Sanjay Patel [Thu, 5 Apr 2018 15:07:35 +0000 (15:07 +0000)]
[InstCombine] add vector and vector undef tests for FP folds; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329294
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Philip Pfaffe [Thu, 5 Apr 2018 15:04:13 +0000 (15:04 +0000)]
Re-land r329273: [Plugins] Add a slim plugin API to work together with the new PM
Fix unittest: Do not link LLVM into the test plugin.
Additionally, remove an unrelated change that slipped in in r329273.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329293
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Pavel Labath [Thu, 5 Apr 2018 14:32:10 +0000 (14:32 +0000)]
[Testing/Support]: Better matching of Error failure states
Summary:
The existing Failed() matcher only allowed asserting that the operation
failed, but it was not possible to verify any details of the returned
error.
This patch adds two new matchers, which make this possible:
- Failed<InfoT>() verifies that the operation failed with a single error
of a given type.
- Failed<InfoT>(M) additionally check that the contained error info
object is matched by the nested matcher M.
To make these work, I've changed the implementation of the ErrorHolder
class. Now, instead of just storing the string representation of the
Error, it fetches the ErrorInfo objects and stores then as a list of
shared pointers. This way, ErrorHolder remains copyable, while still
retaining the full information contained in the Error object.
In case the Error object contains two or more errors, the new matchers
will fail to match, instead of trying to match all (or any) of the
individual ErrorInfo objects. This seemed to be the most sensible
behavior for when one wants to match exact error details, but I could be
convinced otherwise...
Reviewers: zturner, lhames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44925
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329288
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Tim Northover [Thu, 5 Apr 2018 14:26:06 +0000 (14:26 +0000)]
ARM: Do not spill CSR to stack on entry to noreturn functions
A noreturn nounwind function can be expected to never return in any way, and by
never returning it will also never have to restore any callee-saved registers
for its caller. This makes it possible to skip spills of those registers during
function entry, saving some stack space and time in the process. This is rather
useful for embedded targets with limited stack space.
Should fix PR9970.
Patch by myeisha (pmb).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329287
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Krzysztof Parzyszek [Thu, 5 Apr 2018 14:25:52 +0000 (14:25 +0000)]
[Hexagon] Remove default values from lambda parameters
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329286
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Brian Gesiak [Thu, 5 Apr 2018 14:08:16 +0000 (14:08 +0000)]
[Lexicon] Add "ICE", internal compiler error
Test Plan:
1. `ninja docs-llvm-html`
2. Confirm that the rendered docs HTML contains the new "ICE" entry
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329285
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Andrea Di Biagio [Thu, 5 Apr 2018 13:59:52 +0000 (13:59 +0000)]
[MC] Fix spaces between values printed by EmitRegisterFileInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329284
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Sam Parker [Thu, 5 Apr 2018 13:46:17 +0000 (13:46 +0000)]
[DAGCombine] Revert r329160
Again, broke the big endian stage 2 builders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329283
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Sanjay Patel [Thu, 5 Apr 2018 13:24:26 +0000 (13:24 +0000)]
[InstCombine] cleanup; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329282
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Simon Pilgrim [Thu, 5 Apr 2018 13:11:36 +0000 (13:11 +0000)]
[SchedModel] Complete models shouldn't match against itineraries when they don't use them (PR35639)
For schedule models that don't use itineraries, checkCompleteness still checks that an instruction has a matching itinerary instead of skipping and going straight to matching the InstRWs. That doesn't seem to match what happens in TargetSchedule.cpp
This patch causes problems for a number of models that had been incorrectly flagged as complete.
Differential Revision: https://reviews.llvm.org/D43235
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329280
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Florian Hahn [Thu, 5 Apr 2018 13:07:39 +0000 (13:07 +0000)]
[LoopInterchange] Require asserts for test using -stats (NFC)
This fixes a buildbot failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329279
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Alexander Kornienko [Thu, 5 Apr 2018 12:48:22 +0000 (12:48 +0000)]
Minor fix in docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329277
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Philip Pfaffe [Thu, 5 Apr 2018 12:42:12 +0000 (12:42 +0000)]
Revert "[Plugins] Add a slim plugin API to work together with the new PM"
This reverts commit
ecf3ba1ab45edb1b0fadce716a7facf50dca4fbb/r329273.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329276
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Andrea Di Biagio [Thu, 5 Apr 2018 11:36:50 +0000 (11:36 +0000)]
[llvm-mca] Remove flag -max-retire-per-cycle, and update the docs.
This is done in preparation for D45259.
With D45259, models can specify the size of the reorder buffer, and the retire
throughput directly via tablegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329274
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Philip Pfaffe [Thu, 5 Apr 2018 11:29:37 +0000 (11:29 +0000)]
[Plugins] Add a slim plugin API to work together with the new PM
Summary:
Add a new plugin API. This closes the gap between pass registration and out-of-tree passes for the new PassManager.
Unlike with the existing API, interaction with a plugin is always
initiated from the tools perspective. I.e., when a plugin is loaded, it
resolves and calls a well-known symbol `llvmGetPassPluginInfo` to obtain
details about the plugin. The fundamental motivation is to get rid of as
many global constructors as possible. The API exposed by the plugin
info is kept intentionally minimal.
Reviewers: chandlerc
Reviewed By: chandlerc
Subscribers: bollu, grosser, lksbhm, mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D35258
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329273
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Simon Pilgrim [Thu, 5 Apr 2018 10:48:38 +0000 (10:48 +0000)]
[UpdateTestChecks] Moved core functionality of add_asm_checks into add_checks
As discussed on D45272
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329270
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Florian Hahn [Thu, 5 Apr 2018 10:39:23 +0000 (10:39 +0000)]
[LoopInterchange] Add stats counter for number of interchanged loops.
Reviewers: samparker, karthikthecool, blitz.opensource
Reviewed By: samparker
Differential Revision: https://reviews.llvm.org/D45209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329269
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Simon Dardis [Thu, 5 Apr 2018 10:30:17 +0000 (10:30 +0000)]
[mips] Regenerate test before posting patch for constant multiplication (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329268
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Fedor Sergeev [Thu, 5 Apr 2018 10:29:37 +0000 (10:29 +0000)]
allow custom OptBisect classes set to LLVMContext
This patch introduces a way to set custom OptPassGate instances to LLVMContext.
A new instance field OptBisector and a new method setOptBisect() are added
to the LLVMContext classes. These changes allow to set a custom OptBisect class
that can make its own decisions on skipping optional passes.
Another important feature of this change is ability to set different instances
of OptPassGate to different LLVMContexts. So the different contexts can be used
independently in several compiling threads of one process.
One unit test is added.
Patch by Yevgeny Rouban.
Reviewers: andrew.w.kaylor, fedor.sergeev, vsk, dberlin, Eugene.Zelenko, reames, skatkov
Reviewed By: andrew.w.kaylor, fedor.sergeev
Differential Revision: https://reviews.llvm.org/D44464
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329267
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Simon Pilgrim [Thu, 5 Apr 2018 10:26:13 +0000 (10:26 +0000)]
[UpdateTestChecks] Split core functionality of add_ir_checks into add_checks
Cherry picked from D45272, also added some setup for add_asm_checks to use add_checks as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329266
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Simon Pilgrim [Thu, 5 Apr 2018 09:50:58 +0000 (09:50 +0000)]
[UpdateTestChecks] Make add_asm_checks more like add_ir_checks
Towards merging them as mentioned on D45272
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329265
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Florian Hahn [Thu, 5 Apr 2018 09:48:45 +0000 (09:48 +0000)]
[LoopInterchange] Preserve LoopInfo after interchanging.
LoopInterchange relies on LoopInfo being up-to-date, so we should
preserve it after interchanging. This patch updates restructureLoops to
move the BBs of the interchanged loops to the right place.
Reviewers: davide, efriedma, karthikthecool, mcrosier
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D45278
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329264
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Simon Pilgrim [Thu, 5 Apr 2018 09:30:42 +0000 (09:30 +0000)]
[UpdateTestChecks] Remove unnecessary return from add_ir_checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329262
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Clement Courbet [Thu, 5 Apr 2018 07:35:28 +0000 (07:35 +0000)]
[llvm-exegesis] Check for libpfm headers.
HAVE_LIBPFM is only defined if the libpfm headers are present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329261
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Puyan Lotfi [Thu, 5 Apr 2018 06:56:44 +0000 (06:56 +0000)]
[MIR-Canon] Fixing warnings in Non-assert builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329258
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Clement Courbet [Thu, 5 Apr 2018 05:57:23 +0000 (05:57 +0000)]
[llvm-exegesis] Suppress a warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329257
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Craig Topper [Thu, 5 Apr 2018 05:19:36 +0000 (05:19 +0000)]
[X86] Revert r329251-329254
It's failing on the bots and I'm not sure why.
This reverts:
[X86] Synchronize the SchedRW on some EVEX instructions with their VEX equivalents.
[X86] Use WriteFShuffle256 for VEXTRACTF128 to be consistent with VEXTRACTI128 which uses WriteShuffle256.
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
[X86] Auto-generate complete checks. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329256
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Craig Topper [Thu, 5 Apr 2018 04:42:03 +0000 (04:42 +0000)]
[X86] Synchronize the SchedRW on some EVEX instructions with their VEX equivalents.
Mostly vector load, store, and move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329254
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Craig Topper [Thu, 5 Apr 2018 04:42:02 +0000 (04:42 +0000)]
[X86] Use WriteFShuffle256 for VEXTRACTF128 to be consistent with VEXTRACTI128 which uses WriteShuffle256.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329253
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Craig Topper [Thu, 5 Apr 2018 04:42:01 +0000 (04:42 +0000)]
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
We were forcing the latency of these instructions to 5 cycles, but every other scheduler model had them as 1 cycle. I'm sure I didn't get everything, but this gets a big portion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329252
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Craig Topper [Thu, 5 Apr 2018 04:41:59 +0000 (04:41 +0000)]
[X86] Auto-generate complete checks. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329251
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