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Matthew Simpson [Tue, 7 Feb 2017 19:17:44 +0000 (19:17 +0000)]
[LV] Simplify ARM/AArch64 interleaved access cost model tests (NFC)
This patch removes unneeded instructions from the existing ARM/AArch64
interleaved access cost model tests. I'll be adding a similar set of tests in a
follow-on patch to increase coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294336
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Chris Bieneman [Tue, 7 Feb 2017 19:06:22 +0000 (19:06 +0000)]
[CMake] Move ninja job pool options to HandleLLVMOptions
Moving the Ninja job pool configuration settings into the HandleLLVMOptions module will allow standalone builds of LLVM sub-projects to use the LLVM options without needing to re-implement them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294334
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Sanjay Patel [Tue, 7 Feb 2017 19:01:35 +0000 (19:01 +0000)]
[x86] use getSignBit() for clarity; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294333
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David Blaikie [Tue, 7 Feb 2017 18:58:17 +0000 (18:58 +0000)]
Fix the -Werror build for some sign-comparisons
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294331
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Nemanja Ivanovic [Tue, 7 Feb 2017 18:57:29 +0000 (18:57 +0000)]
[PowerPC][Altivec] Add vnot extended mnemonic
Adds the vnot extended mnemonic for the vnor instruction.
Committing on behalf of brunoalr (Bruno Rosa).
Differential Revision: https://reviews.llvm.org/D29225
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294330
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Reid Kleckner [Tue, 7 Feb 2017 18:42:53 +0000 (18:42 +0000)]
[SDAGISel] Simplify some SDAGISel code, NFC
Hoist entry block code for arguments and swift error values out of the
basic block instruction selection loop. Lowering arguments once up front
seems much more readable than doing it conditionally inside the loop. It
also makes it clear that argument lowering can update StaticAllocaMap
because no instructions have been selected yet.
Also use range-based for loops where possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294329
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Pavel Labath [Tue, 7 Feb 2017 18:35:36 +0000 (18:35 +0000)]
Attempt to fix MSVC build broken by r294326
MSVC does not think that `char []` can be constexpr. Switch to regular const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294327
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Pavel Labath [Tue, 7 Feb 2017 18:11:33 +0000 (18:11 +0000)]
[Support] Add FormatVariadic support for chrono types
Summary:
The formatter has three knobs:
- the user can choose which time unit to use for formatting (default: whatever is the unit of the input)
- he can choose whether the unit gets displayed (default: yes)
- he can affect the way the number itself is formatted via standard number formatting options (default:default)
Reviewers: zturner, inglorion
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29481
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294326
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Sanjay Patel [Tue, 7 Feb 2017 18:04:26 +0000 (18:04 +0000)]
[TargetLowering] fix formatting and comments for ShrinkDemandedConstant; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294325
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Alexander Timofeev [Tue, 7 Feb 2017 17:57:48 +0000 (17:57 +0000)]
[AMDGPU] Fix for SIMachineScheduler crash. SI Scheduler should track
lane masks.
Differential revision: https://reviews.llvm.org/D29442
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294324
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Davide Italiano [Tue, 7 Feb 2017 17:56:50 +0000 (17:56 +0000)]
[InstCombine] Make max size array combine a tunable.
Requested by Sanjoy/Hal a while ago, and forgotten by me
(r283612).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294323
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Krzysztof Parzyszek [Tue, 7 Feb 2017 17:47:37 +0000 (17:47 +0000)]
[Hexagon] Update instruction types
Remove TypeXTYPE, TypeALU32, TypeSYSTEM, TypeJR, and instead use their
architecture counterparts.
Patch by Colin LeMahieu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294321
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Krzysztof Parzyszek [Tue, 7 Feb 2017 17:42:11 +0000 (17:42 +0000)]
[Hexagon] Remove encoding bits from mapped instructions
- Map A2_zxtb to A2_andir.
- Map PS_call_nr J2_call.
- Map A2_tfr[t|f][new] to A2_padd[t|f][new].
Patch by Colin LeMahieu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294320
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Reid Kleckner [Tue, 7 Feb 2017 17:35:53 +0000 (17:35 +0000)]
Fix my GVNHoist test case from r294317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294319
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Adrian Prantl [Tue, 7 Feb 2017 17:35:41 +0000 (17:35 +0000)]
Fix the bitcode upgrade for DIGlobalVariable in a DIImportedEntity context.
The bitcode upgrade for DIGlobalVariable unconditionally wrapped
DIGlobalVariables in a DIGlobalVariableExpression. When a
DIGlobalVariable is referenced by a DIImportedEntity, however, this is
wrong. This patch fixes the bitcode upgrade by deferring the creation
of DIGlobalVariableExpressions until we know the context of the
DIGlobalVariable.
<rdar://problem/
30134279>
Differential Revision: https://reviews.llvm.org/D29349
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294318
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Reid Kleckner [Tue, 7 Feb 2017 17:31:13 +0000 (17:31 +0000)]
Revert "[GVNHoist] Merge DebugLoc metadata on hoisted instructions"
This reverts commit r294250. It caused PR31891.
Add a test case that shows that inlinable calls retain location
information with an accurate scope.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294317
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Daniel Berlin [Tue, 7 Feb 2017 16:58:22 +0000 (16:58 +0000)]
MemorySSA: Remove unnecessary classof functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294316
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Simon Pilgrim [Tue, 7 Feb 2017 14:22:25 +0000 (14:22 +0000)]
[X86][SSE] Ensure that vector shift-by-immediate inputs are correctly bitcast to the result type
vXi8/vXi64 vector shifts are often shifted as vYi16/vYi32 types but we weren't always remembering to bitcast the input.
Tested with a new assert as we don't currently manipulate these shifts enough for test cases to catch them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294308
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Artur Pilipenko [Tue, 7 Feb 2017 14:09:37 +0000 (14:09 +0000)]
Add DAGCombiner load combine tests for {a|s}ext, {a|z|s}ext load nodes
Currently we don't support these nodes, so the tests check the current codegen without load combine. This change makes the review of the change to support these nodes more clear.
Separated from https://reviews.llvm.org/D29591 review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294305
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Igor Laevsky [Tue, 7 Feb 2017 13:27:20 +0000 (13:27 +0000)]
[CodeGenPrepare] Hoist all getSubtargetImpl calls to the beginning of the pass
Differential Revision: https://reviews.llvm.org/D29456
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294301
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Simon Pilgrim [Tue, 7 Feb 2017 13:15:09 +0000 (13:15 +0000)]
[X86][SSE] Generalized integer absolute tests to test canonical pattern as well as intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294300
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Christof Douma [Tue, 7 Feb 2017 13:07:12 +0000 (13:07 +0000)]
[ARM] Make RWPI use movw/movt when available
When constructing global address literals while targeting the RWPI
relocation model. LLVM currently only uses literal pools. If MOVW/MOVT
instructions are available we can use these instead. Beside being more
efficient it allows -arm-execute-only to work with
-relocation-model=RWPI as well.
When we generate MOVW/MOVT for global addresses when targeting the RWPI
relocation model, we need to use base relative relocations. This patch
does the needed plumbing in MC to generate these for MOVW/MOVT.
Differential Revision: https://reviews.llvm.org/D29487
Change-Id: I446786e43a6f5aa9b6a5bb2cd216d60d41c7755d
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294298
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Simon Pilgrim [Tue, 7 Feb 2017 12:01:36 +0000 (12:01 +0000)]
[X86][SSE] Added 256-bit vector tests cases
Exposes some poor codegen with identity shuffle due to bad interaction with insert_subvector(extract_subvector) / concat_subvectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294296
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Joey Gouly [Tue, 7 Feb 2017 11:58:22 +0000 (11:58 +0000)]
[APInt] Fix rotl/rotr when the shift amount is greater than the total bit width.
Review: https://reviews.llvm.org/D27749
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294295
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Daniel Jasper [Tue, 7 Feb 2017 08:57:50 +0000 (08:57 +0000)]
Revert "[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)"
This reverts commit r294186.
On an internal test, this triggers an out-of-memory error on PPC,
presumably because there is another dagcombine that does the exact
opposite triggering and endless loop consuming more and more memory.
Chandler has started at creating a reduced test case and we'll attach it
as soon as possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294288
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Craig Topper [Tue, 7 Feb 2017 07:31:00 +0000 (07:31 +0000)]
[AVX-512] Add masked and unmasked shift by immediate instructions to load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294287
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Craig Topper [Tue, 7 Feb 2017 07:30:57 +0000 (07:30 +0000)]
[AVX-512] Add masked shift instructions to load folding tables.
This adds the masked versions of everything, but the shift by immediate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294286
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Craig Topper [Tue, 7 Feb 2017 07:30:54 +0000 (07:30 +0000)]
[AVX-512] Add some of the shift instructions to the load folding tables.
This includes unmasked forms of variable shift and shifting by the lower element of a register.
Still need to do shift by immediate which was not foldable prior to avx512 and all the masked forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294285
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Matt Arsenault [Tue, 7 Feb 2017 04:37:59 +0000 (04:37 +0000)]
AMDGPU: Fix missing static
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294281
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Craig Topper [Tue, 7 Feb 2017 04:10:57 +0000 (04:10 +0000)]
[X86] Change the Defs list for VZEROALL/VZEROUPPER back to not including YMM16-31.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294277
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Craig Topper [Tue, 7 Feb 2017 04:10:54 +0000 (04:10 +0000)]
[AVX-512] Put the integer stack folding tests in alphabetical order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294276
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Chandler Carruth [Tue, 7 Feb 2017 03:34:08 +0000 (03:34 +0000)]
[PM] Defend against getting slightly wrong template arguments passed
into CRTP base classes.
This can sometimes happen and not cause an immediate failure when the
derived class is, itself, a template. You can end up essentially calling
methods on the wrong derived type but a type where many things will
appear to "work".
To fail fast and with a clear error message we can use a static_assert,
but we have to stash that static_assert inside a method body or nested
type that won't need to be completed while building the base class. I've
tried to pick a reasonably small number of places that seemed like they
would definitely get triggered on use.
This is the last of the patch series defending against this that I have
planned, so far no bugs other than the original were found.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294275
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Peter Collingbourne [Tue, 7 Feb 2017 03:20:58 +0000 (03:20 +0000)]
LowerTypeTests: Simplify. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294273
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Chandler Carruth [Tue, 7 Feb 2017 03:17:30 +0000 (03:17 +0000)]
[IR/Analysis] Defend against getting slightly wrong template arguments
passed into CRTP base classes.
This can sometimes happen and not cause an immediate failure when the
derived class is, itself, a template. You can end up essentially calling
methods on the wrong derived type but a type where many things will
appear to "work".
To fail fast and with a clear error message we can use a static_assert,
but we have to stash that static_assert inside a method body or nested
type that won't need to be completed while building the base class. I've
tried to pick a reasonably small number of places that seemed like
reliably places for this to be instantiated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294272
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Chandler Carruth [Tue, 7 Feb 2017 03:15:12 +0000 (03:15 +0000)]
[ADT] Defend against getting slightly wrong template arguments passed
into CRTP base classes.
This can sometimes happen and not cause an immediate failure when the
derived class is, itself, a template. You can end up essentially calling
methods on the wrong derived type but a type where many things will
appear to "work".
To fail fast and with a clear error message we can use a static_assert,
but we have to stash that static_assert inside a method body or nested
type that won't need to be completed while building the base class. I've
tried to pick a reasonably small number of places that seemed like
reliably places for this to be instantiated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294271
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Krzysztof Parzyszek [Tue, 7 Feb 2017 02:31:53 +0000 (02:31 +0000)]
[Hexagon] Address ASAN and UBSAN failures after r294226
Reinstate r294256 with a fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294269
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Matthias Braun [Tue, 7 Feb 2017 01:59:39 +0000 (01:59 +0000)]
RegisterCoalescer: Fix joinReservedPhysReg()
joinReservedPhysReg() can only deal with a liverange in a single basic
block when copying from a vreg into a physreg.
See also rdar://
30306405
Differential Revision: https://reviews.llvm.org/D29436
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294268
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Chandler Carruth [Tue, 7 Feb 2017 01:50:48 +0000 (01:50 +0000)]
Revert r293017 and fix the actual underlying issue.
The patch committed in r293017, as discussed on the list, doesn't really
make sense but was causing an actual issue to go away.
The issue turns out to be that in one place the extra template arguments
were dropped from the OuterAnalysisManagerProxy. This in turn caused the
types used in one set of places to access the key to be completely
different from the types used in another set of places for both Loop and
CGSCC cases where there are extra arguments.
I have literally no idea how anything seemed to work with this bug in
place. It blows my mind. But it did except for mingw64 in a DLL build.
I've added a really handy static assert that helps ensure we don't break
this in the future. It immediately diagnoses the issue with a compile
failure and a very clear error message. Much better that staring at
backtraces on a build bot. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294267
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Yaxun Liu [Tue, 7 Feb 2017 00:43:21 +0000 (00:43 +0000)]
[AMDGPU] Lower null pointers in static variable initializer
For amdgcn target Clang generates addrspacecast to represent null pointers in private and local address spaces.
In LLVM codegen, the static variable initializer is lowered by virtual function AsmPrinter::lowerConstant which is target generic. Since addrspacecast is target specific, AsmPrinter::lowerConst
This patch overrides AsmPrinter::lowerConstant with AMDGPUAsmPrinter::lowerConstant, which is able to lower the target-specific addrspacecast in the null pointer representation so that -1 is co
Differential Revision: https://reviews.llvm.org/D29284
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294265
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Philip Reames [Tue, 7 Feb 2017 00:25:24 +0000 (00:25 +0000)]
[LVI] Switch from BFS to DFS exploration order
This patch changes the order in which LVI explores previously unexplored paths.
Previously, the code used an BFS strategy where each unexplored input was added to the search queue before any of them were explored. This has the effect of causing all inputs to be explored before returning to re-evaluate the merge point (non-local or phi node). This has the unfortunate property of doing redundant work if one of the inputs to the merge is found to be overdefined (i.e. unanalysable). If any input is overdefined, the result of the merge will be too; regardless of the values of other inputs.
The new code uses a DFS strategy where we re-evaluate the merge after evaluating each input. If we discover an overdefined input, we immediately return without exploring other inputs.
We have reports of large (4-10x) improvements of compile time with this patch and some reports of more precise analysis results as well. See the review discussion for details. The original motivating case was pr10584.
Differential Revision: https://reviews.llvm.org/D28190
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294264
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Sanjay Patel [Tue, 7 Feb 2017 00:10:50 +0000 (00:10 +0000)]
[x86] add tests to show current codegen for vblendv*; NFC
As noted in the comments, we should be able to eliminate cmp ops
in several cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294263
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Tim Northover [Mon, 6 Feb 2017 23:41:27 +0000 (23:41 +0000)]
GlobalISel: legalize narrow G_SELECTS on AArch64.
Otherwise there aren't any patterns to select them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294261
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Dehao Chen [Mon, 6 Feb 2017 23:33:15 +0000 (23:33 +0000)]
Fix the samplepgo indirect call promotion bug: we should not promote a direct call.
Summary: Checking CS.getCalledFunction() == nullptr does not necessary indicate indirect call. We also need to check if CS.getCalledValue() is not a constant.
Reviewers: davidxl
Reviewed By: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29570
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294260
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Krzysztof Parzyszek [Mon, 6 Feb 2017 23:30:17 +0000 (23:30 +0000)]
Revert "[Hexagon] Address ASAN and UBSAN failures after r294226"
This reverts commit r294256. It seems to be causing more problems instead
of solving them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294259
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Krzysztof Parzyszek [Mon, 6 Feb 2017 23:18:57 +0000 (23:18 +0000)]
[Hexagon] Adding gp+ to the syntax of gp-relative instructions
Patch by Colin LeMahieu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294258
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Stanislav Mekhanoshin [Mon, 6 Feb 2017 23:16:51 +0000 (23:16 +0000)]
[AMDGPU] Fix GCNSchedStrategy.cpp debug output
There is typo in the debug output: top and bottom candidates are switched.
Differential Revision: https://reviews.llvm.org/D29608
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294257
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Krzysztof Parzyszek [Mon, 6 Feb 2017 23:11:32 +0000 (23:11 +0000)]
[Hexagon] Address ASAN and UBSAN failures after r294226
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294256
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Simon Pilgrim [Mon, 6 Feb 2017 22:42:43 +0000 (22:42 +0000)]
[X86][SSE] Tests showing the lowering of float/double complex multiplications with fastmath (PR31866)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294254
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Paul Robinson [Mon, 6 Feb 2017 22:19:04 +0000 (22:19 +0000)]
Merge DebugLoc on combined stores; in this case, when combining stores
from the end of two blocks, merge instead of arbitrarily picking one.
Differential Revision: http://reviews.llvm.org/D29504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294251
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Taewook Oh [Mon, 6 Feb 2017 22:05:04 +0000 (22:05 +0000)]
[GVNHoist] Merge DebugLoc metadata on hoisted instructions
Summary:
When instructions are hoisted, current implementation keeps DebugLoc metadata of the instruction that chosen as Repl (and its GEP operand if Repl is a load or a store). However, DebugLoc metadata should be updated to the 'merged' location across all hoisted instructions. See the following example code:
```
1: typedef struct {
2: int a[10];
3: } S1;
4:
5: extern S1 *s1[10];
6:
7: void foo(int x, int y, int i) {
8: if (y)
9: s1[i]->a[i] = x + y;
10: else
11: s1[i]->a[i] = x;
12: }
```
Below is LLVM IR representation of the program before gvn-hoist:
```
%struct.S1 = type { [10 x i32] }
@s1 = external local_unnamed_addr global [10 x %struct.S1*], align 16
define void @foo(i32 %x, i32 %y, i32 %i) !dbg !4 {
entry:
%tobool = icmp ne i32 %y, 0, !dbg !8
br i1 %tobool, label %if.then, label %if.else, !dbg !10
if.then: ; preds = %entry
%add = add nsw i32 %x, %y, !dbg !11
%idxprom = sext i32 %i to i64, !dbg !12
%arrayidx = getelementptr inbounds [10 x %struct.S1*], [10 x %struct.S1*]* @s1, i64 0, i64 %idxprom, !dbg !12
%0 = load %struct.S1*, %struct.S1** %arrayidx, align 8, !dbg !12, !tbaa !13
%a = getelementptr inbounds %struct.S1, %struct.S1* %0, i32 0, i32 0, !dbg !17
br label %if.end, !dbg !12
if.else: ; preds = %entry
%idxprom3 = sext i32 %i to i64, !dbg !18
%arrayidx4 = getelementptr inbounds [10 x %struct.S1*], [10 x %struct.S1*]* @s1, i64 0, i64 %idxprom3, !dbg !18
%1 = load %struct.S1*, %struct.S1** %arrayidx4, align 8, !dbg !18, !tbaa !13
%a5 = getelementptr inbounds %struct.S1, %struct.S1* %1, i32 0, i32 0, !dbg !19
br label %if.end
if.end: ; preds = %if.else, %if.then
%a5.sink = phi [10 x i32]* [ %a5, %if.else ], [ %a, %if.then ]
%.sink = phi i32 [ %x, %if.else ], [ %add, %if.then ]
%idxprom6 = sext i32 %i to i64
%arrayidx7 = getelementptr inbounds [10 x i32], [10 x i32]* %a5.sink, i64 0, i64 %idxprom6
store i32 %.sink, i32* %arrayidx7, align 4, !tbaa !20
ret void, !dbg !22
}
```
where
```
!11 = !DILocation(line: 9, column: 18, scope: !9)
!12 = !DILocation(line: 9, column: 5, scope: !9)
!18 = !DILocation(line: 11, column: 5, scope: !9)
!19 = !DILocation(line: 11, column: 9, scope: !9)
```
. And below is after gvn-hoist:
```
define void @foo(i32 %x, i32 %y, i32 %i) !dbg !4 {
entry:
%tobool = icmp ne i32 %y, 0, !dbg !8
%idxprom = sext i32 %i to i64, !dbg !10
%0 = getelementptr inbounds [10 x %struct.S1*], [10 x %struct.S1*]* @s1, i64 0, i64 %idxprom, !dbg !10
%1 = load %struct.S1*, %struct.S1** %0, align 8, !dbg !10, !tbaa !11
br i1 %tobool, label %if.then, label %if.else, !dbg !15
if.then: ; preds = %entry
%add = add nsw i32 %x, %y, !dbg !16
%arrayidx = getelementptr inbounds [10 x %struct.S1*], [10 x %struct.S1*]* @s1, i64 0, i64 %idxprom, !dbg !10
%a = getelementptr inbounds %struct.S1, %struct.S1* %1, i32 0, i32 0, !dbg !17
br label %if.end, !dbg !10
if.else: ; preds = %entry
%arrayidx4 = getelementptr inbounds [10 x %struct.S1*], [10 x %struct.S1*]* @s1, i64 0, i64 %idxprom, !dbg !18
%a5 = getelementptr inbounds %struct.S1, %struct.S1* %1, i32 0, i32 0, !dbg !19
br label %if.end
if.end: ; preds = %if.else, %if.then
%a5.sink = phi [10 x i32]* [ %a5, %if.else ], [ %a, %if.then ]
%.sink = phi i32 [ %x, %if.else ], [ %add, %if.then ]
%arrayidx7 = getelementptr inbounds [10 x i32], [10 x i32]* %a5.sink, i64 0, i64 %idxprom
store i32 %.sink, i32* %arrayidx7, align 4, !tbaa !20
ret void, !dbg !22
}
```
As you see, loads and their GEPs have been hosited from if.then/if.else block to entry block. However, DebugLoc metadata of these new instructions are still same as the instructions in if.then block, as they are moved/cloned from if.then block. This may result incorrect stepping and imprecise sample profile result.
Reviewers: majnemer, pcc, sebpop
Reviewed By: sebpop
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29377
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294250
91177308-0d34-0410-b5e6-
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Tim Northover [Mon, 6 Feb 2017 21:57:06 +0000 (21:57 +0000)]
GlobalISel: fall back gracefully when we can't map an operand's size.
AArch64 was asserting when it was asked to provide a register-bank of a size it
couldn't deal with (in this case an s128 IMPLICIT_DEF). But we want a robust
fallback path so this isn't allowed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294248
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Mon, 6 Feb 2017 21:56:47 +0000 (21:56 +0000)]
GlobalISel: legalize G_INSERT instructions
We don't handle all cases yet (see arm64-fallback.ll for an example), but this
is enough to cover most common C++ code so it's a good place to start.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294247
91177308-0d34-0410-b5e6-
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Eugene Zelenko [Mon, 6 Feb 2017 21:55:43 +0000 (21:55 +0000)]
[X86] Fix some Include What You Use warnings; other minor fixes (NFC).
This is preparation to reduce MCExpr.h dependencies.(vlsj-clangbuild)[622]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294246
91177308-0d34-0410-b5e6-
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Michael Kuperstein [Mon, 6 Feb 2017 21:50:59 +0000 (21:50 +0000)]
[SLP] Revert "Allow using of extra values in horizontal reductions."
This breaks when one of the extra values is also a scalar that
participates in the same vectorization tree which we'll end up
reducing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294245
91177308-0d34-0410-b5e6-
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Chandler Carruth [Mon, 6 Feb 2017 21:27:12 +0000 (21:27 +0000)]
[SCEV] Scale back the test added in r294181 as it goes quadratic in
SCEV.
This test was immediately the slowest test in 'check-llvm' even in an
optimized build and was driving up the total test time by 50% for me.
Sanjoy has filed a PR about the quadratic behavior in SCEV but it is
also concerning that the test still passes given that r294181 added
a threshold at 32 to SCEV. I've followed up on the original patch to
figure out how this test should work long-term, but for now I want to
get check-llvm to be fast again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294241
91177308-0d34-0410-b5e6-
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Peter Collingbourne [Mon, 6 Feb 2017 21:23:03 +0000 (21:23 +0000)]
IR: Consider two DISubprograms to be odr-equal if they have the same template parameters.
In ValueMapper we create new operands for MDNodes and
rely on MDNode::replaceWithUniqued to create a new MDNode
with the specified operands. However this doesn't always
actually happen correctly for DISubprograms because when we
uniquify the new node, we only odr-compare it with existing nodes
(MDNodeSubsetEqualImpl<DISubprogram>::isDeclarationOfODRMember). Although
the TemplateParameters field can refer to a distinct DICompileUnit via
DITemplateTypeParameter::type -> DICompositeType::scope -> DISubprogram::unit,
it is not currently included in the odr comparison. As a result, we can end
up getting our original DISubprogram back, which means we will have a cloned
module referring to the DICompileUnit in the original module, which causes
a verification error.
The fix I implemented was to consider TemplateParameters to be one of the
odr-equal properties. But I'm a little uncomfortable with this. In general it
seems unsound to rely on distinct MDNodes never being reachable from nodes
which we only check odr-equality of. My only long term suggestion would be
to separate odr-uniquing from full uniquing.
Differential Revision: https://reviews.llvm.org/D29240
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294240
91177308-0d34-0410-b5e6-
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Kostya Serebryany [Mon, 6 Feb 2017 21:21:37 +0000 (21:21 +0000)]
[libFuzzer] make code less clever to avoid fallthrough in switch (and in turn avoid compiler warnings). NFC. Suggested by Christian Holler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294239
91177308-0d34-0410-b5e6-
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Kevin Enderby [Mon, 6 Feb 2017 21:01:08 +0000 (21:01 +0000)]
Fix a bug in llvm-obdump(1) with the -macho and -info-plist options
which caused it to print more than the (__TEXT,__info_plist) if that
section did not end with a null.
rdar://
27378808
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294236
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Mon, 6 Feb 2017 20:59:07 +0000 (20:59 +0000)]
[PM/LCG] Fix the no-asserts build after r294227. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294235
91177308-0d34-0410-b5e6-
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David Blaikie [Mon, 6 Feb 2017 20:19:02 +0000 (20:19 +0000)]
Get function start line number from DWARF info
DWARF info contains info about the line number at which a function starts (DW_AT_decl_line).
This patch creates a function to look up the start line number for a function, and returns it in
DILineInfo when looking up debug info for a particular address.
Patch by Simon Que!
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D27962
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294231
91177308-0d34-0410-b5e6-
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Jon Chesterfield [Mon, 6 Feb 2017 19:41:44 +0000 (19:41 +0000)]
[TableGen] Use less stack in DAGISelMatcherOpt
Refactor a helper function, FactorNodes, to search for a push node in constant space. This resolves a problem in a not-yet-upstreamed backend where a recursive pattern blew the call stack (at a depth of 255) under a debug build of tablegen. No functional change so no new test coverage. The change is minimal to avoid disturbing existing behaviour.
Differential Revision: https://reviews.llvm.org/D29080
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294230
91177308-0d34-0410-b5e6-
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Jon Chesterfield [Mon, 6 Feb 2017 19:40:56 +0000 (19:40 +0000)]
Revert r294228
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294229
91177308-0d34-0410-b5e6-
96231b3b80d8
Jon Chesterfield [Mon, 6 Feb 2017 19:39:47 +0000 (19:39 +0000)]
Test commit access
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294228
91177308-0d34-0410-b5e6-
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Chandler Carruth [Mon, 6 Feb 2017 19:38:06 +0000 (19:38 +0000)]
[PM/LCG] Remove the lazy RefSCC formation from the LazyCallGraph during
iteration.
The lazy formation of RefSCCs isn't really the most important part of
the laziness here -- that has to do with walking the functions
themselves -- and isn't essential to maintain. Originally, there were
incremental update algorithms that relied on updates happening
predominantly near the most recent RefSCC formed, but those have been
replaced with ones that have much tighter general case bounds at this
point. We do still perform asserts that only scale well due to this
incrementality, but those are easy to place behind EXPENSIVE_CHECKS.
Removing this simplifies the entire analysis by having a single up-front
step that builds all of the RefSCCs in a direct Tarjan walk. We can even
easily replace this with other or better algorithms at will and with
much less confusion now that there is no iterator-based incremental
logic involved. This removes a lot of complexity from LCG.
Another advantage of moving in this direction is that it simplifies
testing the system substantially as we no longer have to worry about
observing and mutating the graph half-way through the RefSCC formation.
We still need a somewhat special iterator for RefSCCs because we want
the iterator to remain stable in the face of graph updates. However,
this now merely involves relative indexing to the current RefSCC's
position in the sequence which isn't too hard.
Differential Revision: https://reviews.llvm.org/D29381
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294227
91177308-0d34-0410-b5e6-
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Krzysztof Parzyszek [Mon, 6 Feb 2017 19:35:46 +0000 (19:35 +0000)]
[Hexagon] Update MCTargetDesc
Changes include:
- Updates to the instruction descriptor flags.
- Improvements to the packet shuffler and checker.
- Updates to the handling of certain relocations.
- Better handling of duplex instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294226
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Mon, 6 Feb 2017 18:57:51 +0000 (18:57 +0000)]
[X86][SSE] Add tests showing missed opportunities to simplify integer absolute instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294216
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Mon, 6 Feb 2017 18:43:18 +0000 (18:43 +0000)]
Fix a bug in llvm-obdump(1) with the -macho and -disassemble options
which caused it to not disassemble the bytes a the start of the section if
the section had symbols and the first symbol was not at the start of the
section.
rdar://
30143243
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294212
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Mon, 6 Feb 2017 18:31:21 +0000 (18:31 +0000)]
[Support] Add support for runtime endian values.
Endian functions only support reading and writing when the
endianness is known at compile time. This patch adds overloads
where the endianness is a runtime value, and then delegates the
compile-time versions to the runtime versions.
Differential Revision: https://reviews.llvm.org/D29467
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294209
91177308-0d34-0410-b5e6-
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Sanjay Patel [Mon, 6 Feb 2017 18:26:06 +0000 (18:26 +0000)]
[ValueTracking] emit a remark when we detect a conflicting assumption (PR31809)
This is a follow-up to D29395 where we try to be good citizens and let the user know that
we've probably gone off the rails.
This should allow us to resolve:
https://llvm.org/bugs/show_bug.cgi?id=31809
Differential Revision: https://reviews.llvm.org/D29404
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294208
91177308-0d34-0410-b5e6-
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Dehao Chen [Mon, 6 Feb 2017 18:10:36 +0000 (18:10 +0000)]
Fix the bug of samplepgo indirect call promption when type casting of the return value is needed.
Summary: When type casting of the return value is needed, promoteIndirectCall will return the type casting instruction instead of the direct call. This patch changed to return the direct call instruction instead.
Reviewers: davidxl
Reviewed By: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29569
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294205
91177308-0d34-0410-b5e6-
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Reid Kleckner [Mon, 6 Feb 2017 18:08:45 +0000 (18:08 +0000)]
[LangRef] Document some LLVM inline asm special escapes
As discussed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2017-February/109862.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294204
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John Brawn [Mon, 6 Feb 2017 18:07:20 +0000 (18:07 +0000)]
[AArch64] Fix incorrect MachinePointerInfo in splitStoreSplat
When splitting up one store into several in splitStoreSplat we have to
make sure we get the MachinePointerInfo right, otherwise alias
analysis thinks they all store to the same location. This can then
cause invalid scheduling later on.
Differential Revision: https://reviews.llvm.org/D29446
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294203
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Mon, 6 Feb 2017 17:48:08 +0000 (17:48 +0000)]
[DAGCombiner] Support bswap as a part of load combine patterns
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D29397
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294201
91177308-0d34-0410-b5e6-
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Sanjay Patel [Mon, 6 Feb 2017 17:16:16 +0000 (17:16 +0000)]
[InstCombine] simplify dyn_cast + isa; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294198
91177308-0d34-0410-b5e6-
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Amaury Sechet [Mon, 6 Feb 2017 16:21:41 +0000 (16:21 +0000)]
Commit full codegen for mul-i256.ll . NFC
The full codegen is committed for larger multiply, so that won't make the test suite more fragile. However, it'll allow to expose the effects fo various DAG combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294196
91177308-0d34-0410-b5e6-
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Eugene Leviant [Mon, 6 Feb 2017 15:31:28 +0000 (15:31 +0000)]
RuntimeDyldELF/AArch64: Implement basic GOT support
This patch implements two GOT relocations:
R_AARCH64_ADR_GOT_PAGE and R_AARCH64_LD64_GOT_LO12_NC
Differential revision: https://reviews.llvm.org/D28571
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294191
91177308-0d34-0410-b5e6-
96231b3b80d8
Amaury Sechet [Mon, 6 Feb 2017 14:59:06 +0000 (14:59 +0000)]
Add ADDC to SelectionDAG::computeKnownBits and ComputeNumSignBits.
Summary: As per title.
Reviewers: bkramer, sunfish, lattner, RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29521
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294188
91177308-0d34-0410-b5e6-
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Amaury Sechet [Mon, 6 Feb 2017 14:54:49 +0000 (14:54 +0000)]
[DAGCombiner] Make DAGCombiner smarter about overflow
Summary: Leverage it to transform addc into add.
Reviewers: mkuper, spatel, RKSimon, zvi
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29524
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294187
91177308-0d34-0410-b5e6-
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Amaury Sechet [Mon, 6 Feb 2017 14:28:39 +0000 (14:28 +0000)]
[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)
Summary: This is extracted from D29443 .
Reviewers: mkuper, spatel, RKSimon, zvi, bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29564
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294186
91177308-0d34-0410-b5e6-
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Artur Pilipenko [Mon, 6 Feb 2017 14:15:31 +0000 (14:15 +0000)]
Add DAGCombiner load combine tests with non-zero offset
This is separated from https://reviews.llvm.org/D29394 review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294185
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Mon, 6 Feb 2017 14:06:57 +0000 (14:06 +0000)]
[X86] Add add/addc known-bits tests (D29521)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294184
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 6 Feb 2017 13:44:45 +0000 (13:44 +0000)]
[X86][SSE] Combine shuffle nodes with multiple uses if all the users are being combined.
Currently we only combine shuffle nodes if they have a single user to prevent us from causing code bloat by splitting the shuffles into several different combines.
We don't take into account that in some cases we will already have combined all the users during recursively calling up the shuffle tree.
This patch keeps a list of all the shuffle nodes that have been combined so far and permits combining of further shuffle nodes if all its users are in that list.
Differential Revision: https://reviews.llvm.org/D29399
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294183
91177308-0d34-0410-b5e6-
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Simon Dardis [Mon, 6 Feb 2017 12:43:46 +0000 (12:43 +0000)]
[mips] dla expansion without the at register
Previously only the superscalar scheduled expansion of the dla macro for
MIPS64 was implemented. If assembler temporary register is not available
and the optional source register is not the destination register, synthesize
the address using the naive solution of adds and shifts.
This partially resolves PR/30383.
Thanks to Sean Bruno for reporting the issue!
Reviewers: slthakur, seanbruno
Differential Revision: https://reviews.llvm.org/D29328
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294182
91177308-0d34-0410-b5e6-
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Daniil Fukalov [Mon, 6 Feb 2017 12:38:06 +0000 (12:38 +0000)]
[SCEV] limit recursion depth and operands number in getAddExpr
for a quite big function with source like
%add = add nsw i32 %mul, %conv
%mul1 = mul nsw i32 %add, %conv
%add2 = add nsw i32 %mul1, %add
%mul3 = mul nsw i32 %add2, %add
; repeat couple of thousands times
that can be produced by loop unroll, getAddExpr() tries to recursively construct SCEV and runs almost infinite time.
Added recursion depth restriction (with new parameter to set it)
Reviewers: sanjoy
Subscribers: hfinkel, llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D28158
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294181
91177308-0d34-0410-b5e6-
96231b3b80d8
Dylan McKay [Mon, 6 Feb 2017 08:43:30 +0000 (08:43 +0000)]
[AVR] Use 'print' instead of 'dump'
This should fix an undefined reference on the AVR buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294175
91177308-0d34-0410-b5e6-
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Chandler Carruth [Mon, 6 Feb 2017 08:43:11 +0000 (08:43 +0000)]
[ArgPromote] Replace all the grep-based testing with precise FileCheck
tests.
This also removes the use of instcombine as we can max the patterns
produced by argument promotion directly with the more powerful tools in
FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294174
91177308-0d34-0410-b5e6-
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Igor Breger [Mon, 6 Feb 2017 08:37:41 +0000 (08:37 +0000)]
[X86][GlobalISel] Add limited ret lowering support to the IRTranslator.
Summary:
Support return lowering for i8/i16/i32/i64/float/double, vector type supported for 64bit platform only.
Support argument lowering for float/double types.
Reviewers: t.p.northover, zvi, ab, rovka
Reviewed By: zvi
Subscribers: dberris, kristof.beyls, delena, llvm-commits
Differential Revision: https://reviews.llvm.org/D29261
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294173
91177308-0d34-0410-b5e6-
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Craig Topper [Mon, 6 Feb 2017 05:12:14 +0000 (05:12 +0000)]
[AVX-512] Add VPSLLDQ/VPSRLDQ to load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294170
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 6 Feb 2017 03:18:01 +0000 (03:18 +0000)]
[AVX-512] Add VPABSB/D/Q/W to load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294169
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 6 Feb 2017 03:17:58 +0000 (03:17 +0000)]
[AVX-512] Add VSHUFPS/PD to load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294168
91177308-0d34-0410-b5e6-
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Craig Topper [Mon, 6 Feb 2017 01:19:26 +0000 (01:19 +0000)]
[AVX-512] Add VPMULLD/Q/W instructions to load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294164
91177308-0d34-0410-b5e6-
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Craig Topper [Sun, 5 Feb 2017 23:31:48 +0000 (23:31 +0000)]
[AVX-512] Add all masked and unmasked versions of VPMULDQ and VPMULUDQ to load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294163
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Sun, 5 Feb 2017 22:50:29 +0000 (22:50 +0000)]
[X86][SSE] Replace insert_vector_elt(vec, -1, idx) with shuffle
Similar to what we already do for zero elt insertion, we can quickly rematerialize 'allbits' vectors so to avoid a unnecessary gpr value and insertion into a vector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294162
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Craig Topper [Sun, 5 Feb 2017 22:25:46 +0000 (22:25 +0000)]
[AVX-512] Add scalar masked max/min intrinsic instructions to the load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294153
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Craig Topper [Sun, 5 Feb 2017 22:25:42 +0000 (22:25 +0000)]
[AVX-512] Add scalar masked add/sub/mul/div intrinsic instructions to the load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294152
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Craig Topper [Sun, 5 Feb 2017 22:25:40 +0000 (22:25 +0000)]
[AVX-512] Add masked scalar FMA intrinsics to isNonFoldablePartialRegisterLoad to improve load folding of scalar loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294151
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Craig Topper [Sun, 5 Feb 2017 22:25:37 +0000 (22:25 +0000)]
[AVX-512] Add test cases that show failure to fold scalar loads into masked scalar FMA intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294150
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Craig Topper [Sun, 5 Feb 2017 22:25:35 +0000 (22:25 +0000)]
[AVX-512] Move 128/256-bit intrinsic tests from avx512bwvl test file to avx512vl test file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294149
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Simon Pilgrim [Sun, 5 Feb 2017 21:40:25 +0000 (21:40 +0000)]
[X86][AVX] Add 8i32 -> 8f32 sitofp tests with constant insertion
Some elements are constant inserted into the source integer vector before conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294147
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Dylan McKay [Sun, 5 Feb 2017 21:35:45 +0000 (21:35 +0000)]
[AVR] Implement stacksave/stackrestore by expanding (PR31342)
Summary:
Authored by Florian Zeitz.
This implements the missing stacksave/stackrestore intrinsics via expansion.
Output of `llc -O0 -march=avr ~/devel/llvm/test/CodeGen/Generic/stacksave-restore.ll` for sanity checking (comments mine):
```
.text
.file ".../llvm/test/CodeGen/Generic/stacksave-restore.ll"
.globl test
.p2align 1
.type test,@function
test: ; @test
; BB#0:
push r28
push r29
in r28, 61
in r29, 62
sbiw r28, 4
in r0, 63
cli
out 62, r29
out 63, r0
out 61, r28
in r18, 61
in r19, 62
mov r20, r22
mov r21, r23
in r30, 61
in r31, 62
lsl r22
rol r23
lsl r22
rol r23
in r26, 61
in r27, 62
sub r26, r22
sbc r27, r23
andi r26, 252
in r0, 63
cli
out 62, r27
out 63, r0
out 61, r26
in r0, 63
cli
out 62, r31
out 63, r0
out 61, r30
in r30, 61
in r31, 62
sub r30, r22
sbc r31, r23
andi r30, 252
in r0, 63
cli
out 62, r31
out 63, r0
out 61, r30
std Y+3, r24 ; 2-byte Folded Spill
std Y+4, r25 ; 2-byte Folded Spill
mov r24, r26
mov r25, r27
in r0, 63
cli
out 62, r19
out 63, r0
out 61, r18
std Y+1, r20 ; 2-byte Folded Spill
std Y+2, r21 ; 2-byte Folded Spill
adiw r28, 4
in r0, 63
cli
out 62, r29
out 63, r0
out 61, r28
pop r29
pop r28
ret
.Lfunc_end0:
.size test, .Lfunc_end0-test
```
Reviewers: dylanmckay
Reviewed By: dylanmckay
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29553
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294146
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