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Craig Topper [Fri, 13 Oct 2017 00:18:58 +0000 (00:18 +0000)]
[SelectionDAG] Correct the early out in SelectionDAG::getZeroExtendInReg to work properly for vector types.
I don't know if we ever hit this case or not. Turning it into an assert only fired on expanding some atomic operation in a SystemZ lit test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315648
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Matt Morehouse [Fri, 13 Oct 2017 00:18:32 +0000 (00:18 +0000)]
[llvm-isel-fuzzer] Use "--" as separator rather than '='.
Summary: OSS-Fuzz doesn't support '=' in filenames.
Reviewers: bogner, kcc
Reviewed By: kcc
Subscribers: javed.absar, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D38866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315647
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Justin Bogner [Fri, 13 Oct 2017 00:17:54 +0000 (00:17 +0000)]
llvm-isel-fuzzer: Use the right REQUIRES line for r315599
I'd mixed up ENABLE_SHARED and BUILD_SHARED_LIBS before, so these
tests were being disabled in too many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315646
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Keith Wyss [Fri, 13 Oct 2017 00:06:35 +0000 (00:06 +0000)]
Removing default case statement from covered switch.
Previous patch did not count on the llvm command line parser to restrict the
inputs, but it is safe to do so.
Fix forward for patch with details:
-- https://reviews.llvm.org/D38650 and
-- https://llvm.org/svn/llvm-project/llvm/trunk@315635
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315644
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Adam Nemet [Thu, 12 Oct 2017 23:56:02 +0000 (23:56 +0000)]
Add DK_Remark to SMDiagnostic
Swift uses SMDiagnostic for diagnostic messages. For
https://github.com/apple/swift/pull/12294, we need remark support.
I picked the color that clang uses to display them.
Differential Revision: https://reviews.llvm.org/D38865
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315642
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Craig Topper [Thu, 12 Oct 2017 23:46:05 +0000 (23:46 +0000)]
[SelectionDAG] Const-correct the DemandedMask argument to one of the overloads of SimplifyDemandedBits. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315641
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Eugene Zelenko [Thu, 12 Oct 2017 23:30:03 +0000 (23:30 +0000)]
[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315640
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Matthias Braun [Thu, 12 Oct 2017 22:57:28 +0000 (22:57 +0000)]
Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"
Reverting to investigate layering effects of MCJIT not linking
libCodeGen but using TargetMachine::getNameWithPrefix() breaking the
lldb bots.
This reverts commit r315633.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315637
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Adrian Prantl [Thu, 12 Oct 2017 22:54:36 +0000 (22:54 +0000)]
Deprecate DwarfUnit::addBlockByrefAddress().
The clang frontend already creates a DIExpression that replicates the
logic in addBlockByrefAddress() exactly, thus making this function
effectively unreachable. To guard against human error I'm hereby
marking the function with an assertion and let it hit the bots before
eventually removing it.
rdar://problem/
31629055
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315636
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Keith Wyss [Thu, 12 Oct 2017 22:47:42 +0000 (22:47 +0000)]
[XRay][tools] Updated stacks tool with flamegraph output.
Summary:
As the first step to allow analysis and visualization of xray collected data,
allow using the llvm-xray stacks tool to emit a complete listing of stacks in
the format consumable by a flamegraph tool.
Possible follow up formats include chrome trace viewer format and sql load
files.
As a POC, I'm able to generate flamegraphs of an xray instrumented llc compiling
hello world.
Reviewers: dberris, pelikan
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38650
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315635
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Anna Thomas [Thu, 12 Oct 2017 22:39:52 +0000 (22:39 +0000)]
[CVP] Process binary operations even when def is local
Summary:
This patch adds processing of binary operations when the def of operands are in
the same block (i.e. local processing).
Earlier we bailed out in such cases (the bail out was introduced in rL252032)
because LVI at that time was more precise about context at the end of basic
blocks, which implied local def and use analysis didn't benefit CVP.
Since then we've added support for LVI in presence of assumes and guards. The
test cases added show how local def processing in CVP helps adding more
information to the ashr, sdiv, srem and add operators.
Note: processCmp which suffers from the same problem will
be handled in a later patch.
Reviewers: philip, apilipenko, SjoerdMeijer, hfinkel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38766
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315634
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Matthias Braun [Thu, 12 Oct 2017 22:28:54 +0000 (22:28 +0000)]
TargetMachine: Merge TargetMachine and LLVMTargetMachine
Merge LLVMTargetMachine into TargetMachine.
- There is no in-tree target anymore that just implements TargetMachine
but not LLVMTargetMachine.
- It should still be possible to stub out all the various functions in
case a target does not want to use lib/CodeGen
- This simplifies the code and avoids methods ending up in the wrong
interface.
Differential Revision: https://reviews.llvm.org/D38489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315633
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Matt Morehouse [Thu, 12 Oct 2017 21:58:41 +0000 (21:58 +0000)]
[cmake] Allow building fuzzers with OSS-Fuzz flags.
Reviewers: kcc, bogner
Reviewed By: bogner
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D38858
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315629
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Craig Topper [Thu, 12 Oct 2017 21:58:25 +0000 (21:58 +0000)]
[SelectionDAG] Simplify the ISD::SIGN_EXTEND/ZERO_EXTEND handling to use less temporary APInts by counting bits instead. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315628
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Zachary Turner [Thu, 12 Oct 2017 21:56:05 +0000 (21:56 +0000)]
[lit] Raise the logic for enabling clang & lld substitutions to llvm.
This paves the way for other projects which might /use/ clang or
lld but not necessarily need to the full set of functionality
available to clang and lld tests to be able to have a basic set
of substitutions that allow a project to run the clang or lld
executables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315627
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Artur Pilipenko [Thu, 12 Oct 2017 21:21:17 +0000 (21:21 +0000)]
[LoopPredication] Check whether the loop is already guarded by the first iteration check condition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315623
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Eli Friedman [Thu, 12 Oct 2017 20:54:08 +0000 (20:54 +0000)]
[DWARF] Fix bad comparator in sortGlobalExprs.
The comparator passed to std::sort must provide a strict weak ordering;
otherwise, the behavior is undefined.
Fixes an assertion failure generating debug info for globals
split by GlobalOpt. I have a testcase, but not sure how to reduce it,
so not included here. (Someone else came up with a testcase, but I
can't reproduce the crash with it, presumably because my version of LLVM
ends up sorting the array differently.)
This isn't really a complete fix (see the FIXME in the patch), but at
least it doesn't have undefined behavior.
Differential Revision: https://reviews.llvm.org/D38830
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315619
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Bruno Cardoso Lopes [Thu, 12 Oct 2017 20:52:34 +0000 (20:52 +0000)]
Revert "Reintroduce "[SCCP] Propagate integer range info for parameters in IPSCCP.""
This reverts commit r315593: still affect two bots:
http://lab.llvm.org:8011/builders/clang-with-lto-ubuntu/builds/5308
http://green.lab.llvm.org/green/job/clang-stage2-configure-Rlto/21751/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315618
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Artur Pilipenko [Thu, 12 Oct 2017 20:40:27 +0000 (20:40 +0000)]
[LoopPredication] Support ule, sle latch predicates
This is a follow up for the loop predication change 313981 to support ule, sle latch predicates.
Reviewed By: mkazantsev
Differential Revision: https://reviews.llvm.org/D38177
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315616
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Craig Topper [Thu, 12 Oct 2017 20:08:31 +0000 (20:08 +0000)]
[X86] Add CLWB intrinsic. llvm part
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315613
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Wei Ding [Thu, 12 Oct 2017 19:37:14 +0000 (19:37 +0000)]
Implement custom lowering for ISD::CTTZ_ZERO_UNDEF and ISD::CTTZ.
Differential Revision: http://reviews.llvm.org/D37348
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315610
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Konstantin Zhuravlyov [Thu, 12 Oct 2017 18:59:54 +0000 (18:59 +0000)]
AMDGPU/NFC: Move AMDGPU specific note types to ELF.h
Differential Revision: https://reviews.llvm.org/D38747
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315608
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Craig Topper [Thu, 12 Oct 2017 18:55:57 +0000 (18:55 +0000)]
[X86] Add a bunch of -mcpu strings to the cpus.ll test.
We were missing most of the "core" aliases as well as skylake, cannonlake, and knights landing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315606
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Artem Belevich [Thu, 12 Oct 2017 18:27:55 +0000 (18:27 +0000)]
[NVPTX] Implemented wmma intrinsics and instructions.
WMMA = "Warp Level Matrix Multiply-Accumulate".
These are the new instructions introduced in PTX6.0 and available
on sm_70 GPUs.
Differential Revision: https://reviews.llvm.org/D38645
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315601
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Reid Kleckner [Thu, 12 Oct 2017 18:20:35 +0000 (18:20 +0000)]
[codeview] Don't emit FPO data in funclet prologues
Attempt 3 to work around bugs in FPO data with funclets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315600
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Justin Bogner [Thu, 12 Oct 2017 18:10:22 +0000 (18:10 +0000)]
llvm-isel-fuzzer: Work around BUILD_SHARED_LIBS testing issues
Building with BUILD_SHARED_LIBS makes it tricky to copy around
executables at will, since they won't be able to find the LLVM
libraries any more. This makes testing a feature that's based on the
executable name problematic, so we'll just disable these two tests in
that configuration.
We could potentially fix this by symlinking the lib directory into the
test directory, but that wouldn't work on windows, and losing testing
on windows would be far worse than losing testing on a configuration
that's barely even supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315599
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Artem Belevich [Thu, 12 Oct 2017 17:40:00 +0000 (17:40 +0000)]
[TableGen] Allow intrinsics to have up to 8 return values.
Differential Revision: https://reviews.llvm.org/D38633
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315598
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Hans Wennborg [Thu, 12 Oct 2017 17:38:22 +0000 (17:38 +0000)]
Work around lack of Wine support for SetFileInformationByHandle harder
In r315079 I added a check for the ERROR_CALL_NOT_IMPLEMENTED error
code, but it turns out earlier versions of Wine just returned false
without setting any error code.
This patch handles the unset error code case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315597
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Konstantin Zhuravlyov [Thu, 12 Oct 2017 17:34:05 +0000 (17:34 +0000)]
AMDGPU: Fix warnings introduced in r315526
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315596
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Sanjay Patel [Thu, 12 Oct 2017 17:31:46 +0000 (17:31 +0000)]
[ValueTracking] return zero when there's conflict in known bits of a shift (PR34838)
Poison allows us to return a better result than undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315595
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Bruno Cardoso Lopes [Thu, 12 Oct 2017 16:54:11 +0000 (16:54 +0000)]
Reintroduce "[SCCP] Propagate integer range info for parameters in IPSCCP."
This is r315288 & r315294, which were reverted due to stage2 bot
failures.
Summary:
This updates the SCCP solver to use of the ValueElement lattice for
parameters, which provides integer range information. The range
information is used to remove unneeded icmp instructions.
For the following function, f() can be optimized to `ret i32 2` with
this change
source_filename = "sccp.c"
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: norecurse nounwind readnone uwtable
define i32 @main() local_unnamed_addr #0 {
entry:
%call = tail call fastcc i32 @f(i32 1)
%call1 = tail call fastcc i32 @f(i32 47)
%add3 = add nsw i32 %call, %call1
ret i32 %add3
}
; Function Attrs: noinline norecurse nounwind readnone uwtable
define internal fastcc i32 @f(i32 %x) unnamed_addr #1 {
entry:
%c1 = icmp sle i32 %x, 100
%cmp = icmp sgt i32 %x, 300
%. = select i1 %cmp, i32 1, i32 2
ret i32 %.
}
attributes #1 = { noinline }
Reviewers: davide, sanjoy, efriedma, dberlin
Reviewed By: davide, dberlin
Subscribers: mcrosier, gberry, mssimpso, dberlin, llvm-commits
Differential Revision: https://reviews.llvm.org/D36656
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315593
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Lei Huang [Thu, 12 Oct 2017 16:43:33 +0000 (16:43 +0000)]
[PowerPC] Add profitablilty check for conversion to mtctr loops
Add profitability checks for modifying counted loops to use the mtctr instruction.
The latency of mtctr is only justified if there are more than 4 comparisons that
will be removed as a result. Usually counted loops are formed relatively early
and before unrolling, so most low trip count loops often don't survive. However
we want to ensure that if they do, we do not mistakenly update them to mtctr loops.
Use CodeMetrics to ensure we are only doing this for small loops with small trip counts.
Differential Revision: https://reviews.llvm.org/D38212
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315592
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Tim Renouf [Thu, 12 Oct 2017 16:16:41 +0000 (16:16 +0000)]
[AMDGPU] For amdpal, widen interpolation mode workaround
Summary:
The interpolation mode workaround ensures that at least one
interpolation mode is enabled in PSInputAddr. It does not also check
PSInputEna on the basis that the user might enable bits in that
depending on run-time state.
However, for amdpal os type, the user does not enable some bits after
compilation based on run-time states; the register values being
generated here are the final ones set in the hardware. Therefore, apply
the workaround to PSInputAddr and PSInputEnable together. (The case
where a bit is set in PSInputAddr but not in PSInputEnable is where the
frontend set up an input arg for a particular interpolation mode, but
nothing uses that input arg. Really we should have an earlier pass that
removes such an arg.)
Reviewers: arsenm, nhaehnle, dstuttard
Subscribers: kzhuravl, wdng, yaxunl, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D37758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315591
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Don Hinton [Thu, 12 Oct 2017 16:16:06 +0000 (16:16 +0000)]
[dump] Remove NDEBUG from test to enable dump methods [NFC]
Summary:
Add LLVM_FORCE_ENABLE_DUMP cmake option, and use it along with
LLVM_ENABLE_ASSERTIONS to set LLVM_ENABLE_DUMP.
Remove NDEBUG and only use LLVM_ENABLE_DUMP to enable dump methods.
Move definition of LLVM_ENABLE_DUMP from config.h to llvm-config.h so
it'll be picked up by public headers.
Differential Revision: https://reviews.llvm.org/D38406
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315590
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Sanjay Patel [Thu, 12 Oct 2017 16:15:38 +0000 (16:15 +0000)]
[x86] replace isEqualTo with == for efficiency
This is a follow-up suggested in D37534.
Patch by Yulia Koval.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315589
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Simon Pilgrim [Thu, 12 Oct 2017 15:52:01 +0000 (15:52 +0000)]
[X86][SSE] Pull out repeated INSERT_VECTOR_ELT code from LowerBUILD_VECTOR v16i8/v8i16 insertion. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315587
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Vlad Tsyrklevich [Thu, 12 Oct 2017 14:42:26 +0000 (14:42 +0000)]
[cfi-verify] Fix typo, actually check X86 target
The typo in r315556 disabled the cfi-verify unit tests from building
unconditionally, have it correctly check for the X86 target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315581
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Diana Picus [Thu, 12 Oct 2017 13:59:51 +0000 (13:59 +0000)]
MachineInstr: Make isEqual agree with getHashValue in MachineInstrExpressionTrait
MachineInstr::isIdenticalTo has a lot of logic for dealing with register
Defs (i.e. deciding whether to take them into account or ignore them).
This logic gets things wrong in some obscure cases, for instance if an
operand is not a Def for both the current MI and the one we are
comparing to.
I'm not sure if it's possible for this to happen for regular register
operands, but it may happen in the ARM backend for special operands
which use sentinel values for the register (i.e. 0, which is neither a
physical register nor a virtual one).
This causes MachineInstrExpressionTrait::isEqual (which uses
MachineInstr::isIdenticalTo) to return true for the following
instructions, which are the same except for the fact that one sets the
flags and the other one doesn't:
%1114 = ADDrsi %1113, %216, 17, 14, _, def _
%1115 = ADDrsi %1113, %216, 17, 14, _, _
OTOH, MachineInstrExpressionTrait::getHashValue returns different values
for the 2 instructions due to the different isDef on the last operand.
In practice this means that when trying to add those instructions to a
DenseMap, they will be considered different because of their different
hash values, but when growing the map we might get an assertion while
copying from the old buckets to the new buckets because isEqual
misleadingly returns true.
This patch makes sure that isEqual and getHashValue agree, by improving
the checks in MachineInstr::isIdenticalTo when we are ignoring virtual
register definitions (which is what the Trait uses). Firstly, instead of
checking isPhysicalRegister, we use !isVirtualRegister, so that we cover
both physical registers and sentinel values. Secondly, instead of
checking MachineOperand::isReg, we use MachineOperand::isIdenticalTo,
which checks isReg, isSubReg and isDef, which are the same values that
the hash function uses to compute the hash.
Note that the function is symmetric with this change, since if the
current operand is not a Def, we check MachineOperand::isIdenticalTo,
which returns false if the operands have different isDef's.
Differential Revision: https://reviews.llvm.org/D38789
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315579
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Daniel Jasper [Thu, 12 Oct 2017 13:25:05 +0000 (13:25 +0000)]
Reinstantiate old/bad deduplication logic that was removed in r315279.
While this shouldn't be necessary anymore, we have cases where we run
into the assertion below, i.e. cases with two non-fragment entries for the
same variable at different frame indices.
This should be fixed, but for now, we should revert to a version that
does not trigger asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315576
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NAKAMURA Takumi [Thu, 12 Oct 2017 09:42:14 +0000 (09:42 +0000)]
Fix warnings. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315573
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Oliver Stannard [Thu, 12 Oct 2017 09:28:23 +0000 (09:28 +0000)]
[AsmParser] Suppress compile warning for targets with no register diags
This fixes the "switch statement contains 'default' but no 'case' labels"
warnings in table-generated code introduced in r315295.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315571
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Hiroshi Inoue [Thu, 12 Oct 2017 06:26:04 +0000 (06:26 +0000)]
[ScheduleDAGInstrs] fix behavior of getUnderlyingObjectsForCodeGen when no identifiable object found
This patch fixes the bug introduced in https://reviews.llvm.org/D35907; the bug is reported by http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20171002/491452.html.
Before D35907, when GetUnderlyingObjects fails to find an identifiable object, allMMOsOkay lambda in getUnderlyingObjectsForInstr returns false and Objects vector is cleared. This behavior is unintentionally changed by D35907.
This patch makes the behavior for such case same as the previous behavior.
Since D35907 introduced a wrapper function getUnderlyingObjectsForCodeGen around GetUnderlyingObjects, getUnderlyingObjectsForCodeGen is modified to return a boolean value to ask the caller to clear the Objects vector.
Differential Revision: https://reviews.llvm.org/D38735
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315565
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Mikael Holmen [Thu, 12 Oct 2017 06:21:28 +0000 (06:21 +0000)]
[RegisterCoalescer] Don't set read-undef in pruneValues, only clear
Summary:
The comments in the code said
// Remove <def,read-undef> flags. This def is now a partial redef.
but the code didn't just remove read-undef, it could introduce new ones which
could cause errors.
E.g. if we have something like
%vreg1<def> = IMPLICIT_DEF
%vreg2:subreg1<def, read-undef> = op %vreg3, %vreg4
%vreg2:subreg2<def> = op %vreg6, %vreg7
and we merge %vreg1 and %vreg2 then we should not set undef on the second subreg
def, which the old code did.
Now we solve this by actually do what the code comment says. We remove
read-undef flags rather than remove or introduce them.
Reviewers: qcolombet, MatzeB
Reviewed By: MatzeB
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38616
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315564
91177308-0d34-0410-b5e6-
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Justin Bogner [Thu, 12 Oct 2017 04:35:32 +0000 (04:35 +0000)]
Re-commit "llvm-isel-fuzzer: Handle a subset of backend flags in the exec name"
Here we add a secondary option parser to llvm-isel-fuzzer (and provide
it for use with other fuzzers). With this, you can copy the fuzzer to
a name like llvm-isel-fuzzer=aarch64-gisel for a fuzzer that fuzzer
AArch64 with GlobalISel enabled, or fuzzer=x86_64 to fuzz x86, with no
flags required. This should be useful for running these in OSS-Fuzz.
Note that this handrolls a subset of cl::opts to recognize, rather
than embedding a complete command parser for argv[0]. If we find we
really need the flexibility of handling arbitrary options at some
point we can rethink this.
This re-applies 315545 using "=" instead of ":" as a separator for
arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315557
91177308-0d34-0410-b5e6-
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Vlad Tsyrklevich [Thu, 12 Oct 2017 04:17:33 +0000 (04:17 +0000)]
[cfi-verify] Fix unittest failures w/o x86 target
The llvm-cfi-verify unit tests fail if LLVM is built without the X86
target, disable the unit tests from being built unless X86 is enabled
for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315556
91177308-0d34-0410-b5e6-
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Hans Wennborg [Thu, 12 Oct 2017 03:32:09 +0000 (03:32 +0000)]
Revert r315545 "llvm-isel-fuzzer: Handle a subset of backend flags in the executable name"
It broke some tests on Windows:
Failing Tests (4):
LLVM :: tools/llvm-isel-fuzzer/execname-options.ll
LLVM :: tools/llvm-isel-fuzzer/missing-triple.ll
LLVM :: tools/llvm-isel-fuzzer/x86-empty-bc.ll
LLVM :: tools/llvm-isel-fuzzer/x86-empty.ll
> llvm-isel-fuzzer: Handle a subset of backend flags in the executable name
>
> Here we add a secondary option parser to llvm-isel-fuzzer (and provide
> it for use with other fuzzers). With this, you can copy the fuzzer to
> a name like llvm-isel-fuzzer:aarch64-gisel for a fuzzer that fuzzer
> AArch64 with GlobalISel enabled, or fuzzer:x86_64 to fuzz x86, with no
> flags required. This should be useful for running these in OSS-Fuzz.
>
> Note that this handrolls a subset of cl::opts to recognize, rather
> than embedding a complete command parser for argv[0]. If we find we
> really need the flexibility of handling arbitrary options at some
> point we can rethink this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315554
91177308-0d34-0410-b5e6-
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Hongbin Zheng [Thu, 12 Oct 2017 02:54:11 +0000 (02:54 +0000)]
[SimplifyIndVar] Replace IVUsers with loop invariant whenever possible
Differential Revision: https://reviews.llvm.org/D38415
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315551
91177308-0d34-0410-b5e6-
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Justin Bogner [Thu, 12 Oct 2017 02:28:26 +0000 (02:28 +0000)]
docs: Add some links to OSS Fuzz
I'd left a couple of stray links here in a previous commit rather than
writing a paragraph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315550
91177308-0d34-0410-b5e6-
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Justin Bogner [Thu, 12 Oct 2017 02:04:39 +0000 (02:04 +0000)]
docs: Try to fix sphinx build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315546
91177308-0d34-0410-b5e6-
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Justin Bogner [Thu, 12 Oct 2017 01:57:49 +0000 (01:57 +0000)]
llvm-isel-fuzzer: Handle a subset of backend flags in the executable name
Here we add a secondary option parser to llvm-isel-fuzzer (and provide
it for use with other fuzzers). With this, you can copy the fuzzer to
a name like llvm-isel-fuzzer:aarch64-gisel for a fuzzer that fuzzer
AArch64 with GlobalISel enabled, or fuzzer:x86_64 to fuzz x86, with no
flags required. This should be useful for running these in OSS-Fuzz.
Note that this handrolls a subset of cl::opts to recognize, rather
than embedding a complete command parser for argv[0]. If we find we
really need the flexibility of handling arbitrary options at some
point we can rethink this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315545
91177308-0d34-0410-b5e6-
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Justin Bogner [Thu, 12 Oct 2017 01:44:24 +0000 (01:44 +0000)]
docs: Add some information about Fuzzing LLVM itself
This splits some content out of the libFuzzer docs and adds a fair
amount of detail about the fuzzers in LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315544
91177308-0d34-0410-b5e6-
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Reid Kleckner [Thu, 12 Oct 2017 00:28:28 +0000 (00:28 +0000)]
Speculative build fix 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315542
91177308-0d34-0410-b5e6-
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Wei Mi [Thu, 12 Oct 2017 00:24:52 +0000 (00:24 +0000)]
Revert r307036 because of PR34919.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315540
91177308-0d34-0410-b5e6-
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Reid Kleckner [Thu, 12 Oct 2017 00:20:50 +0000 (00:20 +0000)]
Speculative build fix, apparently I built llc without my patch applied to test it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315539
91177308-0d34-0410-b5e6-
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Reid Kleckner [Thu, 12 Oct 2017 00:06:57 +0000 (00:06 +0000)]
[codeview] Disable FPO in functions using EH funclets
Funclets are emitted by WinException which doesn't have access to
X86TargetStreamer so it's hard to make a quick fix for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315538
91177308-0d34-0410-b5e6-
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Zachary Turner [Wed, 11 Oct 2017 23:54:34 +0000 (23:54 +0000)]
Revert "[ADT] Make Twine's copy constructor private."
This reverts commit
4e4ee1c507e2707bb3c208e1e1b6551c3015cbf5.
This is failing due to some code that isn't built on MSVC
so I didn't catch. Not immediately obvious how to fix this
at first glance, so I'm reverting for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315536
91177308-0d34-0410-b5e6-
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Reid Kleckner [Wed, 11 Oct 2017 23:53:36 +0000 (23:53 +0000)]
Fix AMDGPU build issue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315535
91177308-0d34-0410-b5e6-
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Reid Kleckner [Wed, 11 Oct 2017 23:53:12 +0000 (23:53 +0000)]
[X86] Sink X86AsmPrinter ctor into .cpp file, NFC
I keep adding and removing code here, so let's sink it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315534
91177308-0d34-0410-b5e6-
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Lang Hames [Wed, 11 Oct 2017 23:34:47 +0000 (23:34 +0000)]
[MC] Have MCObjectStreamer take its MCAsmBackend argument via unique_ptr.
MCObjectStreamer owns its MCCodeEmitter -- this fixes the types to reflect that,
and allows us to remove the last instance of MCObjectStreamer's weird "holding
ownership via someone else's reference" trick.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315531
91177308-0d34-0410-b5e6-
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Zachary Turner [Wed, 11 Oct 2017 23:33:06 +0000 (23:33 +0000)]
[ADT] Make Twine's copy constructor private.
There's a lot of misuse of Twine scattered around LLVM. This
ranges in severity from benign (returning a Twine from a function
by value that is just a string literal) to pretty sketchy (storing
a Twine by value in a class). While there are some uses for
copying Twines, most of the very compelling ones are confined
to the Twine class implementation itself, and other uses are
either dubious or easily worked around.
This patch makes Twine's copy constructor private, and fixes up
all callsites.
Differential Revision: https://reviews.llvm.org/D38767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315530
91177308-0d34-0410-b5e6-
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Vlad Tsyrklevich [Wed, 11 Oct 2017 23:17:29 +0000 (23:17 +0000)]
MC Helpers for llvm-cfi-verify.
Add instruction analysis and machinecode traversal helpers in
preparation for control flow graph generation implementation.
Reviewers: vlad.tsyrklevich
Reviewed By: vlad.tsyrklevich
Subscribers: mgorny, llvm-commits, pcc, kcc
Differential Revision: https://reviews.llvm.org/D38424
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315528
91177308-0d34-0410-b5e6-
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NAKAMURA Takumi [Wed, 11 Oct 2017 23:03:05 +0000 (23:03 +0000)]
MachineOptimizationRemarkEmitter.h: Appease g++-4.8.2. See also rL313715.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315527
91177308-0d34-0410-b5e6-
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Konstantin Zhuravlyov [Wed, 11 Oct 2017 22:59:35 +0000 (22:59 +0000)]
AMDGPU/NFC: Minor clean ups in HSA metadata
- Use HSA metadata streamer directly from AMDGPUAsmPrinter
- Make naming consistent with PAL metadata
Differential Revision: https://reviews.llvm.org/D38746
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315526
91177308-0d34-0410-b5e6-
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Konstantin Zhuravlyov [Wed, 11 Oct 2017 22:41:09 +0000 (22:41 +0000)]
AMDGPU/NFC: Minor clean ups in PAL metadata
- Move PAL metadata definitions to AMDGPUMetadata
- Make naming consistent with HSA metadata
Differential Revision: https://reviews.llvm.org/D38745
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315523
91177308-0d34-0410-b5e6-
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Konstantin Zhuravlyov [Wed, 11 Oct 2017 22:18:53 +0000 (22:18 +0000)]
AMDGPU/NFC: Rename code object metadata as HSA metadata
- Rename AMDGPUCodeObjectMetadata to AMDGPUMetadata (PAL metadata will be included in this file in the follow up change)
- Rename AMDGPUCodeObjectMetadataStreamer to AMDGPUHSAMetadataStreamer
- Introduce HSAMD namespace
- Other minor name changes in function and test names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315522
91177308-0d34-0410-b5e6-
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Hans Wennborg [Wed, 11 Oct 2017 22:04:14 +0000 (22:04 +0000)]
Support: Work around missing SetFileInformationByHandle on Wine
In r315079, fs::rename was reimplemented in terms of CreateFile and
SetFileInformationByHandle. Unfortunately, the latter isn't supported by
Wine. This adds a fallback to MoveFileEx for that case.
Differential Revision: https://reviews.llvm.org/D38817
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315520
91177308-0d34-0410-b5e6-
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Eugene Zelenko [Wed, 11 Oct 2017 21:56:44 +0000 (21:56 +0000)]
[Transforms] Revert r315516 changes in PredicateInfo to fix Windows build bots (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315519
91177308-0d34-0410-b5e6-
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Eugene Zelenko [Wed, 11 Oct 2017 21:41:43 +0000 (21:41 +0000)]
[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315516
91177308-0d34-0410-b5e6-
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Reid Kleckner [Wed, 11 Oct 2017 21:27:54 +0000 (21:27 +0000)]
Really fix llvm-rc include-paths.test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315515
91177308-0d34-0410-b5e6-
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Reid Kleckner [Wed, 11 Oct 2017 21:25:03 +0000 (21:25 +0000)]
Attempt to fix failing llvm-rc include-paths.text
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315514
91177308-0d34-0410-b5e6-
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Reid Kleckner [Wed, 11 Oct 2017 21:24:33 +0000 (21:24 +0000)]
[codeview] Implement FPO data assembler directives
Summary:
This adds a set of new directives that describe 32-bit x86 prologues.
The directives are limited and do not expose the full complexity of
codeview FPO data. They are merely a convenience for the compiler to
generate more readable assembly so we don't need to generate tons of
labels in CodeGen. If our prologue emission changes in the future, we
can change the set of available directives to suit our needs. These are
modelled after the .seh_ directives, which use a different format that
interacts with exception handling.
The directives are:
.cv_fpo_proc _foo
.cv_fpo_pushreg ebp/ebx/etc
.cv_fpo_setframe ebp/esi/etc
.cv_fpo_stackalloc 200
.cv_fpo_endprologue
.cv_fpo_endproc
.cv_fpo_data _foo
I tried to follow the implementation of ARM EHABI CFI directives by
sinking most directives out of MCStreamer and into X86TargetStreamer.
This helps avoid polluting non-X86 code with WinCOFF specific logic.
I used cdb to confirm that this can show locals in parent CSRs in a few
cases, most importantly the one where we use ESI as a frame pointer,
i.e. the one in http://crbug.com/756153#c28
Once we have cdb integration in debuginfo-tests, we can add integration
tests there.
Reviewers: majnemer, hans
Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D38776
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315513
91177308-0d34-0410-b5e6-
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Krzysztof Parzyszek [Wed, 11 Oct 2017 21:20:43 +0000 (21:20 +0000)]
[Hexagon] Make sure that new-value jump is packetized with producer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315510
91177308-0d34-0410-b5e6-
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Vlad Tsyrklevich [Wed, 11 Oct 2017 20:35:01 +0000 (20:35 +0000)]
Reland 'Classify llvm-cfi-verify.'
Summary: Move llvm-cfi-verify into a class in preparation for CFI analysis to come.
Reviewers: vlad.tsyrklevich
Reviewed By: vlad.tsyrklevich
Subscribers: mgorny, llvm-commits, pcc, kcc
Differential Revision: https://reviews.llvm.org/D38379
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315504
91177308-0d34-0410-b5e6-
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Florian Hahn [Wed, 11 Oct 2017 20:25:58 +0000 (20:25 +0000)]
[MachineCombiner] Fix initialisation of LastUpdate for incremental update.
Summary:
Fixes a bogus iterator resulting from the removal of a block's first instruction at the point that incremental update is enabled.
Patch by Paul Walker.
Reviewers: fhahn, Gerolf, efriedma, MatzeB
Reviewed By: fhahn
Subscribers: aemerson, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D38734
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315502
91177308-0d34-0410-b5e6-
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Zachary Turner [Wed, 11 Oct 2017 20:23:38 +0000 (20:23 +0000)]
Fix incorrect integer literal suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315501
91177308-0d34-0410-b5e6-
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Lei Huang [Wed, 11 Oct 2017 20:20:58 +0000 (20:20 +0000)]
[PowerPC] Utilize DQ-Form instructions for spill/restore and fix FrameIndex elimination to only use `lis/addi` if necessary.
Currently we produce a bunch of unnecessary code when emitting the
prologue/epilogue for spills/restores. Namely, if the load from stack
slot/store to stack slot instruction is an X-Form instruction, we will
always produce an LIS/ORI sequence for the stack offset.
Furthermore, we have not exploited the P9 vector D-Form loads/stores for this
purpose.
This patch address both issues.
Specifying the D-Form load as the instruction to use for stack spills/reloads
should be safe because:
1. The stack should be aligned according to the ABI
2. If the stack isn't aligned, PPCRegisterInfo::eliminateFrameIndex() will
check for the offset being a multiple of 16 and will convert it to an
X-Form instruction if it isn't.
Differential Revision : https://reviews.llvm.org/D38758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315500
91177308-0d34-0410-b5e6-
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Zachary Turner [Wed, 11 Oct 2017 20:12:09 +0000 (20:12 +0000)]
[llvm-rc] Use proper search algorithm for finding resources.
Previously we would only look in the current directory for a
resource, which might not be the same as the directory of the
rc file. Furthermore, MSVC rc supports a /I option, and can
also look in the system environment. This patch adds support
for this search algorithm.
Differential Revision: https://reviews.llvm.org/D38740
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315499
91177308-0d34-0410-b5e6-
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Daniel Neilson [Wed, 11 Oct 2017 19:05:14 +0000 (19:05 +0000)]
[SCEV] Properly handle the case of a non-constant start with a zero accum in ScalarEvolution::createAddRecFromPHIWithCastsImpl
Summary:
This patch fixes an error in the patch to ScalarEvolution::createAddRecFromPHIWithCastsImpl
made in D37265. In that patch we handle the cases where the either the start or accum values can be
zero after truncation. But, we assume that the start value must be a constant if the accum is
zero. This is clearly an erroneous assumption. This change removes that assumption.
Reviewers: sanjoy, dorit, mkazantsev
Reviewed By: sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38814
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315491
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Sanjay Patel [Wed, 11 Oct 2017 18:24:21 +0000 (18:24 +0000)]
[x86] avoid infinite loop from SoftenFloatOperand (PR34866)
Legalization of fp128 assumes things that we should have asserts for,
so that's another potential improvement.
Differential Revision: https://reviews.llvm.org/D38771
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315485
91177308-0d34-0410-b5e6-
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Jake Ehrlich [Wed, 11 Oct 2017 18:09:18 +0000 (18:09 +0000)]
Reland "[llvm-objcopy] Add support for --strip-sections to remove all section headers leaving only program headers and loadable segment data"
ubsan caught an issue I made where I was converting a null pointer to a
reference.
elf utils implements a particularly extreme form of stripping that I'd
like to support. eu-strip has an option called "strip-sections" that
removes all section headers and leaves only program headers and the
segment data. I have implemented this option partly as a test but mainly
because in Fuchsia we would like to use this option to minimize the size
of our executables. The other strip options that are on my list include
--strip-all and --strip-debug. This is a preliminary implementation that
I'd like to start using in Fuchsia builds if possible. This change
implements such a stripping option for llvm-objcopy
Differential Revision: https://reviews.llvm.org/D38335
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315484
91177308-0d34-0410-b5e6-
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Rafael Espindola [Wed, 11 Oct 2017 18:07:18 +0000 (18:07 +0000)]
Convert the last uses of ErrorOr in include/llvm/Object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315483
91177308-0d34-0410-b5e6-
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Lei Huang [Wed, 11 Oct 2017 18:04:41 +0000 (18:04 +0000)]
[NFC] update test case so checks are not order dependent when not needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315482
91177308-0d34-0410-b5e6-
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Rafael Espindola [Wed, 11 Oct 2017 17:35:48 +0000 (17:35 +0000)]
Remove unused include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315481
91177308-0d34-0410-b5e6-
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Rafael Espindola [Wed, 11 Oct 2017 17:33:11 +0000 (17:33 +0000)]
Convert the last uses of ErrorOr in COFF.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315480
91177308-0d34-0410-b5e6-
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Rafael Espindola [Wed, 11 Oct 2017 17:23:15 +0000 (17:23 +0000)]
Convert a few ErrorOr to Expected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315477
91177308-0d34-0410-b5e6-
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Vivek Pandya [Wed, 11 Oct 2017 17:12:59 +0000 (17:12 +0000)]
[NFC] Convert OptimizationRemarkEmitter old emit() calls to new closure
parameterized emit() calls
Summary: This is not functional change to adopt new emit() API added in r313691.
Reviewed By: anemet
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38285
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315476
91177308-0d34-0410-b5e6-
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Rafael Espindola [Wed, 11 Oct 2017 17:05:24 +0000 (17:05 +0000)]
Convert a couple of ErrorOr to Expected. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315475
91177308-0d34-0410-b5e6-
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Rafael Espindola [Wed, 11 Oct 2017 16:58:32 +0000 (16:58 +0000)]
Remove an unused include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315474
91177308-0d34-0410-b5e6-
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Rafael Espindola [Wed, 11 Oct 2017 16:56:33 +0000 (16:56 +0000)]
Convert an ErrorOr to Expected.
getRelocationAddend should never be called on non SHT_RELA sections,
but changing that requires changing RelocVisitor.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315473
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Krzysztof Parzyszek [Wed, 11 Oct 2017 16:15:31 +0000 (16:15 +0000)]
[Hexagon] Handle non-immediate operands to A2_addi in getIncrementValue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315472
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Wed, 11 Oct 2017 16:10:05 +0000 (16:10 +0000)]
Spelling mistake in comment. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315471
91177308-0d34-0410-b5e6-
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Craig Topper [Wed, 11 Oct 2017 16:05:05 +0000 (16:05 +0000)]
[X86] Remove MVT::i1 handling code from LowerTRUNCATE
Summary: I don't think this is necessary with i1 being illegal now.
Reviewers: RKSimon, zvi, guyblank
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38784
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315469
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Krzysztof Parzyszek [Wed, 11 Oct 2017 15:59:51 +0000 (15:59 +0000)]
[Pipeliner] Fix offset value for instrs dependent on post-inc load/stores
The software pipeliner and the packetizer try to break dependence
between the post-increment instruction and the dependent memory
instructions by changing the base register and the offset value.
However, in some cases, the existing logic didn't work properly
and created incorrect offset value.
Patch by Jyotsna Verma.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315468
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Krzysztof Parzyszek [Wed, 11 Oct 2017 15:51:44 +0000 (15:51 +0000)]
[Pipeliner] Improve serialization order for post-increments
The pipeliner is generating a serial sequence that causes poor
register allocation when a post-increment instruction appears
prior to the use of the post-increment register. This occurs when
there is a circular set of dependences involved with a sequence
of instructions in the same cycle. In this case, there is no
serialization of the parallel semantics that will not cause an
additional register to be allocated.
This patch fixes the problem by changing the instructions so that
the post-increment instruction is used by the subsequent
instruction, which enables the register allocator to make a
better decision and not require another register.
Patch by Brendon Cahoon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315466
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Sanjay Patel [Wed, 11 Oct 2017 14:29:17 +0000 (14:29 +0000)]
[InstCombine] add baseline tests for D38531; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315461
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Sanjay Patel [Wed, 11 Oct 2017 14:12:16 +0000 (14:12 +0000)]
[DAGCombiner] convert insertelement of bitcasted vector into shuffle
Eg:
insert v4i32 V, (v2i16 X), 2 --> shuffle v8i16 V', X', {0,1,2,3,8,9,6,7}
This is a generalization of the IR fold in D38316 to handle insertion into a non-undef vector.
We may want to abandon that one if we can't find value in squashing the more specific pattern sooner.
We're using the existing legal shuffle target hook to avoid AVX512 horror with vXi1 shuffles.
There may be room for improvement in the shuffle lowering here, but that would be follow-up work.
Differential Revision: https://reviews.llvm.org/D38388
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315460
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Jonas Devlieghere [Wed, 11 Oct 2017 13:51:30 +0000 (13:51 +0000)]
Revert "[dsymutil] Timestmap verification for __swift_ast"
This reverts commit r315456.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315458
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Alex Bradbury [Wed, 11 Oct 2017 13:48:45 +0000 (13:48 +0000)]
[TargetLowering] Correctly track NumFixedArgs field of CallLoweringInfo
The NumFixedArgs field of CallLoweringInfo is used by
TargetLowering::LowerCallTo to determine whether a given argument is passed
using the vararg calling convention or not (specifically, to set IsFixed for
each ISD::OutputArg).
Firstly, CallLoweringInfo::setLibCallee and CallLoweringInfo::setCallee both
incorrectly set NumFixedArgs based on the _previous_ args list. Secondly,
TargetLowering::LowerCallTo failed to increment NumFixedArgs when modifying
the argument list so a pointer is passed for the return value.
If your backend uses the IsFixed property or directly accesses NumFixedArgs,
it is _possible_ this change could result in codegen changes (although the
previous behaviour would have been incorrect). No such cases have been
identified during code review for any in-tree architecture.
Differential Revision: https://reviews.llvm.org/D37898
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315457
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Jonas Devlieghere [Wed, 11 Oct 2017 13:34:52 +0000 (13:34 +0000)]
[dsymutil] Timestmap verification for __swift_ast
This patch adds timestamp verification for swiftmodule files.
- A new flag is provided to allows us to continue testing of the code
for embedding the__swift_ast. (git doesn't maintain timestamps)
- Adds a new test for fat (arm) binaries.
Differential revision: https://reviews.llvm.org/D38686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315456
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Alex Bradbury [Wed, 11 Oct 2017 12:09:06 +0000 (12:09 +0000)]
[RISCV] Fix build after r315327
Differential Revision: https://reviews.llvm.org/D38779
Patch by Chih-Mao Chen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315455
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